JP2002078197A - Power control system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the number of connection lines to send a sleep release signal to a sleep controller from a detected signal generator circuit. SOLUTION: This control system has a sleep controller 2, a print engine controller 3 to carry out printing, a detected signal generator 4 to detect the cause to release sleeping and to generate a sleep release signal depending on the cause, a signal collecting circuit 11 to collect the sleep release signals generated in the detected signal generator 4 into a single sleep release signal, a single connection line 12 to send the collected sleep release signal generated in the signal collecting circuit 11, and a consumption power saving circuit 8 controlled by the sleep controller and to cut off power to the print engine controller 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power control device for reducing power consumption in a standby state in which a printer waits for print data, that is, in a printer sleep state.

[0002]

2. Description of the Related Art FIG. 6 is a block diagram showing a conventional power control device.

As shown in the figure, a conventional power control device for reducing power consumption during printer sleep is provided in a print engine 9 in a printer 6 connected to the communication device 1.

[0004] The power control device is a sleep controller 2
And a print engine controller 3 for executing a printing operation
A detection signal is sent to the print engine controller 3 via the connection line 5 and to the sleep controller 2 via the connection line 7, generating a sleep state cancellation signal corresponding to each factor by detecting a factor for canceling the sleep state. The power supply includes a generation circuit 4 and a power consumption saving circuit 8 that is controlled by the sleep controller 2 to cut off or reduce power supply to the print engine controller 3.

[0005] The operation of the power control device in the conventional printer configured as described above will be described.

In order to save the power consumption in the print data waiting state from the communication device 1, that is, in the standby state, the sleep controller 2 cuts off or reduces the power supply to the print engine controller 3 through the power consumption saving circuit 8, The state shifts from the normal standby state to the sleep state.

In such a sleep state, when the detection signal generation circuit 4 detects that the sleep state is to be released, a sleep state release signal is generated and transmitted to the print engine controller 3 and the sleep controller 2. send. As a result, the sleep state in the print engine controller 3 is released, the supply of power necessary for the printing operation is restarted, and the printer shifts to the normal standby state.

[0008]

As described above, in the conventional power control device, the sleep state release signal generated by the detection signal generation circuit is sent to the print engine controller and the sleep controller. Therefore, the same number of connection lines for transmitting signals to both need to be provided independently of each other.

Since there are various sleep canceling factors described above, connection lines are provided in the print engine controller and the sleep controller corresponding to each factor.
Therefore, the number of connection lines is required twice as many as the number of sleep canceling factors.

[0010] In this case, an increase in the number of connectors, an increase in the wiring board area, and an increase in the number of controller detection terminals cause an increase in cost and restrictions on design.

Accordingly, an object of the present invention is to provide a power control device capable of reducing the number of connection lines for transmitting a sleep state release signal from a detection signal generation circuit to a sleep controller.

[0012]

In order to solve this problem, a power control apparatus according to the present invention detects a sleep controller, a print engine controller for executing a printing operation, and a factor for canceling a sleep state. Generates a sleep state release signal corresponding to each factor and sends it to the print engine controller.Sleep state release signals for each factor generated by the detection signal generation circuit are aggregated into a single sleep state. A signal aggregating circuit for aggregating a sleep state release signal as a release signal, a single connection line for sending the aggregating sleep state aggregating signal generated by the signal aggregating circuit to the sleep controller, and a print engine controller controlled by the sleep controller for operation. And a power saving circuit that cuts off or reduces power supply to the That.

Thus, the sleep state release signals for each factor generated by the detection signal generation circuit are aggregated into a sleep state release aggregate signal, and the sleep state release aggregate signal is sent to the sleep controller. The number of connection lines for transmitting the sleep state release signal from the signal generation circuit to the sleep controller can be reduced to one.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention according to claim 1 of the present invention provides a sleep controller, a print engine controller for executing a printing operation, and a sleep mode corresponding to each factor by detecting factors for canceling the sleep state. A sleep state that generates a state release signal and sends it to the print engine controller, and a sleep state release signal that combines the sleep state release signals for each factor generated by the detection signal generation circuit. A signal aggregation circuit that makes the release aggregation signal, a single connection line that sends the sleep state release aggregation signal generated by the signal aggregation circuit to the sleep controller, and the operation is controlled by the sleep controller to cut off the power supply to the print engine controller Or a power control device having a reduced power consumption saving circuit,
A power control device, wherein the signal aggregation circuit is configured by a set of OR elements having a stacked structure, or a simple wired OR circuit, and the detection signal generation circuit sleeps to a sleep controller. This has the effect of enabling the signal aggregation circuit to be configured efficiently and at low cost so that the number of connection lines transmitting the release signal can be reduced to one.

FIG. 1 shows an embodiment of the present invention.
This will be described with reference to FIG.

FIG. 1 is a block diagram showing a power control device according to an embodiment of the present invention. FIG. 2 is a diagram showing a detection signal and a signal aggregation circuit in a detection signal generating circuit in the power control device according to an embodiment of the present invention. FIG. 3 is a circuit configuration diagram of a signal aggregation circuit in the power control device according to one embodiment of the present invention, and FIG. 4 is a diagram illustrating a detection signal generation in the power control device according to one embodiment of the present invention. FIG. 5 is a timing chart showing a detection signal in the circuit and a detection output from the signal aggregation circuit. FIG. 5 is an explanatory diagram showing a circuit configuration of the signal aggregation circuit of the power control device according to the embodiment of the present invention.

The power control device according to the present embodiment is provided in a print engine 9 which is a print execution unit in a printer 6 connected to a communication device 1 such as a personal computer for transmitting predetermined data such as image data. I have.

The power control device includes a sleep controller 2 that is dedicated or shared with an image controller or the like.
The print engine controller 3 for controlling the entire print engine 9 to execute a printing operation, and factors for canceling the sleep state (for example, door operation, paper cassette operation, paper jam clearance, reception of print data from the communication device 1, etc.) ) Is detected, and a sleep state release signal corresponding to each factor is generated.
And a signal aggregating circuit 11 for aggregating a sleep state canceling signal for each factor generated by the detection signal generating circuit 4 into a sleep state canceling aggregate signal which is a single sleep state canceling signal. A single connection line 12 that sends the sleep state release aggregation signal generated by the signal aggregation circuit 11 to the sleep controller 2, and consumption that is controlled by the sleep controller 2 to cut off or reduce power supply to the print engine controller 3. Power saving circuit 8
And

In the present embodiment, saving power consumption includes both stopping power consumption and reducing power consumption.

Next, the operation of the power control device in the thus configured printer of the present embodiment will be described.

When the power consumption in the print data waiting state from the communication device 1, that is, in the standby state, is saved, the sleep controller 2 cuts off or reduces the power supply to the print engine controller 3 via the power consumption saving circuit 8. The state shifts from the normal standby state to the sleep state.

In such a sleep state, when the detection signal generation circuit 4 detects that the sleep state is to be released, a sleep state release signal is generated and sent to the print engine controller 3. Further, in the signal aggregating circuit 11, a plurality of sleep state canceling signals for each factor generated by the detection signal generating circuit 4 are aggregated according to the timing charts shown in FIGS. 2 and 4, and a sleep state canceling aggregated signal is generated. The signal is sent to the sleep controller 2 through the connection line 12. As a result, the sleep state in the print engine controller 3 is released, the supply of power required for the printing operation is restarted, and the printer shifts to the normal standby state.

Here, the aggregation of the sleep state release signals will be described with reference to the timing charts of FIGS.

Conventionally, identification information (door,
It has been determined whether or not the sleep state should be released based on the paper cassette or the like and the state information (opening / closing of the door, presence / absence of paper, etc.). However, if the condition for transition to the sleep state is limited to a state in which all doors are closed and all attachments are mounted in the detection target unit, any one or more unspecified in the detection target unit Since the user has accessed the printer only when the door has been opened or the attached object has been detached, the user has not specified information (door, paper cassette, etc.) of the detection target, but one of unspecified in the detection target. Only the information on the opening of the door or the detachment of the attachment can be used as the information for determining the sleep state release.

Then, as shown in FIG. 2 and FIG. 4, in response to the detection signal 1 to the detection signal n, the time at which any one or more unspecified doors are opened or the attachment is detached is detected. In this case, a single detection output can be taken out, and the detection output can be used as a signal for releasing the sleep state.

FIG. 2 is a timing chart showing a detection signal in the detection signal generation circuit and a detection output from a signal aggregation circuit composed of a set of OR elements having a laminated structure. This is a positive logic output.

FIG. 4 is a timing chart showing a detection signal in the detection signal generation circuit and a detection output from a signal aggregation circuit constituted by a simple wired OR circuit. The output is a negative logic output.

As described above, according to the power control apparatus of the present embodiment, the sleep state release signals for each factor generated by the detection signal generation circuit 4 are aggregated to form a single sleep state release signal. Since the sleep state release aggregated signal is transmitted to the sleep controller 2, the number of connection lines for transmitting the sleep state release signal from the detection signal generation circuit to the sleep controller is reduced to one. It becomes possible.

Here, an example of the circuit configuration of the signal aggregation circuit 11 is shown in FIG. 3 and FIG.

As shown in FIG.
In FIG. 5, a set of OR elements having a laminated structure is formed, and in FIG. 5, a simple wired OR circuit is formed.

In such a signal aggregation circuit 11, as shown in FIG. 3, the detection signals 1 to n are input to respective OR elements. Then, the outputs of the OR elements are sequentially input to the next OR element, and one finally output is extracted from the last OR element.

In FIG. 5, the detection signals 1 to n are input to the respective transistors forming the simple wired OR. Then, one output finally collected as a simple wired OR output is extracted.

As a result, it is possible to efficiently configure the signal aggregation circuit 11 at low cost.

[0034]

As described above, according to the present invention, the number of connection lines for transmitting the sleep state release signal from the detection signal generation circuit to the sleep controller is reduced to one, the number of connection devices is increased, and the wiring board is increased. A signal aggregation circuit to reduce costs and expand the degree of freedom in equipment design by eliminating the increase in area and the number of controller detection terminals.
If it is composed of a set of OR elements with a laminated structure or a simple wired OR circuit, the signal aggregation circuit can be made more efficient,
An effective effect that the configuration can be realized at low cost is obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a power control device according to an embodiment of the present invention.

FIG. 2 is a timing chart showing a detection signal in a detection signal generation circuit and a detection output from a signal aggregation circuit in the power control device according to one embodiment of the present invention;

FIG. 3 is a circuit configuration diagram of a signal aggregation circuit in the power control device according to the embodiment of the present invention;

FIG. 4 is a timing chart showing a detection signal in a detection signal generation circuit and a detection output from a signal aggregation circuit in the power control device according to one embodiment of the present invention;

FIG. 5 is an explanatory diagram showing a circuit configuration of a signal aggregation circuit of the power control device according to the embodiment of the present invention.

FIG. 6 is a block diagram showing a conventional power control device.

[Explanation of symbols]

 2 sleep controller 3 print engine controller 4 detection signal generation circuit 8 power consumption saving circuit 11 signal aggregation circuit 12 connection line

Claims (1)

[Claims] 1. A sleep controller, a print engine controller for executing a printing operation, and detecting a factor for canceling a sleep state, generating a sleep state canceling signal corresponding to each factor, and sending the signal to the print engine controller. A detection signal generation circuit to be sent, a signal aggregation circuit that aggregates sleep state release signals for each factor generated by the detection signal generation circuit into a single sleep state release signal to be a sleep state release aggregate signal, and the signal A single connection line for sending a sleep state release aggregation signal generated by an aggregation circuit to the sleep controller; a power consumption saving circuit that is controlled by the sleep controller to cut off or reduce power supply to the print engine controller; It is a power control device characterized by having, wherein the signal aggregation circuit, Set of logical Motoko Kazu layered structure,
Alternatively, a power control device comprising a simple wired OR circuit.