JP2002076202A - Structure and method for packaging semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent burnout of wiring and the cracks of resist at the lower portion of the end of a sealing material due to thermal stresses being generated between a semiconductor device and a packaging substrate, while protecting a solder bump from vibration or the like, when filling the sealing material into clearance formed between the semiconductor device and the packaging substrate having the solder bump, and to delay their progress in t he burnout of the wiring and generation of the cracks. SOLUTION: The semiconductor device 12 and substrate 14 are inverted, when an underfill resin 18 is cured, the semiconductor device 12 is positioned downward in a vertical direction to the substrate 14 for precipitating a filler constituent at the side of the semiconductor device (an underfill resin 18a on the side of the semiconductor device), and at the same time, the content of the filler constituent at the side of the substrate (an underfill resin 18b on the side of the substrate) is reduced, thus achieving a sufficient physical property for protecting the solder bump in the underfill resin 18a on the side of the semiconductor device, and at the same time, achieving physical property for reducing the thermal stress generated at a section to the substrate 14 in the underfill resin 18b on the side of the substrate.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a mounting structure and a mounting method of a semiconductor device, and more specifically, to a BGA.
The present invention relates to a mounting structure and a mounting method of a semiconductor device having solder bumps such as (Ball Grid Array) and FC (Flip Chip) on a mounting substrate.

[0002]

2. Description of the Related Art FIGS. 3 and 4 show a mounting structure and a mounting method of a semiconductor device according to the prior art.

Referring to FIG. 3, a method of mounting a semiconductor device according to the prior art will be described. First, as shown in FIG.
2 and the mounting board 104 are connected. This connection is performed by heating and melting (reflowing) the solder bumps 100 while contacting the electrode pads (not shown) provided on the mounting substrate 104. Note that the mounting substrate 104 is
4a and a resist (a resist and a build-up layer in the case of a build-up substrate manufactured by a build-up method) 104b covering a portion not requiring soldering.

When the semiconductor device 102 and the mounting board 104 connected as described above are placed in an environment where a temperature change, vibration, or impact occurs, such as an engine room of a vehicle, a repetitive thermal load, more specifically, The thermal stress generated due to the difference between the linear expansion coefficient and the elastic coefficient between the semiconductor device 102 and the mounting board 104 is concentrated on the solder bump 100, and the stress due to vibration and impact is also concentrated on the solder bump 100. Cracks may occur.

For this reason, conventionally, a gap formed between the semiconductor device 102 and the mounting board 104 is filled with a sealing material (underfill resin), so that the thermal stress concentrated on the solder bumps 100 and the stress due to vibration and impact. Is dispersed in the sealing material, thereby suppressing the occurrence of cracks in the solder bumps 100.

More specifically, as shown in FIG. 3B, a sealing material 108 is applied on a mounting substrate 104 around the semiconductor device 102 by using a needle 106 or the like. The applied sealing material 108 fills the gap between the semiconductor device 102 and the mounting substrate 104 without gaps by the capillary phenomenon as shown in FIG. 3C, thereby completing the mounting structure of the semiconductor device according to the prior art. . When the sealing material 108 is filled,
Usually, a fillet is formed from the end of the semiconductor device 102 to the mounting substrate 104 outside the end. FIG. 4 is a plan view of FIG. 3C, that is, a top view of the mounting structure of the semiconductor device according to the related art.

[0007]

As described above, when filling the gap between the semiconductor device 102 and the mounting substrate 104 with the sealing material 108 in order to suppress the occurrence of cracks in the solder bumps 100, the sealing material to be filled is used. Physical property value (property) of 108
For that purpose, it is preferable that the coefficient of linear expansion be low (the amount of expansion and contraction caused by temperature change is small) and the elastic coefficient is large (the amount of deformation caused by stress is small). In particular,
In many cases, a sealing material whose main component is an epoxy resin having a linear expansion coefficient of about 20 to 40 [ppm / ° C.] and an elastic coefficient of about 5 to 10 [GPa] is used.

The physical properties of the sealing material 108 can be adjusted according to the purpose by adding a filler component, for example, a metal or silica (SiO ₂ ).

On the other hand, the physical properties of the mounting board 104 are based on the glass epoxy base material 104a which is widely used in general.
The linear expansion coefficient is about 12 to 16 ppm / ° C. and the elastic coefficient is about 20 GPa.

The resist (or the resist and the build-up substrate) 104b has a linear expansion coefficient of 40-7.
About 0 [ppm / ° C], elastic coefficient is 1-3 [GPa]
It is about.

As described above, the sealing material 108 and the mounting substrate 10
4 (base material 104a, resist (or resist and build-up layer) 104b) have significantly different coefficients of linear expansion and elasticity. For this reason, as described above, similarly to the case where thermal stress is generated due to the difference between the linear expansion coefficient and the elastic coefficient between the semiconductor device 102 and the mounting substrate 104, the linear expansion coefficient and the Thermal stress also occurs due to the difference in elastic modulus.

The thermal stress generated between the sealing material 108 and the mounting substrate 104, more specifically, between the resist (or the resist and the build-up layer) 104b is caused by the end of the sealing material 112 shown in FIGS. Part, more particularly at the end of the fillet caused by surface tension. As a result, the wiring 114 disposed below the end 112 may be disconnected, leading to a reduction in the reliability of the connection.

If the coefficient of linear expansion and the coefficient of elasticity of the sealing material 108 are set to values close to those of the mounting substrate 104, thermal stress generated between the sealing material 108 and the resist (or the resist and the build-up layer) 104b is reduced. Reduce and wiring 1
14 is less likely to break, but the solder bumps 10
It goes without saying that the original purpose of protecting 0 cannot be sufficiently achieved.

Accordingly, an object of the present invention is to fill a gap between a semiconductor device and a mounting board with a sealing material to protect solder bumps and prevent disconnection of wiring arranged below an end of the sealing material.
Another object of the present invention is to provide a semiconductor device mounting structure and a mounting method capable of delaying the progress and thereby improving the connection reliability.

The resist (or the resist and the build-up layer) 104b below the end 112 is cracked for the same reason (in the case of a build-up substrate, the resist and the build-up layer are significantly cracked).
There was something. When a crack generated in the resist (or the resist and the build-up layer) 104b reaches the wiring 114, it causes migration, leading to a decrease in reliability of insulation.

Accordingly, a second object of the present invention is to fill a gap between a semiconductor device and a mounting board with a sealing material to protect solder bumps, and to form a resist (or resist and build-up) under an end of the sealing material. An object of the present invention is to provide a semiconductor device mounting structure and a mounting method capable of preventing or delaying the progress of cracks in a layer, thereby improving the reliability of insulation.

[0017]

According to one aspect of the present invention, a semiconductor device is connected to a mounting substrate using solder bumps and a gap between the semiconductor device and the mounting substrate. In a semiconductor device mounting structure in which a sealing material containing a filler component is filled, the content of the filler component contained in the sealing material is made different between the semiconductor device side and the mounting substrate side, and thus the sealing is performed. The material properties are different between the semiconductor device side and the mounting substrate side.

The content of the filler component contained in the sealing material is
Since the semiconductor device side and the mounting substrate side are different from each other, and thus the physical properties of the sealing material are different between the semiconductor device side and the mounting substrate side, the physical properties of the sealing material are different between the semiconductor device side and the mounting substrate side. Physical properties suitable for the semiconductor device side and physical properties suitable for the mounting substrate side can be obtained. More specifically, the physical properties of the semiconductor device should be sufficient to protect the solder bumps, and the physical properties of the mounting board should be such that thermal stress between the sealing material and the mounting board is reduced. Can be. For this reason, it is possible to prevent disconnection of the wiring disposed below the end of the sealing material or to delay the progress thereof while protecting the solder bumps, thereby improving the reliability of the connection. Similarly, cracking of the resist (or the resist and the build-up layer) under the end of the sealing material can be prevented or the progress thereof can be delayed while protecting the solder bumps, thereby improving the reliability for insulation. be able to.

In the present invention, the physical properties of the sealing material on the side of the mounting substrate are set to be close to the physical properties of the material constituting the mounting substrate.

Since the physical properties of the sealing material on the mounting substrate side are set to be close to those of the material constituting the mounting substrate, the thermal stress between the sealing material and the mounting substrate can be reliably reduced. Therefore, disconnection of the wiring disposed below the end of the sealing material can be more effectively prevented, or the progress thereof can be more effectively delayed, so that the reliability of the connection can be further improved. Similarly, cracking of the resist (or the resist and the build-up layer) under the end of the sealing material can be more effectively prevented or the progress thereof can be more effectively delayed, so that the reliability for insulation is also improved. It can be further improved.

According to a third aspect of the present invention, there is provided a semiconductor device in which a semiconductor device is connected to a mounting substrate using solder bumps, and a gap between the semiconductor device and the mounting substrate is filled with a sealing material containing a filler component. In the mounting method, the semiconductor device is connected to a mounting substrate using the solder bumps, the gap between the semiconductor device and the mounting substrate is filled with the sealing material, and the mounting substrate to which the semiconductor device is connected is mounted. The semiconductor device is turned upside down so that the filler is hardened while the filler component contained in the sealing material is precipitated on the semiconductor device side.

The semiconductor device is connected to the mounting substrate by using the solder bumps, a gap between the semiconductor device and the mounting substrate is filled with a sealing material, and the mounting substrate to which the semiconductor device is connected is inverted to mount the semiconductor device. It is configured so as to consist of a step of curing the sealing material while causing the filler component included in the sealing material to precipitate downward on the semiconductor device side, so as to face downward in the vertical direction.
The properties of the sealing material on the semiconductor device side and the mounting board side can be set to physical properties suitable for the semiconductor device side and physical properties suitable for the mounting board side, respectively. More specifically, the physical properties of the semiconductor device should be sufficient to protect the solder bumps, and the physical properties of the mounting board should be such that thermal stress between the sealing material and the mounting board is reduced. Can be. For this reason, it is possible to prevent disconnection of the wiring disposed below the end of the sealing material or to delay the progress thereof while protecting the solder bumps, thereby improving the reliability of the connection. Similarly, cracking of the resist (or the resist and the build-up layer) under the end of the sealing material can be prevented or the progress thereof can be delayed while protecting the solder bumps, thereby improving the reliability for insulation. be able to.

[0023]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.
The mounting structure and mounting method of the semiconductor device according to the present invention will be described.

FIG. 1 is an explanatory sectional view for explaining a semiconductor device mounting structure and a mounting method according to one embodiment of the present invention. FIG. 2 is a top view of the semiconductor device mounting structure shown in FIG. FIG.

A mounting structure and a mounting method of a semiconductor device according to one embodiment of the present invention will be described with reference to FIGS. 1 and 2. First, as shown in FIG.
A semiconductor device 12 having a solder bump 10 such as BGA or FC is mounted on a mounting substrate (hereinafter, simply referred to as a “substrate”) 14.
Connect to This connection is made by connecting the solder bump 10 to the substrate 14.
This is performed by heating and melting (reflow) while making contact with an electrode pad (not shown) provided on the substrate. The substrate 14 is formed of a resist covering the base material 14a and a portion that does not need to be soldered (a resist and a build-up layer in a build-up substrate manufactured by a build-up method. Hereinafter, the “resist” is a reference unless otherwise specified. 14b) is used to mean both the resist and the build-up layer.

Next, as shown in FIG. 1B, an underfill resin mainly composed of an epoxy resin is formed on the substrate 14 around the semiconductor device 12 by using a needle 16 or the like (the first sealing described above). Material 18 is applied. The underfill resin 18 reduces the linear expansion coefficient (about 65 to 75 [ppm / ° C.]) of the epoxy resin as its main component, and has an elasticity coefficient (about 2 to 3 [GPa]).
, For example, silica (having a coefficient of linear expansion of about 0.4 [ppm / ° C.] and an elastic coefficient of about 73 [GPa]), and a solder bump 1
0, such as 20 to 40 ppm / ° in linear expansion coefficient as described in the prior art.
C] and an elastic coefficient of about 5 to 10 [GPa].

1 and 2, the distribution of filler components contained in the underfill resin 18 (the content (ratio) increases as the number of black portions increases) in FIGS. (High)).

The applied underfill resin 18 fills the gap formed between the semiconductor device 12 and the substrate 14 without any gap by capillary action as shown in FIG. At this time, a fillet is formed by the surface tension of the underfill resin 18 from the end of the semiconductor device 12 to the substrate 14 outside the semiconductor device 12, but the fillet is not formed using an appropriate mold or the like. Is also good.

The mounting structure and the mounting method up to heretofore are the same as those of the prior art, and the characteristic of the mounting structure and the mounting method of the semiconductor device according to one embodiment of the present invention is that the filled underfill resin is used. When the hardening 18 is cured, the semiconductor device 12 and the substrate 14 are turned over as shown in FIG. 4D, and the semiconductor device 12 is positioned vertically below the substrate 14.

By doing so, the physical properties (linear expansion coefficient and elastic modulus) of the underfill resin 18 are made different between the semiconductor device 12 side and the substrate 14 side, more specifically, the physical properties on the semiconductor device 12 side. Are sufficient to protect the solder bumps, and the physical properties of the substrate 14 are such that the thermal stress between the underfill resin 18 and the substrate 14 is reduced, that is, physical properties close to the physical properties of the substrate 14. be able to.

The details will be described below.
A filler component for improving the elastic coefficient while lowering the linear expansion coefficient of the epoxy resin, which is a main component of, for example, the above-mentioned silica or the like is generally an underfill resin 18, more strictly, the main component thereof. Since the specific gravity is larger than that of the epoxy resin, the resin precipitates vertically downward in a static state.

Therefore, as described above, when the underfill resin 18 is cured, the semiconductor device 12 and the substrate 1 are hardened.
4 and the semiconductor device 12 is positioned vertically below the substrate 14 to reduce the filler component to the semiconductor device 12 side (semiconductor device side underfill resin 18a).
And the content of the filler component on the substrate 14 side (substrate side underfill resin 18b) can be reduced.

That is, since the filler component is precipitated in the semiconductor device-side underfill resin 18a to increase the content of the filler component in the semiconductor device-side underfill resin 18a, the semiconductor device-side underfill resin 18a has a solder bump. Have sufficient physical properties to protect the.

Further, since the content of the filler component of the substrate-side underfill resin 18b is reduced, the main component of the underfill resin 18 in the substrate-side underfill resin 18b is smaller than that of the semiconductor device-side underfill resin 18a. Physical properties close to the physical properties of the epoxy resin, in other words, physical properties close to the physical properties of the substrate 14, and reducing the thermal stress generated between the underfill resin 18 and the substrate 14 when the underfill resin 18 is cured. Can be. For this reason, disconnection of the wiring 26 disposed below the end 22 of the underfill resin can be prevented or its progress can be delayed,
Therefore, the reliability of the connection can be improved.
Similarly, cracking of the resist 14b below the end 22 of the underfill resin can be prevented or its progress can be delayed, and the reliability for insulation can be improved.

In order to more reliably obtain the above-mentioned effects, it is preferable to use an underfill resin 18 in which a filler component is easily precipitated. According to experiments by the inventor, for example, in an underfill resin Semicoat 117 (trade name) manufactured by Shin-Etsu Chemical Co., Ltd.,
It has been confirmed that a sedimentation phenomenon always occurs.

The mounting structure of the semiconductor device according to one embodiment of the present invention obtained as described above is shown in FIGS.

As described above, in the semiconductor device mounting structure and the mounting method according to the present invention, the semiconductor device 12 and the substrate 14 are inverted when the underfill resin 18 is cured, and the semiconductor device 12 is By being positioned vertically downward, the semiconductor device side underfill resin 18a can have physical properties sufficient to protect the solder bumps, and the substrate side underfill resin 18b can Physical properties close to those of No. 14 can be obtained.

For this reason, while protecting the solder bumps 10, the wiring 2 arranged below the end 22 of the underfill resin
6 can be prevented or its progress can be delayed, and the reliability of connection can be improved. Similarly, cracking of the resist 14b below the edge of the sealing material can be prevented or its progress can be delayed while protecting the solder bumps, and the reliability for insulation can be improved.

As described above, in the embodiment of the present invention, the semiconductor device 12 is connected to the mounting substrate (substrate) 14 by using the solder bumps 10 and the gap between the semiconductor device and the mounting substrate. In a semiconductor device mounting structure in which a sealing material (underfill resin 18) containing a filler component (for example, silica) is filled, the content (amount) of the filler component contained in the sealing material is determined on the semiconductor device side. (Linear expansion coefficient and elastic coefficient) and the mounting substrate side (substrate side underfill resin 18b), so that the physical properties (linear expansion coefficient and elastic coefficient) of the sealing material are different between the semiconductor device side and the mounting substrate side. It was configured to make the difference.

The physical properties of the sealing material on the mounting substrate side are as follows:
Materials (base material 14a and resist (or resist and build-up layer) 14b) constituting the mounting board
It was configured so as to be a physical property close to that of the above.

The semiconductor device 12 is connected to the mounting substrate (substrate) 14 using the solder bumps 10, and a sealing material (for example, silica) containing a filler component (eg, silica) is provided in a gap between the semiconductor device and the mounting substrate. In the method of mounting a semiconductor device to fill the underfill resin 18), the semiconductor device is connected to a mounting substrate using the solder bumps, and a gap between the semiconductor device and the mounting substrate is filled with the sealing material; And the mounting substrate to which the semiconductor device is connected is turned upside down so that the semiconductor device is directed downward in the vertical direction, so that the filler component contained in the sealing material is deposited on the semiconductor device side (semiconductor device side underfill resin 18a). And curing the sealing material.

[0042]

According to the first aspect of the present invention, the properties of the encapsulant are set so that the properties suitable for the semiconductor device side and the properties suitable for the mounting board side on the semiconductor device side and the mounting board side, respectively. can do. More specifically, the physical properties of the semiconductor device should be sufficient to protect the solder bumps, and the physical properties of the mounting board should be such that thermal stress between the sealing material and the mounting board is reduced. Can be. For this reason, it is possible to prevent disconnection of the wiring disposed below the end of the sealing material or to delay the progress thereof while protecting the solder bumps, thereby improving the reliability of the connection. Similarly, cracking of the resist (or the resist and the build-up layer) under the end of the sealing material can be prevented or the progress thereof can be delayed while protecting the solder bumps, thereby improving the reliability for insulation. be able to.

According to the second aspect of the present invention, since the thermal stress between the sealing material and the mounting substrate can be reliably reduced, disconnection of the wiring disposed below the end of the sealing material can be prevented. Prevention can be performed more effectively, or the progress thereof can be more effectively delayed, so that reliability of connection can be further improved. Similarly, cracking of the resist (or the resist and the build-up layer) under the end of the sealing material can be more effectively prevented or the progress thereof can be more effectively delayed, so that the reliability for insulation is also improved. It can be further improved.

According to the third aspect of the present invention, the physical properties of the sealing material are set to be suitable for the semiconductor device and the mounting substrate, respectively. Can be. More specifically, the physical properties of the semiconductor device should be sufficient to protect the solder bumps, and the physical properties of the mounting board should be such that thermal stress between the sealing material and the mounting board is reduced. Can be. For this reason, it is possible to prevent disconnection of the wiring disposed below the end of the sealing material or to delay the progress thereof while protecting the solder bumps, thereby improving the reliability of the connection. Similarly, cracking of the resist (or the resist and the build-up layer) under the end of the sealing material can be prevented or the progress thereof can be delayed while protecting the solder bumps, thereby improving the reliability for insulation. be able to.

[Brief description of the drawings]

FIG. 1 is an explanatory sectional view illustrating a mounting structure and a mounting method of a semiconductor device according to one embodiment of the present invention;

FIG. 2 is a plan view of the mounting structure of the semiconductor device shown in FIG. 1 as viewed from above.

FIG. 3 is an explanatory cross-sectional view illustrating a mounting structure and a mounting method of a semiconductor device according to a conventional technique.

4 is a plan view of the mounting structure of the semiconductor device shown in FIG. 3 as viewed from above.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 Solder bump 12 Semiconductor device 14 Substrate (mounting board) 14a Base material 14b Resist (or resist and buildup layer) 18 Underfill resin (sealing material) 18a Semiconductor device side underfill resin 18b Substrate side underfill resin

Claims (3)

[Claims] 1. A mounting structure for a semiconductor device, wherein a semiconductor device is connected to a mounting substrate using solder bumps and a gap between the semiconductor device and the mounting substrate is filled with a sealing material containing a filler component. The content of the filler component contained in the sealing material is different between the semiconductor device side and the mounting board side, and thus the physical properties of the sealing material are different between the semiconductor device side and the mounting board side. Semiconductor device mounting structure. 2. The mounting structure of a semiconductor device according to claim 1, wherein a physical property of the sealing material on a mounting substrate side is close to a physical property of a material forming the mounting substrate. 3. A method for mounting a semiconductor device, comprising: connecting a semiconductor device on a mounting substrate using solder bumps; and filling a gap between the semiconductor device and the mounting substrate with a sealing material containing a filler component. . Connecting the semiconductor device on a mounting substrate using the solder bumps; b. Filling the gap between the semiconductor device and the mounting board with the sealing material; and c. Inverting the mounting substrate to which the semiconductor device is connected, turning the semiconductor device downward in the vertical direction, and curing the sealing material while precipitating a filler component included in the sealing material on the semiconductor device side, A method for mounting a semiconductor device, comprising: