JP2002057283A - Manufacturing method of semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor integrated circuit, having semiconductor elements integrated in three dimension, which provides high speed and functionality of an integrated circuit board as well as high parallelism and speed of an optical input/output board. SOLUTION: The semiconductor integrated circuit comprises a semiconductor substrate where semiconductor elements are integrated on one main surface, an insulating layer provided on the substrate, one or more semiconductor elements provided on the insulating layer, and a wiring which electrically connects, through a window formed at the insulating layer, the semiconductor elements integrated on the semiconductor substrate to at least one semiconductor element provided on the insulating layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor integrated circuit, and more particularly to a method for manufacturing a semiconductor integrated circuit in which semiconductor elements are three-dimensionally integrated.

[0002]

2. Description of the Related Art Three-dimensional integration of semiconductor elements is an important technique for increasing the degree of integration of a semiconductor integrated circuit and is also extremely important for constructing an optical switch array.
The development of an optical switch array as a key device for optical signal processing and optical information processing is highly desired. Conventionally, as this type of element, for example, the document "IEEE PHOTONICS TECHNOL
OGY LETTERS, Vol. 7, p. 360 (1995) ”, a multi-quantum well pin diode is mounted on a silicon integrated circuit board by solder bumps.
An element called "Hybrid Seed (H-SHEED)" has been proposed in which an in-diode is used as a light receiving element or an optical modulator to input and output light and to perform a logical function on a silicon integrated circuit. In this device, an input optical signal incident on an input multiple quantum well type pin diode is converted into an electric signal, transmitted to a silicon integrated circuit substrate, electrically processed, and then applied to an output multiple quantum well type pin diode. Control the voltage. At this time, in the output multiple quantum well type pin diode, the reflection intensity of light biased at a constant intensity can be controlled by the quantum confinement Stark effect according to the voltage change. Figure 1 shows the configuration.
FIG. 2 shows the characteristics.

[0003] As shown in FIG. 12 (a), a p-Al substrate is formed on a p-GaAs substrate 11.
The GaAs layer 12, the i-MQW layer 13, and the (n ⁻ -Ga
As layer and n ⁺ -GaAs layer) 14 are sequentially laminated, and B
A light modulating section having the e-ion implantation layer 15 and the Ti / Au film 16 as a reflection layer is formed. The p-side and n-side electrodes are on the same plane, and a solder 17 is formed on the Be ion implanted layer 15 and the Ti / Au film 16. On the other hand, Al: Ti for improving wettability is provided on the surface of the silicon integrated circuit substrate 20 having a CMOS formed on the surface.
A / Pt / Au film 21 is formed, and a solder 17 is provided thereon. As shown in FIG. 12B, the two substrates are joined by solder bumps, and the optical modulator is mounted on a silicon integrated circuit substrate. After joining, the periphery of the joint is filled with epoxy resin 18, and then the GaAs substrate is removed. The epoxy resin can then be removed. Finally, as shown in FIG. 12C, an anti-reflection coating 19 is applied to obtain an optical modulator integrated with silicon CMOS. This conventional example has a two-input two-output switch function.

FIG. 13 shows the relationship between the gate-source voltage and the reflectivity of the hybrid seed device thus manufactured. Switching operation is possible by controlling the gate-source voltage of the CMOS.

[0005]

However, the above-described optical switch array has the following problems.

First, a multi-quantum well type p-type light modulator is used.
Since the in-diode is used, the extinction ratio is low and the loss is large.

Second, since the bias light needs to be incident on the light modulator, the optical system becomes complicated.

Third, since the operating voltage of the light modulator is as large as about 10 V, the response speed is low.

Fourth, the operating wavelength of a modulator using the quantum confined Stark effect is limited to several nm, and the operating wavelength of the modulator fluctuates due to heat generated from a silicon integrated circuit. The wavelength is severely limited,
Further, it is necessary to control the temperature of the element at a constant temperature.

On the other hand, the method of forming a three-dimensional structure of an electronic element and an optical element using solder bumps as in the above-described conventional element has the following problems.

That is, if optical devices having different layer structures, such as a photodetector and a surface emitting laser, are to be simultaneously arranged on a silicon integrated circuit, each optical device has a different structure. Therefore, it is necessary to arrange each element separately on the silicon integrated circuit by solder bumps. Such individual mounting involves the following difficulties.

First, since the solder bump must be performed a plurality of times, the process becomes complicated.

Second, in the optical switch array, the relative position of each optical element must match a predetermined positional relationship between the incoming and outgoing light. It is difficult to accurately determine the relative position between the optical elements. Therefore, it is difficult to make the positional relationship between the optical elements coincide with the positional relationship between the incoming and outgoing light.

An object of the present invention is to realize a method of manufacturing a semiconductor integrated circuit which solves the above-mentioned problems in the conventional optical switch array. Another object of the present invention is to provide a method of manufacturing an optical switch array having a large extinction ratio, a simple optical system, a high response speed, and a large operation margin.

[0015]

According to a method of manufacturing a semiconductor integrated circuit according to the present invention, a laminated body is formed on one main surface of a compound semiconductor substrate by epitaxial growth in the order of a selective etching layer, a light emitting element forming layer, and a light receiving element forming layer. An optical input / output substrate formed with a silicon integrated circuit substrate on which a semiconductor element is integrated on one main surface and a metal layer for electrical connection and a metal layer for heat radiation is formed is laminated on the optical input / output substrate. The surface on which the body is formed and the surface on which the semiconductor elements of the silicon integrated circuit substrate are integrated are opposed to each other via an insulating adhesive layer made of an organic material, and the compound semiconductor substrate is removed by polishing and chemical etching. Forming a light emitting element and a light receiving element by processing an optical input / output substrate, forming respective electrodes of the light emitting element and the light receiving element, and forming a semiconductor element on the silicon integrated circuit substrate. And the respective electrodes through holes formed for connecting the light emitting element and a light receiving element, a through-hole, characterized in that electrically connecting filled with metal.

Also, a surface on which the laminated structure of the optical input / output substrate is formed by epitaxially growing a selective etching layer, a light receiving element constituting layer, and a light emitting element constituting layer on one main surface of the compound semiconductor substrate in this order. And a quartz substrate are bonded together using wax, and the compound semiconductor substrate is polished and removed by a chemical etching method. A semiconductor element is integrated on one main surface, and a metal layer for electrical connection and a metal for heat dissipation are bonded. The surface of the silicon integrated circuit substrate on which the layers are formed is opposed to the surface on which the semiconductor elements are integrated, and bonded via an insulating adhesive layer made of an organic material,
The wax is melted by heating, the quartz substrate is removed, the laminated body is processed to form a light emitting element and a light receiving element, electrodes of the light emitting element and the light receiving element are formed, and the semiconductor element and the light emitting element on the silicon integrated circuit substrate are formed. A through hole for connecting each element of the element and the light receiving element is formed, and the through hole is filled with a metal to be electrically connected.

Further, a plurality of light emitting elements, a plurality of light receiving elements, and respective electrodes are formed on the compound semiconductor substrate, and a surface of the compound semiconductor substrate on which the plurality of light emitting elements, the plurality of light receiving elements, and the respective electrodes are formed is provided. A quartz substrate is bonded using wax, the compound semiconductor substrate is polished and removed by chemical etching, and a semiconductor element is integrated on one main surface, and a metal layer for electrical connection and a metal layer for heat dissipation are provided. The silicon integrated circuit substrate on which the pattern is formed is opposed to the surface on which the semiconductor elements are integrated, positioned using infrared light, bonded via an insulating adhesive layer made of an organic material, and heated to form a wax. Is melted, the quartz substrate is removed, and the semiconductor element on the silicon integrated circuit board is connected to each electrode of the plurality of light emitting elements and the plurality of light receiving elements. Forming a fit of the through hole, the through-hole, characterized in that electrically connecting filled with metal.

An optical input / output substrate in which a laminated body is formed on one principal surface of the compound semiconductor substrate by epitaxial growth in the order of a selective etching layer, a light emitting element forming layer, an FET element forming layer, and a light receiving element forming layer. A silicon integrated circuit substrate on which a semiconductor element is integrated on a main surface of the semiconductor integrated circuit and a pattern of a metal layer for electrical connection and a metal layer for heat radiation are formed; A semiconductor device is integrated with an insulating surface made of an organic material, facing the surface where the semiconductor elements are integrated, and the compound semiconductor substrate is removed by polishing and chemical etching, and the light input / output substrate is processed to emit light. Forming an element, an FET element, and a light receiving element;
Forming each electrode of the element and the light receiving element, forming a through hole for connecting the semiconductor element on the silicon integrated circuit board with each electrode of the light emitting element and the FET element and the light receiving element, and forming the through hole with metal It is characterized by being buried and electrically connected.

[0019]

FIG. 1 shows an embodiment of the device according to the present invention. On an integrated circuit substrate 200 on which semiconductor elements such as MOSFETs, transistors, and diodes are integrated on one main surface, an optical input / output substrate 10
0 is integrated. On the optical input / output substrate 100, a plurality of light receiving elements 100A and a vertical cavity surface emitting laser (hereinafter, referred to as a surface emitting laser) 100B are arranged.
A window is provided in the insulating layer 300, and the light receiving element 100A and the surface light emitting element 100B are connected to the metal wiring 200A of the integrated circuit board 200 through the window through the window. 100C and 100D are light receiving elements 10 respectively.
0A and the wiring of the surface light emitting element 100B. This element converts the light input by the light receiving element 100A into an electric signal, performs processing such as amplification and switching by a semiconductor element integrated on the integrated circuit board 200, and outputs the processing result as a current output. It can be transmitted to the light emitting laser 100B to control its operation.

FIG. 2 shows the operating characteristics of this device. The example of FIG. 2 shows the result of synchronizing, amplifying, and waveform shaping the input signal. In the case of the element of the present invention, various processing can be performed by the processing function of the integrated circuit substrate. In addition to this example, 2 × 2 switching, various arithmetic processing, image processing, and the like can be mentioned.

In the optical switch array according to the present invention, since a vertical cavity surface emitting laser is used as an optical modulator, no bias light is required and a high contrast can be obtained, so that the optical system is simplified. In addition, since the operating voltage of about 3 V is sufficient, high-speed operation can be realized. In addition, when the device of the present invention is configured in multiple stages, and processing such as optical interconnection is performed by performing optical connection such that output light from the previous stage is used as input light, the surface emitting laser has an oscillation wavelength of film thickness. Is very sensitive to the fluctuation of the light, and it is difficult to control it. However, if a pin diode, an MSM photodiode or the like is used as the light receiving unit, almost uniform light sensitivity can be obtained over a wide wavelength range of 100 nm or more. There is also a feature that the emission wavelength of the light emitting laser is not limited and is advantageous for multistage operation.

In order to manufacture an optical switch array as described above, the vertical cavity surface emitting laser and the photodetector cannot be simultaneously formed on a single substrate because the layer structure is different from that of the vertical cavity surface emitting laser. Cannot use solder bump technology. In order to solve this problem, the present invention arranges a semiconductor element such as a vertical resonator via an insulating layer on a semiconductor substrate in which the semiconductor element is integrated on one main surface, Wiring is provided between a semiconductor element integrated on a semiconductor substrate and a vertical resonator disposed on an insulating layer through a window formed in the layer.

As the insulating layer, there are polyimide, SiO _{2 and the} like, all of which have an ability to bond semiconductors by an appropriate process. Therefore, by using these insulating layers as the adhesive layer, the three-dimensional arrangement of the semiconductor element is facilitated. Furthermore, because of the insulating property, wiring can be easily formed on the adhesive layer, and therefore, wiring required for elements disposed on the integrated circuit can be provided. For example, a layer structure for a laser and a layer structure for a light receiver are laminated on a single substrate, and these are laminated to a semiconductor integrated circuit with an insulating adhesive layer. After exposing the structure as required, necessary wiring can be easily performed.

[0024]

EXAMPLE 1 The growth surface of the optical input / output substrate was changed to an integrated circuit.
FIGS. 3 and 4 show a first specific example in which the present invention is applied to an optical switch array in the case of bonding to the substrate side .

FIG. 3 is a sectional view of an optical input / output substrate when a GaAs / AlGaAs multiple quantum well is used for the active layer. On a semi-insulating GaAs substrate 101, an AlAs layer 102 for selective etching, an n ⁺ -GaAs contact layer 10
3, n-DBR (Distributed Bragg Reflector) layer 10
4. Active layer 105, p-DBR layer 106 and i-Ga
The As light absorbing layer 107 was sequentially formed by a molecular beam epitaxial growth method. Be and Si were used for the p-type and n-type dopants, respectively. Here, the n-DBR layer is n-AlAs (71.5 nm) / n-Al _0.15 Ga _0.85
It has a structure in which As (62.9 nm) is alternately laminated for 25 periods, and the p-DBR layer is p-AlAs (71.5 nm).
/ P-Al _0.15 Ga _0.85 As (62.9 nm) is alternately laminated for 30 periods.

FIG. 4 shows a method of manufacturing an optical switch. First,
As shown in FIG. 4A, the growth layer 10 of the optical input / output substrate 100 is formed.
OE is adhered to the main surface of the silicon integrated circuit substrate 200 on which the semiconductor elements are integrated with an adhesive 300. In this case, polyimide is applied as an adhesive to the bonding surfaces of both substrates by spin coating to prevent air bubbles. Thereafter, the two substrates are bonded to each other and cured by heat treatment at a high temperature while applying a load. In the bonding procedure, temporary bonding is first performed at a temperature of about 150 ° C.
The aAs substrate 101 is divided into about one chip.
Thereafter, final curing is performed at 350 ° C. This is to prevent the substrate from being warped and broken due to the difference in thermal expansion coefficient between silicon and GaAs when the substrate has a large size of 2 inches or more. At this time, when a thick metal film 200A for electrical connection and cooling is formed on the integrated circuit substrate 200, the metal film 20A is formed.
The portion 0A is extruded by applying a load at the time of bonding when the polyimide 300 interposed between the optical input / output substrate 100 and the polyimide 300, and as a result, as shown in FIG. Become like

After that, the GaAs substrate 101 is
m and a PA30 solution (H ₂ O ₂ : NH ₃ O)
H = 30: 1), only the GaAs substrate 101 is selectively etched, and the etching is stopped at the AlAs layer 102. Next, only the AlAs layer 102 is selectively etched with hydrochloric acid, so that the n ⁺ -GaAs contact layer 103 is exposed on the surface as shown in FIG. FIG.
(C ') is an enlarged view showing the growth layer in this state.

Next, as shown in FIG. 4D, the light input / output substrate is processed to form a surface emitting laser 100B and an SMS photodetector 100A. FIG. 4D is an enlarged view of the surface emitting laser unit. AuZnNi is used as the p-type electrode 110 and AuGn is used as the n-type electrode 111 of the surface emitting laser.
Using eNi, photo detector Schottky electrode 11
2 was Ti / Pt / Au. Then, FIG.
As shown in (e), a portion of the optical input / output substrate 100 where electrical wiring is to be performed between the two substrates is etched by a metal film 200A.
Open through holes until is exposed. The SMS photodetector part is also partitioned.

Then, the inter-element wiring metal 400 is formed by plating, and the wiring 113 is applied to obtain the structure shown in FIG.

When a solder bump is used as in the conventional example, the electrode must be formed on the surface of the substrate on which the laser and the photodetector are laminated, so that it is difficult to form the electrode on one of the elements. Become. For example, if a stacked structure as shown in FIG. 3 is used, the p-DBR layer 106 and the active layer 105
It is difficult to form an electrode on the laser structure composed of the n-DBR layer 104 and the n-DBR layer 104. However, such a problem does not occur in the structure of the present invention. Thick metal film 2 on integrated circuit substrate 200
00A has the effect of reducing the level difference at the time of electrical connection between the two substrates, the effect of preventing light from entering the integrated circuit substrate from the light receiving element and the light emitting element, and the effect of removing heat generated at the optical input / output substrate through the metal film. is there.

Actually, MSM-PD, ME are included in one pixel.
8 × 8 = 6 with 3 SFETs and surface emitting laser
A two-dimensional array of 4 pixels is fabricated, and an input light of 0.1 mW and 200 MHz is applied to an 850 nm wavelength band by MSD-PD.
It was confirmed that the operation of emitting 1 mW of output light from the surface emitting laser in parallel with all pixels was performed in all pixels.

Further, the number of surface emitting lasers and light receiving elements is not limited to one for each processing unit (cell) in the integrated circuit, and a plurality of input / output elements may be provided.

In this embodiment, plating is used to form the metal for the inter-element wiring. However, the present invention is not limited to this, and the steps may be filled by selective growth using, for example, tungsten.
In addition, although polyimide is used for bonding both substrates, the present invention is not limited to this, and various types of adhesives such as epoxy may be used, and bonding between dielectrics such as SiO ₂ is also possible. is there.

The optical input / output substrate is made of semi-insulating GaAs.
On the substrate 101, an AlAs layer for selective etching, p ⁺ −
GaAs contact layer, p-DBR layer, i-GaAs /
AlGaAs active layer, n-DBR layer and i-GaAs
The light-absorbing layers are stacked in this order, and p,
The polarity of n may be switched. In this case, p-DBR
The layers are stacked in 25 cycles, and the n-DBR layer is stacked in 30 cycles. This is because by setting the reflectivity of the DBR mirror on the integrated circuit substrate side higher than the reflectivity of the DBR mirror on the emission side, output light can be obtained on the emission side with high efficiency. This is the same in the following embodiments.

Embodiment 2 The growth surface of the optical input / output substrate is integrated
When adhered to opposite the road substrate to process the light output substrate (1) after the substrate adhesion
A second specific example in which the present invention is applied to an optical switch array is shown in FIGS.

FIG. 5 is a sectional view of an optical input / output substrate when a GaAs / AlGaAs multiple quantum well is used for the active layer. On a semi-insulating GaAs substrate 101, an AlAs layer 102 for selective etching, an i-GaAs light absorbing layer 107,
The -DBR layer 106, the i-GaAs / AlGaAs active layer 105, the n-DBR layer 104, and the n ⁺ -GaAs contact layer 103 were sequentially formed by molecular beam epitaxial growth. The order of lamination of the light receiving element constituting layer and the light emitting element constituting layer is opposite to that of the first embodiment. Here, as in the first embodiment, the n-DBR layer has a structure in which 30 cycles are stacked, and the p-DBR layer has a structure in which 25 cycles are stacked.

FIG. 6 shows a method of manufacturing an optical switch. First,
As shown in FIG. 6A, the optical input / output substrate 100 is
At 00, a wax 500 is attached with the growth layer 100E facing up.

Next, as shown in FIG.
After polishing the s substrate 101 to a thickness of about 50 μm, only the GaAs substrate is etched with a citric acid solution,
The etching is stopped at the As layer 102. Next, only the AlAs layer 102 is selectively etched with hydrochloric acid.

Next, as shown in FIG.
With 0, bonding to the integrated circuit substrate 200 is performed. First, baking is performed at about 100 ° C. to cure the polyimide.

At this time, the quartz plate 400 and the light input / output substrate 1
Since the wax existing between 00 and 00 is melted by heat, as shown in FIG. 6D, the integrated circuit substrate 200 and the growth layer 100E of the optical input / output substrate are removed together from the quartz plate. Thereafter, the polyimide is finally cured at a high temperature of about 300 ° C. This state is the same as the state shown in FIG. 4C of the first embodiment, and thereafter the device can be manufactured in the same manner as in the first embodiment.

In this case, i-GaAs is selectively etched.
There is no need to expose the light absorption layer, and the light absorption layer may be attached to the integrated circuit substrate 200 with the semi-insulating GaAs substrate 101 remaining. This example is shown in FIG.

(Part 2) After the optical input / output substrate is processed
FIG. 8 shows a third specific example of an optical switch array to which the present invention is applied when bonding . The optical input / output substrate is the same as that of the second specific example shown in FIG.

FIG. 8 shows a method of manufacturing an optical switch. First,
Surface emitting laser 100B, MSM photodiode 100
A is processed without treating the semi-insulating GaAs substrate 101, and then, as shown in FIG.
Laminate with 0. FIG. 8A is an enlarged view of the optical input / output substrate.

Next, as shown in FIG.
The substrate is polished to a thickness of about 50 μm, then only the GaAs substrate is etched with a PA30 solution, the etching is stopped at the AlAs layer, and only the AlAs layer is selectively etched with hydrochloric acid.

Next, as shown in FIG. 8C, after applying polyimide 300 to both substrates, an infrared camera (C
While monitoring the circuit patterns of the integrated circuit board 200 and the optical input / output board 100 using a CD camera),
Positioning of both substrates is performed using 0, and they are bonded.

Next, as in the case of (1), 100
After curing the polyimide at about ° C and simultaneously removing both substrates from the quartz plate, the temperature is raised to 300 ° C to finally cure the polyimide 300, thereby obtaining the structure shown in FIG. 8D. This state is similar to the state shown in FIG. 4D, and thereafter, the same process as in the above specific example is performed.

In this case, similarly to the second embodiment, it is not necessary to expose the i-GaAs light absorbing layer by selective etching, and the semi-insulating GaAs substrate 101 can be stuck to the integrated circuit substrate 200 while remaining. Good.

Embodiment 3 An electric circuit is also formed on the optical input / output substrate.
In the above embodiments, the surface emitting laser and the photodetector are configured on the optical input / output substrate 100 in the above-described embodiments. However, an electric circuit such as an FET can be configured on the optical input / output substrate 100. Here, an example in which an optical switch is configured in the same manner as in the first specific example will be described. The FET can be formed by epitaxial growth as described below, or can be formed by ion implantation.

FIG. 9 is a sectional view of an optical input / output substrate when a GaAs / AlGaAs multiple quantum well is used for the active layer.

On a semi-insulating GaAs substrate 101, an AlAs layer 102 for selective etching, a p ⁺ -GaAs contact layer 120, a p-DBR layer 106, an i-GaAs / Al
A GaAs active layer 105, an n-DBR layer 104, an n-InGaP layer 121 (10 nm) as a selective etching layer,
N ⁺ -GaAs layer 122 as FET contact layer
(0.4 μm), n ⁻ -GaAs as FET channel layer
s channel layer 123 (0.2 μm) and i-GaAs
The light absorbing layer 107 (2 μm) was sequentially formed by a molecular beam epitaxial growth method. Be and Si were used for the p-type and n-type dopants, respectively. Here, p-DB
The R layer is p-AlAs (71.5 nm) / p-Al _0.15 G
a It has a structure in which _0.85 As (62.9 nm) is alternately laminated for 25 periods, and the n-DBR layer is n-AlAs (71.5
nm) / n-Al _0.15 Ga _0.85 As (62.9 nm) are alternately stacked for 30 periods.

This is processed as shown in FIG. 10 to produce an optical switch.

First, as shown in FIG. 10A, an optical input / output substrate 100 is bonded on an integrated circuit substrate 200 using a polyimide 300 in the same manner as in the first embodiment, and then polished and etched. The epitaxial growth layer 10
Leave only 0E. FIG. 10A is an enlarged sectional view of the growth layer.

Next, as shown in FIG. 10B, the mesa etching of the surface emitting laser unit 100B is performed. FIG.
(B ') is an enlarged sectional view of the surface emitting laser unit. At this time, the mesa depth is changed to InGaP layer 1 by selective etching.
Up to 21

In the FET process, as shown in FIG. 10C, after the InGaP layer 121 is etched, the FE
Mesa etching of T100F is performed on the i-GaAs light absorbing layer 1
Perform until 07. Next, the n ⁺ -GaAs contact layer 12
2, a source / drain electrode 124 is formed. The recess etching is performed up to the n ⁻ -GaAs channel layer 123,
After that, a gate electrode 125 is formed. At this time, the electrodes of the MSM photodetector 100A are also formed at the same time.

Finally, as shown in FIG. 10D, an electric wiring 400 to the integrated circuit substrate 200 is formed.

As described above, when an electric circuit is also formed on the optical input / output substrate, the FE having a larger gain than Si has
T can be created, and the integrated circuit can drive the surface emitting laser with only a small voltage amplitude, so that the load on the integrated circuit substrate can be reduced and a faster response can be achieved.

In the specific examples so far, MS is used as the light receiving element.
Although the example using the M photodiode has been described, the element of the semi-invention can also be configured by using a pin photodiode, a photoconductor, or the like as the light receiving unit.

Embodiment 4 FIG. 11 shows an example in which a pin photodiode is used. The pin photodiode 100G includes an n-GaAs layer 131, an i-GaAs light absorption layer 107, and a p-GaAs layer 130, as shown in FIG.
32 through the integrated circuit board 2 by polyimide 300
00 and are electrically connected by wiring 400. The configuration of the surface emitting laser 100B is as described above. In this case, unlike the case of the MSM photodiode, since the conductive layer is also included in the light receiving portion, it is necessary to separate each light receiving portion. The difference from the previous specific example is that the insulating film 132 is deposited on the surface of the input / output substrate 100 to be bonded.

In the specific examples described so far, GaAs /
Although the optical switch is made of AlGaAs, the present invention is not limited to this. For example, InGaAs / InP, InAlAs / I
Other material systems such as nGaAs and GaAs / InGaAs can also be used. It goes without saying that GaAs, InP and the like can be used for the integrated circuit substrate in addition to silicon.

Although only the optical switch array has been described in the above embodiments, it is apparent that the present invention is effective for the configuration of a three-dimensional integrated circuit other than the optical switch array. According to the present invention, even when elements integrated on an insulating film such as polyimide do not have different layer structures, each element can be separated, so that electrical isolation (isolation) between elements can be easily performed. There is an advantage that it becomes.

[0061]

As described above, the method of manufacturing a semiconductor integrated circuit according to the present invention provides a semiconductor device having both high speed and high functionality of an integrated circuit board and high parallelism and high speed of an optical input / output board. It has the feature that integrated circuits can be manufactured. By connecting these elements by light in multiple stages, it becomes very promising as a future optical information processing element or an element for optical interconnection of LSI.

Further, according to the present invention, it is possible to form a three-dimensional semiconductor integrated circuit composed of semiconductor elements having different layer structures. Further, a three-dimensional semiconductor integrated circuit having excellent isolation between elements can be provided.

[Brief description of the drawings]

FIG. 1 is a diagram showing a cross-sectional structure of an element according to the present invention.

FIG. 2 is a diagram showing characteristics of the device of the present invention.

FIG. 3 is a sectional view of an example of an optical input / output substrate.

FIG. 4 is a diagram illustrating a method of manufacturing the optical switch according to the first embodiment.

FIG. 5 is a sectional view of another example of the optical input / output substrate.

FIG. 6 is a diagram illustrating a method of manufacturing the optical switch according to the second embodiment.

FIG. 7 is a cross-sectional view of an embodiment in which selective etching is not used.

FIG. 8 is a view showing a method of manufacturing another specific example of the device of the present invention.

FIG. 9 is a sectional view of an optical input / output substrate forming an electric circuit.

FIG. 10 is a diagram showing a manufacturing method of an embodiment in which an electric circuit is also formed on the optical input / output substrate.

FIG. 11 is a cross-sectional view of a specific example using a pin photodiode as a light receiving element.

FIG. 12 is a sectional view of a conventional example.

FIG. 13 is a characteristic diagram of a conventional example.

[Explanation of symbols]

Reference Signs List 101 semi-insulating GaAs substrate 102 selective etching AlAs layer 103 n ⁺ -GaAs contact layer 104 n-DBR layer 105 active layer 106 p-DBR layer 107 i-GaAs light absorption layer 110 p-type electrode 111 n-type electrode 112 Schottky electrode 113 metal for wiring 120 p ⁺ -GaAs contact layer 121 selective etching InGaP layer 122 n ⁺ -GaAs contact layer 123 n ^-- GaAs channel layer 130 p-GaAs layer 131 n-GaAs layer 132 insulating film

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 27/15 H01S 5/02 31/10 5/026 612 H01S 5/02 5/183 5/026 612 H01L 21/90 A 5/183 31/10 AG (72) Inventor Takashi Kurokawa 2-3-1, Otemachi, Chiyoda-ku, Tokyo F-term in Nippon Telegraph and Telephone Corporation (reference) 5F033 GG02 JJ19 PP07 PP27 PP28 QQ09 QQ10 QQ37 RR04 RR22 SS22 XX33 5F049 MA04 NA03 NA04 NB10 PA14 PA15 QA04 RA07 RA08 SS02 UA07 UA14 5F073 AA65 AA74 AB02 BA09 CB02 CB03 DA22 EA13 EA14

Claims (4)

[Claims] An optical input / output substrate in which a laminated body is formed on one main surface of a compound semiconductor substrate by epitaxial growth in the order of a selective etching layer, a light emitting element forming layer, and a light receiving element forming layer; A semiconductor integrated circuit board on which a semiconductor element is integrated and a metal layer for electrical connection and a metal layer for heat dissipation are formed; and a surface of the optical input / output board on which the laminated body is formed and a semiconductor of the silicon integrated circuit board. The surface on which the elements are integrated is opposed to each other and bonded together via an insulating adhesive layer made of an organic material. The compound semiconductor substrate is removed by polishing and chemical etching. Forming a light receiving element, forming respective electrodes of the light emitting element and the light receiving element, a semiconductor element on the silicon integrated circuit substrate, the light emitting element and the light receiving element A through hole for connecting the respective electrodes are formed, a manufacturing method of a semiconductor integrated circuit for causing said through hole is electrically connected to filled with metal. 2. A surface of a light input / output substrate on which a laminate is formed by epitaxial growth on one main surface of a compound semiconductor substrate in the order of a selective etching layer, a light receiving element constituting layer, and a light emitting element constituting layer. And a quartz substrate are bonded together using wax, and a surface on which the compound semiconductor substrate is removed by polishing and chemical etching, and a semiconductor element integrated on one main surface, and a metal layer for electrical connection and a metal for heat dissipation The surface of the silicon integrated circuit substrate on which the layers are formed is bonded with an insulating adhesive layer made of an organic material facing the surface on which the semiconductor elements are integrated, and the wax is melted by heating to remove the quartz substrate. Processing the stacked body to form a light emitting element and a light receiving element, forming respective electrodes of the light emitting element and the light receiving element; A semiconductor integrated circuit, comprising: forming a through-hole for connecting a semiconductor element on a circuit board to each electrode of the light-emitting element and the light-receiving element; filling the through-hole with a metal for electrical connection. Manufacturing method. 3. A plurality of light emitting elements, a plurality of light receiving elements, and respective electrodes are formed on a compound semiconductor substrate, and the plurality of light emitting elements, a plurality of light receiving elements, and respective electrodes of the compound semiconductor substrate are formed. A surface and a quartz substrate are bonded together using wax, and the compound semiconductor substrate is polished and removed by chemical etching, and a semiconductor element is integrated on one main surface, and a metal layer for electrical connection and a heat radiation The surface of the silicon integrated circuit substrate on which the metal layer is formed is opposed to the surface on which the semiconductor elements are integrated, positioned using infrared light, and bonded via an insulating adhesive layer made of an organic material. The wax is melted by heating, the quartz substrate is removed, and the semiconductor device, the plurality of light emitting devices, and the plurality of light receiving devices on the silicon integrated circuit substrate are removed. Forming a through hole for connecting the respective electrodes of the child, a method of manufacturing a semiconductor integrated circuit for causing said through hole is electrically connected to filled with metal. 4. A selective etching layer, a light emitting element forming layer, a FET element forming layer, and a selective etching layer on one main surface of a compound semiconductor substrate.
A light-input / output substrate in which a stacked body is formed by epitaxial growth in the order of light-receiving element constituent layers; and a silicon integrated circuit in which semiconductor elements are integrated on one main surface and a metal layer for electric connection and a metal layer for heat radiation are formed in a pattern. A substrate is bonded to the optical input / output substrate via an insulating adhesive layer made of an organic material with the surface on which the laminate is formed and the surface of the silicon integrated circuit substrate on which the semiconductor elements are integrated facing each other. Removing the compound semiconductor substrate by polishing and chemical etching, processing the laminated body to form a light emitting element, an FET element, and a light receiving element, and forming respective electrodes of the light emitting element, the FET element, and the light receiving element Connecting the semiconductor element on the silicon integrated circuit board to each electrode of the light emitting element, the FET element, and the light receiving element. The method of manufacturing a semiconductor integrated circuit, characterized in that the through-holes are formed, thereby the through-hole is electrically connected to filled with metal.