JP2002044443A - Image processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image processor in which data on a standard white plate for shading can be acquired and stored over a wide range, without requiring a work memory dedicated to generation of while level line data for shading correction which can be corrected page by page. SOLUTION: The image processor 51 comprises a memory (SDRAM 6), into which the image data of a standard white plate for shading correction and the image data of a documents S read out by means of a CCD line sensor 1 can be written. Since a memory for shading correction also serves as a memory for image data, high quality shading correction which is less susceptible to the effects of contamination is realized without cost increase. A work memory for generating shading correction data is increased, as in prior art, in order to reduce the effect of contamination, but resulting cost increase is eliminated in the inventive image processor.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus for performing shading correction for correcting unevenness of an optical system of an original image read by optical scanning and outputting the corrected image.

[0002]

2. Description of the Related Art Conventionally, as an embodiment of an image processing apparatus, a light emitted from a light source is applied to an original, and reflected light (image data) from the original is used as an image reading means.
Light is incident on a solid-state image sensor such as a CD line sensor, and the output from the solid-state image sensor is analog / digital (hereinafter referred to as A / D
There is a device for performing various digital signal processing by converting the data.

The configuration of an image processing circuit in the above image processing apparatus will be described. FIG. 7 is a block diagram of an image processing circuit 61a in a conventional image processing device 61. The image processing circuit 61a includes a CCD line sensor 11, an A / D converter 12, a real-time image processing unit 13, an image processing memory 14, a memory image processing unit 15, and an SDRAM 1.
6. It is composed of a SYSTEM-ASIC 17, a CPU 18, various I / O ports and a ROM 19.

A plurality of pixels, for example, 7000 pixels, of photoelectric conversion elements are linearly arranged in the CCD line sensor 11, and outputs from elements corresponding to each pixel are sequentially output to the CCD.
It is derived from the output channel of the line sensor 11. CC
The output from the D line sensor 11 is input to the A / D converter 12 as an analog image signal. And A
The digital data is converted by the / D converter 12 into digital data corresponding to the amount of incident light for each pixel. At the time of A / D conversion, a reference voltage level corresponding to the maximum light amount and a reference voltage level corresponding to the minimum light amount are set. An analog image signal equal to both reference voltage levels becomes a maximum value or a minimum value when output as a digital signal. An analog image signal between the maximum light amount and the minimum light amount is output as a digital signal intermediate between the maximum value and the minimum value.

[0005] The real-time image processing unit 13 performs real-time image processing such as shading correction, density correction, main scanning magnification, sub-scan magnification, MTF correction, and error diffusion of image data read by the optical system. . Also,
It also generates shading correction data.

The image processing memory 14 is a memory for one-line correction data for shading correction, an LUT used for density correction, and a work for generating one-line correction data for shading correction. For example, if data for eight lines is required to prevent contamination of the standard white plate, this memory is used.

[0007] The memory system image processing unit 15 performs memory system image processing such as image rotation, image compression and image decompression.
It also transfers video data to an LSU (Laser Scanning Unit) not shown.

[0008] The SDRAM 16 is used for image rotation and electronic RDH.
It is used for storing compressed data for data compression, work for expanding compressed data, and band buffer for printing.

The SYSTEM-ASIC 17 has a CPU 1
8 and is connected to the memory system image processing unit 15 by a bus such as a PCI.

The CPU 18 manages, for example, image data,
It controls the touch panel and rips (rasterizes) print data.

The various I / O ports and ROM 19 have IDs
I / F (interface) such as E, SCSI and P1284, program memory, touch panel and various DI
A P-SW is provided. Further, the memory 20 stores the CP
Work memory for U18.

The plurality of light receiving elements formed on the CCD line sensor 11 have slightly different sensitivities for each element.
The lenses and light sources that make up the optical system that focuses light on the D-line sensor 11 are also not uniform.

[0013] Japanese Patent Publication No. 5-30102 discloses a technique for an image reading apparatus that adjusts the amount of light and corrects shading distortion using a standard white plate. There are many other prior arts of shading correction using a standard white plate.

If dust or dirt adheres to the reading position of the standard white plate at the time of shading correction, a portion where the output of the pixel of the CCD line sensor 11 is extremely reduced occurs, and the document subjected to the shading correction However, a problem such as streaking appears in the image data.

Therefore, a number of prior arts have been disclosed as countermeasures when dust adheres to the standard white plate. For example: 1. A method of reading a plurality of lines of standard white plate data, calculating an average value of pixels at the same main scanning position, and using the average value as shading correction data. 2. A method of reading a plurality of lines of standard white plate data, calculating an average value excluding a certain value or more (or below) of pixels at the same main scanning position, and performing shading correction. A method is disclosed in which a plurality of lines of standard white plate data are read, and the average of pixels at the same main scanning position is calculated as an average value excluding the maximum value and the minimum value at the same scanning position to perform shading correction. Each method has a common feature that dust on the standard white plate is detected using data of a plurality of lines of the standard white plate.

In order to store data of a plurality of lines as a measure against contamination of the standard white plate, it is necessary to increase the capacity of the image processing memory 14. To solve this problem, for example, Japanese Patent Application Laid-Open No. 8-340445 discloses a technique relating to an image processing circuit for storing data for MTF correction and data for shading correction in the same memory. In this image processing circuit, since the MTF correction is performed at the time of reading the original image and the shading correction is performed before the reading of the original image, it is noted that both are not performed at the same time. An image data storage memory B for both shading correction processing and MTF correction processing;
The memory A can store image data for one line of the read image in the main scanning direction, and the memory B can store image data for two lines of the read image in the main scanning direction.

[0017]

Problems to be Solved by the Invention Japanese Patent Application Laid-Open No. 8-34044
In Mazda No. 5, MTF correction is performed using the memory B. Usually, MTF correction is performed in the following manner: 3 (main scanning direction) * 3 (sub scanning direction), 3 (main scanning direction) * 5 (sub scanning direction). Alternatively, the processing is performed using a template of 5 (main scanning direction) * 5 (sub scanning direction). Therefore, it is sufficient for the line memory to have a storage capacity of 2 to 4 lines.

However, when shading correction is performed using the memory A in addition to the memory B, if a large amount of dust is attached to the standard white plate, the storage capacities of the memory A and the memory B are not sufficient. There was no problem.

Accordingly, the present invention has been made to solve the above-mentioned problem, and its object is to cover a wide range without using a dedicated work memory for generating shading correction white level line data. An object of the present invention is to provide an image processing apparatus capable of acquiring and storing data on a standard white plate for shading and capable of correcting white level line data for shading correction for each page.

[0020]

The present invention has the following arrangement as means for solving the above-mentioned problems.

(1) An image processing apparatus for shading-correcting a document image read by a reading unit based on image data of a standard white plate read by a reading unit. A memory capable of writing image data of a document and the original is provided.

In this configuration, the image processing apparatus has a memory capable of writing image data of a standard white plate for shading correction read by the reading means and image data of a document read by the reading means. Therefore, by also using the memory for image data, it is possible to perform high-quality shading correction that is less affected by dirt without increasing the cost, and the work memory for creating the shading correction data as in the related art is large. The larger the size, the less likely it is to be affected by dirt and the like, but this does not lead to an increase in cost.

(2) The memory includes a write start address of image data of the standard white plate for shading correction, a write start address of image data of the document,
Are the same.

In this configuration, the image processing apparatus includes a memory in which the write start address of the image data of the standard white plate for shading correction and the write start address of the image data of the original are the same. Therefore, the read data of the standard white plate used as the work area of the shading correction is written in the memory, and after the shading correction, the image data is overwritten on the same address, so that the image data memory and the shading correction data memory are not provided. Cost can be reduced. Further, since there is no need to manage the write area of the memory, no extra load is applied to the image processing apparatus.

(3) A DMA control unit for writing the image data of the standard white plate for shading correction and the image data of the original to the memory by a DMA method, and a CPU for controlling each unit, the DMA control unit comprises: When writing image data of the standard white plate for shading correction to the memory, an interrupt signal
An interrupt signal is given to the CPU when writing the image data of the document to the memory without giving it to U.

In this configuration, the image data of the standard white plate for shading correction and the image data of the original are
When writing the image data of the standard white plate for shading correction to the memory, the DMA control unit that writes the data in the memory in the A method writes the image data of the document to the memory without giving an interrupt signal to the CPU that controls each unit. Sometimes, an interrupt signal is given to the CPU. Therefore, the calculation for shading correction using the image data of the standard white plate is performed by the ASIC (IC for specific application).
In many cases C), the CPU does not need an interrupt signal from the DMA control unit. Therefore, it is possible to reduce the load on the CPU by not giving an interrupt.

(4) When the number of lines in the sub-scanning direction in the image data of the document exceeds a predetermined number, the DMA control unit stops writing the image data of the document to the memory by the DMA method, and , And an interrupt signal is provided.

In this configuration, when the number of lines in the sub-scanning direction in the image data of the document exceeds a predetermined number, the DMA control unit stops writing the document image data to the memory by the DMA method. An interrupt signal is given to the CPU. Therefore, the DMA control unit
Since it is not necessary to be conscious of giving an interrupt signal to the CPU, the circuit scale can be reduced and simplified.

[0029]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. FIG. 1 is a schematic configuration diagram of an image processing apparatus according to an embodiment of the present invention. The image processing device 51 includes a document reading unit 56, an image forming unit 57, a paper feeding unit 58, and a paper discharging unit 59.
Composed of

First, the configuration of the document reading section 56 will be described. The document reading section 56 has a document table 71 made of transparent glass or the like on the upper surface. The scanner unit 60 is disposed below the document table 71. Also, at a predetermined position near the end of the original placing position on the original platen,
A standard white plate 41 for shading correction is provided. The scanner unit 60 includes a light source 73 for irradiating a document S placed on a document table 71 with light, and a light source 73 for guiding reflected light from the document S to a CCD line sensor 1 serving as a reading unit. Are provided with a plurality of reflecting mirrors 74, 75, and 76 which form an optical path as shown by a chain line in the figure, and an imaging lens 77 disposed in the optical path. The light source 7
3 is realized by, for example, a halogen lamp, a hot cathode fluorescent lamp, a UV fluorescent lamp, or the like, but is not particularly limited. The light source 73 and the reflecting mirrors 74.7
5.76 is called an optical system movable part.

Next, the configuration of the image forming section 57 will be described.
Image data of the document S read by the CCD line sensor 1 is subjected to image processing by an image processing unit 53 described later, and a laser beam is irradiated on the surface A of the photosensitive drum 92 by the LSU 86 to form an electrostatic latent image. Is done. The photosensitive drum 92 has a drum shape that is driven to rotate in the direction of the arrow shown in FIG. Around the photoconductor drum 92, the electrostatic latent image on the surface of the photoconductor drum 92 exposed by the laser is developed into a visible image by toner along the rotation direction of the photoconductor drum 92 from the laser irradiation point A. Developing device 93, a transfer charger 89 for transferring the toner image on the photosensitive drum 92 to the recording paper P, a cleaning device 87 for removing residual toner on the surface of the photosensitive drum 92, and charging the photosensitive drum 92 to a predetermined potential. A main charger 88, an LSU 86 that irradiates a laser beam toward a laser irradiation point A of the photosensitive drum 92, and the like are arranged in this order.

Next, the configuration of the paper supply unit 58 and the paper discharge unit 59 will be described. The recording paper P is stored in a paper cassette 95. Here, the cassette side for carrying out the recording paper P is defined as upstream, and the paper discharge side is defined as downstream. At the leading end of the paper cassette 95, a half-moon roller 91 for feeding the recording paper P is arranged. A pre-registration detection switch 82 for detecting the passage of the recording paper P toward the downstream side, A registration roller 90 for aligning the toner image on the photosensitive drum 92 with the recording paper P based on the signal of the front detection switch 82, a transfer charger 89 for transferring the toner image on the photosensitive drum 92 to the recording paper P, and recording. An upper fixing roller 83 and a lower fixing roller 84 for fixing the toner image on the paper P by the heat of the heater 85, a fixing paper detection switch 81 for detecting that the recording paper P has passed between the two fixing rollers, and a discharge roller 79. A paper discharge detection switch 80 for detecting that the recording paper P has passed just before, and the paper discharge roller 79 for discharging the recording paper P are arranged.

The recording paper P is discharged to a paper discharge unit 59 provided in a space surrounded by the image forming unit 57, the paper cassette 95, and the scanner unit 60. A paper discharge tray 94 is arranged in the paper discharge unit 59, and the discharged recording paper is placed in order.

Next, the image processing circuit of the image processing device 51 will be described. FIG. 2 is a block diagram illustrating a schematic configuration of an image processing circuit of the image processing apparatus according to the embodiment of the present invention. The image processing circuit 51a of the image processing device 51 includes an image reading unit 52, an image processing unit 53, and a CPU peripheral unit 54.

The image reading section 52 has a scanner section 60 for optically scanning the original image as shown in FIG. 1. FIG. 2 shows only the CCD linear sensor 1 for showing the flow of data. It is illustrated. In addition, a mode setting unit (not shown) for setting magnification, paper size, and the like is provided.

The image processing unit 53 includes an A / D converter 2,
Real-time image processing unit 3, image processing memory 4 (M
Line memory for TF correction, line memory for shading correction, line memory for sub-scanning magnification, LU for density conversion
T), a memory-based image processing unit 5, and an SDRAM 6 (work memory for rotation, compressed data, work memory for decompression, and work memory for creating shading correction data).

The CPU peripheral section 54 is a SYSTEM-AS
It has an IC 7, a CPU 8, various I / O ports and a ROM 9, and a memory 10.

The difference from the configuration of the image processing circuit 61a in the conventional image processing apparatus 61 described with reference to FIG.
It is as follows. That is, the conventional image processing device 61
In the above, the work memory for creating the shading correction data was the image processing memory 4, but in the image processing device 51 of the present invention, the work memory for creating the shading correction data is the SDRAM 6. Further, in the conventional image processing apparatus 61, the shading correction data is generated by the real-time image processing unit 3 (or a CPU mounted on a real-time image processing board).
In the image processing device 51 of the present invention, the memory-based image processing unit 5
Generates shading correction data. Further, in the conventional image processing device 61, the image data is only transmitted from the real-time image processing unit 3 to the memory image processing unit 5, but in the image processing device 51 of the present invention,
In addition to the conventional configuration, the shading correction data can be transferred from the memory-based image processing unit 5 to the real-time-based image processing unit 3. Other configurations and operations of each unit are the same as those of the conventional configuration.

Next, the details of the memory system image processing section 5 in the image processing circuit 51a will be described. FIG. 3 is a block diagram illustrating a schematic configuration of the memory-based image processing unit 5. The memory-based image processing unit 5 includes a real-time image processing unit interface 31, a shading correction operation unit 32, a DMA
(Direct Memory Access) control unit 33, image rotation / compression / expansion unit 34, video data (Video Data) creation unit 35, PCI control unit 36, and SDRAM control unit 37
It is a configuration provided with.

Real-time image processing unit interface 3
Reference numeral 1 denotes an interface for exchanging data with the real-time image processing unit 3. The shading correction calculation section 32 is for performing calculations when performing shading correction.

The DMA control unit 33 writes the image data of the standard white plate 41 for shading correction and the image data of the original to the SDRAM 6 as a memory by the DMA method. At this time, the DMA controller 33 converts the image data of the standard white plate 41 for shading correction into SDRA data.
When writing to M6, an interrupt signal is not given to CPU8, and when writing image data of a document to SDRAM6, an interrupt signal is given to CPU8.

The image rotation / compression / decompression unit 34 is for rotating, compressing and decompressing an image.

The video data generator 35 is for transferring a video signal in accordance with a CLK (clock) synchronization signal sent from the LSU 86.

The PCI control unit 36 has a SYSTEM-AS
This is for controlling the PCI bus 38 connected to the IC 7.

The SDRAM control section 37 is for controlling the SDRAM 6 to store and read the image data on which image processing has been performed by the memory image processing section 5 to and from the SDRAM 6.

The shading correction operation includes a shading correction operation for correcting image data of a document in real time based on the correction data for one line, and a shading for generating one line of correction data for performing the shading correction operation. And a correction data creation operation.
The shading correction data creation operation may be performed only once, for example, when the power of the image processing device 51 is turned on, or may be performed each time image data is copied by the image processing device 51. In the present embodiment, a case will be described in which correction data for shading correction is generated each time.

FIG. 4 is a timing chart of a control signal in the image processing device 51. The PAGE signal is C
This is a positive logic signal indicating that the data from the CD line sensor 1 is valid. First Hig of PAGE signal
During the h period, the image data capturing (reading) process of the standard white plate 41 is performed. Also, the second H in FIG.
The image data of the document is fetched (read) during the high period.

The first Hi in the PAGE signal
The Low period, which is between the gh period and the second High period, is determined by the moving speed of the optical system movable unit of the scanner unit 60 and the distance between the standard white plate 41 and the document placement position of the document table 71.

In FIG. 4, the HSYNC signal is a negative logic timing signal synchronized with the line reading.
DATA represents data output from the image data read by the CCD line sensor 1 after being converted by the A / D converter 2. SDRAM WRT or RD
Represents a signal for writing and reading DATA in the SDRAM 6. SDRAM DATA is SDRAM
6 represents the read / written data.

FIG. 5 is a diagram showing the correspondence between the image reading area in the image processing device 51 and the pixels of the CCD line sensor 1. The light receiving element of the CCD line sensor 1 is
It is composed of elements corresponding to the first pixel to the Nth pixel, and this arrangement direction is the main scanning direction. The CCD line sensor 1 sequentially outputs the read image data from the first pixel to the Nth pixel in synchronization with the pixel transfer clock. When the first line is completed, the read image data for the second line is similarly output in order from the first pixel to the Nth pixel. By repeating this operation, M
Read each pixel up to the line.

The shading correction is performed from the first pixel by N
This is for correcting variations in the light receiving elements up to the pixel and unevenness of the light source, lens, and the like. The standard white plate 41 is used as a reference for this purpose. However, if dust or paper dust adheres to the standard white plate 41, the read data of the standard white plate 41 becomes strange. For example, if dust adheres to the reading position of the 100th pixel in the CCD line sensor 1,
The read value of the 100th pixel becomes strange.

As a countermeasure, for example, when the standard white plate 41 is 113 lines long, the data at the same main scanning position is read every 16 lines from the data of the first pixel.
In the shading calculation unit 32, the first line, the 17th line, the 33rd line, the 49th line,
6 obtained by removing the maximum value and the minimum value from the data of 8 pixels on the 5th, 81st, 97th, and 113th lines
By calculating the average of the pixels and repeating the calculation for each pixel for one line, shading correction data for one line can be created. Thereby, the influence of dust, paper powder, and the like can be removed.

Next, a procedure for creating shading correction data, which is a process before the copy operation, will be described. FIG.
9 is a flowchart for explaining shading correction in the image processing device 51 according to the embodiment of the present invention. The operation of generating correction data for shading correction when the power of the image processing apparatus 51 is turned on, and
The offset adjustment and the gain adjustment of the / D converter 2 are well known and are not the features of the present invention, and therefore description thereof will be omitted.

When the user presses a copy button (not shown) of the image processing apparatus 51, the light source 73 of the scanner unit 60 is turned on, and the optical system movable unit moves to a predetermined position (step 1).
01). When the optical system passes through the surface of the standard white plate 41 while irradiating it with the light source 73 (step 102), the reflected light from the standard white plate 41 is converted into analog image data by the CCD line sensor 1 and the A / D converter 2 Converts analog image data into digital image data.
It is assumed that the offset adjustment and the gain adjustment of the A / D converter 2 have been completed when the power is turned on.

Normally, the real-time image processing unit 3
Shading correction, density correction, magnification in the main scanning direction of digital image data output from the / D converter 2,
This block performs image processing such as MTF correction and error diffusion. However, when the image data of the standard white plate 41 is written in the memory, the above-described image processing is not performed.

Further, the memory-based image processing unit 5
This block performs writing / reading of digital image data to / from M6 to perform processing such as compression and rotation of image data. In this step 103, the DMA control unit 33 includes a real-time image processing unit I / F3.
Image data of the standard white plate 41 input from
Only by writing to the SDRAM 6 by the AM control unit 37,
No image processing is performed (step 103). This behavior is
The process is continued until a predetermined line is written to the SDRAM 6 (step 104).

Next, using the image data of the standard white plate 41 written in the SDRAM 6, the memory-based image processing unit 5
Performs shading correction data. The CCD linear sensor 1 usually has a light receiving element of 7000 pixels if the input resolution is 600 dpi and an A3 size original can be read. As described above, each light receiving element of the CCD linear sensor 1 has a slight variation, and in order to correct the variation, the DMA control unit 33 generates an address for reading image data at each pixel position from the SDRAM 6. Then, the image data is read (step 105). Then, the shading operation unit 3
2 compares the same position of the read image data in the main scanning direction and calculates an average value excluding the maximum value and the minimum value at the same position (step 106).

The shading calculation section 32 transfers the data as the shading correction line data from the real-time image processing section I / F 31 to the real-time image processing section 3. The real-time system image processing unit 3 writes this data into the image processing memory 4 (step 107).

In step 105, the image data of the standard white plate 41 read from the SDRAM 6 is used to avoid the influence of dust and paper dust attached to the standard white plate 41.
For example, it is read every 16 lines. 11 standard white plates 41
In the case of a length of three lines of data, if the data of the first line is read first, then the data of lines 17, 33, 49, 65, 81, 97 and 113 are read. Next, the DMA control unit 33 generates a read address. This process is performed between the time when the light source of the optical system irradiates the standard white plate 41 and the time when the next time the original S is irradiated.

Next, when the light source 73 irradiates the original (step 108), the image data of the original is output as an analog image signal from the CCD line sensor 1 and converted into a digital image signal by the A / D converter 2. Then, the real-time system image processing unit 3 performs LUT conversion and the like, and performs shading correction using the correction line data written in the image processing memory 4 in step 107. That is, one line of image data stored in the image processing memory 4 is output by a main scanning counter (not shown). The value of this image data,
By inputting the value of the digital image signal output from the A / D converter 2 to the address of the LUT, image data corrected for each pixel is output.

In addition to the LUT conversion, there is a method of performing shading correction by calculation. In the present invention, either processing may be performed.

The image data subjected to shading correction is
The real-time image processing unit 3 further performs density conversion, main-scan magnification, sub-scan magnification, MTF correction, and error diffusion.
Processing such as value conversion is performed. Then, the binary data is sent from the real-time image processing unit 3 to the memory image processing unit 5. The memory-based image processing unit 5 writes the binary data into the SDRAM 6 (Step 109).

As described above, the image data written to the SDRAM 6 is multi-valued data in step 103 and binary data in step 109.

The processing operation in step 109 is continued until data of the number of effective lines in the sub-scanning direction in the DMA set in a register (not shown) is written in advance (step 110). When the data of the number of effective lines in the sub-scanning direction is written, the DMA control unit 33 terminates the DMA, and the PCI control unit 36 sends the SYSTEM-ASIC.
An interrupt signal is given to the CPU 8 via the CPU 7 (step 111), and the shading correction is completed.

Thereafter, the CPU 8 operates the key operation of the user,
The written document data is subjected to image processing such as image rotation / compression / expansion by the image rotation / compression / expansion unit 34 in accordance with the state of the paper feed cassette and the presence / absence of printer data. 9 and sent to a personal computer (not shown) or printed by the video data creation unit 35.

As described above, by sharing the SDRAM 6 as a memory for generating shading correction data and a memory for storing binary image data, a large work memory can be provided for generating shading correction data. Therefore, the shading correction can be performed almost without being affected by the scratch, dirt, dust or the like of the standard white plate 41 for shading correction. Normally, the size of the binary image data used for rotation is much larger than the size of the work memory for generating shading correction data.
Cost reduction can be achieved.

In the image processing apparatus 51, the start address for writing the image data of the standard white plate 41 to the SDRAM 6 in steps 105, 106 and 107 described above, and the image data of the original in step 109
The start address to be written to the DRAM 6 is set to be the same address.

This is for the following reason. That is, in the processing of steps 105, 106, and 107, the SD for writing the image data of the standard white plate 41 is used.
Once the shading correction data is created, the RAM 6 (work memory) does not need to be used thereafter. On the other hand, in the process of step 109, the image data of the document needs to be managed by the CPU 8 in order to perform image processing such as compression, expansion and rotation. Therefore, the start address for the binary data set by the CPU 8 is set in step 105 / step 1
06. In the processing of step 107, step 109
In the first High period of the PAGE signal in FIG. 4, the data is written to the SDRAM 6, and then the L address is used.
During the ow period, the DMA control unit 33 sets the SDRAM 6
The data at the same main scanning position is read out from the data of the first pixel in FIG. 5 every 16 lines from the data of the first pixel in FIG. Eyes, 65th line, 81
By calculating the average of six pixels excluding the maximum value and the minimum value from the data of eight pixels on the lines 97, 113, and 113, and repeating this for each pixel on one line,
Create shading correction data for one line. Then, the SDRAM control unit 37 uses the SDRAM 6 as a work memory while using the real-time image processing unit I.
The shading correction data is sent to the real-time image processing unit 3 via / F31. Further, the real-time image processing unit 3 writes the shading correction data for one line into the image processing memory 4. This process is shown in FIG.
The image data is overwritten on the SDRAM by the processing of step 109 during the second High period of the PAGE signal, which is completed by the second rising of the PAGE signal shown in FIG.

As described above, Step 105 and Step 1
06. In step 107, the start address for writing the image data of the standard white plate 41 to the SDRAM 6 is set in step 10
In step 9, the CPU 8 does not need to be aware of the generation of the shading correction data by making the image data of the document the same as the start address at which the image data of the original is written to the SDRAM 6, the load on the CPU 8 is reduced, and the memory (SDRAM 6)
Also, since the data is used only before storing the binary data in the area for storing the binary data, the capacity is not increased.

Further, in the image processing device 51, FIG.
Step 105, Step 106, Step 1 shown in
07 is performed, the DMA control unit 33 shown in FIG. 2 uses the PCI control unit 36 and the SYST shown in FIG.
An interrupt signal is not given to the CPU 8 of FIG. 1 via the EM-ASIC 7. On the other hand, when performing the processing of step 109 shown in FIG.
Sends an interrupt signal to the CPU 8 via the PCI control unit 36 and the SYSTEM-ASIC 7.

As a result, the load on the CPU 8 can be further reduced.

In the present invention, the data of the standard white plate 41 is written into the memory (SDRAM 6), and the memory (SDR 6) is written.
AM 6), the shading correction data is created, and the shading correction data is transferred to the real-time image processing unit 3. Since the CPU 8 does not need to intervene in this series of processing, it is possible to reduce the load on the CPU 8 by not giving an interrupt signal to the CPU 8 during this series of processing.

In addition, in the image processing device 51, the DM
The interruption by the A control unit 33 is performed only when the number of lines in the sub-scanning direction exceeds a predetermined number. Thus, the DMA control unit 33 does not need to be conscious of giving an interrupt signal to the CPU 8, so that the circuit scale can be reduced and simplified.

Specifically, in step 110 of the flowchart shown in FIG. 3, the prescribed number of lines of binary data in one page in the sub-scanning direction is 7000 lines, Is 113 lines. In this case, the DMA control unit 33
Is set to generate an interrupt signal only when the sub-scanning direction address counter (not shown) of the DMA control unit 33 reaches 7000 lines. Therefore, the DMA control unit 33 does not generate an interrupt signal for the data of the white plate 41 of 113 lines.

In the above-described embodiment, the shading correction data is created for each page. However, even if the shading correction data is created or not created for each page, FIG. Only the length of the PAGE signal becomes an interrupt condition. Therefore, even if a document JAM occurs on the way, the memory-based image processing unit 5 shown in FIG.
DMA controller 33 generates an interrupt signal. Then, the PCI control unit 36 and the SYS shown in FIG.
Through the TEM-ASIC 7, it is determined whether to interrupt the CPU. Therefore, the interrupt condition can be greatly simplified.

As described above, in order to eliminate the influence of dust and paper dust, multi-valued data of a plurality of lines is required. Conventionally, it was necessary to prepare a memory for image processing having a large capacity. In this case, by sharing with a memory for binary image data, even if multi-value data of a plurality of lines is stored, the memory for image processing does not need to be increased.

[0077]

According to the present invention, the following effects can be obtained.

(1) The image processing apparatus has a memory capable of writing the image data of the standard white plate for shading correction read by the reading means and the image data of the original read by the reading means. By also using the memory for data, it is possible to perform high-quality shading correction that is not easily affected by dirt without increasing the cost.

(2) The image processing apparatus includes: a writing start address of image data of a standard white plate for shading correction;
Since there is a memory with the same write start address of the image data of the original, the read data of the standard white plate used as the work area for shading correction is written to the memory, and after shading correction, the image data is overwritten to the same address Therefore, it is not necessary to provide a memory for image data and a memory for shading correction data, and cost can be reduced. In addition, since it is not necessary to manage the writing area of the memory, an unnecessary load on the image processing apparatus can be suppressed.

(3) The DMA control unit which writes the image data of the standard white plate for shading correction and the image data of the original to the memory by the DMA method is provided with an interrupt when writing the image data of the standard white plate for shading correction to the memory. When writing the image data of the document to the memory without giving the signal to the CPU controlling the respective parts,
Since an interrupt signal is given to the CPU, the calculation for shading correction using the image data of the standard white plate is often performed by an ASIC (application-specific IC).
Since the CPU does not need an interrupt signal from the DMA control unit, the load on the CPU can be reduced by not giving an interrupt.

(4) When the number of lines in the sub-scanning direction in the image data of the document exceeds a predetermined number, the DMA control unit stops writing the document image data to the memory by the DMA method, and Since the interrupt signal is provided, the DMA control unit does not need to be conscious of giving the interrupt signal to the CPU, so that the circuit scale can be reduced and simplified.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of an image processing apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a schematic configuration of an image processing circuit of the image processing apparatus according to the embodiment of the present invention.

FIG. 3 is a block diagram illustrating a schematic configuration of a memory-based image processing unit 5;

4 is a timing chart of a control signal in the image processing device 51. FIG.

FIG. 5 is a diagram showing a correspondence between an image reading area in the image processing device 51 and a pixel of the CCD line sensor 1;

FIG. 6 is a flowchart for explaining shading correction in the image processing device 51 according to the embodiment of the present invention.

FIG. 7 is a block diagram of an image processing circuit 61a in a conventional image processing device 61.

[Description of Signs] 1,11-CCD line sensor 6,16-SDRAM (memory) 41-Standard white plate for shading correction 51,61-Image processing device S-Document

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Keiji Nakamura 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka Inside Sharp Corporation (72) Inventor Toru Adachi 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka Incorporated (72) Inventor Tokiyuki Okano 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka Inside Sharp Corporation (72) Inventor Kosuke Harada 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka Sharp Corporation F term (reference) 5B047 BB02 CA21 DA04 DC06 EB17 5C072 AA01 BA08 FB12 RA16 UA02 UA12 UA13 5C077 LL04 MM27 NP05 PP06 PQ12 PQ22

Claims (4)

[Claims] 1. An image processing apparatus for performing shading correction on a document image read by a reading unit based on image data of a standard white plate read by a reading unit, the image data of the standard white plate for shading correction and the document An image processing apparatus, comprising: a memory capable of writing the image data. 2. The memory according to claim 1, further comprising: a write start address of image data of the shading correction standard white plate;
2. The image processing apparatus according to claim 1, wherein a writing start address of the image data of the document is the same. 3. A DMA control unit that writes image data of the standard white plate for shading correction and image data of the document to the memory by a DMA method, and a CPU that controls each unit. When writing the image data of the standard white plate for shading correction to the memory, an interrupt signal is not given to the CPU, and when writing the image data of the document to the memory, an interrupt signal is given to the CPU. The image processing device according to claim 1. 4. When the number of lines in the sub-scanning direction in the image data of the document exceeds a predetermined number, the DMA control unit stops writing the image data of the document to the memory by the DMA method, and 4. The image reading processing device according to claim 3, wherein an interrupt signal is given.