JP2002042499A - Semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor integrated circuit in which the potential of an internal power source can be measured accurately even if a contact resistance and stray capacity are added by a probe. SOLUTION: This circuit is provided with a transistor series circuit 12 in which transistors 12a-12n of the same form and N pieces are connected in series between a source and a drain, a variable power source is supplied to a drain of a transistor 12a of the uppermost stage, and an internal power source dropped in voltage by s dropping circuit 3 is supplied to a gate of a transistor 12n of the lowest stage, and a comparator 13 comparing a reference power source with a potential of a drain of the transistor 12n of the lowest stage.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit having a step-down circuit for stepping down an external power supply to an internal power supply having a lower potential.

[0002]

2. Description of the Related Art FIG. 2 is a block diagram showing a conventional semiconductor integrated circuit. In FIG. 2, reference numeral 1 denotes a chip (semiconductor integrated circuit), and reference numeral 2 denotes an external power supply supplied to the chip 1. In the chip 1, reference numeral 3 denotes a negative feedback amplifier, a step-down circuit for lowering the potential of the external power supply 2 to an internal power supply having a lower potential, 4 an internal power supply line, 5 a clock, an address, data, Signals for control etc. are sent to chip 1
, An input / output circuit for inputting / outputting to / from external circuits, 6 is a peripheral circuit having functions such as a decoder and a sequencer, and 7 is a memory array. Note that the input / output circuit 5, the peripheral circuit 6, and the memory array 7 operate based on the internal power supply stepped down by the step-down circuit 3.

Next, the operation will be described. In a conventional semiconductor integrated circuit, since a device withstand voltage of a transistor or the like is large, a power supply of 5 [V] can be used. However, as the generation of the semiconductor integrated circuit advances, the miniaturization of the transistor progresses, and the withstand voltage of the element decreases. Therefore, the power supply must be reduced every generation, such as by reducing the power supply to 3.3 [V]. No longer. From the manufacturer's point of view, changing the external power supply for each generation in accordance with the miniaturization level of the transistor can reduce power consumption, ensure reliability, and reduce the size of the miniaturized transistor. This is a good idea because it can bring out the effectiveness of
However, from the user's point of view, it is not realistic, and it is natural that at least two to three generations want a constant external power supply. It is one of the greatest concerns for manufacturers and users from a practical point of view how much a next-generation power supply should be in view of generations ahead. One of the techniques for solving this is a step-down circuit (voltage converter, voltage limiter). This is to operate a miniaturized transistor with an internal power supply that is stepped down in accordance with the element breakdown voltage of the transistor under a constant external power supply.

In FIG. 2, a step-down circuit 3 steps down the potential of an external power supply 2 supplied to a chip 1 to an internal power supply having a lower potential. The potential of the internal power supply is set to a potential that can guarantee the withstand voltage of the miniaturized transistors constituting the input / output circuit 5, the peripheral circuit 6, and the memory array 7. By the supply of the internal power by the internal power supply line 4, the input / output circuit 5 inputs and outputs signals such as clock, address, data, and control to and from a circuit outside the chip 1, and the peripheral circuit 6 includes a decoder and a sequencer. Controls the memory array 7 in accordance with each signal, and stores data in the memory array 7.

FIG. 3 is an explanatory diagram showing a negative feedback amplifier constituting a step-down circuit. FIG. 3 (a) is a waveform diagram showing an input waveform of the negative feedback amplifier, and FIG. 3 (b) is a diagram showing the negative feedback amplifier. FIG. In the figure, reference numeral 3a denotes an amplifier, and 3b denotes an addition point for adding an input signal and an output signal of the amplifier 3a. In a negative feedback amplifier constituting a step-down circuit, generally, a phase difference between an input signal and an output signal is 180 degrees and a gain G is 1
It is well known that ringing or oscillation occurs when the ratio of the output signal change to the input signal change is the same or more. Hereinafter, the oscillation in the negative feedback amplifier will be described. As shown in FIG. 3A, it is assumed that only one positive half wave of vi = Vsin ωt is given to the negative feedback amplifier shown in FIG. 3B. System delay time τ in negative feedback amplifier
Is exactly equal to half the period tc of this input signal (t
c = 2τ). When the gain G is 1, FIG.
As shown in (a), the output signal whose input signal is delayed by the delay time τ is negatively fed back to the addition point 3b. FIG. 4 is an explanatory diagram showing input / output signals of the negative feedback amplifier.
The output signal repeatedly oscillates because the negatively fed back signal of the output signal becomes the next input signal. Note that the gain G is (G>
In the case of 1), the vibration amplitude increases and the gain G becomes (G <1).
In the case of, the vibration amplitude attenuates inversely. A general method for stabilizing the system of such a negative feedback amplifier is to obtain the frequency characteristics of the gain and phase of the system, and to set the phase corresponding to the frequency at which the gain becomes 1 to a value as small as 180 degrees or less. That is to adjust the circuit constants. The larger the difference from 180 degrees (phase margin), the more stable the system.
It is said that it is necessary more than once.

The internal power supply generated by the step-down circuit 3 shown in FIG. 2 varies between lots formed on a wafer due to variations in the threshold voltage Vth and the like of the transistors constituting the step-down circuit 3. The potential of the power supply will be different. Therefore, the potential of the internal power supply in each lot is measured, and a resistor or the like provided in advance in each lot is cut off in accordance with the measured potential of the internal power supply, and trimming is performed so that the potential of the specified internal power supply is obtained. . FIG. 5 is an explanatory diagram showing a method of measuring the potential of the internal power supply. In the figure, reference numeral 8 denotes a pad connected to the internal power supply line 4, and 9 denotes a voltage for measuring the potential of the internal power supply by applying a probe to the pad 8. It is total. Thus, the potential of the internal power supply in each lot is measured by applying the probe of the voltmeter 9 to the pad 8 connected to the internal power supply line 4.

FIG. 6 is an explanatory diagram showing contact resistance and stray capacitance formed on the output side of the negative feedback amplifier. In the drawing, 3c denotes contact resistance and 3d denotes stray capacitance. As shown in FIG. 5, the step-down circuit 2 is constituted by a negative feedback amplifier, and by applying a probe of a voltmeter 9 to the pad 8, as shown in FIG. Contact resistance 3c by probe and stray capacitance 3d
Is added. FIG. 7 is an explanatory diagram showing the output signal of the negative feedback amplifier according to the presence or absence of the probe, and FIG.
FIG. 7B is an explanatory diagram showing an output signal of the negative feedback amplifier without a probe, and FIG. 7B is an explanatory diagram showing an output signal of the negative feedback amplifier with a probe. As described above, even if the phase margin is set large in order to stabilize the system of the negative feedback amplifier, the contact resistance 3c and the stray capacitance 3d due to the contact of the probe cause the addition of FIGS. 7A and 7B. As shown in the figure, when the phase of the output signal increases from X degrees to X + α degrees and this X + α degree becomes exactly 180 degrees,
Since the negative feedback amplifier rings or oscillates, measurement cannot be performed under the same conditions as the actual operation inside the chip 1.

[0008]

Since the conventional semiconductor integrated circuit is constructed as described above, the negative feedback forming the step-down circuit 3 is established by contact of the probe of the voltmeter 9 when measuring the potential of the internal power supply. Contact resistance 3c on the output side of the amplifier
And the stray capacitance 3d is added. As a result, the negative feedback amplifier may cause ringing or oscillation. If ringing or oscillation occurs, measurement is performed under the same conditions as the actual operation inside the chip 1. And the measurement accuracy of the potential of the internal power supply by the voltmeter 9 is extremely reduced.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is possible to perform measurement under the same conditions as the actual operation inside a semiconductor integrated circuit even when a contact resistance and a stray capacitance are added by a probe. It is an object of the present invention to obtain a semiconductor integrated circuit capable of measuring the potential of an internal power supply with high accuracy.

[0010]

In a semiconductor integrated circuit according to the present invention, N transistors of the same form are connected in series between a source and a drain, a variable power supply is supplied to the drain of the uppermost transistor, and And a comparator for comparing the reference power supply with the drain potential of the lowermost transistor.

The semiconductor integrated circuit according to the present invention is connected to the first external pad connected to the drain of the uppermost transistor and supplied with a variable power supply from the outside, and to the input side of the comparator. It is provided with a second external pad to be supplied and an output pad connected to the output side of the comparator and outputting the result of comparison by the comparator to the outside.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. Embodiment 1 FIG. FIG. 1 is a configuration diagram showing a semiconductor integrated circuit according to a first embodiment of the present invention. In the figure, reference numeral 11 denotes a chip (semiconductor integrated circuit), and reference numeral 2 denotes an external power supply supplied to the chip 1. In the chip 11, reference numeral 3 denotes a negative feedback amplifier, a step-down circuit for lowering the potential of the external power supply 2 to an internal power supply having a lower potential, 4 an internal power supply line, 5 a clock, an address, data, An input / output circuit for inputting / outputting each signal for control and the like to / from a circuit external to the chip 1, a peripheral circuit 6 having functions such as a decoder and a sequencer, and a memory array 7 are shown. The input / output circuit 5, the peripheral circuit 6, and the memory array 7 include a step-down circuit 3
It operates on the basis of the internal power supply stepped down. Reference numeral 12 denotes a transistor series circuit in which N (N is an arbitrary natural number of 2 or more) transistors 12a to 12n of the same size (form) are connected in series between the source and the drain, and the drain of the uppermost transistor 12a Is supplied with variable power, and the lowermost transistor 1
The internal power supply line 4 is connected to the gate of 2n.
The source of the transistor 12n is grounded.
Reference numeral 13 denotes a comparator for comparing the reference power supply with the drain potential of the lowermost transistor 12n. An external pad (first external pad) 14 is connected to the drain of the transistor 12a in the uppermost stage and supplied with a variable power from the outside, and 15 is connected to an input side of the comparator 13 and supplied with a reference power from the outside. An external pad (second external pad) 16 is connected to the output side of the comparator 13,
An output pad for outputting the result of comparison by the comparator 13 to the outside. Reference numeral 21 denotes a tester provided outside the chip 11. In the tester 21, reference numeral 21a denotes a power supply unit that supplies a variable power to the external pad 14 through a probe, 21b denotes a power supply unit that supplies a reference power to the external pad 15 through a probe, Reference numeral 21c denotes a voltmeter that detects a comparison result by the comparator 13 from the output pad 16 through a probe.

Next, the operation will be described. In FIG. 1, a step-down circuit 3 includes an external power supply 2 supplied to a chip 11.
Is lowered to an internal power supply having a lower potential. The potential of the internal power supply is set to a potential that can guarantee the withstand voltage of the miniaturized transistors constituting the input / output circuit 5, the peripheral circuit 6, and the memory array 7. By the supply of the internal power by the internal power supply line 4, the input / output circuit 5 inputs and outputs signals such as clock, address, data, and control to and from a circuit outside the chip 1, and the peripheral circuit 6 includes a decoder and a sequencer. Controls the memory array 7 in accordance with each signal, and stores data in the memory array 7.

By the way, the internal power supply generated by the step-down circuit 3 shown in FIG. 1 varies between lots formed on the wafer due to variations in the threshold voltage Vth of the transistors constituting the step-down circuit 3. The potential of the power supply will be different. Therefore, the potential of the internal power supply in each lot is measured, and a resistor or the like provided in advance in each lot is cut off in accordance with the measured potential of the internal power supply, and trimming is performed so that the potential of the specified internal power supply is obtained. . In the first embodiment, the probe of the tester 21 is connected to the external pads 14 and 1.
5 and the output pad 16, the power supply unit 21a supplies a variable power supply to the external pad 14, the power supply unit 21b supplies a reference power supply to the external pad 15, and the voltmeter 21c outputs the comparison result from the output pad 16 to the comparator 13. To detect the potential of the internal power supply. Since the variable power supply is supplied to the drain of the transistor 12a and the internal power supply is supplied to the gate of the transistor 12n, by raising the variable power supply of the power supply section 21a from a low potential to a high potential, 12
When a to 12n are turned on, the variable power supply is further increased, and when all the transistors 12a to 12n enter the saturation region, the following equation (1) is established. Ids = (β / 2) (Vgs−Vth) ² (1) where Ids is the drain current, β is the conductance, and V
gs is a gate-source voltage, and Vth is a threshold voltage. In this saturation region, Ids is constant, and the potential Vgs of the internal power supply matches the Vds of the transistor 12n.
12n is equally divided. The comparator 13 compares a constant potential of a reference power supply supplied through the external pad 15 with a drain potential of the lowermost transistor 12n. In a state where all the transistors 12a to 12n are in the saturation region, if the drain potential of the transistor 12n becomes equal to or higher than the fixed potential of the reference power supply, the output of the comparator 13 changes from "L" level to "H" level. . The change from the "L" level to the "H" level is detected by the voltmeter 21c through the output pad 16, and the potential of the internal power supply is calculated by the following equation (2). When the comparator 13 outputs “H” level,
When the drain potential of the transistor 12n matches the constant potential of the reference power supply, (potential of the variable power supply) = (constant potential of the reference power supply) + (potential of the internal power supply) × (N−1). Therefore, (potential of internal power supply) = {(potential of variable power supply) − (constant potential of reference power supply)} / (N−1) (2)

As described above, according to the first embodiment, if the probe of the tester 21 is applied to the output pad 16, the contact resistance and the stray capacitance of the probe are applied to the output side of the comparator 13. The influence of the contact resistance and the stray capacitance is cut off by the gate of the transistor 12n at the lowermost stage and does not affect the negative feedback amplifier of the step-down circuit 3. Therefore, the negative feedback amplifier does not cause ringing or oscillation. The measurement can be performed under the same conditions as the actual operation inside the chip 11, and the potential of the internal power supply can be measured with high accuracy.
When measuring the potential of the internal power supply, the tester 21 supplies a variable power supply to the external pad 14, supplies a reference power supply to the external pad 15, and further uses the tester 21 to input the comparison result of the comparator 13 from the output pad 16. Measurement, and the potential of the internal power supply can be measured very easily.

In the first embodiment, the variable power supply and the reference power supply are supplied from the tester 21 through the external pads 14 and 15.
1, the external pads 14 and 15 need not be provided.

[0017]

As described above, according to the present invention, N transistors of the same type are connected in series between the source and the drain, the variable power supply is supplied to the drain of the uppermost transistor, and the lowermost transistor A transistor series circuit in which the internal power supply stepped down by the step-down circuit is supplied to the gate of the transistor and a comparator for comparing the reference power supply with the drain potential of the lowermost transistor, so that the potential of the internal power supply is When the comparator detects that the drain potential of the lowermost transistor is equal to or higher than the potential of the reference power supply, the measurement is performed in accordance with the potential of the variable power supply, the potential of the reference power supply, and the number of transistors in the transistor series circuit. Can be. If a probe such as a tester is applied to the output side of the comparator, the contact resistance and stray capacitance of the probe will be applied to the output side of the comparator. Since the gate is cut off and does not affect the negative feedback amplifier of the step-down circuit, the negative feedback amplifier can perform measurement under the same conditions as actual internal operation of the semiconductor integrated circuit without causing ringing or oscillation. This has the effect of providing a semiconductor integrated circuit capable of measuring the potential of the internal power supply with high accuracy.

According to the present invention, the first external pad connected to the drain of the uppermost transistor and supplied with a variable power from the outside and the input side of the comparator and supplied with the reference power from the outside A second external pad, and an output pad connected to the output side of the comparator and outputting the result of comparison by the comparator to the outside. The reference power supply is supplied to the second external pad while being supplied to the first external pad, and the tester can measure the result of the comparison by simply inputting the comparison result from the comparator from the output pad. There is an effect that a semiconductor integrated circuit capable of measuring a potential can be obtained.

[Brief description of the drawings]

FIG. 1 is a configuration diagram illustrating a semiconductor integrated circuit according to a first embodiment of the present invention;

FIG. 2 is a configuration diagram showing a conventional semiconductor integrated circuit.

FIG. 3 is an explanatory diagram showing a negative feedback amplifier constituting a step-down circuit.

FIG. 4 is an explanatory diagram showing input / output signals of a negative feedback amplifier.

FIG. 5 is an explanatory diagram showing a method for measuring a potential of an internal power supply.

FIG. 6 is an explanatory diagram showing contact resistance and stray capacitance formed on the output side of a negative feedback amplifier.

FIG. 7 is an explanatory diagram showing output signals of a negative feedback amplifier according to the presence or absence of a probe.

[Explanation of symbols]

2 external power supply, 3 step-down circuit, 4 internal power supply line, 5
I / O circuit, 6 peripheral circuit, 7 memory array, 11
Chip (semiconductor integrated circuit), 12-transistor series circuit, 12a to 12n transistors, 13 comparator, 14 external pad (first external pad), 15
External pad (second external pad), 16 output pads, 2
1 Tester, 21a, 21b power supply section, 21c voltmeter.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G11C 16/02 G11C 17/00 601Z

Claims (2)

[Claims] 1. A step-down circuit comprising a negative feedback amplifier for stepping down an external power supply to an internal power supply having a lower potential, and N (N is an arbitrary natural number of 2 or more) transistors of the same form each having a source. A transistor series circuit in which a drain is connected in series, a variable power supply is supplied to a drain of the uppermost transistor, and an internal power supply stepped down by the step-down circuit is supplied to a gate of the lowermost transistor; And a comparator for comparing a drain potential of the lowermost transistor with a comparator. 2. A first external pad connected to the drain of the uppermost transistor and supplied with an external variable power supply, and a second external pad connected to the input side of the comparator and supplied with an external reference power supply 2. The semiconductor integrated circuit according to claim 1, further comprising: a pad; and an output pad connected to an output side of the comparator and outputting a comparison result by the comparator to the outside.