JP2002034046A - Method and device for converting image information - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simplify a process at reducing a macro block. SOLUTION: There are provided an MPEG2 image information decoding part (I/P picture 2×8 down decoder) 26 where a skip image is decoded using only 2×8 component among discrete cosine conversion factor of 8×8 component of a macro block which constitutes MPEG2 image compression information by skip scanning, a scan converting part 27 where any one of first and second fields of the decoded skip image is selected to generate an image of sequential scanning, the generated sequential-scanning image, and an MPEG4 image information encoding part (I/P-VOP) 28 where the generated image is encoded into an MPEG4 image compression information.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image information conversion apparatus and method for converting image information, and more particularly, to image information (bit stream) such as MPEG compressed by orthogonal transform such as discrete cosine transform and motion compensation. The present invention relates to an image information conversion apparatus and method used when receiving an image through a network medium such as satellite broadcasting, cable TV, or the Internet, or when processing the same on a storage medium such as an optical disk or a magnetic disk.

[0002]

2. Description of the Related Art In recent years, image information is handled as digital data, and for the purpose of transmitting and storing information with high efficiency, compression is performed by orthogonal transform such as discrete cosine transform and motion compensation using redundancy inherent in image information. An image information compression system such as MPEG is provided. Then, an apparatus conforming to such an image information compression method is used for information distribution of a broadcasting station or the like,
It is becoming widespread in both information reception in general households.

In particular, MPEG2 (ISO / IEC 13
818-2) is defined as a general-purpose image coding method, and is a standard covering both interlaced scan images and progressive scan images, as well as standard resolution images and high-definition images, and has a wide range of applications for professional use and consumer use. It is expected to be used in the future.

[0004] By using the MPEG2 compression method,
A high compression rate and good image quality can be realized. For this purpose, for example, a standard resolution interlaced scanning image having 720 × 480 pixels is 4 to 8 Mbps and 1920 × 480.
For a high-resolution interlaced scan image having 1088 pixels, it is necessary to allocate a code amount (bit rate) of 18 to 22 Mbps.

[0005] In digital broadcasting which is expected to be widely used in the future, image information is transmitted by such a compression method. Standards include an image having a standard resolution and an image having a high resolution. It is desirable that the device has a function capable of decoding both of them.

In particular, in order to coexist with standard-resolution images and construct an inexpensive receiver, it is necessary to process high-resolution image information by thinning it in some form while minimizing image quality deterioration. It is considered that such a problem can occur not only in transmission media such as digital broadcasting, but also in storage media such as optical disks and flash memories.

In order to solve such a problem, the present applicant has previously proposed a down decoder as shown in FIG.
This down decoder is a block of 8 components (hereinafter, referred to as 8 × 8; the same applies to other blocks) in a vertical direction and a horizontal direction, which constitute an encoded image of MPEG2 image compression information (bit stream). 4x to convert to 4 blocks
4 down decoder.

The 4 × 4 down decoder includes a code buffer 1, a compression information analysis unit 2, a variable length decoding unit 3, an inverse quantization unit 4, an inverse discrete cosine transform unit (4 × 4) 5, ,
Inverse discrete cosine transform section (field separation) 6, adder 7, motion compensation section (field prediction) 8, motion compensation section (frame prediction) 9, video memory 10, image frame conversion / phase shift correction section 11 and is calibrated.

A code buffer 1 temporarily stores input image compression information, a compression information analysis unit 2 analyzes the input image compression information, and a variable length coding unit 3 performs variable length decoding of the input image compression information. , The inverse quantization unit 4 inversely quantizes the output of the variable length decoding unit 3.

A reduced inverse discrete cosine transform unit (4 ×
4) 5 performs inverse discrete cosine transform only on the low-frequency 4 × 4 component among the 8 × 8 components output from the inverse quantization unit 4, and the reduced inverse discrete cosine transform unit (field separation) 5 performs interlaced scanning. A first field and a second field constituting an image are separated.

Further, a motion compensator (field prediction) 8
Performs motion compensation by performing motion prediction on the image supplied from the video memory 10 on a field basis and performs motion prediction on the image supplied from the video memory 10 on a frame basis. The adder 7 adds these outputs to the output of the reduced inverse discrete cosine transform unit (4 × 4) 5 and the reduced inverse discrete cosine transform unit (field separation) 6, and the video memory 10 The image frame / phase shift correction unit 11 performs image frame correction and phase shift correction on the image stored in the video memory 10 and outputs the image.

In the variable length decoding unit 3, a discrete cosine transform (discrete cosine transform) of the macro block is performed.
Depending on whether the DCT mode is the field discrete cosine transform mode or the frame discrete cosine transform mode, the subsequent reduced inverse discrete cosine transform unit (4 ×
4) It is also conceivable that only the necessary discrete cosine transform coefficients are decoded in 5 or the reduced inverse discrete cosine transform unit (field separation) 6, and the processing is not performed until the EOB is detected.

Here, the principle of operation of the variable length coding unit 3 when the input MPEG2 image compression information (bit stream) is a zigzag scan will be described with reference to FIG. The numbers in FIG. 9 indicate the order in which the discrete cosine transform coefficients are read.

In the case of the frame discrete cosine transform mode, as shown in FIG. 9A, the reduced inverse discrete cosine transform unit (4 × 4) 5 is surrounded by a broken line in the macroblock of the 8 × 8 component. Only the discrete cosine transform coefficients of the low frequency 4 × 4 component are subjected to variable length decoding. In the case of the field discrete cosine transform mode, as shown in FIG. 9B, the reduced inverse discrete cosine transform unit (field separation) 6 converts the low band 4 surrounded by a broken line in the macroblock of 8 × 8 components. Only the discrete cosine transform coefficients of × 8 components are variable-length decoded.

The principle of operation of the variable length coding unit 3 when the input MPEG2 image compression information (bit stream) is an alternate scan will be described with reference to FIG.

In the case of the frame discrete cosine transform mode, as shown in FIG. 10A, the inverse discrete cosine transform unit (4.times.4) 5 is surrounded by a broken line in the macro block of the 8.times.8 component. Only the discrete cosine transform coefficients of the low-frequency 4 × 4 component are variable-length decoded. In the case of the field discrete cosine transform mode, as shown in FIG. 10B, the inverse discrete cosine transform unit (field separation) 6 performs the discrete cosine transform of the low frequency 4 × 8 component at the position of the 8 × 8 component macroblock. Variable length decoding is performed only on the transform coefficients.

When the discrete cosine transform coefficient of the macroblock is the frame discrete cosine transform mode, the discrete cosine transform coefficient inversely quantized by the inverse quantizing unit 4 is a reduced inverse discrete cosine transform unit (4 × 4). ) 5.
When the discrete cosine transform mode of the macroblock is the field discrete cosine transform mode, the discrete inverse cosine transform unit (field separation) 6 performs inverse discrete cosine transform.

The output from the reduced inverse discrete cosine transform unit (4 × 4) 5 or the reduced inverse discrete cosine transform unit (field separation) 6 is stored as it is in the video memory 10 when the macroblock is an intra macroblock. You.

The output from the reduced inverse discrete cosine transform unit (4 × 4) 5 or the reduced inverse discrete cosine transform unit (field separation) 6 indicates that the motion compensation mode is the field prediction mode when the macroblock is an inter macroblock. In the case of (1), the motion compensation unit (field prediction) 8 uses the reference data in the video memory 10 in the horizontal direction and the vertical direction based on the reference data in the video memory 10 when the motion compensation mode is the frame prediction mode. Both are combined by the adder 7 with the predicted image that has been subjected to the interpolation processing of 1/4 pixel precision and output to the video memory 10.

The pixel values stored in the video memory 10 are
Corresponding to the pixels in the upper layer, a phase shift is included between the first field and the second field as in the upper layer shown in FIG. 11A and the lower layer shown in FIG. 11B.

In the upper layer of FIG. 11A, the pixel a1 in the first field and the pixel a2 in the second field
It is shown. In the lower layer of FIG. 11B, a pixel b1 in the first field and a pixel b2 in the second field are shown. Although the pixel value of the lower layer shown in FIG. 11B is obtained by reducing the number of pixels of the upper layer by the reduced inverse discrete cosine transform, it includes a phase shift between fields.

The pixel values stored in the video memory 10 are
The image frame is converted into an image frame size suitable for the display device by the image frame conversion / phase shift correction unit 11, and at the same time, the phase shift between the fields is corrected.

The principle of operation of the reduced inverse discrete cosine transform unit (4 × 4) 5 is that both the horizontal and vertical components are 8 × 8.
A 4 × 4 inner low-frequency component of the discrete cosine transform coefficient of the component is extracted, and a fourth-order inverse discrete cosine transform is performed on the component.

FIG. 12 shows the processing of the inverse discrete cosine transform unit (field separation type) 5. That is,
The discrete cosine transform coefficients y _{1 to} y ₈ , which are coded data in the input image compression information (bit stream), have 8 ×
Performs inverse discrete cosine transform of the 8 components to obtain data x ₁ ~x ₈ decoded. Next, to separate them in the first field data x _{1 in, x 3, x 5, x} 7 data x ₂ in the second _{field, x 4, x 6, x} 8.

Each of the separated data strings is subjected to a discrete cosine transform of 4 × 4 components, and discrete cosine transform coefficients z ₁ , z ₃ , z ₅ , z _{7 for} the first field and discrete cosine transform coefficients for the second field. z ₂ , z ₄ , z ₆ ,
get the z _8.

The discrete cosine transform coefficients for the first and second fields obtained in this manner are subjected to thinning processing to leave two low-frequency components. That is, the inner z ₅ of the discrete cosine transform coefficients for the first field, z _7, discards the inner z _6, z ₈ discrete cosine transform coefficients for the second field. This leaves the discrete cosine transform coefficients z ₁ , z ₃ for the first field and the discrete cosine transform coefficients z ₂ , z ₄ for the second field.

The discrete discrete cosine transform components z ₁ , z ₃ of the decimated _first field and the discrete cosine transform components z ₂ , z _{4 of the} decimated second field are each 2 × 2 inverse discrete components. By performing the cosine transform, the reduced pixel values x ′ ₁ , x ′ ₃ and the second
By nitrous t pixel values x reduction for the field _'2, x' ₄ is obtained.

The pixel values x ′ _{1 to} x ′ ₄ which are output values by synthesizing these values again in the frame are set.

The actual processing is performed by applying a matrix equivalent to these series of processing to the discrete cosine transform coefficients y _{1 to} y ₈ .
The pixel values x ′ _{1 to} x ′ ₄ are directly obtained. This matrix [FS ^I ] obtained by expansion calculation using the addition theorem is given by the following equation (1).

[0030]

(Equation 1)

However, the elements A to J in the equation (1) are defined as follows.

[0032]

(Equation 2)

[0033]

(Equation 3)

[0034]

(Equation 4)

[0035]

(Equation 5)

[0036]

(Equation 6)

[0037]

(Equation 7)

[0038]

(Equation 8)

[0039]

(Equation 9)

[0040]

(Equation 10)

[0041]

[Equation 11]

The 4 × 4 reduced inverse discrete cosine transform and the field-separated reduced inverse discrete cosine transform can be realized by a high-speed algorithm. In the following, Wang's algorithm (reference: Zhong de
Wang., “Fast Algorithms for the Discrete W
Transform and for the Discrete Fourier Tra
nsform ", IEEE Tr.ASSP-32, N0.4, pp.803-816, A
ug.1984).

A matrix representing a reduced inverse discrete cosine transform of 4 × 4 components is decomposed as in the following equation (2) using a Wang speed-up algorithm.

[0044]

(Equation 12)

However, in equation (2), small matrices and elements defined as follows are used.

[0046]

(Equation 13)

[0047]

[Equation 14]

[0048]

(Equation 15)

FIG. 13 shows this configuration. By using five multipliers and nine adders in this way, the present device can be realized.

In FIG. 13, the 0th output element f (0)
Is obtained by adding the value s2 and the value s5 in the adder 43.

Here, the value s2 is the 0th input element F (0)
And a second input element F (2) added by the adder 31 is multiplied by A in the multiplier 34. The value s5 is the first
An adder 4 adds a value obtained by multiplying the input element F (1) by C by the multiplier 37.
At 0, the value s1 is added. The value s1 is the third
The first input element F (1) is converted from the input element F (3) to an adder 3
The value reduced by 3 is multiplied by D in the multiplier 38.

The first output element f (1) has a value s3 and a value s
4 in the adder 41.

Here, the value s3 is the 0th input element F (0)
And the second input element F (2) is subtracted by the adder 32 and multiplied by A in the multiplier 35. The value s4 is obtained by subtracting the value s1 in the adder 39 from the value obtained by multiplying the third input element F (3) by B in the multiplier 36.

The second output element f (2) changes the value s4 to the value s
It is obtained by subtracting 3 in the adder 42.

The third output element f (3) is calculated from the value s2 to the value s
5 in the adder 44.

In the figure, the following quantities are used.

A = 1 / √2 B = −C _1/8 + C _3/8 C = C _1/8 + C _3/8 D = C _3/8 However, in the above equation, the following numbers are used. Can be Others are the same.

C _3/8 = cos (3π / 8) The matrix of the expression (1) representing the field-separated reduced inverse discrete cosine transform is expressed by the following expression (3) using the Wang speed-up algorithm. Decomposed.

[0059]

(Equation 16)

However, the small matrix in equation (3) is defined as follows.

[0061]

[Equation 17]

[0062]

(Equation 18)

The elements A to J are the same as in the equation (1). FIG. 14 shows this configuration. By using 10 multipliers and 13 adders as described above, the present device can be realized.

That is, the zeroth output element f (0) has the value s
16 and the value s18 are added in the adder 70.

Here, the value s16 is the value s11 and the value s1.
2 is the value added by the adder 66. Value s1
1 is obtained by multiplying the zeroth input element F (0) by A in the multiplier 51. The value s12 is the second input element F (2)
Is multiplied by D in the multiplier 52 and the fourth input element F
The value obtained by multiplying (4) by F in the multiplier 53 is added to the adder 61.
, And the value obtained by multiplying the sixth input element F (6) by H in the multiplier 54 is added in the adder 63.

The first output element f (1) is obtained by subtracting the value s19 from the value s17 in the adder 73.

Here, the value s17 is changed from the value s11 to the value s1.
2 has been subtracted in the adder 67. Value s1
9 is a value obtained by adding the value s13 and the value s15 in the adder 69. The value s13 is the third input element F (3)
From the value multiplied by E in the multiplier 55 to the fifth input element F
The value obtained by multiplying (5) by G in the multiplier 56 is added to the adder 64.
It was reduced in. The value s15 is obtained by adding the value obtained by multiplying the first input element F (1) by C in the multiplier 58 and the value obtained by multiplying the seventh input element F (7) by J in the multiplier 60 in the adder 65. It is.

The second output element f (2) is obtained by adding the value s17 and the value s19 in the adder 72.

The third output element f (3) is obtained by subtracting the value s18 from the value s16 in the adder 71.

Here, the value s18 is equal to the value s13 and the value s1.
4 has been added in the adder 68. Value s1
4 is a value obtained by adding the value obtained by multiplying the first input element F (1) by B in the multiplier 57 and the value obtained by multiplying the seventh input element F (7) by I in the multiplier 59 in the adder 62. is there.

Next, the operation of the motion compensation unit (field prediction) 8 and the motion compensation unit (frame prediction) 9 corresponding to the field motion compensation mode and the frame motion compensation mode will be described. Regarding the horizontal interpolation, in both the field motion compensation mode and the frame motion compensation mode, first, a pixel equivalent to 精度 precision is created by a double interpolation filter such as a half-band filter, and the created pixel is created. , A pixel equivalent to 1/4 precision is created by linear interpolation. At this time, when a half-band filter is used to output a pixel value having the same phase as a pixel extracted from the frame memory as a predicted image, it is not necessary to perform a multiply-accumulate operation according to the number of taps. Is possible. In addition, by using a half-band filter, division accompanying interpolation can be performed by a shift operation, and higher-speed execution is possible. Alternatively, it is also conceivable to directly create pixels required for motion compensation by filtering with quadruple interpolation.

FIG. 15 relates to vertical interpolation of the motion compensator 8 corresponding to the field motion compensation mode. First, a pixel value including a phase shift between fields is fetched from the video memory 10 according to the value of the motion vector in the input image compression information (bit stream) as shown in FIG. In the figure, the symbol a1 on the left is a pixel in the first field, the symbol a2 on the right is a pixel in the second field,
Each corresponds. The pixels of the first field and the second
The pixels in the field are out of phase.

Next, as shown in FIG. 15B, a pixel value equivalent to 1/2 pixel precision is created in the field using a double interpolation filter such as a half band filter. Pixels created by double interpolation in the first field and the second field using the double interpolation filter are represented by symbols b1 and b2, respectively.

Then, as shown in FIG. 15C, by performing linear interpolation in the field, a pixel value equivalent to 1/4 pixel precision is created. Pixels created by linear interpolation in the first field and the second field, respectively, are indicated by symbols c1 and c2, respectively. that time,
By using a half-band filter, when outputting a pixel value having the same phase as a pixel extracted from the frame memory as a predicted image, it is not necessary to perform a product-sum operation according to the number of taps, so that high-speed operation is possible. is there. Or Figure 1
It is also conceivable to create a pixel value corresponding to the phase C in FIG. 15 by filtering the quadruple interpolation based on the pixel value A in FIG.

For example, if the pixel in the first field is at position 0,
When the pixel exists at the position 1 or the like, the pixel by the double interpolation is created at the position 0.5 or the like. Further, pixels by linear interpolation are created at a position 0.25, a position 0.75, and the like.
The same applies to the second field. In the figure, the position of the first field and the position of the second field are 0.25.
It is out of alignment.

FIG. 16 relates to the vertical interpolation of the motion compensation unit 9 corresponding to the frame motion compensation mode. First, according to the value of the motion vector in the input image compression information (bit stream), a pixel value including a phase shift between fields is fetched from the video memory 10 as shown in FIG. In the figure, the symbol a1 on the left is a pixel in the first field, the symbol a2 on the right is a pixel in the second field,
Each corresponds. The pixels in the first field and the pixels in the second field are out of phase.

Next, as shown in FIG. 16B, a pixel value equivalent to 1/2 pixel precision is created in the field using a double interpolation filter such as a half band filter. Pixels created by double interpolation in the first field and the second field using the double interpolation filter are indicated by symbols b1 and b2, respectively.

Then, as shown in FIG. 16C, a pixel value equivalent to 1/4 pixel accuracy is created by performing linear interpolation between fields. Pixels created by linear interpolation of the pixels in the first and second fields are indicated by the symbol c.

For example, if the pixel in the first field is at position 0,
If the pixel of the second field exists at the position 0.5, the position 2.5 or the like at the position 2 or the like, the pixel obtained by the double interpolation of the first field is at the position 1 or the like and the pixel of the second field is the double interpolation Are created at position 1.5 and so on. Further, pixels by linear interpolation are created at positions 0.25, 0.75, 1.25, 1.75, and the like.

By performing such interpolation processing, it is possible to prevent field inversion and field mixing, which cause image quality deterioration. In addition, by using a half-band filter, when outputting a pixel value having the same phase as a pixel extracted from the frame memory as a predicted image, it is not necessary to perform a product-sum operation according to the number of taps, so that high-speed operation can be performed. It is possible.

As the actual processing, in both the horizontal and vertical cases, coefficients are prepared in advance so that the two-stage interpolation realized by the double interpolation filter and the linear interpolation as described above is performed at once. The processing is performed as if it were a one-stage interpolation. In both horizontal and vertical cases, only necessary pixel values are created according to the value of the motion vector in the input image compression information (bit stream). It is also possible to prepare in advance filter coefficients according to the values of the horizontal and vertical motion vectors, and to perform interpolation in the horizontal and vertical directions at once.

When performing the double interpolation filtering,
Depending on the value of the motion vector, it may be necessary to refer to outside the image frame in the video memory. in this case,
Either wrap around the end point symmetrically for the required number of taps (hereinafter referred to as mirror processing) or have pixels with the same value as the pixel value of the end point outside the image frame by the required number of taps (This is hereinafter referred to as a hold process).

FIG. 17A shows the mirror processing. The symbol p in the figure is a pixel in the video memory 10, and the symbol q is a virtual pixel outside the image frame required for interpolation. The pixels outside the image frame are obtained by folding the pixels inside the image frame symmetrically with respect to the image frame.

FIG. 17B shows a hold process. Pixels outside this image frame are perpendicular to the image frame inside the image frame.
In both the motion compensation unit (field prediction) 8 and the motion compensation unit (frame prediction) 9, mirror processing or hold processing is performed in units of fields. Alternatively, a fixed value (for example, 128) may be considered for a pixel value that extends outside the image frame in both the horizontal direction and the vertical direction.

By the way, MPEG2 is mainly intended for high-quality encoding suitable for broadcasting, but MPEG1
It does not correspond to a coding method with a lower code amount (bit rate), that is, a high compression ratio. With the spread of mobile terminals, it is expected that the need for such an encoding system will increase in the future, and in response to this, the MPEG4 encoding system has been standardized. Regarding the image coding method,
In May, the standard was approved as an international standard as ISO / IEC14496-2.

Also, MPEG4 image compression information (bit rate) having a lower code amount (bit rate), which is more suitable for processing MPEG2 image compression information (bit stream) once encoded for digital broadcasting on a portable terminal or the like. Bit stream).

Image information conversion apparatus for achieving the above object
(Transcoder) as “Field-to-Frame Transc
oding with Spatial and Tempora1 Downsampling "
(Susie J. Wee, John G. Apostolopoulos, and Nick Fe
amster, ICIP 99), an apparatus as shown in FIG. 18 was proposed.
Have been. In other words, this device includes a picture type discriminating unit 1
2. MPEG2 image information decoding unit (I / P picture) 1
3, thinning unit 14, MPEG4 image information encoding unit (I /
P-VOP) 15, a motion vector synthesis unit 16, a motion vector
It comprises a torque detector 17.

The MPEG-2 image compression information (bit stream) of the interlaced scanning is input to the picture type determination unit 12. MPEG2 image compression information (bit stream) includes an intra-coded image (I picture) coded in a frame, a forward prediction coded image (P picture) coded by referring to the forward direction in the display order, It is composed of bidirectionally predicted coded images (B pictures) coded with reference to the forward and backward directions in the display order.

The picture type discriminating section 12 discriminates whether the data of each frame is related to an I / P picture or a B picture, and only the former is used for the subsequent MPEG2 image information decoding section (I / P P picture) 13.

The processing in the MPEG2 image information decoding section (I / P picture) 13 is the same as that in the ordinary MPEG2 image information decoding apparatus.
The function of the PEG2 image information decoding unit (I / P picture) 13 only needs to be able to decode only the I / P picture.

The pixel value output from the MPEG2 image information decoding unit (I / P picture) 13 is input to the thinning unit 14, where it is subjected to a half thinning process in the horizontal direction and to the vertical direction. In this method, only one of the data of the first field and the second field is left, and the other is discarded, thereby generating a progressively scanned image having a size of 1/4 of the input image information.

The progressively scanned image generated by the thinning unit 14 is an MPEG4 image information encoding unit (I / P-VOP)
15 and output as MPEG4 image compression information (bit stream). At this time, the motion vector information in the input MPEG2 image compression information (bit stream) is mapped to a motion vector for the decimated image information by the motion vector synthesis unit 16, and the motion vector A high-precision motion vector is detected based on the motion vector value synthesized by the unit 15.

The image information conversion apparatus shown in FIG. 18 is arranged so that when the input MPEG2 image compression information (bit stream) conforms to the NTSC standard (720 × 480 pixels, interlaced scanning), about 1/2 × It outputs MPEG4 image compression information (bit stream) having a size of SIF (352 × 240 pixels, progressive scanning), which is a half image frame. However, in a portable information terminal that is one of the target applications of MPEG4, the resolution of the monitor unit may not be able to display an image having an SIF size. Also, under the condition of the code amount (bit rate) determined by the capacity of the storage medium or the bandwidth of the transmission path, there may be a problem that good image quality cannot be obtained with the SIF size. In such a case, it is necessary to convert the input MPEG2 image compression information (bit stream) into a QSIF (176 × 112 pixels, sequential scanning) which is an approximately 1/4 × 1/4 picture frame. Further, information on high-frequency components of the image, which is discarded in the subsequent stage, is also processed in the MPEG2 image information decoding unit (I / P picture) 13, so that the amount of computation and memory required for decoding are required. It can be said that the capacity is redundant.

In order to solve such a problem, the present applicant has previously proposed an image information conversion apparatus as shown in FIG.

This image information conversion apparatus includes a picture type discrimination section 18, an MPEG2 image information decoding section (I / P picture 4 × 4 down decoder) 19, and a scan conversion section 2.
0, a thinning unit 21, an MPEG4 image information encoding unit (I / P-VOP) 22, and a motion vector combining unit 23
And a motion vector detecting unit 24.

The input MPEG-2 image compression information (bit stream) of the interlaced scanning is first input to the picture type discriminating section 18, where the information relating to the I / P picture is output and output to the MPEG2 image information decoding section (I / P P
Picture 4 × 4 down decoder) 19, but information on B pictures is discarded. The conversion of the frame rate is performed in this manner. The MPEG2 image information decoding unit (I / P picture 4 × 4 down decoder) 19 is the same as that shown in FIG. 18, but the information about the B picture has already been discarded by the picture type discriminating unit 18. As long as the decoding process of only the I / P picture can be performed. By performing the decoding process using only the low-frequency quaternary information in both the horizontal direction and the vertical direction, the MPEG2 image information decoding unit (I /
The capacity of the video memory required by the P picture 4 × 4 down decoder 19 may be 1/4 of the MPEG2 image information decoding unit (I / P picture 4 × 4 down decoder) 13 in FIG. The amount of calculation required for the inverse discrete cosine transform may be １ ／ in the field discrete cosine transform mode, and １ ／ in the frame discrete cosine transform mode. Furthermore, in the frame discrete cosine transform mode, as shown in FIG. 20, by replacing a part of the 4 × 8 discrete cosine transform coefficients with 0, it is possible to reduce the amount of calculation without substantially deteriorating the image quality. It is possible. Symbol a in the drawing indicates a pixel value to be replaced with 0.

The output of the MPEG2 image information decoding unit (I / P picture 4 × 4 down decoder) 19 １ ／ × 1 × 1 of the input image compression information (bit stream)
The pixel data of the interlaced scanning having a size of / 2 is first input to the scan conversion unit 20 by leaving only one of the first field and the second field and discarding the other. The compressed information (bit stream) is converted into progressive scan pixel data having a size of 1/2 × １ ／ and output. Fig. 2 shows the principle of operation.
1 is shown. In FIG. 21A, the pixel b shown in FIG. 21B is obtained by discarding the pixels in the second field a2 among the pixels a1 in the first field and the pixels a2 in the second field.

Next, 1/2 × 1 of the input image compression information (bit stream) which is the output of the scan conversion unit 20
The pixel data of the progressive scanning having the size of / 4 is input to the thinning unit 21, where it is down-sampled by a factor of に in the horizontal direction, and 1 / １ ／ of the input image compression information (bit stream). The data is converted into progressive scan pixel data having a size of 4 × １ ／. The downsampling of 1/2 times may use a simple thinning process or a low-pass filter with several taps. The operation principle is shown in FIG. In FIG. 22A, the pixel “a” is horizontally down-sampled by １ ／ in FIG.
The pixel b shown in B of FIG. 2 is obtained. The order of the process in the scan conversion unit 20 and the process in the thinning unit 21 may be reversed. The pixel data of the progressive scanning having a size of １ ／ × の of the input image compression information (bit stream) which is the output of the thinning unit 21 is an MPEG4 image information encoding unit (I / P-VOP). At 22, encoding processing is performed.

Note that the MPEG4 image information encoding unit (I / P
-VOP) 22, since the processing is performed for each block, the number of pixels of the luminance component is 16 in both the horizontal and vertical directions.
Must be a multiple of Regarding the color difference component, when the input image compression information (bit stream) is in the 420 format, it may be a multiple of 8 in both the horizontal and vertical directions. In the case of the 422 format, the horizontal direction may be a multiple of 8, but the vertical direction must be a multiple of 16. In the case of the 444 format, it must be a multiple of 16 in both the horizontal and vertical directions.

For this purpose, the number of pixels in the vertical and horizontal directions is adjusted by the scan converter 20 and the thinning unit 21, respectively. That is, for example, when the luminance component of the input image compression information (bit stream) is 720 × 480 pixels, the size of the image after extracting only the first or second field in the scan conversion unit is 360 × 120. . Since 120 is not a multiple of 16, pixel data for the lower eight lines are discarded so as to be a multiple of 16, for example, 36
It is assumed to be 0 × 112 pixels. Further, this image is converted to a thinning unit 21.
Is 180 × 112 pixels when processed using
Since 0 is not a multiple of 16, for example, the right 8 rows are discarded so as to be a multiple of 16 and are set to 176 × 112 pixels.

The MPEG2 image information decoding unit (I /
The motion vector information in the input MPEG2 image compression information (bit stream) detected by the P picture 4 × 4 down decoder 19 is input to the motion vector synthesis unit 23, where the sequentially converted image after scan conversion is input. To the motion vector value at. The motion vector detecting section 24 performs high-precision motion detection based on the motion vector values in the sequentially converted scanned image output from the motion vector synthesizing section 23.

[0102]

The MPEG2 image information decoder (I / P picture 4 × 4 down decoder) 19 in the image information converter shown in FIG.
A process of extracting a low-order fourth-order coefficient from the eighth-order discrete cosine transform coefficients and performing a fourth-order inverse discrete cosine transform on this is a process equivalent to applying a kind of low-pass filter bank. It can be said that there is. Regarding the processing for the horizontal component in the image information conversion apparatus shown in FIG.
PEG2 image information decoding device (I / P picture 4 × 4
The low-pass filter is applied in the down decoder 19, and then the low-pass filter is applied in the decimation unit 21, so that two-stage low-pass filter processing is performed, which complicates the processing. Was.

The present invention has been proposed in view of the above-described circumstances, and is intended to simplify the processing for reducing the pixel blocks constituting the encoded image of the MPEG2 image compression information (bit stream). It is an object to provide an image information conversion device and method.

[0104]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a resolution of image compression information obtained by performing discrete cosine transform on an image in units of a pixel block composed of pixels of eight components in both the horizontal and vertical directions. Of the discrete cosine transform coefficients of the eight components in both the horizontal and vertical directions of the pixel blocks constituting the input image compression information obtained by encoding the image obtained by the interlaced scanning, and The image of the interlaced scan is decoded using only the four low-frequency components in the vertical direction, and one of the first field and the second field constituting the decoded interlaced scan image is selected to generate an image of the progressive scan. Then, the generated image is encoded into output image compression information having a resolution of 1/4 in both the horizontal and vertical directions with respect to the input image compression information.

In the present invention, interlaced scanning MPEG2 image compression information (bit stream) is used as input image compression information, and progressive scanning MPEG4 image compression information (bit stream) is used as output image compression information.

MPEG2 image compression information (bit stream) and MPEG4 image compression information (bit stream)
Is composed of a group of pictures, that is, a group of pictures (GOP) and a group of VOPs (GOV). The group of images GOP and GOV includes a plurality of encoded images, that is, pictures and VOPs (videoob).
ject plane), and the encoded image is composed of a pixel block composed of a plurality of pixels, that is, a macroblock.

That is, in order to solve the above-mentioned problems, the present invention provides a picture type discriminating unit, an MPEG2 image information decoding unit (I / P picture 2 × 4 down decoder), a scan conversion unit, and an MPEG4 image Combines an information decoding unit (I / P-VOP), a motion vector synthesis unit, and a motion vector detection unit, and has a size of １ ／ × １ ／ of the input image compression information (bit stream). It is intended to provide means for outputting MPEG4 image compression information (bit stream) of progressive scanning.

In the above arrangement, the picture type discriminating section leaves only those relating to I / P pictures in the MPEG2 image compression information (bit stream) to be input.
Discard the pictures. The MPEG2 image information decoding unit (I / P picture 2 × 4 down decoder)
Information about the I / P picture, which is output from the picture type discriminating unit, is obtained by using only low-frequency secondary information among the 8th-order discrete cosine transform coefficients in the horizontal direction, and the 8th-order discrete cosine transform coefficient in the vertical direction. , Partial decoding is performed using only the low-frequency fourth-order information. Scan conversion unit is MPEG
Of the pixel values output from the two-image information decoding unit (I / P picture 2 × 4 down decoder), only the data of the first field or the second field is left and the rest is discarded, so that 1/1 of the input image is discarded. The image is converted into a progressively scanned image having a size of 4 × １ ／. MPEG4 image information encoding unit (I /
P-VOP) encodes progressively scanned image data, which is output from the thinning unit, by MPEG4 encoding and outputs it as image compression information (bit stream). The motion vector synthesis unit calculates M
Based on the motion vector value in the input image compression information (bit stream) detected by the PEG2 image information decoding unit (I / P picture 4 × 4 down decoder), the motion vector for the image data after scan conversion Map to values. The motion vector detection unit performs highly accurate motion vector detection based on the motion vector value output from the motion vector synthesis unit.

[0109]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an image information conversion apparatus to which the present invention is applied.
This will be described with reference to FIG.

This image information conversion apparatus includes a picture type discrimination unit 25, an MPEG2 image information decoding unit (I / P picture 2 × 4 down decoder) 26, and a scan conversion unit 2
7, MPEG4 image information decoding unit (I / P-VOP)
28, a motion vector synthesis unit 29, and a motion vector detection unit 30.

The MPEG2 image compression information (bit stream) of the interlaced scanning is input to the picture type determination unit 25. This MPEG2 image compression information (bit stream) is composed of an intra-coded image (I picture) coded in a frame and a forward prediction code predicted and coded by referring to another image in the forward direction between frames. Image (P
Picture) and a bidirectionally predicted coded image (B picture) that has been predictively coded with reference to other images in the forward and backward directions between frames.

[0113] The picture type discriminating section 25 determines whether or not the MPEG2 image compression information (bit stream) to be input is
The B picture is discarded while leaving only the picture and the P picture.

The MPEG2 image information decoding unit 26 outputs
Discrete cosine transform (di) of eight components (hereinafter, referred to as 8 × 8) in both the horizontal and vertical directions of macroblocks constituting an image of EG2 image compression information (bit stream).
screte cosine transformation (DCT) coefficient,
Partial decoding of a macroblock is performed using only two low-frequency components in the horizontal direction and four low-frequency components in the vertical direction (hereinafter, referred to as 2 × 4; the same applies to other components).

That is, the MPEG2 image information decoding section (I / P picture 2 × 4 down decoder) 26 is composed of an I picture or a P picture (hereinafter referred to as an I / P picture) from the picture type determination section 25. M
PEG2 image compression information (bit stream) is input, and an interlaced image is decoded from an I / P picture.

The scan conversion unit 27 includes an MPEG2 image information decoding unit (I / P picture 2 × 4 down decoder) 26
Of the interlaced image output as above, one of the first field and the second field is discarded while the other is left. The scan conversion unit 27 generates a sequentially-scanned image from the remaining fields, and outputs 1/4 × of the interlaced input image constituting the MPEG2 input image compression information (bit stream).
The image is converted into a quarter-scan progressively scanned image.

The MPEG4 image information encoding unit (I / P-V
OP) 28 outputs the image output from the scan conversion unit 27 and having a size of 1/4 × １ ／ of the input image according to MPEG4.
It is encoded and output as MPEG4 image compression information (bit stream).

The MPEG4 image compression information (bit stream) is a video object (video object; V).
O). Video object plane (VOP), which is the screen that constitutes the VO
Is composed of an I-VOP which is an intra-frame coded VOP, a P-VOP which is a forward prediction coded VOP, a bidirectional prediction coded VOP, and a sprite coded VOP.

The MPEG4 image information encoding unit (I / P-V
OP) 28, the image output from the scan conversion unit 27 is
MP to VOP and / or P-VOP (I / P-VOP)
EG4 encoding and output as MPEG4 image compression information (bit stream).

The motion vector synthesizing unit 29 is based on the motion vector value in the MPEG2 image compression information (bit stream) detected by the MPEG2 image information decoding unit (I / P picture 2 × 4 down decoder) 25. The image after the scan conversion is subjected to mapping using the motion vector value for the data.

The motion vector detecting section 30 performs highly accurate motion vector detection based on the motion vector value output from the motion vector synthesizing section 29.

Next, the MPEG2 image information decoding section (I / P picture 2 × 4 down decoder) 26 of the image information conversion apparatus will be described with reference to FIG.

This MPEG2 image information decoding unit (I / P
The picture 2 × 4 down decoder) 26 includes a code buffer 31, a compression information analyzer 32, and a variable length decoder 33.
, An inverse quantization unit 34, and a reduced inverse discrete cosine transform unit (2
× 4) 35, a reduced inverse discrete cosine transform unit (field separation) 36, an adder 37, a motion compensation unit (field prediction) 38, a motion compensation unit (frame prediction) 39, and a video memory 40. Have been.

In the MPEG2 image information decoding section (I / P picture 2 × 4 down decoder) 26, the code buffer 31 temporarily stores the input image compression information.
The compression information analysis unit 32 analyzes the input image compression information, the variable length decoding unit 33 performs variable length decoding on the input image compression information, and the dequantization unit 34 dequantizes the output of the variable length decoding unit 33.

The MPEG2 image information decoding unit (I /
In the P picture 2 × 4 down decoder) 26, the reduced inverse discrete cosine transform unit (2 × 4) 35 includes the inverse quantization unit 3
The inverse discrete cosine transform unit (field separation) 36 performs an inverse discrete cosine transform only on the low-frequency 2 × 4 component of the 8 × 8 components output from the first and second fields. Separate the second field.

Further, the MPEG2 image information decoding unit (I
/ P picture 2 × 4 down decoder) 26
The motion compensator (field prediction) 38 is a video memory 40
The motion compensation unit (frame prediction) 39 performs motion compensation by performing motion prediction on an image given from
Performs motion compensation by predicting the motion of the image supplied from the video memory 40 on a frame basis, and the adder 37 outputs these outputs to the reduced inverse discrete cosine transform unit (4 × 4) 35
And reduced inverse discrete cosine transform unit (field separation) 36
, And the video memory 40 stores and outputs the output from the adder 37.

Next, the MPEG2 image information decoding unit (I /
The principle of operation in the horizontal direction of the reduced inverse discrete cosine transform device (2 × 4) 35 and the reduced inverse discrete cosine transform device (field separation) 36 of the P picture 2 × 4 down decoder 26 will be described with reference to FIG. .

The discrete cosine transform device (2 × 4) 35 and the reduced inverse discrete cosine transform device (field separation) 36
Extracts only the low-frequency second-order coefficient a in the horizontal direction from the eighth-order discrete cosine transform coefficients in the input MPEG2 image compression information (bit stream), and performs a second-order inverse discrete cosine transform. This process is shown in FIG.
Thus, the capacity of the video memory may be 1/4 in the horizontal direction and 1/2 in the vertical direction with respect to the image frame of the input MPEG2 image compression information (bit stream).

Next, the MPEG2 image information decoding unit (I /
The principle of operation of the motion compensator (field prediction) 38 and the motion compensator (frame prediction) 39 of the P picture 2 × 4 down decoder 26 in the horizontal direction will be described with reference to FIG.

In the motion compensation device (field prediction) 38 and the motion compensation device (frame prediction) 39, first,
As shown in FIG. 4A, the pixel value a is extracted from the video memory 40 based on the motion vector information for each macroblock in the input MPEG2 image compression information (bit stream). Next, as shown in FIG. 4B, based on the pixel value a extracted from the video memory 40, a pixel value b with 1/4 pixel accuracy is generated using a quadruple interpolation filter. If a pixel value required for filtering does not exist at an address in the video memory, a virtual pixel value is generated by mirror processing or hold processing. Alternatively, the processing may be performed assuming that a pixel having a fixed pixel value (for example, 128) virtually exists outside the image frame.
Further, as shown in FIG.
Generate a pixel value c with pixel accuracy.

As actual processing, coefficients equivalent to a series of processing are prepared in advance, and the motion vector information of the horizontal component and the vertical component for each macroblock in the input MPEG2 image compression information (bit stream) is prepared. By directly generating a pixel value having a phase corresponding to the above, high-speed execution is possible.

Next, the MPEG2 image information decoding unit (I /
The processing in the variable-length decoding unit 33 of the P picture (2 × 4 down decoder) 26 will be described with reference to FIG. The variable-length decoding conversion unit 33 combines only the necessary coefficients in the subsequent reduced discrete cosine conversion unit (2 × 4) 35 and reduced discrete cosine conversion unit (field separation) 36, and thereafter processes until the EOB is detected. Can be avoided.

In the case of the field discrete cosine transform mode, the coefficient to be decoded is 2 ×
4 is the discrete cosine transform coefficient. FIG. 5A shows a zigzag scan, and FIG. 5B shows an alternate scan.
The numbers in the figure indicate the order in which the discrete cosine transform coefficients are scanned. Thereby, the variable length decoding unit 3
4, the amount of processing can be reduced.

Similarly, in the frame discrete cosine transform mode, the coefficients to be decoded are 2 × 4 discrete cosine transform coefficients surrounded by a broken line in FIG. A in FIG. 6 is a zigzag scan, and B in FIG. 6 is an alternate scan. The numbers in the figure have the same meanings as in FIG.

Further, as shown in FIG. 7, by replacing a part of the 2 × 8 discrete cosine transform coefficients with 0, the reduced inverse discrete cosine transform unit can be performed while minimizing image quality deterioration. The processing in (field separation) 36 can be reduced.

In accordance with the operation principle described above, the output of the MPEG2 image information decoding unit (I / P picture 2 × 4 down decoder) 26 is used as the input of the interlaced scanning MP.
For EG2 image compression information (bit stream), 1 /
Interlaced image information having a 4 × 1/2 picture frame can be obtained. By using the scan converter 27 to extract information of only the first field or the second field of the interlaced image information and discarding the rest, the interlaced MPEG2 image compression information (bit stream) to be input is input. , A progressively scanned image information having an image frame of ４ × １ ／ is output. This eliminates the need for a thinning unit for thinning image information.

As described above, the MPEG2 image compression information (bit stream) has been targeted for input, and the MPEG4 image compression information (bit stream) has been targeted for output. However, input and output are not limited to this. For example, MPEG-1 or H.264.
H.263 or other image compression information (bit stream).

[0138]

As described above, the present invention provides MPEG2 image compression information (bit stream) for interlaced scanning.
, And a progressively scanned MPEG4 image compression information (bit) having a resolution of １ ／ × １ ／ of the input image compression information (bit stream) by a circuit configuration using a smaller amount of arithmetic processing and video memory capacity. (Stream).

[0139]

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an image information device according to an embodiment.

FIG. 2 is a block diagram illustrating a configuration of an MPEG2 image information decoding unit (I / P picture 2 × 4 down decoder).

FIG. 3 is a diagram illustrating horizontal processing in a discrete cosine transform unit (2 × 4) and a reduced inverse discrete cosine transform unit (field separation).

FIG. 4 is a diagram illustrating horizontal processing in a motion compensation unit (field prediction) and a motion compensation unit (frame prediction).

FIG. 5 is a diagram illustrating an operation principle of a variable length decoding unit when the input MPEG2 image compression information (bit stream) is a zigzag scan.

FIG. 6 is a diagram illustrating an operation principle of a variable length decoding unit when the input MPEG2 image compression information (bit stream) is an alternate scan.

FIG. 7 is input image compression information (bit stream).
FIG. 5 is a diagram showing an example of a technique for realizing a reduction in the processing amount when the macroblock is in the frame discrete cosine transform mode.

FIG. 8 shows that the image information decoding apparatus (4 × 4 down decoder) according to the present embodiment uses only the fourth-order low-frequency information among the eight-order discrete cosine transform coefficients in both the horizontal and vertical directions. It is the block diagram which showed the apparatus structure which performs a decoding process.

FIG. 9 is a diagram illustrating an operation principle of the variable length decoding unit when the input MPEG2 image compression information (bit stream) is a zigzag scan.

FIG. 10 is a diagram illustrating the operation principle of the variable length decoding unit when the input MPEG2 image compression information (bit stream) is an alternate scan.

FIG. 11 is a diagram showing a phase of a pixel in a video memory.

FIG. 12 is a diagram illustrating an operation principle in a reduced inverse discrete cosine transform unit (field separation).

FIG. 13 is a diagram illustrating a technique for realizing the operation in the reduced inverse discrete cosine transform unit (4 × 4) using a high-speed algorithm.

FIG. 14 is a diagram illustrating a method of realizing the processing in the reduced inverse discrete cosine transform unit (field separation) using a high-speed algorithm.

FIG. 15 is a diagram illustrating an operation principle in a motion compensation unit (field prediction).

FIG. 16 is a diagram illustrating an operation principle in a motion compensation unit (frame prediction).

FIG. 17 is a diagram showing a technique of a hold process / mirror process in a motion compensation unit (field prediction) and a motion compensation unit (frame prediction).

FIG. 18 is an image information conversion unit (transcoder) that receives MPEG2 image compression information (bit stream) and outputs MPEG4 image compression information (bit stream).
1 is a diagram showing the configuration of the related art.

FIG. 19 is a block diagram showing a configuration of an image information conversion device proposed by the present applicant.

FIG. 20 is a diagram illustrating an example of a technique for reducing the processing amount when the macroblock of the input image compression information (bit stream) is in the frame discrete cosine transform mode.

FIG. 21 is a diagram illustrating the operation principle of the scan conversion unit.

FIG. 22 is a diagram illustrating the operation principle of the thinning unit.

[Explanation of symbols]

25 picture type discriminator, 26 MPEG2 image information decoder (I / P picture 2 × 4 down decoder), 27 scan converter, 28 MPEG4 image information encoder (I / P-VOP), 29 motion vector synthesizer , 30 motion vector detection unit

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Teruhiko Suzuki 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Inside Sony Corporation (72) Inventor Yoichi Yagasaki 6-35, Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation F-term (reference) UA02 UA05 5J064 AA02 BA09 BB03 BC01 BC08 BC16 BD03

Claims (27)

[Claims] An image information conversion apparatus for converting the resolution of image compression information obtained by performing discrete cosine transform on a pixel block composed of pixels of eight components in both the horizontal and vertical directions, wherein the image obtained by the interlaced scanning is encoded. 8 in both the horizontal and vertical directions of the pixel blocks constituting the input image compression information
Decoding means for decoding an image of interlaced scanning using only two low-frequency components in the horizontal direction and four low-frequency components in the vertical direction, among the discrete cosine transform coefficients of the components, and interlaced scanning decoded by the decoding means. Scan conversion means for selecting one of the first field and the second field constituting the image of the above and generating a progressively scanned image; and converting the image converted by the scan conversion means with respect to the input image compression information. Encoding means for encoding output image compression information having a resolution of 1/4 in both the horizontal and vertical directions. 2. The compressed image information according to the MPEG2 standard, and the compressed image information according to the MPEG4 standard.
2. The image information conversion device according to claim 1, wherein the image information conversion device conforms to a standard. 3. The input image compression information includes an intra-coded image coded in a frame, a forward prediction coded image predicted and coded with reference to another image in a forward direction between frames. And a bidirectional predictive coded image that is predictively coded with reference to another image in the forward and backward directions between frames, and determines the type of image that constitutes the input image compression information. And a discriminating means for passing the coded image and the forward predictive coded image but discarding the bidirectional predictive coded image, wherein the decoding means receives image compression information through the discriminating means. Claim 1
The image information conversion device described in the above. 4. The image information conversion apparatus according to claim 3, wherein said decoding means decodes only the intra-coded image and the forward prediction coded image. 5. The input image compression information has been subjected to variable-length encoding. The decoding means includes a variable-length decoding means for performing variable-length decoding on the image compression information, and a variable-length decoding means. An inverse discrete cosine transform unit for performing an inverse discrete cosine transform on the variable-length-decoded image compression information, wherein the variable-length decoding unit determines whether the pixel blocks constituting the input image compression information are in a field mode or a frame mode. 2. The image information conversion apparatus according to claim 1, wherein only the discrete cosine transform coefficients necessary for the inverse discrete cosine transform in said inverse discrete cosine transform means are variable-length decoded according to the following equation. 6. The inverse discrete cosine transform means corresponds to a field mode, and includes two low-frequency components and a vertical component in a horizontal direction among discrete cosine transform coefficients having eight components in both horizontal and vertical directions constituting the pixel block. 6. The image information conversion apparatus according to claim 5, wherein an inverse discrete cosine transform is performed on the discrete cosine transform coefficients of four low-frequency components in the direction. 7. The image information conversion apparatus according to claim 5, wherein the inverse discrete cosine transform performs an operation using a predetermined high-speed algorithm. 8. The inverse discrete cosine transform means corresponds to a frame mode, and includes two discrete low-frequency cosine transform coefficients in the horizontal and vertical directions constituting the pixel block in both the horizontal and vertical directions. 6. The image information conversion apparatus according to claim 5, wherein an inverse discrete cosine transform is applied to the cosine transform coefficient, and a field separation type inverse discrete cosine transform is applied in a vertical direction. 9. The image information conversion apparatus according to claim 8, wherein said inverse discrete cosine transform means executes an operation using a predetermined high-speed algorithm. 10. The inverse discrete cosine transform means includes two low-frequency components in the horizontal direction and four low-frequency components in the vertical direction, among the discrete cosine transform coefficients of two low-frequency components in the horizontal direction and eight components in the vertical direction. 9. The image according to claim 8, wherein only the discrete cosine transform coefficients of two low-frequency components in both the horizontal and vertical directions are used in addition to the discrete cosine transform coefficients of the above, and the remaining components are set to 0 to perform inverse discrete cosine transform. Information conversion device. 11. The input image compression information has been motion-compensated using motion vector information, and the decoding means has motion compensation means for motion-compensating an image using motion vector information. The motion compensator is configured to calculate 1/1 in the horizontal direction based on the motion vector information of the input image compression information.
2. The image information conversion apparatus according to claim 1, wherein interpolation processing is performed with a precision of 1/4 pixel in the vertical direction. 12. The motion compensation means according to claim 1, wherein the interpolation processing in the horizontal direction is performed by using a 2 × interpolation digital filter.
12. The image information conversion apparatus according to claim 11, wherein interpolation is performed at a pixel precision, and interpolation is performed at a 1/8 pixel precision by linear interpolation. 13. The motion compensating means performs a horizontal interpolation process on the pixel block in the field mode with a half-pixel accuracy using a double interpolation digital filter. 12. The image information conversion apparatus according to claim 11, wherein interpolation of 1/4 pixel precision is performed in the field by interpolation. 14. The motion compensating means performs a vertical interpolation process on the pixel block in a frame mode.
12. A method according to claim 11, wherein a half-pixel precision interpolation is performed by using a two-fold interpolation digital filter, and a quarter-pixel precision interpolation is performed between fields by linear interpolation.
The image information conversion device described in the above. 15. The image information conversion device according to claim 11, wherein said digital filter is a half-band filter. 16. The digital filter previously calculates a coefficient equivalent to a series of interpolation processing, and directly applies the coefficient to a pixel value according to a value of motion vector information of a pixel block constituting the input image compression information. The image information conversion device according to claim 15, wherein: 17. The image processing apparatus according to claim 1, wherein the motion compensating unit is configured to perform a double-interpolation filter process on pixels existing outside an image frame of the image constituting the input image compression information. 12. The image information conversion apparatus according to claim 11, wherein the filter processing is performed by virtually creating a necessary pixel outside. 18. The motion compensating means wraps a required pixel out of the image frame by folding back at a predetermined position of an existing pixel array and extending the existing pixel array or using a predetermined value. 19. The image information conversion device according to claim 18, wherein the image information conversion device creates the image information. 19. The scanning conversion means selects one of a first field and a second field of an interlaced scanning image decoded by the decoding means, thereby converting the input image compression information. It is characterized in that an interlaced image having a resolution of １ ／ in the horizontal direction and 垂直 in both the vertical direction is converted into a progressively scanned image having a resolution of 共 に in both the horizontal direction and the input image compression information. The image information conversion device according to claim 1, wherein 20. The image information conversion apparatus according to claim 19, wherein said scan conversion means adjusts the number of pixels in the vertical direction so as to correspond to processing corresponding to a pixel block in said encoding means. 21. The output image compression information includes an intra-coded image coded in a frame, a forward prediction coded image predicted and coded by referring to another image in a forward direction between frames, and A bidirectional predictive coded image predictively coded with reference to another image in the forward and backward directions between frames, and a sprite coded image, wherein the coding means includes the intra coded image 2. The image information conversion device according to claim 1, wherein the image is encoded using the forward prediction encoded image. 22. The image compression information, which has been motion-compensated by motion vector information, has a motion vector synthesizing means for synthesizing the motion compensation vector information, and is based on the motion vector information of the input image compression information. 2. The image information conversion apparatus according to claim 1, wherein the motion vector information corresponding to the image output from the decimation means is combined, and the encoding means performs encoding based on the motion vector information. 23. The image information conversion apparatus according to claim 22, further comprising a motion vector detecting means for detecting motion vector information based on the motion vector information synthesized by said motion vector synthesizing means. 24. An image information conversion method for converting the resolution of image compression information obtained by performing discrete cosine conversion on a pixel block consisting of pixels of eight components in both the horizontal direction and the vertical direction, wherein an image obtained by interlaced scanning is encoded. 8 in both the horizontal and vertical directions of the pixel blocks constituting the input image compression information
Among the discrete cosine transform coefficients of the components, the interlaced scan image is decoded using only two low-frequency components in the horizontal direction and only four components in the vertical direction, and the first field and the second field constituting the decoded interlaced scan image are decoded. One of the fields is selected to generate a progressively scanned image, and the generated image is encoded into output image compression information having a resolution of 1/4 in both the horizontal and vertical directions with respect to the input image compression information. Image information converting method. 25. The input image compression information according to the MPEG2 standard, and the output image compression information
The image information conversion method according to claim 24, wherein the method is based on four standards. 26. The input image compression information includes an intra-coded image coded in a frame, and a forward prediction coded image predicted and coded by referring to another image in the forward direction between frames. And a bidirectional predictive coded image that is predictively coded with reference to another image in the forward and backward directions between frames, and determines the type of image that constitutes the input image compression information. 25. The image information conversion method according to claim 24, wherein the encoded image and the forward prediction encoded image are passed, but the bidirectional prediction encoded image is discarded. 27. The image information conversion method according to claim 26, wherein only the intra-coded image and the forward prediction coded image are decoded.