JP2002009046A - Dry etching method and capacity forming method using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a dry etching method superior in workability in the formation of high dielectric capacity, which forms a lower electrode where platinum is used in a recessed area, and to provide a capacity forming method using the dry etching method. SOLUTION: A platinum film 509 is removed by a process for depositing a first insulating film 504 constituted of SiO2 on a semiconductor substrate 501 and a second insulating film 505 constituted of SiN on the film, a process for forming the first insulating film and the second insulating film in a recessed part 506, a process for depositing platinum films 507 and 509 on the first and second insulating films including the inner part of the recessed part, a process for depositing a third insulating film 508 constituted of SiO2 on the platinum film, a process for exposing the platinum film 509 in an area except for the recessed area, and a process for dry-etching the platinum film 509 by using Ar, Cl2, O2 mixed gas where (O2/(O2+Cl2) flow rate ratio) is 40% and [(Ar flow rate)/(Ar+Cl2+O2) total gas flow rate] is 33%.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for dry-etching a platinum film and a method for forming a capacitor using the same.

[0002]

2. Description of the Related Art Conventionally, in a capacitance element portion of a DRAM (Dynamic Random Access Memory), an ONO (Oxide-Nitride) represented by a silicon oxide film / silicon nitride film / silicon oxide film as a capacitance insulating film, for example.
e-Oxide) films are used. Also, polysilicon (polycrystalline silicon) or the like has been used as an electrode. In the past, with miniaturization, the capacitance has been secured by increasing the surface area of the capacitor electrode. But ON
Since the dielectric constant ε of the O film is 7 to 8, a device that requires further miniaturization and high integration cannot obtain a sufficient capacitance. For this reason, D of 4 Gbit DRAM or later
In a capacitor element such as a RAM, the dielectric constant ε = 200 to 250
(Ba, Sr) TiO ₃ (hereinafter abbreviated as BST)
The use of such a multi-component oxide film as a capacitor insulating film has been studied. When such a BST film is used as a capacitor insulating film, high-temperature treatment in an oxidation-resistant atmosphere is required for the film formation, and therefore, polysilicon which is conventionally used as a capacitor electrode material is used. Otherwise, it will be oxidized and polysilicon cannot be used. Therefore, it has become necessary to use platinum (Pt) and iridium (Ir) having oxidation resistance as the material of the capacitor electrode. Therefore, the 0.13 μm rule (4
Gbit DRAM device)
It is necessary to perform fine processing of the above-mentioned noble metals such as Pt and Ir with high accuracy.

[0003] Initially, a stacked structure capacitor was proposed as a capacitor electrode using a platinum lower electrode. FIG. 7 shows a cross-sectional view of a conventional stack type structure capacitor. 7, reference numeral 501 denotes a semiconductor substrate; 701, a stacked lower electrode using platinum; 511, a high dielectric film; and 512, an upper electrode. At this time, in order to obtain a desired capacitance, the lower electrode 70 is required.
The height of the lower electrode 701 is 2 to increase the surface area of 1
About 50 to 400 nm is required.

[0004] Dry etching of Pt used as a lower electrode was initially performed by a gas system in which a photoresist was used as a mask and Cl ₂ gas was added to Ar gas as an etching gas. FIG. 8 shows a sectional view of a process of platinum dry etching used for a conventional stacked structure capacitor.

FIG. 8A shows a shape before etching, and FIG.
(B) schematically shows the cross-sectional structure of the shape after etching.
In FIG. 8A, 801 is a semiconductor substrate, 802 is a platinum film, and 803 is a photoresist. This is etched with a mixed gas of Ar gas and Cl ₂ gas. However, the chemical reactivity of platinum is very poor, and the dry etching mechanism in this gas system is based on ions supplied from plasma. Mainly sputter etching. Therefore, the probability of reattachment of sputtered platinum and decomposition products from the photoresist is high, and the etched shape is as shown in FIG.
As shown in FIG. 7, the side wall deposit 804 made of a decomposition product of platinum and resist adheres to the pattern side wall, and this becomes a mask, the etching shape becomes a large taper shape, and the dimension shift amount (D = ( The dimension after etching D ₁ ) − (dimension before etching D ₂ )) becomes very large, which is not suitable for microfabrication, and also makes it difficult to separate from the adjacent capacitance electrode. Therefore, there is a problem in throughput in forming the stacked lower electrode as shown in FIG.

In order to solve the above problems in dry etching of platinum, a capacitor having a cup type structure using a platinum electrode as shown in FIG. 9 has recently been proposed. FIG. 9 is a process sectional view for forming the cup-shaped structure.

In FIG. 9, reference numeral 501 denotes a semiconductor substrate;
Reference numeral 2 denotes a silicon oxide film (a silicon oxide film for preventing conduction between unnecessary portions of a transistor region or the like provided on the semiconductor substrate 501 and a platinum film 507 serving as a capacitor lower electrode), and reference numeral 503 denotes a connection. The hole, 503a is a conductive material filled in the connection hole, 504 is a first insulating film and is made of a silicon oxide film in this example, 505 is a second insulating film and is a silicon nitride film in this example, and 506 is A concave portion serving as a capacitance forming region, 507 is a platinum film, 508 is a third insulating film as a filling material in the concave portion, 509 is a platinum film other than the concave region, and 510 is a third insulating film layer remaining in the concave region. Reference numeral 511 denotes a high dielectric film, and 512 denotes an upper electrode.
First, as shown in FIG. 9A, a silicon oxide film 502 is deposited on a semiconductor substrate 501, a connection hole 503 is formed, and a conductive material 503a is filled in the connection hole 503. A first insulating film 504 and a second insulating film 505 made of a silicon nitride film are deposited.

Next, as shown in FIG. 9B, a concave region 506 is formed by using an appropriate method such as a lithography method and a dry etching method.

As shown in FIG. 9C, after depositing platinum films 507 and 509, a third insulating film 508 made of a silicon oxide film is deposited.

Next, as shown in FIG. 9D, a third insulating film 508 is formed on the third insulating film 508 by CMP (Chemical Mechanical Polishing).
g) Alternatively, the etch-back method is applied to expose the platinum film 509 other than the concave region.

As shown in FIG. 9E, dry etching is performed to remove the platinum film 509 other than the concave region. At this time, the third insulating film layer 510 remaining in the concave region serves as a mask, leaving the platinum film 507 in the concave region. Conventionally, such dry etching is usually performed using a mixed gas of Ar and Cl ₂ . When such a gas system is used, the selectivity (Pt / silicon oxide film)
Is 2 or more. The selectivity is the ratio of the etching rates. At this time, the thickness of the Pt film is about 50 to 100 nm, and the platinum etching rate reported so far is sufficient in terms of throughput. In addition, when the present cup-shaped structure is used, unlike the case where a resist is used, the side wall of the compound of the resist decomposition product and Pt does not adhere to the side wall as shown in FIG. 8B. No large dimensional shifts occur.

Finally, as shown in FIG. 9 (f), after removing the third insulating film layer 510 remaining in the recessed region, a high dielectric film 511 and an upper electrode 512 are deposited, and a capacitor electrode is formed. I do.

[0013]

However, the above-described structure has the following problems in removing the platinum film 509 other than the recessed regions shown in FIGS. 9D to 9E.

(A) The selectivity (Pt / third insulating film) at the time of etching the platinum film 509 in the region other than the concave region is equal to the selectivity (Pt).
If t / third insulating film) ≫1, the etching of the platinum film proceeds, the platinum film is dug down from the upper end of the third insulating film serving as a mask, and when a capacitor is formed, the surface area of the lower electrode is reduced. And the desired capacity cannot be obtained. FIG. 10 shows a schematic sectional view of this state.

(B) If (etching rate of second insulating film)> (etching rate of platinum film) at the time of etching the platinum film 509 other than the concave region, the second insulating film made of the silicon nitride film is shaved. As shown in FIG. 11, the upper end of the platinum film has a pointed projection shape, and the tip of the protrusion is the first insulating film 5.
04 protrudes higher than the surface. Therefore, when the third insulating film layer 510 remaining in the concave region is removed, and then a high dielectric film is provided on the platinum film to form a capacitor,
The high-dielectric film formed on the pointed protruding portion of the platinum film is thinner than the high-dielectric film formed on other portions of the platinum film. The electric field tends to concentrate on the sharp protrusions of the film, which causes an electrical leak path from the protrusions of the platinum film.
Stress is applied to the high dielectric film in the high dielectric film deposition step.

Therefore, in order to obtain good electrical characteristics in the cup-type capacitor, it is necessary that the (Pt / third insulating film) selection ratio be about 1. However, as described in (A) above, if the (Pt / third insulating film) selection ratio is too large, the platinum film will be dug down, so that the selection ratio is set to about 1. (Here, the selection ratio of about 1 is preferably about 1 or slightly larger than 1.)

Further, it is preferable that the etching rate of the platinum film is made higher than that of the second insulating film.

Therefore, the present invention has been made in view of the above problems, and
t / third insulating film) A dry etching method in which the selectivity becomes approximately 1 or, more preferably, a dry etching method in which the etching rate of the platinum film is higher than that of the second insulating film. It is another object of the present invention to provide a method for forming a capacitor that can obtain a desired lower electrode structure and is electrically excellent by applying these dry etching methods.

[0019]

In order to solve the above problems, the dry etching method of the present invention and the capacity forming method using the same are more preferably performed by using Ar gas, Cl ₂ gas and O ₂ gas. By using the flow ratio of Cl ₂ gas and O ₂ gas and the flow ratio of Ar gas within specific ranges, the selectivity of platinum and silicon oxide film, the selectivity of platinum and silicon nitride film, or the silicon oxide film The purpose is to control the selectivity between the silicon nitride film and the silicon nitride film. Specifically, the configuration is as follows.

(1) That is, the dry etching method of the present invention is characterized in that in the dry etching of a platinum film, dry etching is performed using a mixed gas of Ar gas, Cl ₂ gas and O ₂ gas.

(2) In the dry etching method described in the above (1), the flow rate ratio of O ₂ to Cl ₂ (O ₂ / (O ₂ +
Cl ₂ ) is preferably 20% or more.

(3) In the dry etching method described in (1), the flow rate ratio of O ₂ to Cl ₂ (O ₂ /
(O ₂ + Cl ₂ ) flow rate ratio is preferably 30% to 45%.

(4) In the dry etching method described in the above item (1), the flow rate ratio of O ₂ to Cl ₂ (O ₂ /
(O ₂ + Cl ₂ ) flow rate ratio is preferably 50% to 90%.

(5) In the dry etching method according to any one of the above items (1) to (4), the flow ratio of Ar gas to the total gas flow is preferably 30% or more.

(6) In the dry etching method described in the above item (4), (a) when the platinum film and the silicon oxide film are simultaneously etched using the dry etching conditions, the etching of both is performed. (B) When the platinum film, the silicon oxide film, and the silicon nitride film are simultaneously etched using the dry etching conditions, the etching speed of the silicon oxide film is Preferably, it is relatively higher than the etching rate.

(7) Next, the capacitance forming method of the present invention comprises the steps of: depositing a first insulating film on a substrate and further depositing a second insulating film thereon; Forming a recess in the insulating film; and depositing a platinum film on the first insulating film and the second insulating film including the inside of the recess,
Depositing a third insulating film on the platinum film, removing the third insulating film in a region other than the concave region, exposing the platinum film in a region other than the concave region, In the capacitance forming method including a step of removing a platinum film other than the above by dry etching, the etching rate of the platinum film is substantially equal to the etching rate of the third insulating film.

It should be noted that the condition that the etching rate of the platinum film is substantially the same as the etching rate of the third insulating film means that the etching rate of the platinum film and the etching rate of the third insulating film are the same.
This means that the etching rate of the platinum film is slightly higher than the etching rate of the third insulating film, and this range is preferable.

(8) The method of forming a capacitor according to the present invention further comprises the steps of: depositing a first insulating film on a substrate and further depositing a second insulating film thereon; Forming a concave portion in the insulating film, depositing a platinum film on the first insulating film and the second insulating film including the inside of the concave portion, and forming a third insulating film on the platinum film. Depositing and removing the third insulating film in a region other than the concave region;
Exposing the platinum film to a region other than the concave region,
In the capacitance forming method including a step of removing a platinum film other than the concave region by dry etching, an etching rate of the platinum film is substantially equal to an etching rate of the third insulating film, and an etching rate of the platinum film is reduced. The etching rate is higher than the etching rate of the second insulating film.

(9) The method of forming a capacitor according to the present invention further comprises the steps of: depositing a first insulating film on a substrate and further depositing a second insulating film on the first insulating film; Forming a concave portion in the insulating film, depositing a platinum film on the first insulating film and the second insulating film including the inside of the concave portion, and forming a third insulating film on the platinum film. Depositing and removing the third insulating film in a region other than the concave region;
Exposing the platinum film to a region other than the concave region,
In a capacitance forming method including a step of removing a platinum film other than the concave region by dry etching, the dry etching is performed using a mixed gas containing Ar gas, Cl ₂ gas and O ₂ gas.

(10) In the capacitance forming method described in the above item (9), the flow rate ratio of O ₂ and Cl ₂ (O ₂ / (O ₂ + Cl ₂ )
₂ ) The flow ratio) is preferably 20% or more.

(11) In the capacitance forming method according to the above mode (9), the flow rate ratio of O ₂ to Cl ₂ (O ₂ / (O ₂
+ Cl ₂ ) is preferably 30% to 45%.

(12) In the capacitance forming method according to the above mode (9), the flow rate ratio of O ₂ to Cl ₂ (O ₂ / (O ₂
+ Cl ₂ ) is preferably 50% to 90%.

(13) In the capacity forming method according to any one of the above items (9) to (13), the flow ratio of the Ar gas to the total gas flow is preferably 30% or more.

(14) In the capacitance forming method according to any one of the above items (9) to (13), the first insulating film is a silicon oxide film, and the second insulating film is a silicon nitride film. It is preferred that

(15) In the capacitance forming method according to any one of the above items (9) to (14), the third insulating film is preferably a silicon oxide film.

In the present invention, the platinum film is a film containing platinum as a main component, and is not limited to a film consisting of platinum alone, and may contain other components as necessary within a range not to impair its purpose. For example, the platinum film may be made of iridium (Ir), zirconium (Zr), Al (aluminum), hafnium (H
f), a platinum film containing at least one kind of rhodium (Rh) or the like at 10% by mass or less is also included. In the present invention, the flow ratio of the gas used in the dry etching is:
It is a flow ratio according to the volume of gas.

[0037]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to FIGS.

(Embodiment 1) FIG. 1 shows an IC used for dry etching of a platinum film according to a first embodiment of the present invention.
P (Inductively Coupled Pla)
FIG. 2 is a cross-sectional configuration diagram of an sma) type dry etching chamber. In FIG. 1, 1 is a chamber, 2 is a lower electrode,
Reference numeral 3 denotes an exhaust port, 4 denotes a quartz plate, 5 denotes a high-frequency power supply (0.4 to 13.76 MHz) for applying bias high-frequency power, 6 denotes an ICP coil, and 7 denotes an ICP high-frequency power supply (0.4 to 13.6 MHz).
76 MHz), 8 is a gas inlet, and 9 is a substrate. Book I
In the CP etcher, plasma is generated in the chamber 1 by applying high-frequency power from the high-frequency power source 7 to the ICP coil 6. Then, high frequency power is supplied to the lower electrode 2 from the bias high frequency power supply 5, and ions and electrons are drawn in the direction of the lower electrode 2 from the pulse plasma generated by the ICP coil on the substrate 9 provided on the lower electrode 2. At the same time, radicals are supplied isotropically from the plasma, and the etching on the substrate 9 proceeds by reactive ion etching.

As a material used for each component for forming a capacitor, which will be described later, for example, a platinum film is used as a lower electrode of the capacitor, and a second insulating film is formed on a base layer of a portion of the platinum film which is removed by dry etching. For example, since a silicon nitride film is used and a silicon oxide film or the like is preferably used as a third insulating film above the platinum film in the lower electrode portion of the capacitor, dry etching of Pt, silicon oxide film, and silicon nitride film is examined. did.

By the above-mentioned ICP dry etcher,
The dependence of the etching rate on the flow rate of O ₂ / (O ₂ + Cl ₂ ) when performing dry etching of Pt, silicon oxide film, and silicon nitride film using a mixed gas of Ar, Cl ₂ and O ₂ . 2 is shown. In FIG. 2, 11 is a platinum film, 1
2 is the data of the silicon oxide film, and 13 is the data of the silicon nitride film.

In the present dry etching, the flow rate of Ar gas is 50 ml / min (however, it is a volume flow rate per minute in a standard state, and hereinafter, this is simply referred to as a flow rate ml / min (standard state)) and Cl. the total flow rate of ₂ gas flow rate and O ₂ gas flow rate of 50ml / min (standard state), by changing the flow ratio of O ₂ gas and Cl ₂ gas, what effect it would etch rate of the film It has been examined. Other etching conditions include pressure: 1 Pa, I
CP high frequency power supply: 600 W, bias high frequency power supply: 500 W.

As can be seen from FIG. 2, under the present etching conditions, the Pt etching rate and the etching rate of the silicon oxide film monotonously decrease with an increase in the O ₂ flow rate ratio, but the etching rate of the silicon nitride film becomes O _2. It decreases sharply as the flow ratio increases. As a result, O ₂ /
In the region where the (O ₂ + Cl ₂ ) flow ratio is, for example, 25%, the etching rate of the silicon nitride film is higher than that of the Pt and silicon oxide films. However, as the O ₂ flow ratio increases, the etching rate decreases and O ₂ / (O ₂ + Cl ₂ ) flow rate ratio ≧ 50%
Then, the etching rate becomes lower than that of the Pt and silicon oxide films.

FIG. 3 shows the dependence of the (Pt / silicon oxide film) selectivity and the (Pt / silicon nitride film) selectivity on the O ₂ / (O ₂ + Cl ₂ ) flow rate ratio from the above etching rates.
It is. In FIG. 3, reference numeral 15 denotes data of the (Pt / silicon oxide film) selectivity, and reference numeral 16 denotes data of the (Pt / silicon nitride film) selectivity.

The flow rate ratio of O ₂ / (O ₂ + Cl ₂ ) is 20% or more, preferably 20-90%, more preferably 25-8.
It can be seen that the selectivity ratio (Pt / silicon oxide film) is almost constant between 0% and almost 1 or slightly larger (about 1.2 on average). Therefore, O ₂ / (O ₂
+ Cl ₂ ) flow rate ratio is 20% or more, preferably 20 to 90%
%, More preferably 25 to 80%, the etching rate of the platinum film is slightly higher than or substantially equal to the etching rate of the silicon oxide film used as the third insulating film used in forming a capacitor described later. You can control.

The flow rate ratio of O ₂ / (O ₂ + Cl ₂ ) is 30 to
In the range of 45%, the (Pt / silicon nitride film) selectivity can be kept substantially at about 1. Therefore, in this flow ratio range, the etching rates of the platinum film, the silicon oxide film, and the silicon nitride film are almost the same. You can control. Therefore, when etching is performed while maintaining the three etching rates at substantially the same level, O ₂ / (O ₂ + Cl
₂ ) The flow rate ratio is preferably in the range of 30 to 45%.

On the other hand, the (Pt / silicon nitride film) selectivity increases with an increase in the flow ratio of O ₂ / (O ₂ + Cl ₂ ), and becomes 2.5 at 50%.

That is, the flow rate ratio of O ₂ / (O ₂ + Cl ₂ ) ≧
At 50%, (Pt / silicon oxide film)
It can be seen that the (/ silicon nitride film) selectivity is relatively large. Therefore, (etching rate of silicon oxide film)>
(Etching rate of the silicon nitride film).

As can be seen from the extrapolation from FIG.
The relationship between (etching rate of silicon oxide film) and (etching rate of silicon nitride film) is O ₂ / (O ₂ + Cl ₂ ).
In the region where the flow rate ratio is> 90%, (etching rate of silicon oxide film) ≦ (etching rate of silicon nitride film).

Therefore, in the plasma in which O ₂ gas and Cl ₂ gas are added to Ar, the flow ratio of O ₂ / (O ₂ + Cl ₂ ) is 5
By making it 0% or more and 90% or less,

[0050]

The following relationship is obtained: (etching rate of silicon oxide film) ≧ (etching rate of silicon nitride film), and

[0051]

It can be seen that the (Pt / silicon nitride film) selectivity ≧ 2 (Pt / silicon oxide film) selectivity ≒ 1 or slightly larger than 1.

Therefore, when the etching rate of Pt and the silicon oxide film is made substantially the same and the etching rate of the silicon nitride film is kept relatively lower than the former two etching rates, (O ₂ / (O ₂ + Cl ₂ )
Preferably, the flow ratio is in the range of 50% to 90%.

FIG. 4 shows the Pt etching rate and the (Pt / silicon oxide film) selectivity of Ar / (Ar + Cl).
₂ + O ₂ ) Indicates flow rate ratio dependency. In FIG. 4, 18 is P
Data of t etching rate, and 19 is data of (Pt / silicon oxide film) selectivity.

In this experiment, Ar gas was added to a mixed gas of Cl ₂ gas and O ₂ gas (volume ratio: Cl ₂ : O ₂ = 1: 1), and how the etching rate and the selectivity of Pt were changed. I checked if it changed. Cl ₂ gas flow rate 25 ml / min (standard state), O ₂ gas flow rate 25 ml / min (standard state), Ar gas flow rate 0-50 ml / min (standard state), other etching conditions include pressure: 1 Pa, ICP High frequency power supply: 600 W, bias high frequency power: 500 W.

As can be seen from FIG. 4, the Pt etching rate is increased by adding Ar, and becomes almost constant when the Ar flow rate ratio becomes 30% or more. Also, Ar
The selectivity is improved by the addition, but when the Ar flow rate ratio becomes 30% or more, it becomes substantially 1 and becomes constant. Therefore, in the region where the ratio of the Ar gas flow rate to the previous gas flow rate is 30% or more, the selectivity with the silicon oxide film can be controlled to almost 1. The upper limit of the Ar gas flow rate, but not be particularly critical sense, the Ar gas flow rate ratio is too large, the proportion of mixed gas of Cl ₂ gas and O ₂ gas is reduced, and Cl ₂ gas Since the effect of the addition of the O ₂ gas is reduced, the flow rate ratio of the Ar gas is generally desirably about 80% or less. (Embodiment 2) Next, a second embodiment of the present invention will be described with reference to the drawings.

FIG. 5 is a process sectional view of a capacitance forming method according to a second embodiment of the present invention. In FIG. 5, reference numeral 501 denotes a semiconductor substrate; and 502, a silicon oxide film for preventing conduction between unnecessary areas such as a transistor region provided on the semiconductor substrate 501 and a platinum film 507 serving as a capacitor lower electrode. , 503 are connection holes, 503a are connection holes 5
03, a conductive material filled in, 504 is a first insulating film, here made of a silicon oxide film, 505 is a second insulating film, here made of a silicon nitride film,
Reference numeral 506 denotes a concave portion serving as a capacitance forming region, 507 denotes a platinum film,
Reference numeral 08 denotes a third insulating film as a filling material in the concave portion, which is a silicon oxide film here, 509 is a platinum film other than the concave region, and 510 is CMP (Chemical Mechanical).
al Polishing) or a third insulating film remaining in the recessed region as a result of the etch back. Here, a silicon oxide film 511 is a high dielectric film, and 512 is an upper electrode. Although not particularly limited, in this embodiment, the above-described BST is used as the high dielectric film 511,
Further, a platinum film was used as the upper electrode 512.

First, as shown in FIG. 5A, a silicon oxide film 502 is deposited on a semiconductor substrate 501, and a connection hole 5 is formed.
After forming a conductive material 503a made of, for example, polycrystalline silicon in the connection holes 503, a first insulating film 504 made of a silicon oxide film and a second insulating film 505 made of a silicon nitride film are deposited. I do.

Next, as shown in FIG. 5B, a concave region 506 is formed by using a lithography method and a dry etching method.

Next, as shown in FIG.
After depositing the layers 07 and 509, a third insulating film 508 made of a silicon oxide film is deposited.

Although not particularly limited, an appropriate method such as a CVD method or a coating method can be employed for depositing each of the insulating films described above. Also, an appropriate method such as a CVD method or a sputtering method can be adopted for depositing a platinum film.

Next, as shown in FIG. 5D, a CMP method or an etch-back method is applied to the third insulating film 508 to expose the platinum film 509 other than the concave region. At this time, the height of the uppermost part of the platinum film and the uppermost part of the third insulating film layer 510 remaining in the concave region made of the silicon oxide film are almost equal.

Subsequently, as shown in FIG. 5E, dry etching is performed to remove the platinum film 509 other than the concave region. At this time, the dry etching of platinum is performed as shown in FIG.
This is performed using the ICP etcher shown in (1). The etching conditions are as follows.

[0063]

Table 1 Ar flow rate 25 ml / min (standard state) Cl ₂ flow rate 30 ml / min (standard state) O ₂ flow rate 20 ml / min (standard state) Pressure 1 Pa ICP high frequency power supply power 600 W Bias power 1.6 W / cm ² etching Then, the flow rate ratio of O ₂ and Cl ₂ (O ₂ / (O ₂ +
Cl ₂ ) flow rate ratio is 40%, and the Ar flow ratio [(Ar flow rate) / (Ar + Cl ₂ + O ₂ ) total gas flow rate] is 33%.

Under the present etching conditions, the etching rates of the platinum film and the silicon oxide film, which is the third insulating film layer remaining in the recessed region, are substantially equal (Pt / silicon oxide film), resulting in a selectivity of ≒ 1. In the initial state of the dry etching, the height of the top of the platinum film and the height of the top of the silicon oxide film as the third insulating film layer 510 remaining in the recessed region are almost equal. , Pt and the silicon oxide film of the third insulating film layer 510 are substantially equal in etching rate, after etching, the Pt end portion in the recessed region and the silicon oxide film of the third insulating film layer 510 in the recessed region are etched. Are approximately equal in height. Also, (Pt /
The silicon nitride film has a selectivity of about 1.5. Therefore, the present embodiment is an example in which the etching rates of the platinum film, the silicon oxide film, and the silicon nitride film are controlled to be substantially equal. It is possible to obtain a lower electrode structure in which the bottom of the platinum film does not have a protruding shape as shown in FIG. In addition, since the etching rates of the platinum film, the silicon oxide film, and the silicon nitride film can be controlled to approximately the same level, the surface of the second insulating film 505 and the upper end of the platinum film 507 as shown in FIG. Can be kept almost flat at the same position.

In this case, the third insulating film layer 510 remaining in the recessed region serves as a mask, and the platinum film 507 in the recessed portion is not etched, and a cup-shaped electrode is formed.

In this etching, the condition that the Ar flow rate ratio ((Ar flow rate) / (Ar + Cl ₂ + O ₂ ) total gas flow rate) was 33% was used. As can be seen from FIG. 4, the Ar flow rate ratio was 30% or more. And (Pt / silicon oxide film) selectivity ≒ 1
Therefore, the same effect can be obtained.

Finally, as shown in FIG. 5F, after removing the third insulating film layer 510 remaining in the concave region, the high dielectric film 511 such as BTS, Pt, or the like is removed. The upper electrode 512 is deposited to form a capacitor electrode. At this time, the position of the surface of the second insulating film layer 505 and the platinum film 507
Can be kept almost flat at the same position with the surface of the upper end portion of the high dielectric film 511 because there is no large step.
, The stress of the high dielectric film 511 during the deposition can be reduced.

When removing the third insulating film layer 510 remaining in the above-mentioned concave region, the third insulating film layer 510 is made of a silicon oxide film, and the second insulating layer 505 is made of silicon nitride. Since it is made of a film, the conditions under which only the silicon oxide film is etched without etching the silicon nitride film by appropriate dry etching or wet etching can be easily selected, and a mask is formed on the silicon nitride film. The third insulating film layer 510 can be removed without performing. In this sense, the second insulating layer 505
Is preferably composed of a silicon nitride film and the third insulating film layer 510 is composed of a silicon oxide film. In addition, it is preferable that the first insulating film layer 504 be made of a silicon oxide film because the silicon oxide film has better insulation properties than the silicon nitride film. Therefore, a combination in which the second insulating layer 505 made of a silicon nitride film is provided on the first insulating layer 504 made of a silicon oxide film is also preferable in this sense.

In the present invention, FIGS. 5 (c), (d),
Although a silicon oxide film was used as the filling material in the concave portion shown in FIG.
Similar effects can be obtained by using an inorganic insulating film such as G (Spin on glass).

FIGS. 5C, 5D, and 5E show examples.
Can be embedded by coating as a filling material in the recess
The same effect can be obtained by using a suitable organic insulating film. Honari
Machine insulating film is made of Ar / O used for platinum etching._Two/
Cl_TwoSilicon oxide film or inorganic system for plasma
It has almost the same dry etching resistance as an insulating film.
_TwoPlasma is easily removed. Below,
Advantages of using a mechanical insulating film will be described with reference to FIG.
I do.

[0071] i) FIG. 5 (c), the etched back or CMP method 508 (d), the although to expose the platinum film 509 other than the recessed region, at this time, at the time of etch back, including O ₂ 508 can be easily etched by using plasma.

Ii) In FIGS. 5D and 5E, Ar
Although the etching of platinum 509 is performed using / O ₂ / Cl ₂ plasma, the plasma has almost the same dry etching resistance even in an organic insulating film.

Iii) After the etching of platinum, when removing the organic insulating film embedded in the concave region,
By using plasma mainly composed of O ₂ , it can be easily removed.

Iv) When an organic insulating film is used as a filling material, plasma containing O ₂ gas is commonly used at the time of etch back, at the time of Pt etching, and at the time of removing the organic insulating film as described above. In addition, continuous processing can be performed in the same chamber, which has a great effect on productivity. (Embodiment 3) Next, a third embodiment of the present invention will be described with reference to the drawings.

FIG. 6 is a process sectional view of the capacitance forming method according to the third embodiment of the present invention. (FIGS. 6A to 6D are the same as FIGS. 5A to 5D and are not shown.
Therefore, FIGS. 5A to 5D are referred to as FIGS. 6A to 6D. ).

In FIG. 6, reference numeral 501 denotes a semiconductor substrate;
Reference numeral 2 denotes a silicon oxide film for preventing conduction at an unnecessary portion between a transistor region provided on the semiconductor substrate 501 and the platinum film 507 serving as a capacitor lower electrode,
503, a connection hole; 503a, a conductive material filled in the connection hole 503; 504, a first insulating film, here made of a silicon oxide film; 505, a second insulating film; 506 is a concave portion serving as a capacitance forming region, 507 is a platinum film, 508 is a third insulating film as a filling material in the concave portion, here is a silicon oxide film, and 509 is a portion other than the concave portion region. Platinum film, 510 is CMP (Chemical Mechanical Polishin)
g) Or a third insulating film remaining in the recessed region as a result of the etch back, here a silicon oxide film 511 is a high dielectric film, and 512 is an upper electrode. Although not particularly limited, in this embodiment, the above-described BST is used as the high dielectric film 511, and a platinum film is used as the upper electrode 512.

First, a silicon oxide film 502 is deposited on a semiconductor substrate 501 to form a connection hole 503, and a conductive material 503 a made of, for example, polycrystalline silicon is placed in the connection hole 5.
03, a first insulating film 504 made of a silicon oxide film and a second insulating film 505 made of a silicon nitride film
Is deposited. (Not shown, see FIG. 5A).

Next, a concave region 506 is formed by using a lithography method, a dry etching method or the like.
(Not shown, see FIG. 5B).

Next, after depositing the platinum films 507 and 509, a third insulating film 508 made of a silicon oxide film is deposited. (Not shown, see FIG. 5 (c)).

Although not particularly limited, an appropriate method such as a CVD method or a coating method can be adopted for the deposition of each insulating film described above. Also, an appropriate method such as a CVD method or a sputtering method can be adopted for depositing a platinum film.

Next, a CMP method or an etch-back method is applied to the third insulating film 508 to expose the platinum film 509 other than the concave region. At this time, the height of the uppermost part of the platinum film and the uppermost part of the third insulating film layer 510 remaining in the concave region made of the silicon oxide film are almost equal. (Not shown, see FIG. 5D).

Subsequently, as shown in FIG. 6E, dry etching is performed to remove the platinum film 509 other than the concave region. At this time, the dry etching of platinum is performed as shown in FIG.
This is performed using the ICP etcher shown in (1). The etching conditions are as follows.

[0083]

Table 2 Ar flow rate 50 ml / min (standard state) Cl ₂ flow rate 10 ml / min (standard state) O ₂ flow rate 40 ml / min (standard state) Pressure 1 Pa ICP high frequency power supply 600 W Bias power 1.6 W / cm ² , O ₂ and Cl ₂ flow rate ratio (O ₂ / (O ₂ +
Cl ₂ ) flow rate) is 80%, and the Ar flow rate ratio ((Ar flow rate) / (Ar + Cl ₂ + O ₂ ) total gas flow rate) is 50%.

Under the present etching conditions, the etching rates of the platinum film and the silicon oxide film, which is the third insulating film layer remaining in the recessed region, are almost equal (Pt / silicon oxide film) and the selectivity is ≒ 1.2. Become. Further, the (Pt / silicon nitride film) selectivity becomes ≒ 2.5 (see FIGS. 2 and 3). That is, in the present embodiment, the etching rates of the platinum film and the silicon oxide film of the third insulating film 510 are made substantially equal to each other, and the etching rates of the silicon nitride film of the second insulating film 505 are compared with those of the two. The etching rate is controlled to be relatively small. In the initial state of the dry etching, the height of the top of the platinum film and the height of the top of the silicon oxide film as the third insulating film layer 510 remaining in the recessed region are almost equal. , Pt and the silicon oxide film as the third insulating film layer 510 are substantially equal in etching rate, after etching, the Pt end in the recessed region and the third insulating film layer 5 are removed.
The heights of the ten silicon oxide films are substantially equal. As a result, it is possible to obtain a lower electrode structure in which the platinum film is not dug down or has a projection shape.

At this time, the third insulating film layer 510 remaining in the concave region serves as a mask, and the platinum film in the concave portion is not etched, as shown in FIG. A cup-shaped electrode that does not dig down from the upper end and does not have a protruding platinum end is formed. In addition, since the (Pt / silicon nitride film) selectivity is ≒ 2.5, that is, the etching rate of the platinum film is relatively considerably higher than the etching rate of the second insulating film layer 505 made of the silicon nitride film. Third insulating film layer 5 as described with reference to FIG.
When 10 is removed, the sharp protruding portion of the platinum film becomes the third
Does not protrude higher than the upper surface of the insulating film layer 510,
As shown in FIG. 6F, the platinum film 507 has a gentle taper shape from the side wall on the surface side of the third insulating film layer 510, and the electrode area increases accordingly.

In this etching, the condition that the Ar flow rate ratio ((Ar flow rate) / (Ar + Cl ₂ + O ₂ ) total gas flow rate) was 50% was used. As can be seen from FIG. 4, the Ar flow rate ratio ≧ 30% Since the (Pt / silicon oxide film) selectivity ≒ 1, the same effect can be obtained.

Finally, after removing the third insulating film layer 510 remaining in the recessed region, an appropriate high dielectric film 511 made of BST or the like and an upper electrode 512 made of Pt or the like are deposited. , And a capacitor electrode (see FIG. 6G). At this time, since the surface of the second insulating film layer 505 is flat, the high dielectric film 5 during deposition of the high dielectric film 511 is formed.
11 can be alleviated.

When removing the third insulating film layer 510 remaining in the above-mentioned concave region, the third insulating film layer 510 is made of a silicon oxide film, and the second insulating layer 505 is made of silicon nitride. Since it is made of a film, the conditions under which only the silicon oxide film is etched without etching the silicon nitride film by appropriate dry etching or wet etching can be easily selected, and a mask is formed on the silicon nitride film. The third insulating film layer 510 can be removed without performing. In this sense, the second insulating layer 505
Is preferably composed of a silicon nitride film and the third insulating film layer 510 is composed of a silicon oxide film. In addition, it is preferable that the first insulating film layer 504 be made of a silicon oxide film because the silicon oxide film has better insulation properties than the silicon nitride film. Therefore, a combination in which the second insulating layer 505 made of a silicon nitride film is provided on the first insulating layer 504 made of a silicon oxide film is preferable in this sense.

In the present invention, FIGS. 6C and 6D (not shown, see FIGS. 5C and 5D) and FIGS.
Although a silicon oxide film was used as the filling material in the concave portion shown in FIG.
Similar effects can be obtained by using an inorganic insulating film such as G (Spin on glass).

6C and 6D (not shown, see FIGS. 5C and 5D) and an embedding material in the recess shown in FIG. The same effect can be obtained by using an insulating film. This organic insulating film is made of Ar / O ₂ / Cl ₂ used for platinum etching.
It has almost the same dry etching resistance as a silicon oxide film or an inorganic insulating film against plasma, and is easily removed from O ₂ plasma. Hereinafter, advantages of using an organic insulating film will be described with reference to FIG.

I) FIGS. 6C and 6D (not shown, FIG.
In (c) and (d)), 508 is etched back or CMP method is performed to expose the platinum film 509 in the region other than the concave region.
508 can be easily etched by using a plasma containing O ₂ .

Ii) FIG. 6D (not shown, FIG. 5D)
6 (e) and (f), Ar / O ₂ / C
The platinum 509 is etched using l ₂ plasma, and the plasma has almost the same dry etching resistance even in an organic insulating film.

Iii) After the etching of platinum, when removing the organic insulating film embedded in the concave region,
By using plasma mainly composed of O ₂ , it can be easily removed.

Iv) Further, when an organic insulating film is used as a filling material, plasma containing O ₂ gas is commonly used at the time of etch back, at the time of Pt etching, and at the time of removing the organic insulating film as described above. In addition, continuous processing can be performed in the same chamber, which has a great effect on productivity.

In the first to third embodiments, platinum was used as a material for the capacitor electrode. However, iridium (Ir), zirconium (Zr), Al (aluminum), hafnium (Hf), rhodium (Rh) The same effect can be obtained in an alloy containing at least one of the above-mentioned types in a range of 10% by mass or less.

[0096]

As described above, according to the present invention, it is possible to provide a capacitance forming method capable of preventing a decrease in the surface area of a platinum lower electrode used for a cup-shaped capacitor.

Further, by etching under the condition that the etching rate of the platinum film is higher than the etching rate of the second insulating film made of a silicon nitride film or the like, the end of the platinum is not formed into a protruding projection shape with sharp edges. An electrode can be formed, and a capacitor formation method in which generation of a leak path is prevented can be provided.

The dry etching method of the present invention can provide a dry etching method suitable for the capacitance forming method having the above-mentioned excellent advantages.

[Brief description of the drawings]

FIG. 1 shows an ICP (Inductive) used for dry etching of a platinum film according to a first embodiment of the present invention.
1 is a cross-sectional configuration diagram of a (y Coupled Plasma) type dry etching chamber.

FIG. 2 shows an etching rate of O ₂ / O when dry etching is performed on Pt, a silicon oxide film, and a silicon nitride film.
It is a graph which shows the (O ₂ + Cl ₂ ) flow rate ratio dependency.

FIG. 3 shows the selection ratio of (Pt / silicon oxide film) and (Pt / silicon oxide film).
6 is a graph showing the dependence of the (silicon nitride film) selectivity on the flow rate ratio of O ₂ / (O ₂ + Cl ₂ ).

FIG. 4 is a graph showing the dependence of the Pt etching rate and the selectivity (Pt / silicon oxide film) on the flow rate ratio of Ar / (Ar + Cl ₂ + O ₂ ).

FIG. 5 is a process sectional view of a capacitance forming method according to a second embodiment of the present invention.

FIG. 6 is a process sectional view of a capacitance forming method according to a third embodiment of the present invention.

FIG. 7 is a cross-sectional view showing a conventional stack-type structure capacitor.

FIG. 8 is a process sectional view of platinum dry etching used for a conventional stacked structure capacitor.

FIG. 9 is a process sectional view of a conventional method of forming a cup-shaped structural capacitor.

FIG. 10 is a schematic cross-sectional view showing a problem in dry etching when forming a conventional cup-type structure capacitor.

FIG. 11 is a schematic cross-sectional view showing a problem in dry etching when forming a conventional cup-type structure capacitor.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Chamber 2 Lower electrode 3 Exhaust port 4 Quartz plate 5 High frequency power supply for applying bias high frequency power 6 ICP coil 7 ICP high frequency power supply 8 Gas inlet 9 Substrate 11 Platinum film data 12 Silicon oxide film data 13 Silicon nitride film data 15 (Pt / silicon oxide film) selectivity data 16 (Pt / silicon nitride film) selectivity data 18 Pt etching rate data 19 (Pt / silicon oxide film) selectivity data 501 Semiconductor substrate 502 Silicon oxide film 503 Connection hole 503a Conductive material 504 First insulating film 505 Second insulating film 506 Concave portion to be a capacitance forming region 507 Platinum film 508 Third insulating film 509 Platinum film 510 other than the concave region 510 Third remaining in the concave region Insulating film layer 511 High dielectric film 512 Upper electrode 701 Using platinum Stack type lower electrode 801 semiconductor substrate 802 platinum film 803 sidewall deposit consisting of decomposition products of the photoresist 804 platinum and resist

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4K057 DA13 DB20 DD01 DE01 DE14 DE20 DG07 DG12 DM40 DN02 5F004 AA05 BA20 BB11 CA02 DA04 DA23 DA26 DA30 DB03 DB07 DB08 5F083 AD24 AD31 JA14 JA38 PR03 PR06 PR39 PR40

Claims (15)

[Claims] In a dry etching of a platinum film, A
A dry etching method characterized by performing dry etching using a mixed gas of r gas, Cl ₂ gas and O ₂ gas. _2. A flow rate ratio of O ₂ and Cl ₂ (O ₂ / (O ₂ + Cl ₂ )
₂ ) The dry etching method according to claim 1, wherein the flow rate ratio is 20% or more. 3. The flow ratio of O ₂ to Cl ₂ (O ₂ / (O ₂ + Cl ₂ )
₂ ) The dry etching method according to claim 1, wherein the flow rate ratio is 30% to 45%. 4. A flow ratio of O ₂ to Cl ₂ (O ₂ / (O ₂ + Cl ₂ )
₂ ) The dry etching method according to claim 1, wherein the flow rate ratio is 50% to 90%. 5. The dry etching method according to claim 1, wherein the flow ratio of Ar gas to the total gas flow is 30% or more. 6. The dry etching method for platinum according to claim 4, wherein: (a) when the platinum film and the silicon oxide film are simultaneously etched using the dry etching conditions, the etching rates of both are reduced. (B) When the platinum film, the silicon oxide film, and the silicon nitride film are simultaneously etched using the dry etching conditions, the etching rate of the silicon oxide film becomes equal to the etching rate of the silicon nitride film. The dry etching method according to claim 4, wherein the dry etching method is relatively larger than the dry etching method. 7. A step of depositing a first insulating film on a substrate and further depositing a second insulating film on the first insulating film;
Forming a concave portion in the insulating film, depositing a platinum film on the first insulating film and the second insulating film including the inside of the concave portion, and forming a third insulating film on the platinum film Depositing, removing the third insulating film in a region other than the concave region, exposing the platinum film in a region other than the concave region, and removing the platinum film other than the concave region by dry etching. A method of forming a capacitor, comprising the steps of: etching a platinum film at a speed substantially equal to an etching speed of a third insulating film. 8. A step of depositing a first insulating film on a substrate and further depositing a second insulating film on the first insulating film;
Forming a concave portion in the insulating film, depositing a platinum film on the first insulating film and the second insulating film including the inside of the concave portion, and forming a third insulating film on the platinum film Depositing, removing the third insulating film in a region other than the concave region, exposing the platinum film in a region other than the concave region, and removing the platinum film other than the concave region by dry etching. In the method of forming a capacitor including a step, the etching rate of the platinum film is substantially equal to that of the third insulating film, and the etching rate of the platinum film is higher than the etching rate of the second insulating film. Capacity formation method. 9. A step of depositing a first insulating film on a substrate and further depositing a second insulating film on the first insulating film;
Forming a concave portion in the insulating film, depositing a platinum film on the first insulating film and the second insulating film including the inside of the concave portion, and forming a third insulating film on the platinum film Depositing, removing the third insulating film in a region other than the concave region, exposing the platinum film in a region other than the concave region, and removing the platinum film other than the concave region by dry etching. In the above method, the dry etching is performed using a mixed gas containing an Ar gas, a Cl ₂ gas, and an O ₂ gas. 10. A flow ratio of O ₂ to Cl ₂ (O ₂ / (O ₂ + C
10. The capacitance forming method according to claim 9, wherein l ₂ ) is 20% or more. 11. A flow ratio of O ₂ to Cl ₂ (O ₂ / (O ₂ + C
The capacitance forming method according to claim 9, wherein (l ₂ ) the flow rate ratio is 30% to 45%. 12. A flow ratio of O ₂ to Cl ₂ (O ₂ / (O ₂ + C
The capacitance forming method according to claim 9, wherein (l ₂ ) a flow rate ratio is 50% to 90%. 13. The capacity forming method according to claim 9, wherein a flow ratio of the Ar gas to the total gas flow is 30% or more. 14. The semiconductor device according to claim 9, wherein the first insulating film is a silicon oxide film, and the second insulating film is a silicon nitride film.
4. The method for forming a capacitance according to any one of 3. 15. The method according to claim 9, wherein the third insulating film is a silicon oxide film.