JP2001314032A - Protection circuit for inverse connection of power supply - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a simplified and low-cost protection circuit for inverse connection of a power supply, which does not lower the power supply voltage for the connection of power supply. SOLUTION: In an IC 11 of the SOI structure, a constant current circuit 21 and function circuits 22, 23 are connected between a current mirror circuit 19 and a negative power supply line 15. A resistor 24 and a diode 25 forming a protection circuit for inverse connection of power supply 26 are connected between a base line 20 and the negative power supply line 15. When the power supply is inversely connected to the IC 11, the diode 25 turns ON and the potential of the base line 20 is raised up to the voltage near the potential of the negative power supply line 15. An inverse voltage is blocked across the base and emitter of transistors 16 to 18 to protect a constant current circuit 21 and the function circuits 22, 23.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply reverse connection protection circuit for protecting an electric circuit when a power supply is reversely connected to the electric circuit.

[0002]

FIG. 9 shows an example in which this kind of power supply reverse connection protection circuit is applied to an IC (integrated circuit). In FIG. 9, a diode 3 and an electric circuit 4 to be protected are connected in series between a positive power supply terminal 1 and a negative power supply terminal 2. The electric circuit 4 includes a constant current circuit 5, a current mirror circuit 6,
Functional circuits 7 and 8 which are load circuits of the current mirror circuit 6
And has a circuit configuration that is very generally used as an IC.

A power supply (not shown) is connected to a power supply terminal 1,
2 is normally connected (sequentially connected), and when a power supply voltage having a normal polarity is applied between the power supply terminals 1 and 2, a current is supplied from the power supply to the electric circuit 4 via the diode 3. On the other hand, the power supply is reversed and the potential of the power supply terminal 2 is
, The current is blocked by the diode 3. Therefore, even if the electric circuit 4 has a circuit configuration capable of flowing a current from the power supply terminal 2 side to the cathode side of the diode 3, no current flows in the electric circuit 4, and the electric circuit 4 is protected against power supply reverse connection. Protected.

[0004] However, the diode 3 constituting the power supply reverse connection protection circuit needs to supply a large current capacity to the electric circuit 4 in the normal operation state in which the power supply is connected in a normal operation state. I do. Therefore, for example, in the case of a circuit formed as an IC, the chip area increases and the cost increases. Even when the power supply is connected in the forward direction and the diode 3 is turned on, a forward voltage (for example, 40 V) is applied between the anode and the cathode of the diode 3.
0 mV to 800 mV), the minimum power supply voltage (low-voltage operation limit) at which the electric circuit 4 can maintain operation when the power supply voltage decreases is raised.

On the other hand, a power supply reverse connection protection circuit having an improved low voltage operation limit is disclosed in Japanese Patent Application Laid-Open No. 5-260652. FIG. 10 shows an application example of the power supply reverse connection protection circuit. In FIG. 10, between the power supply terminal 1 and the electric circuit 4, an emitter-collector of a PNP transistor 9 is connected instead of the diode 3, and a connection between the base of the transistor 9 and the power supply terminal 2 is provided. Is connected to a resistor 10.

In this configuration, when the power supply is connected in sequence, a base current flows through the transistor 9 via the resistor 10, the transistor 9 is turned on, and a current is supplied to the electric circuit 4. On the other hand, when the power supply is reversely connected, the potential of the power supply terminal 2 is applied to the base of the transistor 9 via the resistor 10, so that a reverse bias is applied between the base and the emitter. As a result, the transistor 9 is turned off, and the electric circuit 4 is protected.

However, even in this circuit configuration, since the transistor 9 needs a large current capacity, there remains a problem that the chip area increases and the cost increases. further,
At the time of forward connection of the power supply, at least a saturation voltage (for example, 50 mV to 2
00 mV) remains. Therefore, although the low-voltage operation limit is slightly improved with respect to the configuration shown in FIG. 9, the low-voltage operation limit is still raised.

The present invention has been made in view of the above circumstances, and has as its object to protect an electric circuit composed of a current mirror circuit and its load circuit when the power supply is reversely connected. Another object of the present invention is to provide a power supply reverse connection protection circuit that can be configured simply and at low cost and that does not raise the low voltage operation limit.

[0009]

According to the first aspect of the present invention, when the power supply is reversely connected and a voltage of opposite polarity is applied to the first and second power supply lines, the common connection line and the first power supply line are connected to each other. The one-way current supply circuit connected between the first power supply line and the common connection line is turned on through the one-way current supply circuit. Flows. Thus, a voltage is generated at both ends of the bias circuit, and the potential of the common connection line, that is, the potential of the control terminal of each transistor forming the current mirror circuit approaches the potential of the second power supply line. As a result, the potential difference between the main terminal (for example, collector or drain) of the transistor connected to the load circuit and the control terminal (for example, base or gate) of the transistor becomes small, and the transistor is turned off.

That is, when the power supply is reversely connected, the transistors constituting the current mirror circuit are turned off, and the current flowing in the reverse direction is cut off to protect the electric circuit. Therefore, unlike the conventional configuration, there is no need to add a new element for preventing the reverse voltage when the power supply is reversely connected, and the configuration is simplified and the cost is reduced. In addition, even when an IC is used, an increase in the chip area is small.

On the other hand, when a voltage of a predetermined polarity is applied from the power supply to the first and second power supply lines, the one-way power supply circuit is turned off. The bias circuit connected between the first power supply line and the common connection line does not adversely affect the operation of the current mirror circuit. Thus, an operating current is supplied from the first power supply line to the load circuit via the current mirror circuit.

The power supply reverse connection protection circuit is provided not between the first and second power supply lines but between the first and second power supply lines. Therefore, when the power supply is normally connected, no operating current flows through the one-way energizing circuit, and no loss occurs there. In addition, since the power supply voltage applied to the electric circuit does not decrease even if the power supply reverse connection protection circuit is added, the low voltage operation limit of the electric circuit with respect to the power supply voltage is not raised.

According to the second aspect of the present invention, since the one-way energizing circuit is formed by the diode, the circuit configuration is simplified. According to the means described in claim 3, since the one-way energizing circuit is constituted by the Schottky barrier diode having a smaller forward voltage, at the time of power supply reverse connection,
The potential of the control terminal of each transistor constituting the current mirror circuit is closer to the potential of the second power supply line. Thereby, each transistor is more reliably turned off, and application of a reverse voltage to the load circuit can be prevented.

According to the fourth aspect of the present invention, the one-way energizing circuit is constituted by the bipolar transistors connected so as to equivalently constitute a diode.
The circuit configuration is simplified.

According to the fifth aspect of the present invention, the one-way energizing circuit is a transistor, and its control terminal is connected to the first power supply line directly or via a resistor or the like. At the time of connection, a voltage is applied between the control terminal of the transistor and a main terminal (connected to the second power supply line), so that the transistor is turned on. In this ON state, the voltage between the main terminals of the transistor (for example, the voltage between the collector and the emitter, the voltage between the drain and the source: corresponding to the voltage between both ends of the one-way energizing circuit) becomes very small. The potential of the control terminal of the transistor becomes closer to the potential of the second power supply line. Thereby, each transistor is more reliably turned off, and application of a reverse voltage to the load circuit can be prevented.

According to a sixth aspect of the present invention, an FET is provided.
Since the voltage between the gate and the source (connected to the second power supply line) is 0, when the power supply is normally connected, F
ET is turned off. On the other hand, when the power supply is reversely connected, the relationship between the source and the drain of the FET is switched, so that the FET is energized.

According to the seventh aspect of the present invention, since the bias circuit is a resistor, the circuit configuration is simplified. According to the means described in claim 8, since the power supply reverse connection protection circuit is configured as an integrated circuit having an insulation separation structure, unlike a circuit having a junction separation structure, no parasitic transistor is formed, and the power supply reverse connection protection circuit is not formed. At the time of connection, a through current can be prevented from flowing.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) Hereinafter, a first embodiment in which a power supply reverse connection protection circuit of the present invention is configured as an IC (integrated circuit) will be described with reference to FIGS. . FIG. 1 schematically shows an electrical configuration inside the IC. In FIG. 1, a positive power supply terminal 12 and a negative power supply terminal 13 of an IC
A positive terminal and a negative terminal of a power supply (not shown) provided outside the IC 1 are connected (sequential connection), and the IC 11 operates by receiving a supply of the power supply voltage VB from the power supply.

Positive power supply terminal 12 and negative power supply terminal 13
Respectively, the power supply voltage VB is applied to each circuit inside the IC 11.
Are connected to a positive power supply line 14 (corresponding to a first power supply line) and a negative power supply line 15 (corresponding to a second power supply line). The positive side power supply line 14 is connected to a current mirror circuit 19 including PNP transistors 16, 17, and 18. That is, the emitters of the transistors 16, 17, and 18 are connected to the positive power supply line 14, and their bases (corresponding to control terminals) are connected to a common base line 20 (corresponding to a common connection line).

A constant current circuit 21 is connected between the collector of the transistor 16 and the negative power supply line 15, and functional circuits 22 and 23 are provided between the collectors of the transistors 17 and 18 and the negative power supply line 15, respectively. (Corresponding to a load circuit) is connected. Such a circuit configuration is a circuit configuration often used in an electric circuit, and particularly a general circuit configuration in an IC.

Further, as a feature of this embodiment, a resistor 24 (corresponding to a bias circuit) and a diode 25 (corresponding to a one-way energizing circuit) are provided between the positive power supply line 14 and the negative power supply line 15. Power supply reverse connection protection circuit 26 is connected. Here, the resistor 24 is connected between the positive power line 14 and the base line 20, and the diode 25 is connected between the base line 20 and the negative power line 15 with the negative power line 15 side as the anode. Have been.

FIG. 2 is an electrical configuration diagram specifically showing the constant current circuit 21 and the functional circuits 22 and 23 in FIG. The constant current circuit 21 is a well-known self-bias type constant current circuit. The transistor 16 has two collectors. The collector and the emitter of the NPN transistor 27 are connected between one collector and the negative power supply line 15, and between the other collector and the negative power supply line 15. Is connected between the collector and the emitter of the NPN transistor 28 and the resistor 29. In addition, the baseline 20
The resistor 30 and the emitter-collector of the PNP transistor 31 are connected between the resistor 30 and the negative power supply line 15.
The bases of the transistors 27, 28 and 31 are respectively connected to the emitter of the transistor 28 and the transistor 27.
, And the collector of the transistor 28. A starting resistor 32 is connected between the positive power supply line 14 and the collector of the transistor 27.

The functional circuit 22 connected between the collector of the transistor 17 and the negative power supply line 15 is a comparison circuit section of a comparator, and is current mirror-connected to a differential pair including transistors 33 and 34. Transistor 3
And active loads 5 and 36. IC
11, the non-inverting input terminal 37 and the inverting input terminal 38
Transistors 33 and 3 are connected via resistors 39 and 40, respectively.
4 are connected to the base.

The functional circuit 23 is an output circuit section of the comparator. The collector circuit of the NPN transistor 41 is connected between the collector of the transistor 18 and the negative power supply line 15.
The emitter and the base and the emitter of the NPN transistor 42 are connected. The output node of the differential pair, that is, the collector of the transistor 34 is connected to the base of the transistor 41, and the collector of the transistor 42 is
It is connected to the output terminal 43 of C11.

Now, the IC 11 having the above circuit configuration is
It has an insulation isolation structure formed on an OI (Silicon On Insulator) substrate. FIGS. 3A and 3B are a plan view of a lateral PNP transistor formed on an SOI substrate and a perspective view schematically showing a vertical cross section along line XX.

In FIG. 3, the SOI substrate 44 has a structure in which a single-crystal silicon layer 47 is provided on a main surface of a silicon substrate 45 via a silicon oxide film 46 as an insulating film. In the silicon layer 47, a trench 48 reaching the silicon oxide film 46 from the surface is formed, and a plurality of element-forming island-shaped regions insulated and separated from each other are formed.

In the surface layer of the island-shaped region, a P-type emitter region 49 and a rectangular closed-loop P-type collector region 50 surrounding the emitter region 49 are formed by diffusion. In this case, the silicon layer 47 serves as a base region, and the base contact region 51 is formed outside the collector region 50.

Next, the operation of the present embodiment will be described. First, the operation when the power supply is connected to the positive power supply terminal 12 and the negative power supply terminal 13 in order will be described with reference to FIG. In this case, the starting resistor 3
2. When a starting current flows through the transistor 28 and the resistor 29, the constant current circuit 21 starts a constant current operation. The constant current value is determined by the base-emitter voltage of the transistor 27 and the value of the resistor 29, and the current is supplied from the positive power supply line 14 to the transistors 16, 28 and the resistor 29.
To the negative power supply line 15 through the The transistor 16 causes the same current to flow through the transistor 27 as a self-bias current. That is, the collector current of the transistor 27 becomes constant, and the transistor 2
7 is also constant, the constant current circuit 2
1 is less susceptible to fluctuations in the power supply voltage VB. Note that the transistor 31 is for flowing a base current from the base line 20.

The constant current generated by the constant current circuit 21 is passed through a current mirror circuit 19 to a functional circuit 22.
23. The functional circuits 22 and 23 constitute a comparator. When the input voltage to the non-inverting input terminal 37 is higher than the input voltage to the inverting input terminal 38, the transistor 41 is turned on and the transistor 42 is turned off.
If the input voltage to the non-inverting input terminal 37 is lower than the input voltage to the inverting input terminal 38, the transistor 4
1 turns off and the transistor 42 turns on.

In this case, the voltage of the base line 20 becomes substantially (VB-Vf), where Vf is the base-emitter voltage of the transistors 16, 17, and 18.
5, a reverse voltage is applied. Therefore, the diode 25 is in the off state (non-energized state) and does not affect the operation of the comparator. The resistance 2
4 does not adversely affect the operation of the current mirror circuit 19.

Subsequently, the negative terminal and the positive terminal of the power supply are connected to the positive power supply terminal 12 and the negative power supply terminal 13 of the IC 11 (reverse connection), respectively. The case where VB) is applied will be described below. Such a reverse connection is performed by, for example, the IC 11
-Mounted device (not shown) equipped with a battery and battery (power supply)
Occurs when the connection to is wrong.

In this case, the negative power supply line 15 is
4 has a higher potential than that of the diode 25,
4 forward voltage is applied. As a result, the diode 25 is turned on (energized state), and the voltage of the baseline 20 is set to 0 V with the potential of the positive power supply line 14 being lower than the voltage VB of the negative power supply line 15 by Vf (VB−
Vf).

The transistors 16, 17, and 18 constituting the current mirror circuit 19 are of PNP type, and their collectors (P type) and bases (N
Mold) are forward. However, a voltage substantially equal to the above-described voltage Vf is required to make a current flow between the collector and the base. Therefore, when the diode 25 is on, almost no voltage is applied to the constant current circuit 21 and the functional circuits 22 and 23.

In addition, in order for the constant current circuit 21 and the functional circuits 22 and 23 to flow current in the opposite direction (ie, in the direction from the negative power supply line 15 to the collectors of the transistors 16, 17 and 18), the circuit configuration is generally required. A corresponding voltage is required. This voltage is the collector-base voltage Vf of the transistor 31 in the case of the constant current circuit 21. Therefore, when the diode 25 is turned on and the potential difference between the negative power supply line 15 and the base line 20 becomes Vf, no current flows through the constant current circuit 21 or the functional circuits 22 and 23. Note that the functional circuits 22 and 23 in the present embodiment include the negative power supply line 15.
, The transistors 35, 36, 41, and 42 are all of the NPN type, so that no current flows regardless of the applied reverse voltage.

After all, the power supply lines 14 and 15 are
Most of the reverse-polarity voltage VB applied therebetween is blocked between the base (N-type) and the emitter (P-type) of the transistors 16, 17, and 18. A voltage between the base and the emitter is sufficiently higher than the power supply voltage VB (for example, 12 V to 16 V) (for example, 30 V).

The main structures of an IC include a junction separation structure for electrically separating each element by a reverse-biased PN junction and an insulation separation structure for separating each element by an insulating film or the like.

A PNP transistor having a junction separation structure is schematically shown in FIG. That is, an N-type epitaxial layer 54 is formed on a P-type silicon substrate 52 with a buried layer 53 interposed therebetween.
A P-type emitter region 55, a P-type collector region 56, and a base contact region 57 are formed in the surface layer portion of FIG. A P-type isolation region 58 for isolation isolation is formed between each element. The lowest potential used in the IC is applied to the silicon substrate 52 and the isolation region 58.

However, in this junction isolation structure, the emitter region 55, the collector region 56, the epitaxial layer 54
In addition to the original transistor consisting of (base region), there is a parasitic transistor (shown by a broken line in FIG. 4) having the silicon substrate 52 as an emitter, the epitaxial layer 54 as a base, and the emitter region 55 as a collector. Therefore, when the junction separation structure is used in the circuit configuration shown in FIG. 1, a through current flows from the negative power supply line 15 to the positive power supply line 14 via the parasitic transistor when the power supply is reversely connected.

Therefore, the IC 11 of the present embodiment uses the latter insulation separation structure as described above and shown in FIG. Since no parasitic transistor is formed in the isolation structure, a through current does not flow due to the parasitic transistor when the power supply is reversely connected.

As described above, the IC 11 of this embodiment
Has a current mirror circuit 19 connected to the positive power supply line 14, and a constant current circuit 21 and functional circuits 22 and 23 (here, comparators) connected between the current mirror circuit 19 and the negative power supply line 15. It has a circuit configuration.
This circuit configuration is a general one that is frequently used in ICs, in particular, in which transistors with uniform characteristics can be easily manufactured.
As a characteristic of the IC 11, a power supply reverse connection protection circuit 26 including a resistor 24 and a diode 25 is connected between the positive power supply line 14 and the negative power supply line 15.

In this configuration, when the power supply is reversely connected to the positive power supply terminal 12 and the negative power supply terminal 13 of the IC 11, the diode 25 is turned on and the potential of the base line 20 becomes the potential of the negative power supply terminal 13. Pulled up close. Thereby, the constant current circuit 21 and the function circuit 22,
The voltage is hardly applied to 23, and the applied reverse voltage is blocked between the base and the emitter of the transistors 16 to 18 constituting the current mirror circuit 19. Thereby, the IC 11 is protected from the application of the reverse voltage due to the reverse connection of the power supply.

According to the power supply reverse connection protection circuit 26, since the current mirror circuit 19 itself blocks the reverse voltage, it is not necessary to add a new element for blocking the reverse voltage. Further, since the resistor 24 and the diode 25 only need to fix the potential of the baseline 20 when the power supply is reversely connected, a large current capacity is not required. For this reason, the configuration of the power supply reverse connection protection circuit 26 is simplified, the configuration of the power supply reverse connection protection circuit 26 is scarcely increased, and the configuration can be performed at low cost.

The power supply reverse connection protection circuit 26 is
In the case of normal operation in which the power supply is connected to the
Since 5 is turned off, the original operation of the IC 11 is not affected. Moreover, the power supply reverse connection protection circuit 26
Does not intervene in the positive power supply line 14 or the negative power supply line 15, so that a voltage drop due to an operating current does not occur at the time of forward connection. For this reason, the low voltage operation limit of the IC 11 with respect to the power supply voltage is not raised, and no loss occurs.

(Second Embodiment) FIG. 5 shows a second embodiment of the present invention. Hereinafter, portions different from the first embodiment will be described. That is, the IC 59 shown in this embodiment is the same as the IC 11 described above.
Is provided with a power supply reverse connection protection circuit 60 in place of the power supply reverse connection protection circuit 26 in FIG. In the power supply reverse connection protection circuit 60, the collector and the emitter of the NPN transistor 61 are connected between the base line 20 and the negative power supply line 15 instead of the diode 25. The transistor 61 corresponding to the one-way conduction circuit has a base and an emitter connected (corresponding to a diode connection in the present invention), and equivalently functions as a diode having the negative power supply line 15 side as an anode. It has become.

IC provided with this power supply reverse connection protection circuit 60
When the power supply is reversely connected to the transistor 59, the transistor 61 is turned on in the direction from the emitter to the collector, so that the voltage of the base line 20 is higher than the voltage VB of the negative power supply line 15 by Vf.
Only lower voltage. Therefore, the IC 59 according to the first embodiment is also provided by the IC 59 according to the present embodiment.
The same operation and effect as in the eleventh embodiment can be obtained.

(Third Embodiment) FIG. 6 shows a third embodiment of the present invention. Hereinafter, portions of the third embodiment which are different from the first embodiment will be described. That is, the IC 62 shown in this embodiment is the same as the IC 11 described above.
Is provided with a power supply reverse connection protection circuit 63 in place of the power supply reverse connection protection circuit 26 in FIG. In the power supply reverse connection protection circuit 63, the collector and the emitter of the PNP transistor 64 are connected between the base line 20 and the negative power supply line 15 instead of the diode 25. The base of the transistor 64 is connected to the positive power supply line 14 via the resistor 65.

When the power supply is sequentially connected to the IC 62, the power supply voltage V is connected to the base of the transistor 64 via the resistor 65.
B is applied. However, since the power supply voltage VB is a reverse voltage between the base and the emitter of the transistor 64, the transistor 64 is turned off.

On the other hand, when the power supply is reversely connected to the IC 62, a forward voltage is applied between the base and the emitter of the transistor 64 via the resistor 65, so that the transistor 64 is turned on. In this case, the voltage of the base line 20 is set such that the potential of the positive power supply line 14 is 0 V and the negative power supply line 15 is
Is lower than the voltage VB by the saturation voltage Vsat of the transistor 64.

Therefore, according to the present embodiment, since the transistor 64 operates as a one-way energizing circuit, the same operation and effect as those of the first embodiment can be obtained. Further, according to the power supply reverse connection protection circuit 63, since the potential difference between the baseline 20 and the negative power supply line 15 becomes the saturation voltage Vsat (<Vf) at the time of the power supply reverse connection, the constant current circuit 21 and the functional circuit 22 , 23 can be almost completely prevented, and more reliable power supply reverse connection protection can be achieved.

(Fourth Embodiment) FIG. 7 shows a fourth embodiment of the present invention. Hereinafter, portions of the fourth embodiment different from the first embodiment will be described. That is, the IC 66 shown in this embodiment is the same as the IC 11 described above.
Is provided with a power supply reverse connection protection circuit 67 in place of the power supply reverse connection protection circuit 26 in FIG. In the power supply reverse connection protection circuit 67, the drain and source of an enhancement N-channel MOSFET 68 are connected between the base line 20 and the negative power supply line 15 instead of the diode 25. The gate of the MOSFET 68 is connected to the negative power supply line 15.

When the power supply is connected to the IC 66 in order,
The voltage (VB−Vf) of the baseline 20 is applied to the drain of the SFET 68 via the resistor 24. But,
The MOSFET 68 is turned off because its gate and source are short-circuited.

On the other hand, when the power supply is reversely connected to the IC 66, the source and the gate have a higher potential than the drain. Since the MOSFET 68 has a symmetric structure with respect to the drain and the source, a current flows from the source to the drain in this voltage applied state, and the voltage of the base line 20 is higher than the voltage VB of the negative power supply line 15 by a voltage VTH (MOS
(The threshold voltage of the FET 68).

As described above, according to the present embodiment, the MOS
Since the FET 68 operates as a one-way conduction circuit, the same operation and effect as in the first embodiment can be obtained by setting the threshold voltage VTH low.

(Fifth Embodiment) FIG. 8 shows a fifth embodiment of the present invention. Hereinafter, portions of the fifth embodiment which are different from the first embodiment will be described. IC69
The internal circuit configuration is obtained by reversing the connection between the positive power supply line 14 and the negative power supply line 15 in the circuit configuration inside the IC 11 described above. That is, the negative power line 15
An NPN transistor 70 (corresponding to a first power supply line)
A current mirror circuit 73 composed of the transistors 71, 72 is connected between the positive power supply line 14 (corresponding to the second power supply line) and the collectors of the transistors 70, 71, 72.
A constant current circuit 74 and functional circuits 75 and 76 (corresponding to load circuits) are connected to each other. Further, the negative power line 15
And a base line 77 (corresponding to a common connection line), and between the base line 77 and the positive power supply line 14, a resistor 79 (corresponding to a bias circuit) constituting a power supply reverse connection protection circuit 78 and a diode 80 (corresponding to a unidirectional energizing circuit).

According to this configuration, when the power supply is connected to the IC 69 in a forward direction, the diode 80 is turned off, and when the power supply is connected in the reverse direction, the diode 80 is turned on and the potential of the base line 77 becomes positive. It is pulled up to near the potential of the side power supply line 14. Therefore, also in the present embodiment, similarly to the first embodiment, the IC 69 is protected from application of a reverse voltage due to reverse connection of the power supply.

(Other Embodiments) The present invention is not limited to the embodiments described above and shown in the drawings. For example, the present invention can be modified or expanded as follows.
One-way energizing circuit is composed of diode, transistor, FE
The invention is not limited to elements such as T, but any circuit may be used as long as it allows current to flow in only one direction. In particular, it is preferable that the voltage between terminals be low in the energized state. Further, the bias circuit is not limited to the resistors 24 and 79, and may have any circuit configuration that can bias the one-way energizing circuit to an energized state when the power supply is reversely connected.

In each embodiment, the constant current circuits 21 and 7
4 may be replaced by a variable current circuit or another current source. Further, the functional circuits 22 and 23 are not limited to comparators. The number of transistors constituting the current mirror circuits 19 and 73 is not limited to three. Further, the current mirror circuit may be constituted by an FET.

In the first and fifth embodiments, Schottky barrier diodes are preferably used as the diodes 25 and 80. Thereby, the potential difference between the base line 20 and the negative power supply line 15 and the potential difference between the base line 77 and the positive power supply line 14 at the time of reverse connection of the power supply are further reduced,
More reliable power supply reverse connection protection becomes possible.

In the second embodiment, when a diode-connected transistor is used as the one-way energizing circuit, the diode connection may be in another connection form. For example, an emitter-collector connection of an NPN transistor may be connected between the base line 20 and the negative power supply line 15, and the base and the collector may be connected. Also,
A PNP transistor may be used instead of the NPN transistor.

In the fourth embodiment, the baseline 2
The circuit configuration may be such that the source and the drain of the P-channel MOSFET are connected between 0 and the negative power supply line 15 and the gate is connected to the positive power supply line 14 or the base line 20. In the fifth embodiment, the same configuration as in the second to fourth embodiments is possible.

[Brief description of the drawings]

FIG. 1 is a schematic electric configuration diagram showing the inside of an IC according to a first embodiment of the present invention;

FIG. 2 is a specific electrical configuration diagram inside the IC.

FIG. 3 is a diagram schematically showing an insulation separation structure.

FIG. 4 is a diagram schematically showing a junction separation structure.

FIG. 5 is a view corresponding to FIG. 1, showing a second embodiment of the present invention;

FIG. 6 is a view corresponding to FIG. 1, showing a third embodiment of the present invention;

FIG. 7 is a view corresponding to FIG. 1, showing a fourth embodiment of the present invention;

FIG. 8 is a view corresponding to FIG. 1, showing a fifth embodiment of the present invention;

FIG. 9 is a diagram corresponding to FIG. 1 showing a conventional technique.

FIG. 10 is a diagram corresponding to FIG. 1 showing another conventional technique.

[Explanation of symbols]

11, 59, 62, 66 and 69 are ICs (integrated circuits), 1
4 is a positive power supply line (first power supply line / second power supply line), 15
Denotes a negative power supply line (second power supply line / first power supply line), 16,
17, 18, 70, 71 and 72 are transistors, 19,
73 is a current mirror circuit, 20 and 77 are base lines (common connection lines), 22, 23, 75 and 76 are functional circuits (load circuits), 24 and 79 are resistors (bias circuits),
5, 80 are diodes (one-way conducting circuits), 26, 6
0, 63, 67, 78 are power supply reverse connection protection circuits;
4 is a transistor (one-way conduction circuit), 68 is a MOS
It is an FET (unidirectional conduction circuit).

Claims (8)

[Claims] A first power supply line to which a voltage of a predetermined polarity is applied from a power supply; a current mirror circuit including a plurality of transistors connected to the first power supply line;
A power supply reverse connection protection circuit for protecting an electric circuit composed of a load circuit connected between each of the transistors and the second power supply line when the power supply is reversely connected to the electric circuit. In such a manner that when the power supply is reversely connected, the power supply is turned on,
A one-way energizing circuit connected between a common connection line between control terminals of the respective transistors and the second power supply line, and connected between the first power supply line and the common connection line; A power supply reverse connection protection circuit, comprising: a bias circuit. 2. The power supply reverse connection protection circuit according to claim 1, wherein said one-way current supply circuit is a diode. 3. The power supply reverse connection protection circuit according to claim 2, wherein said one-way conduction circuit is a Schottky barrier diode. 4. The power supply reverse connection protection circuit according to claim 1, wherein said one-way conduction circuit is a diode-connected bipolar transistor. 5. The power supply reverse connection protection circuit according to claim 1, wherein the one-way conduction circuit is a transistor, and a control terminal thereof is connected to the first power supply line. 6. The power supply reverse connection protection circuit according to claim 1, wherein the one-way current supply circuit is an FET, and a gate thereof is connected to the second power supply line. 7. The power supply reverse connection protection circuit according to claim 1, wherein the bias circuit is a resistor. 8. The power supply reverse connection protection circuit according to claim 1, wherein the protection circuit is configured as an integrated circuit having an insulation isolation structure.