JP2001298740A - Video signal coder and its method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a video signal coder that employs the MPEG coding system and especially applies video image coding with high resolution such as the HDTV to a video signal. SOLUTION: The video signal coder that applies coding to a difference between an input video signal and a reproduced motion compensation video signal and obtains a reproduced signal through local decoding on the basis of the coded signal, is provided with a motion vector detection means 43 that detects a motion vector with different layers, a motion compensation means 46 that receives the motion vectors in the different layers from the motion vector detection means and the reproduced video signal, applies respective motion compensation predictions to them, and outputs a decision parameter used for a criterion, and a comparison discrimination means 45 that conducts prescribed weighting processing according to a set video image bit rate, compares the respective decision parameters received from the motion compensation means to select a motion vector and outputs a motion compensation video signal by the motion vector.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal encoding apparatus using an MPEG encoding method, and more particularly to a video signal encoding apparatus for performing high-resolution video encoding such as HDTV.

[0002]

2. Description of the Related Art Hitherto, video signal recording apparatuses employing the MPEG encoding method have been studied. FIG. 6 is a diagram showing a configuration of an example of a conventional video signal encoding device using MPEG encoding. For the MPEG method,
ISO-IEC1172-2, ITU-TH. 262 /
Since the detailed description is given in ISO-IEC13818-2, only the outline will be described here.

An input video signal is stored in a frame memory 1
It is input to (51) and stored. Frame memory 1
(51) stores image signals of a plurality of frames. The stored image signal is processed as a 16 × 16 pixel luminance signal and a color signal (Cb / Cr) is processed in blocks of 16 × 8 pixels, and the color signal is sub-sampled in the vertical direction to obtain 8 × 8 pixels. Is processed as a block.

[0004] Similarly, the image signal which has been blocked is locally decoded by the motion vector detection circuit 52 into the image signal read from the frame memory 1 (51) and the frame (field) called from the frame memory 2 (54). Between frames (between fields)
Detect and output a motion vector for prediction.

The motion compensation circuit 55 receives the motion vector and the reproduced image signal read from the frame memory 2 (54) as input, performs motion compensation, and outputs the motion compensated image signal, the motion vector, and the prediction mode. Is done.

[0006] In the subtractor 53, the internal frame memory 1
The image signal and the motion-compensated video signal read from (51) are input, subtraction is performed, and a difference image signal is output.

The DCT circuit 56 receives the differential image signal as input, performs DCT (Discrete Cosine Transform), and outputs DCT coefficients. The quantization circuit 57 receives the DCT coefficient as input, performs quantization, and outputs a quantized signal.

The variable length coding circuit 58 receives a quantized signal, a motion vector, and a prediction mode as input, performs variable length coding on these, and outputs a video coded signal (bit stream).

[0009] In addition, since I and P-pictures require a reproduced image to be used later as a reference signal for motion compensation prediction, inverse quantization and inverse DCT local decoding are performed. The inverse quantization circuit 59 receives the quantized signal, performs inverse quantization, and outputs a DCT coefficient.

The inverse DCT circuit 60 receives DCT coefficients as input, performs inverse DCT, and outputs a reproduced image. The reproduced image signal is output to the adder 6 together with the output signal of the motion compensation circuit 55.
1 is supplied. The frame memory 2 (54) receives the output reproduced image of the adder 61 and stores it.

At present, high-definition digital broadcasting (HDTV) using the MPEG2 encoding has been started. This HDTV has a higher HDTV (e.g., 1920 * 1080) than a conventional SDTV (e.g., 720 * 480 pixels).
Is about six times the image size.

However, since HDTV has a high basic resolution, a video bit rate of an image size ratio (about 6 times) is not necessarily required to maintain the same image quality as SDTV. Actually, the practical video bit rate (12 to 24 Mbps) studied in the HDTV digital broadcasting standard is SDT.
The image size ratio of V corresponds to a low bit rate of about 2 to 4 Mbps.

The motion compensation circuit 55 receives the motion vector and the reproduced image signal read from the frame memory 2 (54), performs motion compensation, and outputs the motion compensated image signal, the motion vector, and the prediction mode. .

[0014]

However, in MPEG2, additional information such as a motion vector and a prediction mode is obtained by taking a difference from the immediately preceding macroblock and using this as a VL.
C, so basically the number of macroblocks,
That is, it tends to depend on the image size.

Therefore, at the practical video bit rate studied in the HDTV digital broadcasting standard, the ratio of the additional information in the video bit stream increases. In particular, at this low rate, an increase in the code amount of the motion vector itself is caused due to the motion of the fine motion vector.

In view of the above, the present invention provides a method for encoding a video having a large image size, such as an HDTV, using MPEG2. It is an object of the present invention to provide a video signal encoding device having a motion compensation function that can cope with fine motion when it is high.

[0017]

According to a first aspect of the present invention, there is provided a video signal for encoding a difference between an input video signal and a reproduced motion compensated video signal, and for locally decoding the encoded video signal to obtain a reproduced signal. In the encoding device, a motion vector detecting means for detecting a plurality of different hierarchical motion vectors using a hierarchical motion vector detecting method, a plurality of different hierarchical motion vectors from the motion vector detecting means and the reproduced video signal, Is supplied, and each motion compensation prediction is performed.
A motion compensation unit that outputs a determination parameter serving as a determination criterion, and performs a predetermined weighting process in accordance with the set video bit rate, compares each determination parameter supplied from the motion compensation unit, and selects a motion vector; 3. A video signal encoding device comprising: a comparison / determination unit that outputs a motion-compensated video signal based on the motion vector from the motion compensation unit. And a video signal encoding method for encoding a difference between the reproduced motion compensated video signal and local decoding based on the encoded signal to obtain a reproduced signal.
A motion vector detecting step of detecting a plurality of different hierarchical motion vectors using a hierarchical motion vector detecting method,
A motion compensation step of receiving a plurality of different hierarchical motion vectors from the motion vector detection step and the reproduced video signal, performing respective motion compensation predictions, and outputting a determination parameter serving as a criterion; Performing a predetermined weighting process in accordance with a bit rate, comparing each determination parameter supplied from the motion compensation step, selecting a motion vector, and outputting a motion compensation video signal based on the motion vector from the motion compensation step. And a video signal encoding method characterized by comprising:

[0018]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of a video signal encoding apparatus according to the present invention using MPEG encoding. One embodiment of the video signal encoding apparatus of the present invention shown in FIG.
(11), motion detector 12, subtractor 13, frame memory 2 (14), motion compensation circuit 15, DCT circuit 16, quantization circuit 17, variable length coding circuit 18, inverse quantization circuit 1
9, an inverse DCT circuit 20, and an adder 21.

For MPEG2, ITU-T
H. Since H.262 / ISO-IEC13818-2 is described in detail, only the outline will be described here.

FIG. 1 shows a block diagram of an embodiment of a video signal encoding apparatus according to the present invention using MPEG encoding. The video signal is input to the frame memory 1 (11) and stored. The frame memory 1 (11) stores image signals of a plurality of frames.

The stored image signal has a luminance signal of 16 × 1
Six pixels and color signals (Cb / Cr) are processed in blocks of 16 × 8 pixels, respectively, and the color signals are subsampled in the vertical direction and processed as blocks of 8 × 8 pixels.

The image signal similarly blocked is locally decoded by the motion vector detecting circuit 12 between the image signal read from the frame memory 1 (11) and the frame (field) called from the frame 2 (14). A motion vector for inter-frame (inter-field) prediction, which is set externally or internally with the reproduced image signal, is detected and output.

The motion compensation circuit 15 receives the motion vector and the reproduced image signal read from the frame memory 2 (14), performs motion compensation, and performs motion compensation based on the normalized video bit rate signal. The image signal, the motion vector, and the prediction mode are output.

In the subtracter 13, the internal frame memory 1
The image signal and the motion-compensated video signal read from (11) are input, subtraction is performed, and a difference image signal is output.

The DCT circuit 16 receives the difference image signal, performs DCT (discrete cosine transform), and outputs DCT coefficients. The quantization circuit 17 receives the DCT coefficient as input, performs quantization, and outputs a quantized signal.

The variable length coding circuit 18 receives a quantized signal, a motion vector, and a prediction mode as input, performs variable length coding on these, and outputs a video coded signal (bit stream).

Since the I and P-pictures need a reproduced image to be used later as a reference signal for motion compensation prediction, local decoding is performed by an inverse quantization circuit 19 and an inverse DCT circuit 20. The inverse quantization circuit 19 receives the quantized signal, performs inverse quantization, and outputs DCT coefficients.

The inverse DCT circuit 20 receives the DCT coefficient as input, performs inverse DCT, and outputs a reproduced image signal. The reproduced image signal is supplied to the adder 21 together with the output signal of the motion compensation circuit 15. In the frame memory 2 (14),
The output reproduced image of the adder 21 is supplied and stored.

Next, the motion vector detecting method of the present invention will be described below. Various types of motion vector detection methods have been studied, and among them, a method suitable for real-time processing includes hierarchical motion vector detection. In this method, an input image for which motion compensation is performed and a comparison image are horizontally and vertically sub-sampled for each layer, and a reduced image is created in a higher layer.

Then, a large motion vector in a wide range is roughly obtained from the reduced image in the upper hierarchy.
In this method, a motion vector obtained in a lower hierarchy is normalized to a range in an upper hierarchy, and a search is further performed around the position indicated by the motion vector to obtain a motion vector. With this method, a motion vector can be efficiently detected in a wide search range.

FIG. 2 is a conceptual diagram of motion vector detection according to the present invention to which this hierarchical motion vector detection method is applied. In the present invention, as shown in FIG.
1, MVD2, MVD3 for three layers,
Each of the motion vectors is detected.

The input image and the reference image used for each layer are 1/4 (MVD1), 1/2
(MVD2) sub-sampled reduced image and 1 × (MVD2)
D3).

As reference images, MDV1 and MVD2 use original images, and MVD3 uses locally decoded reproduced images. Generally, when an original image is used as a reference image, an image close to a true motion can be obtained.

However, since the final motion vector obtained by the MVD3 is used for motion compensation, a locally decoded reproduced image is used as a reference image in order to reduce a motion compensation prediction error.

First, a motion vector is detected for each block in a predetermined search range around (0, 0) in the MVD1. The MVD2 normalizes the respective motion vectors obtained in the upper layer, and detects and outputs a motion vector for each block in a predetermined search range centered on the position indicated by the motion vector.

In MVD3, the motion vector is normalized,
With the position indicated by the motion vector as a center, a motion vector is detected for each block in a predetermined search range to obtain a final motion vector. And MVD3, MV
Each motion vector of D2 is input to the motion compensation circuit.

FIG. 3 is a block diagram showing a motion compensation process of the encoding apparatus according to the present invention.
As shown in this figure, the motion vector of MVD2 is
Since the detection is performed on an image that has been horizontally and vertically 垂直 subsampled, it is a motion vector for four macroblocks.

Further, the motion vectors are sequentially subjected to difference processing in the slice direction. Therefore, motion compensation is performed for every two macroblocks, and motion compensation for the MVD2 motion vector is performed for a 32 × 16 pixel size.

Also, the motion vector of MVD3 is 16 × 1
This is performed twice for each of the six pixel sizes. As each determination parameter, a square error value of a motion compensation image (difference value) generated by motion compensation, a block activity, and the like are used as the determination parameters. For this comparison, the video bit rate signal is normalized,
Weighting is performed.

As the determination parameters, in the motion compensation, each of the motion vectors (Mv2, Mv30, Mv31) obtained for each block in the motion detection is set in the previous block unit (Mv2: 32 × 16, Mv30, 3).
1: 16 × 16), a difference value between the image shifted from the reproduced image by the motion vector and the input image is obtained, and a square error value, a block activity, and the like for the difference value are used as determination parameters. For example, the square error value is calculated as shown in the following Expression 1, and the block activity (8 × 8) is calculated as shown in Expression 2, and used as a determination parameter (see FIG. 5).

[0041]

(Equation 1)

[0042]

(Equation 2)

For example, the standard video bit rate arbitrarily set is set to 0, and normalized such that it takes a positive (+) value on the low-rate side and a negative (-) value on the high-rate side. Weighting is performed for comparison and discrimination.

When (MC30 + MC31)> (MC2 + Zr), [Mv0 = Mv2; Mv1 = Mv2] When (MC30 + MC31) ≦ (MC2 + Zr), [Mv0 = Mv30; Mv1 = Mv31]

MC2: Decision parameter obtained by performing motion compensation using the motion vector obtained by MVD2 MC30: Decision parameter obtained by performing motion compensation using the motion vector of the first macroblock obtained by MVD3 MC31: Obtained by MVD3 Jr. parameter for which motion compensation has been performed using the motion vector of the second macroblock. Zr: Weighting that normalizes the video bit rate. Mv0: Motion vector of the first macroblock that has been compared and determined. Block motion vector Mv2: Motion vector obtained by MVD2 Mv30: Motion vector of first macroblock obtained by MVD3 Mv31: Motion vector of second macroblock obtained by MVD3

As described above, weighting is performed so that the motion vector obtained by MVD2 on the low rate side and MVD3 on the high rate side can be easily selected. This weighting makes it easier to select a large global motion on the low rate side and a local fine motion vector on the low rate side.

Further, when a motion vector obtained by MVD3 is selected, the same motion vector is used for two adjacent macroblocks, and therefore the code amount of the motion vector itself is reduced. As a result, it is possible to detect a motion vector according to the video bit rate.

FIG. 4 is a diagram showing an embodiment of the configuration of an actual motion vector detection and motion compensation circuit constituting the encoding apparatus of the present invention. The motion vector detection and motion compensation circuit of the present invention includes a sub-sampling unit 41, a frame memory 3 (42), a motion vector detection unit 43, and a memory 4 (4
4) a comparison / determination unit 45 and a motion compensation unit 46;

The input original image signal is supplied to the sub-sampling section 41, and a reduced image is generated as a reference image of a frame temporally before and after the input image used in each layer of MVD1 and MVD2.

The reduced image generated by the sub-sampling section 41 is stored in the frame memory 3 (4) together with the input original image.
It is supplied to 2) and recorded.

In this frame memory 3 (42), M
An original image signal as an input image of VD3 and a reproduced image signal as a reference image are recorded.

In the motion vector detecting section 43, a required image signal is called from the frame memory 3 (42) from the upper layer, and in the MVD2 and MVD3, the memory 4 (4
Using the vector from the upper layer called from 4) as an input, a motion vector is detected for each block in the search range set in each layer, and the detected motion vector is output and recorded in the memory 4 (44). .

The comparison / determination section 45 normalizes the motion vector of the MVD2 called from the memory 4 (44) and records it in the memory 4 (44). The motion vector obtained by the MVD3 and the normalized motion vector of the MVD2 are called from the memory 4 (44) and supplied to the motion compensation unit 46.

The motion compensator 46 receives the respective motion vectors and the reproduced image signal, performs motion compensation prediction, and outputs a parameter serving as a criterion.

The comparison / determination unit 45 receives the parameter and the normalized video bit rate signal as input, performs the comparison / determination, and outputs the result to the motion compensation unit 46. The determination result is supplied from the comparison determination unit 45 to the motion compensation unit 46, and a motion compensation image signal corresponding to the determination result is output to the subtractor 13, and the motion vector and the prediction mode are set to the variable length coding circuit 18. Output to

[0056]

As described above, according to the present invention, according to the set video bit rate, motion compensation according to the rate can be performed. Reduce the amount. Especially HD
When this method is used for a TV or the like, since the basic resolution of the HDTV is high, it is easy to ensure the accuracy even in the motion vector detection using a low-resolution reference image. At a high rate, it is possible to perform motion compensation corresponding to fine motion of a video.

[Brief description of the drawings]

FIG. 1 is a diagram showing a block configuration of an embodiment of a video signal encoding device and a method thereof according to the present invention.

FIG. 2 is a diagram illustrating a concept of a motion vector detection method to which a video signal encoding apparatus and a method of the present invention are applied.

FIG. 3 is a diagram showing a configuration of a motion compensation processing of an embodiment of the motion vector detection device of the present invention.

FIG. 4 is a diagram showing an embodiment of an actual configuration of a motion vector detection and motion compensation circuit constituting the encoding apparatus of the present invention.

FIG. 5 is a diagram for describing a case of block activity (8 × 8) which is a determination parameter of the encoding device of the present invention.

FIG. 6 is a diagram showing a block configuration of an example of a conventional video signal encoding device and a method thereof.

[Explanation of symbols]

 Reference Signs List 11 frame memory 1 12 motion detector 13 subtractor 14 frame memory 2 15 motion compensation circuit 16 DCT circuit 17 quantization circuit 18 variable length coding circuit 19 inverse quantization circuit 20 inverse DCT circuit 21 adder 41 subsampling unit 42 frame Memory 3 43 Motion vector detector 44 Frame memory 4 45 Comparison / determination unit 46 Motion compensation unit

Claims (2)

[Claims] A video signal encoding apparatus for encoding a difference between an input video signal and a reproduced motion-compensated video signal and performing local decoding on the basis of the encoded signal to obtain a reproduced signal. Motion vector detecting means for detecting a plurality of different layers of motion vectors using: a plurality of different layers of motion vectors and the reproduced video signal from the motion vector detecting means are supplied, and the respective motion compensation predictions are performed. A motion compensation means for outputting a judgment parameter serving as a judgment criterion, performing a predetermined weighting process according to a set video bit rate, and comparing each judgment parameter supplied from the motion compensation means to select a motion vector. Comparing means for outputting a motion compensated video signal based on the motion vector from the motion compensating means. Video signal encoding apparatus characterized by a. 2. A video signal encoding method for encoding a difference between an input video signal and a reproduced motion compensated video signal and performing local decoding on the basis of the encoded signal to obtain a reproduced signal. A motion vector detecting step of detecting a plurality of different hierarchical motion vectors by using the motion vector detecting step, a plurality of different hierarchical motion vectors from the motion vector detecting step and the reproduced video signal are supplied, and respective motion compensation predictions are performed. A motion compensation step of outputting a judgment parameter serving as a judgment criterion, and performing a predetermined weighting process according to a set video bit rate, and comparing each judgment parameter supplied from the motion compensation step to select a motion vector. And a comparison method for outputting a motion compensation video signal based on the motion vector from the motion compensation step. Image signal encoding method characterized by being configured and a step.