JP2001298014A - Method of manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem in which a very accurate aligning operation is required when an electrode is formed on the top surface of a projection in the manufacture of a semiconductor device, and semiconductor devices are deteriorated in yield and increased in manufacturing cost. SOLUTION: This manufacturing method comprises a step of forming a semiconductor layer on a substrate, a step of forming an electrode material on the semiconductor layer, a step of forming an etching mask on the electrode material, a step of etching the electrode material using the etching mask, a step of removing a part of the mask affected by etching from the mask, a step of enlarging the mask in coverage by deforming an unaffected part of the mask, a step of etching a semiconductor layer using the etching mask enlarged in converge, and a step of removing the etching mask.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device suitable for manufacturing a ridge type semiconductor laser or a vertical cavity surface emitting laser used for optical communication, optical information processing and the like. It relates to a manufacturing method.

[0002]

2. Description of the Related Art In recent years, researches on surface emitting lasers have been actively conducted in the fields of optical communication and optical information processing because of their low power consumption and high integration density. A typical size of the element in the in-plane direction is several μm to several tens μm in diameter and several μm in depth. As a method for manufacturing such a surface emitting laser, for example, there is a method disclosed in JP-A-8-250817. A method for manufacturing the device disclosed in the publication will be described with reference to FIG.

[0003] First, as shown in FIG.
The lower multilayer reflector 403, the spacer layer 405b, the active layer 404, the spacer layer 405a, and the upper multilayer reflector 40
2 is grown by a growth method such as a metal organic chemical vapor deposition (MOCVD) method or a molecular beam epitaxial (MBE) method. Next, a silicon dioxide film 409 is formed on the upper multilayer reflector 402 by using a chemical vapor deposition (CVD) method.

Next, a circular resist pattern is formed on the silicon dioxide film 409 by using a known method such as photolithography or electron beam lithography, and the resist pattern is used as an etching mask. Etching (RIE) is performed to transfer a resist pattern to the silicon dioxide film. At this time, a mixed gas of carbon tetrafluoride and hydrogen is used as an etching gas. Thereafter, the resist is removed by oxygen plasma, and reactive ion beam etching (RIBE) is performed using the silicon dioxide film as an etching mask. At this time, as shown in FIG. 4B, etching is performed up to the substrate 407 to form a columnar structure. At this time, a chlorine gas can be used as an etching gas.

Next, RIBE is performed by wet etching.
After removing the process-induced damage caused by the above, a passivation film is formed on the side surface by immersion in an ammonium sulfide solution in which diphosphorus pentasulfide is dissolved, and then a semiconductor thin film is selectively grown on the side wall by MOCVD (not shown). . Next, FIG.
As shown in (c), the columnar structure is embedded with polyimide 408, and the polyimide is etched using oxygen plasma to expose the top of the column.
9 is removed, and the electrodes 406 are formed using photolithography.
To form Finally, the back surface is polished to form a back surface electrode (not shown) avoiding the light output portion.

[0006]

In the manufacturing method disclosed in the above publication, positioning is necessary to form an electrode on the top of the column. However, as described above, since the size of these elements in the in-plane direction is extremely small, having a diameter of several μm or less, a high degree of alignment was required to form an electrode on the upper surface of the projection. In particular, when a large number of elements are integrated in a plane, extremely accurate alignment is required, which causes problems such as a decrease in yield and an increase in manufacturing cost.

The present invention has been made in view of the above-mentioned conventional problems, and has as its object to provide a method of manufacturing a semiconductor device capable of forming electrodes in a so-called self-alignment without requiring advanced alignment. Is to provide.

[0008]

SUMMARY OF THE INVENTION An object of the present invention is to form a semiconductor layer on a substrate, form an electrode material on the semiconductor layer, and form an etching mask on the electrode material. Performing the step of etching the electrode material using the etching mask, removing the altered portion of the etching mask that has been altered by etching, and etching by deforming a portion of the etching mask that has not been altered by etching. A method of manufacturing a semiconductor device, comprising: a step of enlarging an area covered by a mask, a step of etching the semiconductor layer using an etching mask having an enlarged area to be covered, and a step of removing the etching mask. Achieved.

[0009]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a view for explaining one embodiment of a method for manufacturing a semiconductor device according to the present invention. First, as shown in FIG.
A first substance 102 is stacked thereon, and an etching mask 104 is formed over the base. The first substance 102 is a material to be an electrode of an element. In this case, a protective film may be formed on the electrode material. It is assumed that a required semiconductor layer is formed on the semiconductor substrate 100. As a method for forming the etching mask 104, for example, a photolithography method or the like can be used.

Next, as shown in FIG. 1B, a first substance (electrode material) 10 is formed using this etching mask 104.
2 is performed. As this etching method,
For example, reactive ion etching (RIE) or the like is used. At this time, depending on the etching method, part of the etching mask may be altered. In FIG. 1B, reference numeral 104a denotes a portion of the etching mask 104 that has not been altered by etching, and reference numeral 104b denotes a portion of the etching mask 104 that has been altered by etching.

Next, as shown in FIG. 1C, a portion 104b of the etching mask 104 that has been altered by etching is removed. Next, as shown in FIG. 1D, a portion 104a of the etching mask 104 that has not been altered by the etching is deformed into a portion 104c so that the first material 102 is completely covered. afterwards,
As shown in FIG. 1E, the semiconductor layer on the semiconductor substrate 100 is etched using an etching mask 104c which is deformed so as to completely cover the first substance 102. This etching includes reactive reactive ion beam etching (RIBE) and inductively coupled plasma (ICP)
Dry etching or wet etching with high anisotropy, such as etching, can be used.

In this case, the etching mask 104c
Since the first substance 102 is completely covered, an undesired effect of the first substance 102 on the etching characteristics of the semiconductor substrate (semiconductor layer) 100 can be avoided.
Conversely, undesired effects on the first substance 102 due to etching of the semiconductor substrate (semiconductor layer) 100 can be avoided. Further, since there is no need to consider the influence of the first substance 102, the choice of an etching method for the semiconductor substrate (semiconductor layer) 100 is increased, and a suitable method can be appropriately selected. After that, the etching mask 104c is removed as shown in FIG. Through the above steps, an element which requires etching of the first substance 102 and the semiconductor layer can be manufactured only by a so-called self-alignment step without advanced alignment.

Here, in this embodiment, an etching mask formed on the substrate uses a substance mainly composed of an organic compound. In addition, so-called dry etching, which uses plasma or the like for one or both of the etching of the first material and the semiconductor layer, is used. If a photoresist or the like is used as the etching mask 104,
A minute pattern can be formed by using photolithography for patterning. In addition, by using dry etching using plasma for one or both of the etching of the first substance and the semiconductor layer,
Even with a fine pattern, etching with good controllability and high anisotropy can be performed. In particular, by using dry etching for etching a semiconductor layer, a minute element having vertical and smooth side surfaces can be manufactured with good controllability, and is particularly suitable for manufacturing an optical semiconductor element such as a semiconductor laser.

Further, as a method for removing the deteriorated portion of the etching mask, a method using oxygen plasma or ozone is used. After removing the deteriorated portion, the etching mask is heated to enlarge a region covered by the etching mask. I have. When an organic compound such as a photoresist is used as the etching mask 104, the deteriorated portion 104b due to the etching can be easily removed by using oxygen plasma or the like. In addition, even if ultraviolet light and ozone are used, the deteriorated portion 104b by etching can be removed. By heating to an appropriate temperature after removing the altered portion 104b by etching, the etching mask 104 can be softened and the covering area can be easily enlarged. Further, by heating in this manner, the roughness of the edge of the etching mask is reduced, and there is also an effect that the edge becomes smoother.

Further, when etching the semiconductor layer, reactive ion beam etching (RIBE) and inductively coupled plasma etching (ICP) are used. As a method of etching a semiconductor layer, reactive ion beam etching (RIBE) or inductively coupled plasma etching (I
By using CP), etching having vertical and smooth side surfaces can be performed with high accuracy. In particular, it is effective for integration of minute optical semiconductor elements. As described above, in this embodiment, a minute semiconductor element such as a surface emitting laser can be manufactured by a so-called self-alignment process that does not require alignment.

Next, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1) FIG. 2 is a diagram showing a first embodiment of the present invention. In this embodiment, InP and InGaAs are used.
A case in which a ridge-type semiconductor laser is manufactured using a semiconductor laser substrate on which P is stacked will be described as an example. First, FIG.
As shown in (a), n-InP substrate 200 has n-InP
P cladding layer 202, InGaAsP light guide layer 20
4. Non-doped multiple quantum well (MQW) active layer 206 made of InGaAsP and InGaAs, p-InGaAs
sP light guide layer 208, p-InP cladding layer 210,
A p-InGaAsP cap layer 212 is sequentially grown epitaxially by metal organic chemical vapor deposition (MOVPE) to produce a laser substrate, on which 50 nm of Ti, Au
A 200 nm film is formed by sputtering sequentially, and the electrode material 2
13 was formed. As shown in FIG. 2A, a positive photoresist containing a novolak resin as a main component was spin-coated thereon, and a stripe-shaped resist mask 214 having a width of 5 μm and a height of 3 μm was formed by photolithography.

Next, as shown in FIG. 2B, dry etching is performed using this etching mask 214,
The electrode material 213 was patterned. In this embodiment, a parallel plate type dry etching apparatus is used,
The etching of Au uses Ar gas, and the high frequency power 200
This was performed for 15 minutes under the conditions of W and an etching pressure of 0.5 Pa. Dry etching was performed for 5 minutes under the conditions of high-frequency power of 200 W and etching pressure of 3 Pa using CF4 gas for Ti etching. At the end of the dry etching of the electrode, the resist mask 214 has receded, and the patterned electrode 213 is
Partly protrudes from 14.

Next, as shown in FIG. 2 (c), a portion 214b of the resist mask 214 that has been altered by dry etching of Au and Ti was removed by ashing with oxygen plasma. Ashing was performed at a high frequency power of 150 W and a pressure of 3 Pa for 40 seconds. Next, as shown in FIG. 2D, the substrate was heated in an oven at 200 ° C. for 1 hour, so that the area covered with the resist mask 214 was enlarged so that the patterned electrode 213 was completely covered. According to the experiments of the present inventor, when the surface layer of the resist mask 214 was not removed by ashing, the area covered by the resist mask did not expand even when heated, and the patterned electrode 213 could not be completely covered. Did not.

Next, as shown in FIG. 2E, the semiconductor layer was dry-etched using a resist mask 214c having an enlarged covering region to form a ridge. In this embodiment, a reactive ion beam etching (RIBE) device using electron cyclotron resonance (ECR) plasma was used as an etching device, and chlorine gas was used as an etching gas. Here, when performing this etching, the etching chamber of the ECR-RIBE apparatus is evacuated by a turbo-molecular pump until a vacuum degree of 3E-6 Pa is reached, then chlorine gas is introduced at 3 SCCM, and the pressure in the chamber is reduced to 1E-2 Pa. Etching was performed under the conditions of ECR plasma power of 200 W, substrate temperature of 280 ° C., and acceleration voltage of 650 V. This etching condition is I
This is selected as a condition for obtaining an etching shape having high perpendicularity to the nP-based compound semiconductor. Under these conditions, etching was performed up to the n-InP cladding layer 202 to form a ridge. The height of the ridge was approximately 2 μm.

Subsequently, as shown in FIG. 2F, ashing with oxygen plasma was performed for 15 minutes under the conditions of high-frequency power of 200 W and pressure of 10 Pa, and the resist mask 214 was removed. Finally, a film of 50 nm of titanium and 500 nm of gold were formed as electrodes on the back surface by sputtering to complete the manufacture of the semiconductor device. Note that the dry etching method and conditions are not limited to those described in this embodiment, and may be appropriately selected depending on a material to be etched, a device to be manufactured, and the like.

(Embodiment 2) Next, a second embodiment of the present invention will be described with reference to FIG. In this embodiment, Japanese Patent Application Laid-Open
GaAs similar to that disclosed in JP 250817
An example in which an s-based surface emitting laser is manufactured will be described.
First, as shown in FIG.
An n-GaAs / AlAs distributed Bragg reflection film 302;
Spacer layer 304, active layer 306, and p-GaAs
A / AlAs distribution Bragg reflection film 308 was sequentially formed to form a laminated structure 310. An anode material 3 made of 50 nm of Ti and 200 nm of Au is formed on the laminated structure 310.
12 was formed by a sputtering method. As shown in FIG. 3A, a positive photoresist containing a novolak resin as a main component was spin-coated thereon, and a resist mask 314 having a diameter of 2 μm and a height of 1.5 μm was formed by photolithography. Next, as shown in FIG. 3B, dry etching was performed using the etching mask 314 to pattern the anode material 312.

In this embodiment, a parallel plate type dry etching device is used, Au gas is etched using Ar gas, high frequency power 200 W, etching pressure 0.5 P
This was performed for 15 minutes under the condition of a. In addition, dry etching was performed for 5 minutes under the conditions of high-frequency power of 200 W and etching pressure of 3 Pa using CF4 gas for etching Ti. At the end of the dry etching of the anode material 312, the resist mask 314 has receded, and the patterned anode material 312 is
A part is protruding from 4.

Next, as shown in FIG. 3 (c), a portion 314b of the resist mask 314 which has been altered by dry etching of Au and Ti was removed by ashing with oxygen plasma. Ashing was performed at a high frequency power of 150 W and a pressure of 3 Pa for 40 seconds. next,
As shown in FIG. 3D, the substrate was heated in an oven at 200 ° C. for 1 hour to enlarge the area covered by the resist mask 314 so that the patterned anode material 312 was completely covered. According to the experiment of the present inventor, when the surface layer of the resist mask 314 is not removed by ashing, the area covered with the resist mask does not expand even if heated, and the patterned anode material 312 can be completely covered. I could not do it.

Next, as shown in FIG. 3E, dry etching of the semiconductor layer was performed using a resist mask 314 having an enlarged covering area. In this embodiment, an etching apparatus using inductively coupled plasma (ICP) was used as an etching apparatus, and a mixed gas of chlorine and argon was used as an etching gas. At this time, etching of about 4 μm was performed under the conditions of a chamber pressure of 0.1 Pa, an ICP power of 300 W, and a bias power of 200 W. Next, as shown in FIG.
Ashing with oxygen plasma was performed for 15 minutes under the conditions of 00 W and a pressure of 10 Pa, and the resist mask 314 was removed.

Finally, Au-Ge50 is used as an electrode on the back surface.
nm and 500 nm of Au were formed by vacuum evaporation to complete the manufacture of the semiconductor device. Note that the etching method and conditions are not limited to those described in this embodiment, and may be appropriately selected depending on a material to be etched, a device to be manufactured, and the like. In the above embodiments, the electrode material (anode material) is formed on the semiconductor layer. However, when etching the semiconductor layer, an etching mask may not be provided depending on conditions. In such a case, by forming a protective layer on the electrode material, the electrode material can be protected when the semiconductor layer is etched.

[0027]

As described above, according to the present invention, an electrode can be formed on a minute convex portion by self-alignment without using a photolithography step requiring alignment, and the electrode can be formed on such a minute convex portion. A semiconductor element having a structure in which an electrode is formed at a high yield can be manufactured at a high yield at low cost. In addition, it is possible to easily form an electrode by self-alignment on a minute convex portion using a conventional method such as spin coating of a photoresist or ashing with oxygen plasma without requiring a special device. In particular, the present invention can be suitably used for manufacturing an optical semiconductor device having an electrode on an upper portion of a ridge type semiconductor laser or a vertical cavity surface emitting laser or the like and requiring a vertical and smooth etching side surface.

[Brief description of the drawings]

FIG. 1 is a view showing one embodiment of a method for manufacturing a semiconductor device of the present invention.

FIG. 2 is a view showing a first embodiment of the manufacturing method of the present invention.

FIG. 3 is a view showing a second embodiment of the manufacturing method of the present invention.

FIG. 4 is a diagram illustrating a method of manufacturing a conventional surface emitting laser.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 100 Substrate 102 1st substance (electrode material) 104 Etching mask 104a Unchanged part 104b Deformed part 104c Deformed part 200 n-InP substrate 202 n-InP clad layer 204 InGaAsP optical guide layer 206 Multiple quantum well (MQW) activity Layer 208 p-InGaAsP light guide layer 210 p-InP cladding layer 212 p-InGaAsP cap layer 213 electrode material 214 resist mask 300 n-GaAs substrate 302 n-GaAs / AlAs distributed Bragg reflective film 304 spacer layer 306 active layer 308 p- GaAs / AlAs distributed Bragg reflection film 310 laminated structure 312 anode material 314 resist mask

Continued on the front page F term (reference) 5F004 BA04 BA20 DA01 DA04 DA24 DA26 DB03 DB26 DB27 EA04 EA08 EA28 EB02 EB08 5F046 LA18 LA19 MA12 MA18 5F073 AA11 AA13 AA45 AA65 AA74 AB17 CA12 DA05 DA16 DA25 DA26 DA31 DA35

Claims (6)

[Claims] A step of forming a semiconductor layer on a substrate, a step of forming an electrode material on the semiconductor layer, a step of forming an etching mask on the electrode material, and etching the electrode material using the etching mask. Performing a step of removing a deteriorated portion of the etching mask that has been altered by etching; a step of expanding a region covered by the etching mask by deforming a portion of the etching mask that has not been altered by etching; A method of etching a semiconductor layer using an enlarged etching mask, and a step of removing the etching mask. 2. The method according to claim 1, wherein the etching mask is made of a material containing an organic compound as a main component. 3. The semiconductor according to claim 1, wherein the etching is performed using dry etching in either one of the electrode material etching step and the semiconductor layer etching step, or both. Device manufacturing method. 4. The method according to claim 1, wherein in the step of removing the altered portion, the altered portion is removed using oxygen plasma or ozone. 5. The method according to claim 1, wherein in the step of enlarging the area covered by the etching mask, the area covered by the etching mask is enlarged by heating the etching mask. Method. 6. The method according to claim 1, wherein in the step of etching the semiconductor layer, the semiconductor layer is etched using reactive ion beam etching or inductively coupled plasma etching.