JP2001281478A - Optical integrated circuit - Google Patents

Optical integrated circuit

Info

Publication number
JP2001281478A
JP2001281478A JP2000089292A JP2000089292A JP2001281478A JP 2001281478 A JP2001281478 A JP 2001281478A JP 2000089292 A JP2000089292 A JP 2000089292A JP 2000089292 A JP2000089292 A JP 2000089292A JP 2001281478 A JP2001281478 A JP 2001281478A
Authority
JP
Japan
Prior art keywords
integrated circuit
optical integrated
receiving element
light receiving
light emitting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2000089292A
Other languages
Japanese (ja)
Inventor
Kohei Shibata
康平 柴田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2000089292A priority Critical patent/JP2001281478A/en
Publication of JP2001281478A publication Critical patent/JP2001281478A/en
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Landscapes

  • Optical Integrated Circuits (AREA)
  • Led Device Packages (AREA)
  • Light Receiving Elements (AREA)
  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To solve a problem that crosstalk noises from a light emitting element easily flow to a light receiving element via a heat radiating plate and receiving performance of the light receiving element is largely restricted when the light emitting element and the light receiving element of the optical integrated circuit are simultaneously operated, with respect to mounting structure of the optical integrated circuit wherein electric crosstalk noises via the heat radiating plate between the light emitting element and the light receiving element of the optical integrated circuit are reduced. SOLUTION: In the optical integrated circuit wherein the light emitting element and the light receiving element are mounted on the insulation layer of the upper surface of the substrate, a metallic plate which covers the rear surface of the substrate and is shaped so that the rear surface of the substrate in the vicinity of the backside of the mounted light receiving element is exposed, is provided.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明の光集積回路は、送受
同時動作の ATM-PON(Asynchronous Transfer Mode-Pass
ive Optical Network)用光通信として、送信と受信に異
なる波長の光を用いる波長分割多重:Wavelength Divisi
on Multiplexing (以下WDM)伝送あるいは2芯ファイバ
を用い各ファイバを送信または受信専用に用いる空間分
割多重Space Division Multiplexing(以下SDM)伝送等
が用いられる。本発明は、光集積回路において、発光素
子が搭載されている送信部から受光素子が搭載されてい
る受信部への電気的クロストークノイズの伝播を抑制す
る構造に関するものである.近年,インターネットなど
に代表されるデータ通信の爆発的需要の増大に伴い,大
容量の光通信に対しても低コスト化,及び更なる伝送効
率の向上が求められている.光集積回路は複数の光素子
を共通基板(プラットフォーム)上にベアチップ実装す
るため,各素子の筐体部品等の削減が可能となり,低コ
スト化の有力な実現方法として注目されている.また,
伝送効率向上に関して,従来の送受時分割方式 TDM
(Time DivisionMultiplexing)またはTCM(Time Compress
ion Multiplexing) から,光波長多重(WDM),空間多
重(SDM)等を用いた送受同時伝送方式への移行が有望
視されている.このような送受同時伝送の光集積回路で
の実現には,受信部の最小受信感度を確保するために,
発光素子を駆動する送信部から受光素子を有する受信部
への電気的クロストーク(送信信号,及びそれに伴うノ
イズの漏れ込み)を抑制することが重要となる。
BACKGROUND OF THE INVENTION An optical integrated circuit according to the present invention comprises an ATM-PON (Asynchronous Transfer Mode-Pass) for simultaneous transmission and reception.
Wavelength division multiplexing using light of different wavelengths for transmission and reception as optical communication for (ive Optical Network): Wavelength Divisi
On multiplexing (hereinafter WDM) transmission or space division multiplexing (hereinafter SDM) transmission using a two-core fiber and using each fiber exclusively for transmission or reception is used. The present invention relates to a structure for suppressing the propagation of electrical crosstalk noise from a transmitting section having a light emitting element to a receiving section having a light receiving element in an optical integrated circuit. In recent years, with the explosive demand for data communication represented by the Internet and the like, cost reduction and further improvement of transmission efficiency are required for large-capacity optical communication. In optical integrated circuits, multiple optical devices are mounted on a common substrate (platform) as a bare chip, so that the number of housing components for each device can be reduced, and it is attracting attention as an effective method of reducing costs. Also,
In order to improve transmission efficiency, the conventional transmission / reception time division method TDM
(Time Division Multiplexing) or TCM (Time Compress
It is promising that the transition from ion multiplexing to simultaneous transmission and reception using WDM, SDM, etc. To realize such simultaneous transmission and reception in an optical integrated circuit, in order to secure the minimum receiving sensitivity of the receiver,
It is important to suppress electrical crosstalk (transmission signal and noise accompanying the transmission signal) from the transmission unit that drives the light emitting element to the reception unit that has the light receiving element.

【0002】[0002]

【従来の技術】図8にTDM伝送用で用いられていた従来
の光集積回路の実装構造を示す。従来の光集積回路の実
装構造では、電気絶縁層1(光導波層として用いる)を
有する同一の基板基板2上に送信電極3,受信電極4が
形成され,それぞれの電極上に発光素子5,受光素子6
が搭載される.また、それぞれの電極は発光素子5,受
光素子6を駆動するために、外部(プリント基板,LSI
等)とボンディングワイヤ7等によって接続される。さ
らに、発光素子5,受光素子6が電気絶縁層を介して同
一共通基板上にハイブリッド実装された光集積回路全体
を,(多くの場合,金属製の)リードフレーム(又はペ
ルチェ素子)等の放熱板8上に実装する.従来の光集積
回路として、放熱板8のような放熱構造が必要性につい
て、以下に述べる。
2. Description of the Related Art FIG. 8 shows a mounting structure of a conventional optical integrated circuit used for TDM transmission. In a conventional mounting structure of an optical integrated circuit, a transmitting electrode 3 and a receiving electrode 4 are formed on the same substrate 2 having an electric insulating layer 1 (used as an optical waveguide layer), and a light emitting element 5 and a light emitting element 5 are formed on the respective electrodes. Light receiving element 6
Is installed. Each electrode is connected to an external device (printed circuit board, LSI
) And the bonding wires 7. Further, the entire optical integrated circuit in which the light emitting element 5 and the light receiving element 6 are hybrid-mounted on the same common substrate via an electrical insulating layer is dissipated by a lead frame (or a Peltier element) or the like (often made of metal). It is mounted on the board 8. The necessity of a heat dissipation structure such as the heat dissipation plate 8 as a conventional optical integrated circuit will be described below.

【0003】光集積回路に用いられる発光素子5は,発
光素子(LD )の内部抵抗により発光の際,自己発熱す
る。更に一般に高温になるほど発光に必要な電流が増加
し発光しづらくなるため、使用温度範囲が制限されてい
る。
A light emitting element 5 used in an optical integrated circuit generates heat when emitting light due to the internal resistance of the light emitting element (LD). Further, in general, the higher the temperature is, the more the current required for light emission increases, making it difficult to emit light. Therefore, the operating temperature range is limited.

【0004】従って、発光素子5を光モジュールに搭載
する場合には,使用温度範囲を満足するために,発光素
子5が搭載される光集積回路基板の実装構造に、金属製
の放熱板(リードフレーム)または,ペルチェ効果を利
用した温度制御素子(金属製)上への搭載などの放熱構
造を設ける必要がある。
Therefore, when the light emitting element 5 is mounted on an optical module, a metal heat sink (lead) must be mounted on the mounting structure of the optical integrated circuit board on which the light emitting element 5 is mounted in order to satisfy the operating temperature range. It is necessary to provide a heat dissipation structure such as mounting on a frame) or a temperature control element (made of metal) using the Peltier effect.

【0005】また、発光素子と受光素子とが同一基板上
にハイブリッド実装した小型の光送受信デバイスでは、
送信部である発光素子を駆動するため数10mAの電流が流
れるのに対し、受信部ではμAオーダーかそれ以下の小
さな電流が流れる。このため、受信部での受信性能に影
響がないようにするには、送信部からのクロストークに
よって受信部に流れる電流は10nA〜100nAオーダーであ
ることが求められている。
[0005] In a small optical transmitting and receiving device in which a light emitting element and a light receiving element are hybrid-mounted on the same substrate,
While a current of several tens of mA flows to drive the light emitting element which is a transmitting unit, a small current of the order of μA or less flows in the receiving unit. For this reason, in order not to affect the receiving performance in the receiving unit, it is required that the current flowing in the receiving unit due to crosstalk from the transmitting unit is in the order of 10 nA to 100 nA.

【0006】また、図9では、従来の送受一体型ハイブ
リッド光集積回路での送受間電気クロストーク伝搬経路
を説明する図である。
FIG. 9 is a diagram for explaining a transmission / reception electric crosstalk propagation path in a conventional integrated transmission / reception hybrid optical integrated circuit.

【0007】同図においては、説明の簡略化のために必
要最小限の構成要素のみを図示している。発光素子(レ
ーザ・ダイオード:LD)5と受光素子(フォト・ダイ
オード:PD)6をハイブリッド実装する光送受信デバ
イスにおいては、共通基板2の上に光導波層(酸化膜(S
iO2 ))1を形成し、その上に電極3、4を形成する。そ
して、電極3、4に発光素子5及び受光素子6を搭載するよ
うに構成される。共通基板2の裏面を接地するための放
熱板が取り付けられる。
[0007] In the figure, only the minimum necessary components are shown for simplification of the description. In an optical transmitting and receiving device in which a light emitting element (laser diode: LD) 5 and a light receiving element (photo diode: PD) 6 are mounted in a hybrid manner, an optical waveguide layer (oxide film (S
iO2)) 1, and electrodes 3 and 4 are formed thereon. The light emitting element 5 and the light receiving element 6 are mounted on the electrodes 3 and 4, respectively. A heat sink for grounding the back surface of the common substrate 2 is attached.

【0008】送信部である発光素子5と受信部である受
光素子6が同一基板2上に存在する光集積回路では、発
光素子5を動作させることによって発生したクロストー
クノイズが受信素子6に伝播する。そのノイズが、 伝播
経路として3つが考えられる。まず、第1の経路として、
発光素子5から空中の浮遊容量9を介して受光素子6へク
ロストークノイズが流れる経路がある。第2の経路とし
て、発光素子5から送信部下対基板容量11、基板抵抗1
4、受信部下対基板容量11を介して受光素子6へクロスト
ークノイズが流れ経路がある。第3の経路として、発光
素子5から送信部下対基板容量11,基板抵抗16,GND共通
インピーダンス(インダクタンス17),基板抵抗15,受
信部下対基板容量10[又は送信部下対放熱板容量13,GN
D共通インピーダンス(インダクタンス17),受信部下
対放熱板容量12]を介して受光素子6へクロストークノ
イズが流れる経路である。
In an optical integrated circuit in which a light emitting element 5 as a transmitting section and a light receiving element 6 as a receiving section are present on the same substrate 2, crosstalk noise generated by operating the light emitting element 5 propagates to the receiving element 6. I do. There are three possible noise propagation paths. First, as the first route,
There is a path through which crosstalk noise flows from the light emitting element 5 to the light receiving element 6 via the floating capacitance 9 in the air. As a second path, from the light emitting element 5 to the lower part of the transmission unit to the substrate capacitance 11, the substrate resistance 1
4. There is a path through which crosstalk noise flows to the light receiving element 6 via the lower part of the receiving part and the substrate capacitance 11. As a third path, from the light emitting element 5 to the lower part of the transmission unit 11, the substrate resistance 16, the GND common impedance (inductance 17), the substrate resistance 15, the lower part of the substrate capacitance 10 [or the lower part of the transmission unit 13 and the GN
This is a path through which crosstalk noise flows to the light receiving element 6 via the D common impedance (inductance 17) and the lower portion of the receiving section versus the heat sink plate 12].

【0009】更に要求される信号伝送速度が増加するに
つれ,光集積回路実装における電気的クロストークノイ
ズの第1、第2及び第3の経路の伝播量は、第1 の経路<
第2の経路≦第3の経路となっていく。これは第1 の経路
において、電気的クロストークノイズ量が周波数特性に
おいて一次傾斜で増加する。また、第3 の経路におい
て、電気クロストーク量は二次以上の傾斜で増加する。
第2の経路と第3の経路との比較において、GNDの寄生素
子17は周波数の増加に伴いハイインピーダンスとなるた
めクロストークノイズがGNDへ逃げ難くなる。この周波
数の増加傾向は、信号伝送速度の増加と関連している。
更に共通基板2の厚さより発光素子と受光素子間の距離
が長い場合には,基板抵抗15+基板抵抗16<基板抵抗14
となるので,第3 の経路の方が第2 の経路よりも発光素
子と受光素子間とがローインピーダンスとなって行くた
めである。
[0009] As the required signal transmission speed further increases, the propagation amounts of electrical crosstalk noise in the first, second, and third paths in the optical integrated circuit mounting are reduced by the first path <
The second path ≦ the third path. This means that in the first path, the amount of electrical crosstalk noise increases with a first-order slope in the frequency characteristic. In the third path, the amount of electric crosstalk increases with a second-order or higher gradient.
In the comparison between the second path and the third path, the parasitic element 17 of GND becomes high impedance as the frequency increases, so that it is difficult for the crosstalk noise to escape to GND. This increasing trend in frequency is associated with an increase in signal transmission speed.
Further, when the distance between the light emitting element and the light receiving element is longer than the thickness of the common substrate 2, the substrate resistance 15 + the substrate resistance 16 <the substrate resistance 14
This is because the third path has a lower impedance between the light emitting element and the light receiving element than the second path.

【0010】つまり、第2の経路よりローインピーダン
スの第3の経路がノイズを受光素子へ流し易くなる。
That is, the third path having a lower impedance than the second path makes it easier for noise to flow to the light receiving element.

【0011】従って,光集積回路の送受同時動作への適
用においては,特に放熱板経由の電気的クロストークノ
イズによる受信部への受信影響が問題となってくる。
Therefore, in the application to the simultaneous transmission and reception operation of the optical integrated circuit, there is a problem in particular that the influence of the electric crosstalk noise via the heat sink on the receiving unit to the receiving unit.

【0012】本発明は、光集積回路の発光素子と受光素
子間での放熱板経由の電気的クロストークノイズを低減
する光集積回路の実装構造を目的とする。
An object of the present invention is to provide an optical integrated circuit mounting structure for reducing electrical crosstalk noise between a light emitting element and a light receiving element of an optical integrated circuit via a heat sink.

【0013】[0013]

【課題を解決するための手段】本発明では上記課題を解
決するために、基板表面の絶縁層に発光素子と受光素子
とが実装された光集積回路で、基板裏面を覆い、受光素
子実装下付近を基板裏面が露出するような形状にした金
属板を設ける構成とする。
According to the present invention, in order to solve the above-mentioned problems, an optical integrated circuit in which a light emitting element and a light receiving element are mounted on an insulating layer on the surface of the substrate is provided. A configuration is provided in which a metal plate having a shape such that the rear surface of the substrate is exposed in the vicinity is provided.

【0014】さらに、基板表面の絶縁層に発光素子と受
光素子とが実装された光集積回路で、複数に分けて、前
記基板裏面を覆う金属板を設ける構成とする。また、光
集積回路の基板表面の絶縁層上で、且つ前記発光素子と
前記受光素子の間に、導電性のパターンを形成する。
Further, in the optical integrated circuit in which the light emitting element and the light receiving element are mounted on the insulating layer on the surface of the substrate, a metal plate for covering the back surface of the substrate is provided in a plurality. Further, a conductive pattern is formed on the insulating layer on the substrate surface of the optical integrated circuit and between the light emitting element and the light receiving element.

【0015】一般に受光素子の発熱量は発光素子に比べ
非常に少ないため,発光素子のような放熱構造を必要と
しない場合が多い。本発明ではこの事を利用し,受光素
子(受信部)に対する放熱構造を上記手段(形状)のよ
うに簡易化(または削除)した実装形態とすることで,
発光素子の放熱構造から受光素子への電気クロストーク
の伝播を抑制する。
In general, the amount of heat generated by the light receiving element is much smaller than that of the light emitting element, so that a heat radiation structure such as a light emitting element is not required in many cases. In the present invention, utilizing this fact, the heat radiation structure for the light receiving element (receiving unit) is simplified (or deleted) as in the above-described means (shape), and the mounting form is improved.
The propagation of electric crosstalk from the heat radiation structure of the light emitting element to the light receiving element is suppressed.

【0016】また発光素子の放熱性に対しては,該発光
素子用放熱板の一部分のみを削除するため,十分な放熱
経路を確保できる。
Further, with respect to the heat radiation property of the light emitting element, since only a part of the heat sink for the light emitting element is deleted, a sufficient heat radiation path can be secured.

【0017】[0017]

【発明の実施の形態】以下、本発明の実施の形態を図面
を参照して説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0018】図1は、本発明の送受信間電気クロストー
クを抑制する光集積回路と放熱板との実装形態を示す。
FIG. 1 shows a mounting form of an optical integrated circuit and a heat sink for suppressing electric crosstalk between transmission and reception according to the present invention.

【0019】図1に示すように、発光素子5と受光素子
6が同一基板上に電気絶縁層を介して実装された光集積
回路の搭載面を兼ねる発光素子の放熱板が受光素子6よ
り放熱板18 へ垂下した点を中心に、受光素子6から垂
下して放熱板18に接した距離をdhより大きくなるような
放熱板18と受光素子6との距離dlとし、d1の2の
べき乗からdhの2のべき乗を引いた値を2の平方根と
する値を半径とし、垂下した点を中心とする円を取り除
いた形状とする。
As shown in FIG. 1, a radiating plate of a light emitting element which also serves as a mounting surface of an optical integrated circuit in which a light emitting element 5 and a light receiving element 6 are mounted on the same substrate via an electrical insulating layer radiates heat from the light receiving element 6. The distance d1 between the heat radiating plate 18 and the light receiving element 6 such that the distance from the light receiving element 6 and the contact with the heat radiating plate 18 becomes larger than dh around the point where the light is radiated to the plate 18 is determined. The value obtained by subtracting the power of dh to the power of 2 is the radius of the square root of 2, and the shape is obtained by removing the circle centered on the hanging point.

【0020】また、この放熱板形状として、受光素子実
装下付近を基板裏面が露出するような形状にしている。
さらに、その複数に分け、発光素子側と受光素子側とに
それぞれに設ける放熱板が電気的に接触しないようにす
る。
The shape of the heat sink is such that the back surface of the substrate is exposed in the vicinity of the area under the light receiving element.
Further, the heat radiating plates provided on the light emitting element side and the light receiving element side are divided so as not to make electrical contact with each other.

【0021】その結果,最小受信レベルに関する仕様値
(許容されるクロストーク量を規定)を満足するように
dhの値を決定することにより,発光素子の放熱性と送受
同時動作を両立することができ, ハイブリッド光集積
回路のSDM,WDM伝送への適応が可能となる。
As a result, the specified value (specifying the allowable crosstalk amount) relating to the minimum reception level is satisfied.
By determining the value of dh, it is possible to achieve both the heat dissipation of the light emitting element and the simultaneous operation of transmission and reception, making it possible to apply the hybrid optical integrated circuit to SDM and WDM transmission.

【0022】図2は、本発明の第1の実施形態のハイブ
リッド光集積回路の実装構造を示す。
FIG. 2 shows a mounting structure of the hybrid optical integrated circuit according to the first embodiment of the present invention.

【0023】第1の実施形態は、発光素子5と受光素子
6が共通基板2上の電気絶縁層1上に実装されたハイブ
リッド光集積回路を示す。
The first embodiment shows a hybrid optical integrated circuit in which a light emitting element 5 and a light receiving element 6 are mounted on an electric insulating layer 1 on a common substrate 2.

【0024】ハイブリッド光集積回路の搭載面を兼ねる
発光素子の放熱板18が,発光素子5と受光素子6が同一
基板上に電気絶縁層を介して実装された光集積回路の搭
載面を兼ねる発光素子の放熱板が受光素子6より放熱板
18 へ垂下した点を中心に、受光素子6から垂下して放
熱板18に接した距離をdhより大きくなるような放熱板1
8と受光素子6との距離dlとし、d1の2のべき乗か
らdhの2のべき乗を引いた値を2の平方根とする値を
半径とし、垂下した点を中心とする円をくり抜いた形状
とする。
A radiating plate 18 of the light emitting element also serving as a mounting surface of the hybrid optical integrated circuit is provided with a light emitting device 18 also serving as a mounting surface of the optical integrated circuit in which the light emitting element 5 and the light receiving element 6 are mounted on the same substrate via an electrical insulating layer. The heat sink of the element is a heat sink from the light receiving element 6.
Heat sink 1 such that the distance from the light receiving element 6 to the heat sink 18 is greater than dh around the point of the heat sink 18.
The radius is a value obtained by subtracting the power of dh to the power of 2 from the power of 2 of d1 to the distance dl between the light receiving element 8 and the light receiving element 6, and the radius is the square root of 2; I do.

【0025】図2ではdh,dl及び放熱板で指定される三
角錐の底面の円を放熱板から取り除いた放熱板の形状と
している。
In FIG. 2, the shape of the heat sink is such that the bottom circle of the triangular pyramid designated by dh, dl and the heat sink is removed from the heat sink.

【0026】上記指定のdlの長さは受光素子6と放熱板1
8との間の受信部下対放熱板容量20,および共通基板2の
直列抵抗値21を決まると、発光素子5から放熱板18を
介して受光素子6へ伝播するクロストークノイズの伝播
量が決まる。
The specified dl length is equal to the light receiving element 6 and the heat sink 1
When the capacitance 20 and the series resistance 21 of the common substrate 2 are determined between the lower part 8 and the receiver unit 8, the propagation amount of the crosstalk noise that propagates from the light emitting element 5 to the light receiving element 6 via the heat sink 18 is determined. .

【0027】許容されるクロストーク伝播量は,ハイブ
リッド光集積回路が使用されるシステムの仕様から決定
されるため,dhの長さはシステム毎に異なる.図3は、
本発明の第2の実施形態のハイブリッド光集積回路の実
装構造を示す。第2の実施形態は、発光素子5と受光素
子6が共通基板2上の電気絶縁層1上に実装されたハイ
ブリッド光集積回路を示す。
Since the allowable crosstalk propagation amount is determined from the specifications of the system in which the hybrid optical integrated circuit is used, the length of dh differs for each system. FIG.
7 shows a mounting structure of a hybrid optical integrated circuit according to a second embodiment of the present invention. The second embodiment shows a hybrid optical integrated circuit in which a light emitting element 5 and a light receiving element 6 are mounted on an electric insulating layer 1 on a common substrate 2.

【0028】ハイブリッド光集積回路の搭載面を兼ねる
放熱板が発光素子用22と受光素子用23とに別々に分けて
用意し,受光素子6より放熱板18 へ垂下した点を中心
に、受光素子6から垂下して放熱板18に接した距離をdh
と,放熱板18と受光素子6との距離dlとの関係がdh<dl
となるような形状を有する。
A radiator plate also serving as a mounting surface of the hybrid optical integrated circuit is separately prepared for the light emitting element 22 and the light receiving element 23, and the light receiving element is centered on the point where the light receiving element 6 hangs down to the heat radiating plate 18. Dh is the distance of the heat sink 18
And the distance dl between the heat sink 18 and the light receiving element 6 is dh <dl
It has a shape such that

【0029】受光素子用放熱板23と発光素子用放熱板22
とは少なくとも,ハイブリッド光集積回路の放熱板側の
面において接触しないような形状とする。 ただし、受
光素子用放熱板23と発光素子用放熱板22との間にも寄生
容量等が存在するため,受光素子用放熱板23は可能な限
り小型化し,発光素子用放熱板22と離して設置すること
が望ましい。
Heat sink 23 for light receiving element and heat sink 22 for light emitting element
Is a shape that does not contact at least on the surface on the heat sink side of the hybrid optical integrated circuit. However, since there is parasitic capacitance between the heat sink 23 for the light receiving element and the heat sink 22 for the light emitting element, the heat sink 23 for the light receiving element is made as small as possible and is separated from the heat sink 22 for the light emitting element. It is desirable to install.

【0030】図4は、本発明の第3の実施形態のハイブ
リッド光集積回路の実装構造を示す。第3の実施形態
は、第1の実施形態の実装構造に、特に放熱板のハイブ
リッド光集積回路搭載部分22が矩形となっているもので
ある。
FIG. 4 shows a mounting structure of a hybrid optical integrated circuit according to a third embodiment of the present invention. In the third embodiment, the mounting structure of the first embodiment has a rectangular shape, particularly the hybrid optical integrated circuit mounting portion 22 of the heat sink.

【0031】図5は、本発明の第4の実施形態のハイブ
リッド光集積回路の実装構造を示す。第4の実施形態
は、ハイブリッド光集積回路上に発光素子5と受光素子
6の間に,導電性トラップパターン24を形成する.ただ
し受光素子6が実装される受信部に対する導電性トラッ
プパターン24の位置は放熱板22の受信部最短距離dlより
近づかないことが望ましい。第4の実施形態では、電気
的クロストークのうち放熱板経由(10,15,17,16,11又は
12,17,13)の他に送受間浮遊容量9経由による電気的ク
ロストークの低減も行う。発光素子5 が実装される送信
部とトラップパターン24との間の容量結合により送信部
に発生したノイズ電荷を相殺するように導電性トラップ
パターン22上に電荷が誘導されるため,受信部には相殺
されなかった分の電荷が誘導されるにとどまり,送受間
浮遊容量9による電気的クロストークを低減する。
FIG. 5 shows a mounting structure of a hybrid optical integrated circuit according to a fourth embodiment of the present invention. In the fourth embodiment, a conductive trap pattern 24 is formed between a light emitting element 5 and a light receiving element 6 on a hybrid optical integrated circuit. However, it is desirable that the position of the conductive trap pattern 24 with respect to the receiving section on which the light receiving element 6 is mounted does not approach the receiving section shortest distance dl of the heat sink 22. In the fourth embodiment, electric crosstalk is transmitted through a heat sink (10, 15, 17, 16, 11 or
In addition to (12, 17, 13), reduction of electrical crosstalk via the stray capacitance 9 between transmission and reception is also performed. Since charges are induced on the conductive trap pattern 22 so as to cancel noise charges generated in the transmission unit due to capacitive coupling between the transmission unit in which the light emitting element 5 is mounted and the trap pattern 24, the reception unit Only the charge that is not canceled is induced, and the electric crosstalk due to the stray capacitance 9 between the transmission and the reception is reduced.

【0032】図6は、本発明の第5の実施形態のハイブ
リッド光集積回路の実装構造を示す。第5の実施形態で
は、トラップパターン24と放熱板22をワイヤボンディン
グ25等により,電気的に接続する。その接続により放熱
板22とトラップパターン24が電気的に同相になり,第4
の実施形態の構造よりさらに,送受間浮遊容量9による
クロストークを抑制できる。さらに、本発明の第1 〜第
5の実施形態の構造において特に,kΩcmオーダー以上の
抵抗率を有する材料を共通基板2に用いる。これにより
共通基板2を介した送受間抵抗14,15,16が放熱板22の実
装による寄生抵抗(送受間の共通インピーダンス17)に
比べ十分に大きな値となり,基板及び放熱板経由の電気
クロストークを低減できる。
FIG. 6 shows a mounting structure of a hybrid optical integrated circuit according to a fifth embodiment of the present invention. In the fifth embodiment, the trap pattern 24 and the heat sink 22 are electrically connected by wire bonding 25 or the like. By the connection, the heat sink 22 and the trap pattern 24 are electrically in phase,
The crosstalk due to the stray capacitance 9 between the transmission and the reception can be suppressed more than the structure of the embodiment. Further, the first to the first aspects of the present invention
Particularly in the structure of the fifth embodiment, a material having a resistivity of the order of kΩcm or more is used for the common substrate 2. As a result, the resistance 14,15,16 between the transmission and reception via the common substrate 2 becomes a value sufficiently larger than the parasitic resistance (common impedance 17 between transmission and reception) due to the mounting of the heat sink 22, and the electric crosstalk through the substrate and the heat sink. Can be reduced.

【0033】図7は、本発明の第6の実施形態のハイブ
リッド光集積回路の実装構造を示す。本発明の第6の実
施形態では、電気絶縁層1に光導波路26,27,28を形成
し,発光素子5,受光素子6の搭載部29,30を発光素子
5、受光素子6が光導波路27,28と光結合するよう,ハイ
ブリッド光集積回路の絶縁層1上面に比べ窪んだ形態と
する。
FIG. 7 shows a mounting structure of a hybrid optical integrated circuit according to a sixth embodiment of the present invention. In the sixth embodiment of the present invention, the optical waveguides 26, 27, 28 are formed in the electrically insulating layer 1, and the mounting portions 29, 30 for the light emitting elements 5, 6 are connected to the light emitting elements.
5. The light receiving element 6 is recessed from the upper surface of the insulating layer 1 of the hybrid optical integrated circuit so that the light receiving element 6 is optically coupled to the optical waveguides 27 and 28.

【0034】また, 図7の構成では,一本の光導波路
に送信,受信で異なる波長を用い送受同時動作を行う方
式に対応するため、発光素子5が搭載ささている送信部
と受光素子6が搭載されている受信部の間には波長の異
なる信号を分離するための誘電体多層膜フィルタ31を設
けている。
Further, in the configuration shown in FIG. 7, in order to cope with a system in which transmission and reception are simultaneously performed using different wavelengths for transmission and reception in one optical waveguide, the transmission section on which the light emitting element 5 is mounted and the light receiving element 6 A dielectric multilayer filter 31 for separating signals having different wavelengths is provided between the receivers on which the is mounted.

【0035】図7では受信用の波長を有する信号を透過
し,送信用の波長を有する信号を反射しているが,送受
それぞれにどちらかの波長を用いるかによって逆の構成
も可能である。
In FIG. 7, a signal having a wavelength for reception is transmitted and a signal having a wavelength for transmission is reflected. However, the reverse configuration is possible depending on which wavelength is used for transmission and reception.

【0036】[0036]

【発明の効果】本発明では、送信,受信部が同一基板に
実装された光集積回路において送信部の放熱性と送受同
時動作時の良好な受信性能を確保することができ,光集
積回路のSDM,WDM伝送への適応が可能となる.
According to the present invention, in an optical integrated circuit in which the transmitting and receiving sections are mounted on the same substrate, the heat radiation of the transmitting section and the good receiving performance during simultaneous transmission and reception can be ensured. It can be applied to SDM and WDM transmission.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の送受間電気クロストークを抑圧する光
集積回路と放熱板との実装形態を示す図である。
FIG. 1 is a diagram showing a mounting form of an optical integrated circuit for suppressing electric crosstalk between transmission and reception and a heat sink according to the present invention.

【図2】本発明の第1の実施形態のハイブリッド光集積
回路の実装構造を示す図である。
FIG. 2 is a diagram showing a mounting structure of the hybrid optical integrated circuit according to the first embodiment of the present invention.

【図3】本発明の第2の実施形態のハイブリッド光集積
回路の実装構造を示す図である。
FIG. 3 is a diagram illustrating a mounting structure of a hybrid optical integrated circuit according to a second embodiment of the present invention.

【図4】本発明の第3の実施形態のハイブリッド光集積
回路の実装構造を示す図である。
FIG. 4 is a diagram illustrating a mounting structure of a hybrid optical integrated circuit according to a third embodiment of the present invention.

【図5】本発明の第4の実施形態のハイブリッド光集積
回路の実装構造を示す図である。
FIG. 5 is a diagram illustrating a mounting structure of a hybrid optical integrated circuit according to a fourth embodiment of the present invention.

【図6】本発明の第5の実施形態のハイブリッド光集積
回路の実装構造を示す図である。
FIG. 6 is a diagram illustrating a mounting structure of a hybrid optical integrated circuit according to a fifth embodiment of the present invention.

【図7】本発明の第6の実施形態のハイブリッド光集積
回路の実装構造を示す図である。
FIG. 7 is a diagram illustrating a mounting structure of a hybrid optical integrated circuit according to a sixth embodiment of the present invention.

【図8】従来の光集積回路の実装構造を示す図である。FIG. 8 is a diagram showing a mounting structure of a conventional optical integrated circuit.

【図9】送受一体型ハイブリッド光集積回路での送受間
電気クロストーク伝搬経路を説明する図である。
FIG. 9 is a diagram illustrating an electric crosstalk propagation path between transmission and reception in the integrated hybrid optical integrated circuit for transmission and reception.

【符号の説明】[Explanation of symbols]

1 光導波層 2 共通基板 3 送信電極 4 受信電極 5 発光素子 6受光素子 7ボンディングワイヤ 8,18,22,23 放熱板 1 Optical waveguide layer 2 Common substrate 3 Transmit electrode 4 Receive electrode 5 Light emitting element 6 Light receiving element 7 Bonding wire 8, 18, 22, 23 Heat sink

フロントページの続き Fターム(参考) 2H047 KA04 MA07 QA07 TA00 5F041 DA13 DA19 DA20 DA83 EE01 FF14 5F088 AA01 BA03 BA16 BB01 EA09 EA11 JA03 JA14 5F089 AA01 AC17 BC17 CA11 Continued on the front page F term (reference) 2H047 KA04 MA07 QA07 TA00 5F041 DA13 DA19 DA20 DA83 EE01 FF14 5F088 AA01 BA03 BA16 BB01 EA09 EA11 JA03 JA14 5F089 AA01 AC17 BC17 CA11

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】基板表面の絶縁層に発光素子と受光素子と
が実装された光集積回路において、 前記基板裏面を覆い、前記受光素子実装下付近を前記基
板裏面が露出するような形状にした金属板を設けること
を特徴とする光集積回路。
1. An optical integrated circuit in which a light emitting element and a light receiving element are mounted on an insulating layer on the surface of a substrate, wherein the light emitting element and the light receiving element are formed so as to cover the rear surface of the substrate and expose the rear surface of the substrate under the light receiving element. An optical integrated circuit comprising a metal plate.
【請求項2】基板表面の絶縁層に発光素子と受光素子と
が実装された光集積回路において、 複数に分けて、前記基板裏面を覆う金属板を設けること
を特徴とする光集積回路。
2. An optical integrated circuit in which a light-emitting element and a light-receiving element are mounted on an insulating layer on the surface of a substrate, wherein an optical integrated circuit is provided in which a plurality of metal plates are provided to cover the rear surface of the substrate.
【請求項3】前記請求項1及び2の光集積回路において,
前記絶縁層上で、且つ前記発光素子と前記受光素子の間
に、導電性のパターンを形成することを特徴とする光集
積回路。
3. The optical integrated circuit according to claim 1, wherein
An optical integrated circuit, wherein a conductive pattern is formed on the insulating layer and between the light emitting element and the light receiving element.
【請求項4】前記請求項3の導電性のパターンに、前記
金属板とワイヤで接続することを特徴とする光集積回
路。
4. An optical integrated circuit, wherein said conductive pattern is connected to said metal plate by a wire.
【請求項5】前記請求項1〜4の絶縁層に光導波路を形
成し,発光素子,受光素子の搭載部を該光素子が該光導
波路と光結合するよう,前記絶縁層上面に比べ窪んだ形
状を有することを特徴とする光集積回路。
5. An optical waveguide is formed in the insulating layer according to claim 1, and a mounting portion of a light emitting element and a light receiving element is recessed relative to an upper surface of the insulating layer so that the optical element optically couples with the optical waveguide. An optical integrated circuit having an irregular shape.
JP2000089292A 2000-03-28 2000-03-28 Optical integrated circuit Withdrawn JP2001281478A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000089292A JP2001281478A (en) 2000-03-28 2000-03-28 Optical integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000089292A JP2001281478A (en) 2000-03-28 2000-03-28 Optical integrated circuit

Publications (1)

Publication Number Publication Date
JP2001281478A true JP2001281478A (en) 2001-10-10

Family

ID=18605068

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000089292A Withdrawn JP2001281478A (en) 2000-03-28 2000-03-28 Optical integrated circuit

Country Status (1)

Country Link
JP (1) JP2001281478A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003124500A (en) * 2001-10-15 2003-04-25 Sharp Corp Optocoupler
JP2007027507A (en) * 2005-07-19 2007-02-01 Sony Corp Optical module
CN109417375A (en) * 2016-06-29 2019-03-01 株式会社村田制作所 Acoustic wave device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003124500A (en) * 2001-10-15 2003-04-25 Sharp Corp Optocoupler
JP2007027507A (en) * 2005-07-19 2007-02-01 Sony Corp Optical module
CN109417375A (en) * 2016-06-29 2019-03-01 株式会社村田制作所 Acoustic wave device
JPWO2018003819A1 (en) * 2016-06-29 2019-03-14 株式会社村田製作所 Elastic wave device
US10862450B2 (en) 2016-06-29 2020-12-08 Murata Manufacturing Co., Ltd. Elastic wave device

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