JP2001274161A - Method of forming semiconductor wiring film - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable reflow of a copper-based wiring material at a low temperature. SOLUTION: In a method of forming a semiconductor wiring film, a wiring film is formed by filling the hole or groove of an insulating film with a metallic material of copper or a copper alloy, by coating the surface of the insulating film with the metallic material by electroplating. The wiring film of the metallic material is formed, while hydrogen is taken in the film by conducting electroplating in a plating bath containing hydrogen gas or hydrogen ions, and thereafter, the hole or groove is filled with the metallic material by heat-treating the wiring film.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a wiring film in a process of manufacturing a semiconductor represented by ULSI, and more particularly to a method of forming a wiring film having a fine wiring structure with low electric resistance. As a result, high-speed operation and low drive voltage of a semiconductor device such as a so-called ULSI,
The present invention relates to a technology for realizing low power consumption.

[0002]

2. Description of the Related Art In recent years, in the field of ULSI, high integration has been rapidly progressed by miniaturization, and signal transmission of signal wiring due to an increase in electrical resistance due to miniaturization of conventional Al-based materials has also been performed on wiring films. The delay has been close up. To reduce the electric resistance of the wiring film, utilization of copper and copper alloy as materials having lower electric resistance than conventional Al-based materials is being studied.

[0003]

The copper-based material has a low electric resistance, is unlikely to cause wiring deformation and disconnection phenomenon (electromigration) due to a current flowing through the ULSI wiring, and has a low cost. It is considered the most influential material because of its existence. In the case of this copper-based metal,
It is difficult to form a wiring structure by an etching method after forming a film on an insulating film conventionally formed of an Al-based metal film by a sputtering method. -A method of filling a groove with a copper-based metal by a plating method is adopted. In the plating method, an electrolytic plating method is used in order to obtain a plated film having no voids, from the viewpoint of adjusting a film forming speed at the bottom of the hole or a flat portion, and the like. It is necessary to form a seed layer for imparting conductivity to the surface by a sputtering method or a CVD method. Due to the trend of miniaturization of LSI in recent years, it is expected that the diameter of the hole will be reduced from the current 0.25 micron diameter to about 0.1 micron diameter in around 2003, and the microscopic hole having a diameter of 0.15 micron or less is expected. When the ratio of the depth to the diameter, called the aspect ratio, becomes 4 or more, it is difficult to fill these holes and grooves with a metal wiring material.

Further, when the seed layer is incomplete, it is known that defects such as vacancies occur in the film even if the current diameter is 0.25 μm. It is known that if the metal wiring material is incompletely filled in the holes or grooves, not only the ULSI characteristics are degraded as an increase in electric resistance, but also the starting point of electromigration and the reliability is lowered. As a means for solving this problem, a material in the middle of ULSI manufacturing having holes / grooves in which these openings are closed and having insufficient filling,
A method (high-pressure annealing method) in which a high-pressure gas pressure is applied at a high temperature to a material in which an opening of a groove is closed with a metal film has been proposed. However, in the case of a copper wiring film formed by a normal electrolytic plating method, even with this high-pressure annealing method, a high-temperature treatment of a pressure of 120 MPa or more and a temperature of 350 ° C. or more is required, and There is a demand for lowering the temperature of the process.

[0005]

According to a first aspect of the present invention, there is provided a method of forming a metal material such as copper or copper alloy on a surface of an insulating film having holes or grooves formed thereon by electrolytic plating. Forming a wiring film by filling the metal material into the hole or groove by coating with the electrolytic plating, wherein the electrolytic plating is carried out in a plating bath containing hydrogen gas or hydrogen ions. And forming a wiring film of the metal material while incorporating hydrogen into the film, and then filling the hole or groove with the metal material by performing a heat treatment.

By simultaneously doping the metal wiring film with hydrogen when forming the copper-based metal wiring film, movement of the metal wiring film material by diffusion of metal material atoms is promoted.
By accelerating the diffusion of atoms, reliable filling of holes / grooves that could not be sufficiently filled with a metal material at the time of film formation can be performed in combination with a heat treatment in a later step. In order to take in such hydrogen, the plating bath may contain hydrogen gas or hydrogen ions in an equilibrium state or higher. Therefore, for example, it can also be realized by providing a hydrogen supply device that supplies hydrogen gas from a hydrogen gas supply source into the plating bath. However, in the electrolytic plating method, it is possible to generate hydrogen gas during plating by changing plating conditions (current voltage conditions). In the invention according to claim 2,
Focusing on this, the film is formed by the electrolytic plating method under a current voltage condition in which hydrogen gas is generated from a plating bath.

In the ordinary electrolytic plating method, the generation of hydrogen gas during plating leads to the introduction of defects due to generation of pores in the film due to hydrogen, and the reduction of current efficiency. According to the present invention, a copper-based wiring film was formed by electrolytic plating under a current-voltage condition accompanied by hydrogen gas generation, which was commonly known to be avoided in the past. The invention according to claim 3 is:
The heat treatment after forming the wiring film is performed in a gas atmosphere containing a high-temperature and high-pressure inert gas as a main component. In the case of a hole or groove having a small diameter where it is difficult to completely fill the metal wiring material only by the heat treatment, the heat treatment can be filled by utilizing a composition deformation phenomenon due to a high pressure.

[0008]

BEST MODE FOR CARRYING OUT THE INVENTION A multilayer structure U to which the present invention is applied
FIG. 1 schematically shows a cross section of the LSI. In FIG. 1, "n
The insulating film 2 is formed on the Si substrate 1 on which the transistors 1A of "p well.n" and "pn well.p" are formed. On the insulating film 2, a first-layer metal wiring M1 is formed via a barrier film for preventing a reaction. A contact hole (hole) 2A is formed in the insulating film 2, and is filled with tungsten by a CVD method and connected to the first-layer metal wiring M1.

An insulating film layer is further formed on the first-layer metal wiring M1. This insulating layer has a first-layer metal wiring M
Via holes (holes) 2B for connecting the first and second-layer metal wires M2 are formed, and grooves 2C for forming the second-layer metal wires M2 are formed. This via hole 2B
Is performed simultaneously with the filling of the groove 2C for forming the second-layer metal wiring M2. In this case, the aspect ratio of the via hole 2B alone is about 3, but when the groove 2C is combined, the aspect ratio is 4 to 4.
Often 6 The wiring films M3 to M6 of the third to sixth layers shown in the figure and via holes for connecting them are formed in the same manner.

In general, in the ULSI manufacturing process having the multilayer wiring structure shown in FIG. 1, a surface flattening process is required for each formation, and a surface flattening polishing process called a CMP process is performed. Prior to this step, in order to obtain stable reproducibility of the CMP step and achieve uniform polishing,
By heating the entire substrate, a heat treatment of a metal wiring material called a reflow method is performed. This reflow method utilizes a surface diffusion phenomenon of a metal wiring material, which is generally said to be remarkable when heated to a temperature higher than a recrystallization temperature. It is generally known that the recrystallization temperature of a copper-based metal wiring material is around 400 ° C.

However, in a copper or copper alloy wiring film (see FIG. 2) formed by electrolytic plating while generating hydrogen gas, hydrogen gas is unavoidably taken into the film in the plating step, and copper atoms are removed. Diffusion is promoted. As a result, the temperature of the heat treatment (reflow treatment) after plating can be reduced, and the pressure can be reduced. In order to obtain such an effect, it is sufficient that the plating bath contains hydrogen gas or hydrogen ions in an equilibrium state or higher, but in the electrolytic plating method, hydrogen gas is easily generated during plating by changing plating conditions. It is possible.

As shown in FIG. 3, on the assumption that no hydrogen gas is generated in the ordinary electrolytic plating method, the current density is indicated by the area AB (the area where copper is deposited and the amount of hydrogen is small) at an industrially usable current density. The current and voltage conditions are determined within the range. This area varies depending on the plating material, the type of the plating solution, the concentration of the plating solution, and the temperature at the time of plating. On the contrary, if these conditions are determined, the area is uniquely determined. It should be noted that the numerical values in FIG. 3 are merely examples under certain plating operation conditions. It is common practice not to generate hydrogen gas during plating, from the viewpoint that it leads to the introduction of defects due to generation of pores or the like in the film due to hydrogen, and from the viewpoint that the current efficiency is reduced. In the present invention, it is a common knowledge that the reflow characteristic of the copper wiring film is improved by obtaining the effect of promoting the diffusion of copper atoms in the copper-based wiring film by incorporating hydrogen gas or hydrogen ions into the film. A copper-based wiring film is formed by electrolytic plating under current and voltage conditions accompanied by hydrogen gas generation.

As the copper plating bath, a copper sulfate bath, a copper cyanide bath, a copper borofluoride bath or a copper pyrophosphate bath can be used.
In examples described later, a copper sulfate bath is employed. A typical bath composition of the copper sulfate bath is “copper sulfate: 125 to 150 g / liter, sulfuric acid: 30 to 100 or 125 to 150 g.
/ Liter, additive: appropriate amount "(see" Basic and Industrial Technology of Copper and Copper Alloys (Revised Edition) "1995 revised edition, published by Japan Copper and Brass Association). The current and voltage conditions associated with the generation of hydrogen gas also vary depending on the plating material, the type of plating solution, the concentration of the plating solution, and the temperature at the time of plating, but those skilled in the art can determine the necessary current and voltage if these conditions are determined. Finding conditions is easy. Based on FIG. 3, it is a region on the higher voltage side than B (a region where copper is precipitated and hydrogen is also generated).

However, if too much hydrogen gas is taken into the film, not only the wiring film itself will have a porous structure, but also adversely affect semiconductor constituent materials other than the wiring film.
For this reason, the current-voltage condition during electrolytic plating is larger than the maximum voltage (shown as point B in FIG. 3) under the condition that the generation of hydrogen gas, which is uniquely determined depending on the plating solution, is suppressed. And the region B not exceeding B + 5,000 mV
It is desirable to be within the range shown by -C. In other words, it is desirable that the area be up to about 5 V larger than the area determined to be appropriate by the ordinary electrolytic plating method. Current efficiency (cathode current efficiency:
How much of the current passed was used for Cu deposition)
In other words, it is about 95 to 100% in the conventional electrolytic plating, but is about 80% in the present invention.

As described above, in the state of the art, the hole diameter is 0.1
For miniaturization of 5 microns or less and an aspect ratio of 4 or more, there is a concern that voids may be generated at the deep bottom of the hole as shown in FIG. 4A, and it is difficult to fill a metal-based wiring material. I have. Such voids cannot be completely filled with the metal wiring film material by a reflow method near the atmospheric pressure utilizing the hydrogen diffusion promoting phenomenon in the film. Under such circumstances, it is recommended that the reflow treatment be performed in a gas atmosphere containing a high-temperature and high-pressure inert gas as a main component. FIG.
(B) schematically shows this operation. The diffusion promoting function of metal wiring film atoms by hydrogen contained in the metal wiring film reduces the apparent deformation resistance of the metal wiring film material and facilitates plastic deformation. The material is filled to the bottom of the hole / groove. Incidentally, the present invention does not specify only that the pressure during high-pressure reflow is the same as the filling condition of the wiring film material containing no hydrogen to lower the temperature, but the condition that the pressure is reduced by making the temperature the same, Alternatively, conditions for reducing both may be selected.

[0016]

EXAMPLE A silicon oxide film (SiO ₂ ) having a thickness of 1.5 μm was formed on a Si substrate, and after patterning, the silicon oxide film was etched to form holes and grooves as shown in Table 1. The effect of the present invention was verified using a sample. A TaN barrier layer generally used for a copper-based wiring material and a copper seed layer were formed on the inner surfaces of the holes and grooves by a sputtering method. The processing conditions are as shown in Table 1. A film was formed and reflowed by a conventional method, and a comparative material was used.

[0017]

[Table 1]

From the comparison between Example 1 and Comparative Example 1, it is found that the reflow temperature can be reduced by using the hydrogen gas-containing plating film of the present invention. It was confirmed that the filling was possible.
Also, from the comparison between Example 2 and Comparative Example 2, it was found that the reflow temperature can be reduced by using the hydrogen gas-containing plating film of the present invention even in a dual damascene structure in which a hole is formed at the bottom of the groove. That is, it was confirmed that the copper wiring material can be filled into the holes and grooves at a lower temperature than the conventional method.

Further, from the comparison between Example 3 and Comparative Example 3,
It has been confirmed that the metal wiring material can be filled into holes / grooves having a high aspect ratio by subjecting the hydrogen gas-containing plating film of the present invention to high-pressure reflow treatment in a high-pressure gas atmosphere.

[0020]

As described above, according to the present invention, it is possible to reflow a copper-based wiring material expected as a future wiring material from the viewpoint of low electric resistance at a low temperature, and to reflow under a high-pressure gas atmosphere. When combined with processing, it is possible to fill holes and grooves that are becoming increasingly fine. According to the present invention, ULS using a metal wiring film material
It is expected to greatly contribute to the simplification and reliability improvement of the industrial production process of I.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing an example of a semiconductor multilayer wiring structure.

FIG. 2 is an enlarged cross-sectional view of a copper wiring formed by an electrolytic plating method.

FIG. 3 is a diagram showing current-voltage conditions in an electrolytic plating method.

FIG. 4 (a) is a cross-sectional view of a wiring having a void at the bottom of the hole, and FIG. 4 (b) is a cross-sectional view of a wiring showing a state in which the holes have been filled and hydrogen has been expelled by high-pressure and high-pressure reflow processing. .

[Explanation of symbols]

 Reference Signs List 1 substrate 2 insulating film 2B contact hole 2C groove 3 copper wiring

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI theme coat ゛ (Reference) H01L 21/288 H01L 21/88 MF term (Reference) 4K024 AA09 AB01 BA11 BB12 BC01 CA05 CA16 DB02 GA16 4M104 BB04 BB18 CC01 DD16 DD37 DD52 DD79 FF18 HH13 5F033 HH11 HH32 JJ01 JJ11 JJ19 JJ32 KK01 KK11 KK32 MM01 MM02 MM12 MM13 NN06 NN07 PP06 PP15 PP27 QQ37 QQ73 QQ75 QQ86 RR04 XX02 XX11

Claims (3)

[Claims] An interconnection film formed by coating the surface of an insulating film having holes or grooves with a metal material of copper or copper alloy by electrolytic plating to fill the inside of the holes or grooves with the metal material. A method for forming a semiconductor wiring film, wherein the electrolytic plating is performed in a plating bath containing hydrogen gas or hydrogen ions, and a wiring film of the metal material is formed while incorporating hydrogen into the film. A method for forming a semiconductor wiring film, wherein the hole or groove is filled with the metal material by performing a heat treatment. 2. The method for forming a semiconductor wiring film according to claim 1, wherein the film is formed by the electrolytic plating method under a current voltage condition in which hydrogen gas is generated from a plating bath. 3. The method for forming a semiconductor wiring film according to claim 1, wherein the heat treatment after forming the wiring film is performed in a gas atmosphere containing a high-temperature and high-pressure inert gas as a main component. .