JP2001264189A - Load cell - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a load cell which is made small-sized and can stably take a measurement in a short time even against abrupt variation in temperature. SOLUTION: An active element, a resistance, a capacitor, etc., which constitute at least an amplifying circuit 3 amplifying the analog output signal of a bridge circuit 2, a low-pass filter 4 limiting the band of the analog signal amplified by the amplifier 3, and an A/D converter 5 converting the band-limited analog signal into a digital signal are integrated into a monolithic integrated circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention processes an analog output signal of a bridge circuit affixed to a flexure element on a circuit board attached to or disposed near the flexure element. The load cell described above.

[0002]

2. Description of the Related Art In general, in a weighing machine having a digital display function, an output signal of a load cell provided on a weighing stand portion serving as a load detecting portion is derived to an indicator portion by an electric signal line, and is output to the indicator portion. The signal is converted into a digital signal by a provided signal processing circuit, and the output signal of the load cell, that is, the load of the object to be weighed is displayed as a digital value.

[0003] However, the output signal of the load cell is weak, and is susceptible to noise in the course of being transmitted as an analog signal to the display unit, so that there is a problem that high accuracy cannot be obtained as a measuring instrument. Was.

[0004] In order to obtain higher accuracy, a digital signal processing system in which a signal processing circuit is directly attached to a distorter or is disposed in the vicinity thereof to constitute the distorter and its signal processing circuit as one unit. Load cell (DLC;
Digital Load Cell). For example, Japanese Patent Laid-Open No. 1-25
No. 0028.

FIG. 6 shows a side view of the digital load cell 20. The signal processing circuit board 1 is attached to the flexure element 40 shown in FIG.
The digital load cell 2 is attached by screwing a screw 41 a into a screw hole 41 b formed in the strain body 40.
0 is configured. Four strain gauges (two in the figure) 42 are provided on the peripheral surface of the small diameter portion 40c at the center of the strain body 40.
Is affixed. These are electrically connected to form a bridge circuit 2. Both end faces 40a, 40b of the flexure element 40
When a load acts on the small-diameter portion 40c, the strain is detected by the strain gauge 42, and a voltage corresponding to the magnitude of the strain is output from the bridge circuit 2.

In the digital load cell 20, an analog output signal of the bridge circuit 2 affixed to the strain body 40 is immediately converted into a digital signal by a processing circuit formed on the circuit board 1, and the path to the display section is changed. Since the signal is transmitted as a digital signal, the influence of external noise can be reduced.

FIG. 4 is a circuit diagram of the digital load cell 20. A preamplifier 3 is connected to the output side of the bridge circuit 2, and a low-pass filter 4 is connected to the output side of the preamplifier 3.
However, an A / D converter 5 is connected to the output side of the low-pass filter 4. Also, the bridge circuit 2 and the A / D
The reference voltage generating circuit 8 is connected to the converter 5. The reference voltage generating circuit 8 supplies a voltage to the bridge circuit 2 and a reference voltage to the A / D converter 5.

The output side of the A / D converter 5 has a CPU
(Central Processing Unit) 6 is connected and this CP
In U6, various corrections such as a correction according to the temperature of the output value of the bridge circuit 2 converted into the digital signal are performed. Also,
A temperature sensor 10 used for performing the temperature correction and a memory 11 for storing correction data are connected to the CPU 6. Since the temperature sensor 10 is provided on the circuit board 1, there is a slight difference between the detected value and the temperature of the bridge circuit 2. However, the output of each of the bridge circuit 2 and the temperature sensor 10, which are in thermal equilibrium with each other, is output. If the relationship between the value and the detected value is determined, the output value of the bridge circuit 2 can be accurately corrected with the detected temperature of the temperature sensor 10. In addition,
The power of the digital load cell 20 is provided by a power supply 9 such as a battery.

The CPU 6 is connected to a two-way communication control circuit 7 having a transmitting circuit and a receiving circuit, and is provided with an external system such as an adjusting system for measuring various characteristics of the indicator and the digital load cell 20 and determining correction coefficients and the like. Signal transmission and reception are performed with the device.

Next, the operation of the digital load cell 20 configured as described above will be described.

A load is applied to the flexure element 40, and the flexure element 4
When the resistance value of the resistor 42 attached to 0 changes, the balance of the bridge circuit 2 is lost, and a voltage proportional to the change in the resistance value of the resistor 42 is output. This output is amplified by the preamplifier 3 and input to the low-pass filter 4. Unnecessary high-frequency components in the input analog signal that cause noise are removed by the low-pass filter 4, and are converted into digital signals by the A / D converter 5.

In the production process of the digital load cell 20, various characteristics such as a temperature characteristic, which is a relationship between a temperature and an output value, and a linear characteristic, which is a relationship between a known load and an output value when the load is applied, include: It is measured in advance by the adjustment system via the bidirectional communication control circuit 7. In the adjustment system, a correction coefficient (correction value) for correcting the output value of the bridge circuit 2 converted into a digital signal is obtained based on various characteristic data. These correction coefficients are transmitted via the bidirectional communication control circuit 7. Stored in the memory 11.

The digital output value output from the A / D converter 5 is subjected to temperature correction calculation processing 12 for correcting variation in output value due to temperature fluctuation in the microcomputer 6 based on the correction coefficient stored in the memory 11. A linear correction operation processing 13 for correcting the proportional relationship between the load of the object to be weighed and the output value, a creep correction operation processing 14 for correcting a change in output that occurs with the passage of time, and zero for adjusting the output to zero in a no-load state. Output sensitivity adjustment calculation processing 15 for performing span adjustment for adjusting the output to the rated value in the state of the adjustment and the rated load, and scale calculation processing for correcting the output value according to the difference in the gravitational acceleration of each weighing place. Sixteen various correction processes are performed.

The digital values corrected as described above are transmitted to the indicator via the bidirectional communication control circuit 7 and displayed.

[0015]

SUMMARY OF THE INVENTION Digital load cell 2
In the case of 0, the circuit board 1 on which the signal processing circuit is formed is attached to or disposed in the vicinity of the flexure element 40, and is housed in the load detection unit (scale platform section) together with the flexure element 40. It is required that the signal processing circuit board 1 be downsized.

The downsizing has the advantage of being easy to carry, taking up space, reducing the number of parts and reducing the cost. However, in addition to the above, the effect of temperature is taken into account as described below. Therefore, miniaturization is required.

As shown in FIG. 5, for example, the internal temperature 5
It is assumed that an experimental sample or the like is weighed as an object to be weighed in a furnace 30 at 0 ° C., and thereafter, weighing is performed in the atmosphere at 10 ° C., for example.

First, in a furnace 30, a flexure element 40 to which a bridge circuit 2 is attached together with an object to be weighed and a processing circuit board 1
Is kept at a constant temperature of 50 ° C., and the objects to be weighed are measured in a stable thermal equilibrium state. Then, in order to continuously measure the same object to be measured in the atmosphere, the bridge circuit 2 and the flexure element 40
And the processing circuit board 1 is also taken out of the furnace 30 and the temperature is 10 ° C.
Placed in the atmosphere. At this time, the flexure element 40 made of metal is used.
Since the bridge circuit 2 (resistor 42) has a good heat transfer coefficient to the atmosphere, heat is radiated relatively quickly and quickly transitions to a temperature stable state (thermal equilibrium state) of 10 ° C.

However, the processing circuit board 1 is formed by mounting wiring and circuit components on an insulating substrate. In particular, the insulating substrate has a small heat transfer coefficient and the temperature stabilization is slow. Therefore, it takes time for the temperature of the bridge circuit 2 and the circuit board 1 to reach a thermal equilibrium state, and it takes time to be taken out of the furnace 30 for accurate measurement. For example, when weighing a sample that is discharged from the furnace 30 to the atmosphere and whose chemical or physical state changes over time, the exact weight in the state immediately after being discharged from the furnace 30 is determined. For weighing, the load cell, that is, the bridge circuit 2 and the circuit board 1 must be quickly brought into thermal equilibrium. That is, a thermal equilibrium state is required so that the detection value of the temperature sensor 10 accurately represents the output value of the bridge circuit 2. Otherwise, inaccurate temperature corrections will be made and the weighing results will be inaccurate.

Therefore, if the processing circuit board 1 can be made smaller, the heat capacity of the processing circuit board 1 will be reduced accordingly, and the thermal equilibrium of the load cell can be accelerated.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide a load cell which is reduced in size and capable of performing stable measurement in a short time in response to a rapid change in temperature. I do.

[0022]

According to the present invention, at least an amplifier for amplifying an analog output signal of a bridge circuit and a low-pass filter for band-limiting the analog output signal amplified by the amplifier are provided. In addition, an active element, a resistor, a capacitor, and the like constituting an A / D converter for converting an analog signal whose band is limited into a digital signal are formed into a monolithic integrated circuit. As a result, the processing circuit board can be reduced in size, the heat capacity thereof can be reduced, and the load cell can be quickly thermally balanced even when the ambient temperature changes.

[0023]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a more detailed circuit diagram of the circuit portion 25 enclosed by a chain line in FIG.

The output side of the bridge circuit 2 is connected to the input side of the preamplifier 3, and the output side of the preamplifier 3 is
The output side of the sample-hold circuit 17 is connected to the input side of the low-pass filter 4, and the output side of the low-pass filter 4 is connected to the input side of the A / D converter 5.

The output side of the load cell voltage application circuit 8b is connected to the input side of the bridge circuit 2, and the output side of the logic circuit 8a is connected to the input side of the load cell voltage application circuit 8b. Further, a clock signal generator 22 of, for example, 512 kHz is connected to the input side of the logic circuit 8a.

The output side of the logic circuit 8a has a CP.
U6 is connected. The CPU 6 is supplied with a clock signal of, for example, 4.19 MHz from the clock signal generator 21.

The output side of the load cell voltage application circuit 8b is connected to the input side of the sample-hold circuit 8c, the output side of the sample-hold circuit 8c is connected to the input side of a low-pass filter 8d, and the output side of the low-pass filter 8d. The input side of the A / D converter 5 is connected. The logic circuit 8a, the load cell voltage application circuit 8b, the sample / hold circuit 8c, and the low-pass filter 8d form the reference voltage generation circuit 8 in FIG.

Next, the operation of the circuit configured as described above will be described with reference to FIGS.

The power source 9 of the load cell is, for example, 6 V
Are used, from which two power supply voltages of 3 V and 5 V are formed by the regulator 18. this house,
3 V is used as a power supply voltage of the CPU 6. 5V is supplied to a load cell voltage application circuit (switch circuit) 8b, where a voltage of, for example, 3.8V is further formed. The voltage of 3.8 V is adjusted in timing by the logic circuit 8a and applied to the bridge circuit 2 in the form of intermittent pulses at a frequency of 512 kHz. A technique for intermittently applying a voltage to a bridge circuit of a load cell is disclosed in, for example, Japanese Patent Application Laid-Open No. 62-266469, whereby power consumed by the bridge circuit can be reduced.

When a load is applied, the balance of the bridge circuit 2 is lost, and a voltage proportional to the load is applied to the preamplifier 3.
Is output to. This analog output signal is output in the form of a pulse at a frequency of 512 kHz, amplified by the preamplifier 3, and input to the sample and hold circuit 17, similarly to the voltage applied to the bridge circuit 2.

In the sample and hold circuit 17,
The output level of the pulse-like signal is maintained until the next pulse rises to make it a continuous signal.

The continuous analog signal is band-limited by the low-pass filter 4. That is, high-frequency components that cause noise are removed. And A / D
Input to converter 5.

In the A / D converter 5, data is taken out from the continuous analog signal input at a certain time interval (sampling period) and sampled. The sampled signal is converted into a digit of an appropriate digit (quantization), and a code obtained by binarizing (encoding) the digit obtained by the quantization is performed to be converted into a digital signal.

3.8 from load cell voltage application circuit 8b
The intermittent voltage of V is also applied to the sample-and-hold circuit 8c,
The analog signal is converted into a continuous analog signal, smoothed by the low-pass filter 8 d, and supplied to the A / D converter 5. Thereby, the load cell voltage application circuit 8
In the A / D converter 5, even if the voltage formed at the point b varies, the signal varies from the signal input from the low-pass filter 4 on the output side of the bridge circuit 2 and the signal input from the low-pass filter 8d of the reference voltage generating circuit. The minutes are canceled out, and the effects of voltage fluctuations can be offset.

The digital output signal of the A / D converter 5 is input to the CPU 6, subjected to various corrections as in the prior art, transmitted to the indicator 19, and digitally displayed.

In this embodiment, a circuit portion 25 (a preamplifier 3, a sample-and-hold circuit 17, a low-pass filter 4, an A / D
The converter 5, the logic circuit 8a, the load cell voltage application circuit 8b, the sample-and-hold circuit 8c, and the low-pass filter 8d) were integrated and formed in one semiconductor chip. That is, a monolithic integrated circuit was formed.

In the circuit 25 formed as a monolithic integrated circuit, the active element transistor is a C-MOS transistor.
The circuit 25 is a C-MOS type integrated circuit including the C-MOS transistor, passive elements (resistance elements and capacitors), and their wirings. Resistors and capacitors are also monolithically integrated as a C-MOS structure. However, if a capacitor having a capacity exceeding 100 pF is monolithically integrated with a C-MOS transistor, the circuit scale becomes too large to be practical. Therefore, they are mounted as individual components on the printed wiring board, and are connected to the monolithically integrated chip via the wiring formed on the printed wiring board.

For example, when the low-pass filters 4 and 8d include an operational amplifier (constituted by a transistor, a resistor and a capacitor) and an active filter composed of a resistor and a capacitor, these elements are replaced by C-MOS. It is created with a structure and integrated in one semiconductor chip.

FIG. 3 is a schematic plan view of a conventional processing circuit board 1 ', in which chips indicated by reference numerals 25a to 25u,
Further, a circuit 25 portion is constituted by a number of chips mounted on the back surface on the opposite side of the drawing.

FIG. 2 is a schematic plan view of the processing circuit board 1 according to the present embodiment, and the central portion of the processing circuit board 1 is a monolithically integrated circuit 25 having a C-MOS structure. Chip. That is, in FIG. 3, what was constituted by a large number of chips 25a to 25u (and a chip on the back surface) was monolithically integrated in one semiconductor chip by a C-MOS structure. The other circuit components in the processing circuit, the CPU 6, the memory 11,
A chip such as the temperature sensor 10 is mounted.

As described above, in the present embodiment, the number of components of the processing circuit can be reduced by about half, and the length of the processing circuit board 1 (length in the horizontal direction in the drawing) is reduced to about 1/2. Also, the substrate area is about half the size.

That is, it is possible to reduce the size of the processing circuit board 1 and also to make the heat capacity smaller than before, and to stabilize the temperature of the processing circuit board 1 in a short time when it is taken out from a high temperature part such as a furnace. Therefore, the temperature of the entire load cell can be thermally equilibrated in a shorter time, and stable and accurate measurement can be performed.

Further, the cost can be reduced by reducing the number of parts, and the quality can be easily secured.

The power consumption of a C-MOS integrated circuit is extremely small as compared with, for example, a bipolar integrated circuit.
Therefore, the amount of heat generated from the circuit is also small. This also stabilizes the load cell temperature in a shorter time.

An amplifier composed of bipolar transistors requires two positive and negative power supplies (for example, ± 6 V). An amplifier having a C-MOS structure requires only one power supply (for example, +5 V). Cost reduction.

Although the embodiments of the present invention have been described above, the present invention is, of course, not limited thereto, and various modifications can be made based on the technical concept of the present invention.

In the above embodiment, in the processing circuit, the circuit portion 25 from converting the analog output signal of the bridge circuit 2 to a digital signal and outputting the digital signal is monolithically integrated. In order to reduce the size of the processing circuit board 1, a monolithic integration of only the circuit portion 25 is sufficiently effective. However, the CPU 6, the memory 11, the temperature sensor 10
And the like can be made more compact if they are monolithically integrated together.

In the above embodiment, the application of the voltage to the bridge circuit 2 is performed intermittently. However, a continuous voltage may be applied. In this case, in FIG.
It is not necessary to provide the sample and hold circuits 17 and 8c.

In the above embodiment, the reference voltage generation circuits 8a to 8d are also monolithically integrated, but the preamplifier 3, the sample and hold circuit 1
7 (unnecessary when a voltage is continuously applied to the bridge circuit), monolithic integration of only the low-pass filter 4 and the A / D converter 5 can provide a sufficiently small size.

In the above embodiment, the monolithic integrated circuit is an integrated circuit having a C-MOS structure. However, a bipolar integrated circuit or a Bi-type integrated circuit in which both a C-MOS circuit and a bipolar circuit are integrated on one chip. A C-MOS structure may be used. However, the C-MOS structure has the advantages that the power consumption is small, the heat generated from the circuit is small, and the malfunction due to the heat is unlikely to occur. Further, the circuit has a higher density without considering the influence of the heat much. Since they can be integrated, miniaturization is easy.

[0052]

As described above, according to the present invention, it is possible to reduce the size of the circuit board on which the circuit for processing the output signal of the bridge circuit is formed, thereby reducing the heat capacity of the circuit board. it can. Therefore, the temperature of the load cell is thermally equilibrated in a short time, and accurate measurement can be performed. Further, the number of components can be reduced by monolithic integration, and the cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a main part of a signal processing circuit according to an embodiment of the present invention.

FIG. 2 is a schematic plan view of a signal processing circuit board according to the embodiment of the present invention.

FIG. 3 is a schematic plan view of a conventional signal processing circuit board.

FIG. 4 is a circuit diagram of a digital load cell.

FIG. 5 is a schematic diagram illustrating an influence of a temperature change of a load cell.

FIG. 6 is a side view of a digital load cell.

FIG. 7 is a side view of a strain body to which a resistor is attached.

[Explanation of symbols]

 Reference Signs List 1 signal processing circuit 2 bridge circuit 3 preamplifier 4 low-pass filter 5 A / D converter 6 CPU 7 bidirectional communication control circuit 8 reference voltage generation circuit 9 power supply 10 temperature sensor 11 memory 17 sample / hold circuit 25 monolithic integrated circuit chip 20 digital load cell 40 Flexure element 42 Resistor (strain gauge)

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Koichi Segawa 2-35 Jinbucho, Yao-shi, Osaka Inside Kubota Kuhoji Temple Plant (72) Inventor Keiichi Nariyama 2-35 Jinmucho, Yao-shi, Osaka Stock 2F049 AA12 BA01 CA11 in the Kubota Kupoji Temple

Claims (5)

[Claims] 1. A circuit board which is attached to or disposed near a flexure element and performs processing of an analog output signal of a bridge circuit attached to the flexure element by a monolithic integrated circuit. A load cell. 2. A signal processing circuit, which is attached to or disposed near a flexure element and converts an analog output signal of a bridge circuit attached to the flexure element into a digital signal and outputs the digital signal. A load cell, comprising: a circuit board for performing signal processing with a part as a monolithic integrated circuit; and a CPU for performing at least one arithmetic processing for correction on the output digital signal on the circuit board. . 3. A circuit board mounted on or near the flexure element and configured to process analog output signals of a bridge circuit attached to the flexure element by a monolithic integrated circuit. An amplifier for amplifying at least the analog output signal of the bridge circuit, a low-pass filter for band-limiting the analog output signal of the amplifier, and converting the analog output signal of the low-pass filter into a digital signal for output. A load cell comprising an active element constituting an A / D converter. 4. The load cell according to claim 3, wherein said active element has a C-MOS structure. 5. The circuit board according to claim 3, wherein a CPU for performing at least one arithmetic operation for correction on the digital signal output from the A / D converter is provided on the circuit board. The load cell according to 1.