JP2001250397A - Fault analyzing method, derivation method for degeneration threshold value, and recording medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a fault analyzing method by which mistake of a defective shape is prevented and a defective shape can be accurately recognized and classified and a recording medium recording its program, a derivation method for degeneration threshold value used for a fault analyzing method, and a recording medium recording its program. SOLUTION: A recognition rule is read (ST1), plural degeneration FBM is prepared (ST2), after a defective recognition object is selected (ST3), the prescribed region is selected based on setting of defective size (ST4), and a defect rate in the prescribed region is calculated (ST5). Successively, a defective recognition object is estimated based on pars/fail condition of adjacency of a defect rate condition and a defective recognition object (ST6), a defect rate of residual degeneration FBM is calculated and standardized (ST7). Then a defect rate of residual degenerartion FBM is collated with a defective shape discrimination rule, and a defective shape is specified.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a failure analysis of a semiconductor device, and more particularly to a failure analysis method for a semiconductor device having a plurality of memory cells on a wafer, a recording medium on which the program is recorded, and derivation of a degeneration threshold. The present invention relates to a method and a recording medium on which the program is recorded.

[0002]

2. Description of the Related Art As a method of performing a failure analysis of a semiconductor device having a plurality of memory cells (generally arranged in a matrix) on a wafer, a method using a tester (referred to as an "LSI tester") is known. In this method, all memory cells in a wafer are tested for electrical characteristics, and the position coordinates of the detected defective memory cell are converted into x coordinates along the row direction and y coordinates along the column direction.
It is displayed in the form of a bitmap (generally, a fail bitmap: FBM) in a coordinate area defined by the coordinates,
The cause of the failure is estimated from the failure pattern of the FBM.

Normally, in order to estimate the cause of a defect using the FBM, first, a process of recognizing (specifying) a defect shape and classifying the defect into a block defect, a line defect, a bit defect and the like is performed.

[0004] Here, the block defect is mainly generated when a signal line other than the word line and the bit line has an abnormality in a signal line common to a plurality of memory cells, and is commonly used for the signal line. The connected memory cell becomes defective, and the defective bits have a dense shape.

A line defect mainly occurs when there is an abnormality in a word line or a bit line, and a series of memory cells connected to the word line or the bit line becomes defective. It has a lined shape.

A bit defect occurs when an individual memory cell has an abnormality, and has a shape in which defective bits are scattered.

Conventionally, in the shape recognition processing of the FBM, the FBM is once reduced according to a predetermined rule, and rough shape recognition processing is performed by the reduced FBM to classify it into block failure, line failure, bit failure, and the like. After that, a method of recognizing a detailed shape of a defect (such as a defect size) by recognizing the recognized defective area at a 1-bit level has been adopted.

Here, degenerate means, for example, FBM
Is divided into a predetermined area, for example, x-coordinate 8 bits × y-coordinate 8 bits every 64 bits in total, and if there is one or more defective bits in them, the 64 bits are converted into one defective pixel, and conversely, If there are no defective bits in the 64-bit area, this means an operation of converting the 64-bit into a 1-pass pixel. In this example, it is called that the FBM is degenerated by 8 × 8 bits. The predetermined area is referred to as a degenerate area.

However, this method has a problem that the recognition shape changes depending on the degeneration rate due to the change in the defect density, and erroneous recognition occurs.

For example, in an FBM having a size of x × y = 32 bits × 32 bits, as shown in FIG. 56, it is assumed that defective bits FB are scattered to the left as viewed in the figure. Here, as shown in FIG.
The BM is called the original FBM.

The original FBM shown in FIG.
When the data is divided by an 8-bit degenerate area and degenerated, it is divided into a 4 × 4 pixel matrix, and as shown in FIG. 57, all the left columns of the pixel matrix become defective pixels FP, indicating a line defect.

However, when the original FBM is reduced by 2 × 2 bits, the original FBM is divided into a 16 × 16 pixel matrix, and defective pixels FP are scattered to indicate a bit failure as shown in FIG.

[0013]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and a defect analysis method capable of preventing erroneous recognition of a defective shape and recognizing and classifying the defective shape with high accuracy. It is a first object of the present invention to provide a recording medium on which the program is recorded, a derivation method of a degeneration threshold used in a failure analysis method, and a recording medium on which the program is recorded.

In addition, various types of defects occur randomly on a wafer or in a certain area.

It is important to group a group of defectively occurring failures as one group in identifying the cause of the failure. Conventionally, for this grouping, a method of defining a distance from a fail bit and grouping the objects within the group has been adopted.

However, in this method, when the defect occurrence density is different, it is necessary to change the specified distance, and there is a problem that it is difficult to set the specified distance.

It is a second object of the present invention to provide a failure analysis method capable of easily grouping failures that have occurred densely.

[0018]

According to a first aspect of the present invention, there is provided a failure analysis method, comprising: a plurality of memory cells arranged in a matrix; A failure analysis method for associating the failure memory cell with a failure bit in units of bits on the basis of the failure memory cell, and performing failure analysis using an original fail bit map created by mapping according to the arrangement of the memory cell. (A) creating a plurality of types of degenerate fail bitmaps from the original fail bitmap, calculating a defect rate for each of the plurality of degenerate fail bitmaps, and identifying a defect shape based on the defect rate (B) performing the original fail bit The map is divided based on a plurality of degenerated areas having different sizes, and is converted into a form in which pixels of a size corresponding to the degenerated area are arranged,
The pixel having the defective bit is created as a defective pixel, and the defect rate is defined by a ratio of the defective pixel to a predetermined area.

The failure analysis method according to claim 2 of the present invention, the failure memory based on data relating to the position of the failure memory cell having a failure in electrical characteristics among the plurality of memory cells arranged in a matrix. A failure analysis method for performing failure analysis using an original fail bit map created by mapping a cell to a failure bit in units of bits and mapping the memory cell in accordance with the arrangement of the memory cells, Steps for creating multiple types of degraded fail bitmaps from maps
(a), calculating the defect rate for each of the plurality of degenerate fail bitmaps, and (b) identifying the defect shape based on the defect rate, the plurality of types of degenerate fail bitmap, The original fail bitmap is divided based on a predetermined degenerate area, is converted into a form in which pixels of a size corresponding to the degenerate area are arranged, and is defined by the number of the defective bits in the pixel. Based on a plurality of degeneration thresholds, a defect determination of the pixel is performed, and the pixel in which the number of the defective bits corresponding to the degeneration threshold is present is created as a defective pixel, and the defect rate is the defective pixel occupying a predetermined area. It is defined as a percentage of pixels.

The defect analysis method according to claim 3 of the present invention, wherein the defective memory is based on data on the position of the defective memory cell having a defective electrical characteristic among the plurality of memory cells arranged in a matrix. A failure analysis method for performing failure analysis using an original fail bit map created by mapping a cell to a failure bit in units of bits and mapping the memory cell in accordance with the arrangement of the memory cells, Steps for creating multiple types of degraded fail bitmaps from maps
(a), calculating the defect rate for each of the plurality of degenerate fail bitmaps, and (b) identifying the defect shape based on the defect rate, the plurality of types of degenerate fail bitmap, The original fail bitmap is divided based on a plurality of degenerated areas having different sizes, and converted into a form in which pixels of a size corresponding to the degenerated area are arranged, and the number of the defective bits in the pixels is changed. Based on a plurality of degeneracy thresholds defined in the above, the pixel is determined to be defective, and the pixel in which the number of the defective bits is equal to or greater than the number of the defective bits is created as a defective pixel, the defect rate is a predetermined It is defined by the ratio of the defective pixel in the area.

In the failure analysis method according to a fourth aspect of the present invention, in the step (b), the failure rate of one of the degenerate fail bitmaps is set as a reference failure rate, and at least a preset failure rate is set. (B-1) estimating a defect shape by comparing a predetermined defect rate specifying a shape with the reference defect rate, and using the reference defect rate as a denominator, the defect rate of the remaining degenerate fail bitmap (B-2) each of which is a value obtained by standardizing a defect shape as an index value for defect shape determination, and comparing the respective index values with a preset defect shape determination rule, and the result is compared with the step ( (b-3) specifying the defective shape by combining the result of the estimation of the defective shape in b-1).

According to a fifth aspect of the present invention, in the defect analysis method according to the fifth aspect, the step (b) includes a step of determining whether or not the defective pixel in the predetermined area is adjacent to the defective pixel outside the predetermined area. And the step (b-1) is to estimate a defective shape based on a result of checking the predetermined defective rate with the reference defective rate and a result of determining the presence / absence of the adjacency.

According to a sixth aspect of the present invention, in the method of deriving the degeneration threshold, the memory cell is arranged based on data on the location of a defective memory cell having a defective electrical characteristic among a plurality of memory cells arranged in a matrix. A fault threshold used in a failure analysis method of converting a defective memory cell into a defective bit in units of bits and performing a failure analysis using an original fail bit map created by mapping according to the arrangement of the memory cells. A deriving method, wherein the original fail bitmap is divided based on a predetermined degenerate area, and converted into a form in which pixels of a size corresponding to the degenerate area are arranged (a); (B) counting the number of said bad bits for each said pixel, and counting the number of said bad bits in said pixel. Acquiring the existence characteristic of the defective bit represented by the number of pixels, and calculating the degeneration threshold based on the existence characteristic.

According to a seventh aspect of the present invention, in the method of deriving a degeneration threshold, the step (c) counts the number of pixels from the case where the number of the defective bits is one in the characteristic of existence of the defective bits. , The number of the defective bits when the number of pixels first reaches the minimum value is set as a degeneration threshold.

The recording medium according to claim 8 according to the present invention,
A computer-readable recording medium in which a program for causing a computer to execute the degeneration threshold deriving method according to claim 6 or 7 is recorded.

The defect analysis method according to claim 9, wherein the defective memory cell has a defective electrical characteristic based on data relating to the position of the defective memory cell among the plurality of memory cells arranged in a matrix. A failure analysis method for performing failure analysis using an original fail bit map created by mapping a cell to a failure bit in units of bits and mapping the memory cell in accordance with the arrangement of the memory cells, (A) creating a degenerate fail bitmap from a map, and (b) extracting the defective bits within a preset range as defective bits of the same group for the degenerated fail bitmap. The degenerated fail bitmap is obtained by converting the original fail bitmap into a predetermined size. It is divided based on the degenerate area, converted to a form in which pixels of a size corresponding to the degenerate area are arranged, and based on a degenerate threshold defined by the number of the defective bits in the pixel, A defect determination is performed, and the pixel in which the number of the defective bits is equal to or greater than the number of the defective bits is created as a defective pixel, and the step (a) includes a step of reducing the original fail bit map by the reduced threshold. The preset range is defined by a predetermined number of the pixels, and the step (b) determines the defective pixels existing within the predetermined number as the same group, and includes the defective bit included therein. As the same group.

11. The failure analysis method according to claim 10, wherein after the step (b), the failed bit extracted as the same group is deleted from the original fail bitmap and the processed original fail bitmap is processed. The method further comprises the step of: (c) repeating the steps (a) to (c) a predetermined number of times to extract the defective bits of another group, and the step (a) is performed for the second and subsequent times. Creates the degenerated fail bitmap based on the processed original fail bitmap instead of the original fail bitmap.

In the defect analysis method according to the present invention, preferably, after the steps (a) and (b) are repeated a predetermined number of times, the defective bit included in the same group and another group (C) examining the inclusive relation with the defective bit of
(c) includes a step of defining the included group and the included group by comparing the coordinates of the formation region of the defective pixel constituting each group on the degenerate fail bitmap. .

13. The failure analysis method according to claim 12, wherein the defective memory cell has a defective electrical characteristic based on data relating to the position of the defective memory cell among a plurality of memory cells arranged in a matrix. A failure analysis method for performing failure analysis using an original fail bit map created by mapping a cell to a failure bit in units of bits and mapping the memory cell in accordance with the arrangement of the memory cells, (A) creating a degenerate fail bitmap from the map, (b) creating the redundant reduced fail bitmap by further reducing the reduced fail bitmap a predetermined number of times, and For the map, the defective bits within a preset range are replaced with the defectives of the same group. Step (c) of extracting as bits
Wherein the reduced fail bitmap partitions the original fail bitmap based on a first reduced area of a predetermined size, and a first pixel of a size corresponding to the first reduced area is provided. In addition to the conversion into an arrayed form, the first pixel is determined to be defective based on a first degeneration threshold defined by the number of the defective bits in the first pixel, and the first degeneration is performed. The first method in which the number of the defective bits equal to or greater than a threshold value is present.
Are generated as a first defective pixel, and the overlapping reduced fail bitmap divides the reduced fail bitmap based on a second reduced area having a predetermined size, and corresponds to the second reduced area. The second pixel is converted to a form in which the second pixels having the same size are arranged, and based on the second degeneration threshold defined by the number of the first defective pixels in the second pixel, A pixel defect determination is performed, and the second defective pixel is present in a number equal to or greater than the number of the first defective pixels that matches the second degeneration threshold.
Are generated as a second defective pixel, and the step (a) includes the step of reducing the original fail bitmap with the first reduced area and the first reduced threshold, and the step (b) Includes a step of reducing the reduced fail bitmap with the second reduced area and the second reduced threshold, wherein the preset range is defined by a predetermined number of the second pixels, and the step ( c) includes determining the second defective pixels within the predetermined number as the same group and extracting the defective bits included therein as the same group.

A defect analysis method according to claim 13 of the present invention, wherein after repeating the steps (a) to (c) a predetermined number of times, the defective bit included in the same group and another group Further comprising a step (d) of examining the inclusive relation with the defective bit, wherein the step (d)
Includes defining the included group and the included group by comparing the coordinates of the formation area of the second defective pixel that constitutes each group on the overlapping reduced fail bitmap.

The defect analysis method according to claim 14 of the present invention further comprises a step of displaying only the defective bits of the same group on a fail bit map.

The defect analysis method according to claim 15 of the present invention further comprises the step of displaying the defective bits of the same group and the defective bits of the other group simultaneously by color-coding them on a fail bit map. .

A failure analysis method according to claim 16 of the present invention, wherein the failure analysis method is performed on a plurality of wafers, and each of the plurality of wafers has a concentric annular shape with a wafer central portion as a central region. The method further includes a step of dividing the plurality of regions into a plurality of regions and counting the numbers of the defective bits of the same group and the defective bits of the other group present in the plurality of concentric annular regions for the plurality of wafers.

In the failure analysis method according to the present invention, the failure analysis method may be performed on a plurality of wafers, and each of the plurality of wafers may be radially formed at a predetermined angle around a wafer center. Divided into areas,
The method further comprises counting the number of the defective bits in the same group and the defective bits in the other group in the plurality of radial regions for the plurality of wafers.

A recording medium according to claim 18 of the present invention has a program for causing a computer to execute the failure analysis method according to any one of claims 1 to 5 and 9 to 13. It is a computer-readable recording medium that has been recorded.

[0036]

FIG. 1 shows a system configuration for executing a failure analysis method according to the present invention. In FIG.
An LSI tester 1 for testing electrical characteristics of all memory cells of a plurality of semiconductor devices formed on a wafer is provided through an interface 3 for data analysis.
It is connected to WS (Engineering Work Station) 2.

The data analysis EWS 2 is an LSI tester 1
Is a device for fetching and processing data as a result of the test performed in the first embodiment, and the failure analysis method according to the present invention is executed in this device.

<A. First Embodiment> FIG. 2 is a flowchart illustrating a first embodiment of a failure analysis method according to the present invention, and FIG. 3 is an example of a failure shape recognition rule when the failure analysis method according to the first embodiment is executed. FIG.

<A-1. Recognition Rule> First, a recognition rule for a defective shape will be described with reference to FIG.

In FIG. 3, item 13 is a setting item of a degeneration condition, and in this example, an example in which a degeneration area is changed as a degeneration condition is shown, and FBM-A (8 × 8 bits), F
Three types, BM-B (1 × 32 bits) and FBM-C (32 × 1 bits), are set.

Item 14 is a setting item for the name of a defect to be recognized, in which names such as a block defect, a line defect, and a bit defect are set. In this example, a block defect is set. The following items 15 to 21 are also set in the recognition of a line defect and a bit defect. In FIG. 3, a description will be given of a block defect as an example.

Item 15 is a setting item of a degenerated FBM name which is a target (scan target) of a failure analysis operation (referred to as a scan). In this example, FBM-A is selected.

Item 16 is a setting item of the recognition order of each recognition target defect. In this example, the setting is such that the block defect is recognized first.

Item 17 is a setting item of the maximum value of the defect size of the defect to be recognized, and is represented by the total number of bits in the row (x) and the column (y). In this example, 32 × 32 bits (32 rows 3
(Meaning two columns).

Item 18 is a setting item of a defect rate for recognizing and judging a defect to be recognized. In this example, the defect rate is 100%.
Is set to be determined to be defective in the case of.

Item 19 is a setting item for determining whether or not the recognition target defect can be adjacent to each other.

Here, adjacent to a defect to be recognized indicates a state in which defective pixels are adjacent to each other outside a region defined by the defect size.

Item 20 is a setting item of a scan area (scan size) per step, and is represented by the total number of bits of a row (x) and a column (y). In this example, 32 × 32
Bit is set.

Item 21 is for items other than the scan target degenerate FBM.
That is, it is a setting item of a defect shape determination rule based on a standardized defect rate for other degenerated FBMs degenerated in areas other than the degenerated area of FBM-A, and is degenerated in the degenerated areas of FBM-B and FBM-C. Block failure (NORMAL), x
It is determined whether it is a line defect (X-Line) arranged in the direction or a line defect (Y-Line) arranged in the y direction.

For example, if the standardized failure rates in the reduced areas of the FBM-B and FBM-C are both in the range of 0.75 to 1.25, it is determined that the block is defective, and the FBM is determined. -B and FBM-C degrade in the degenerate area, and the standardized defect rates are 0
-0.5 and 0.75-1.25, it is determined that the line is defective in the x-direction, and FBM-B and FB
The standardized failure rates when degenerated in the degenerate area of MC are 0.75 to 1.25 and 0 to 0.5, respectively.
Is determined to be a line defect in the y direction.

<A-2. Analysis Operation> Next, the failure analysis operation will be described with reference to FIG. 2 and FIG. 3 and FIGS. FIG. 4 shows the LSI shown in FIG.
FIG. 4 is a diagram showing an original FBM in which data relating to the position of a defective memory cell detected by the tester 1 is mapped to an area divided by x × y = 32 bits × 32 bits, and shows a defective pattern at a different location in the memory cell area. To
FIGS. 4A, 4B and 4C show the original FBM22.
A, FBM22B, and FBM22C.

The actual number of memory cells is enormous, such as megabits or gigabits, and
It goes without saying that the area for creating M is much larger than the above-mentioned 32 bits × 32 bits.

The original FBM 22A shown in FIG.
Are mostly defective bits, and when the defective bits are shown in black, normal bits NB representing normal memory cells are scattered as blank portions in the drawing.

The original FBM 22B shown in FIG.
Is a pattern in which a plurality of defective bit strings FBL in which defective bits are arranged in a row in the y direction exist at 3-bit intervals in the x direction.

The original FBM shown in FIG.
22C is a pattern in which a plurality of defective bit strings FBL in which defective bits continue in a row in the x direction exist at 3-bit intervals in the y direction.

In the following, this original FBM2
The data analysis operation for 2A, 22B, and 22C will be described.

In FIG. 2, when the defect shape recognition is started, first, FIG. 3 which is set according to the type of the semiconductor device is set.
Is read (step ST1).

Next, the original FBMs 22A, 22B, and 22C shown in FIGS. 4A to 4C are reduced based on the numerical values of the plurality of reduced areas set in the setting item 13 (reduced area) of the recognition rule. Let multiple degenerate FBM
Is created (step ST2). In addition, original FB
M22A, FBM22B, and FBM22C are created before the start of defective shape recognition.

Here, FIGS. 5A to 5C show that the original FBMs 22A, 22B and 22C are divided by the degenerate area (8 × 8 bits) of the FBM-A, (Not shown)
BM23A, 23B, and 23C are shown, respectively.

The original FB shown in FIGS. 4A to 4C
When M22A, 22B, and 22C are reduced to an area of 8 × 8 bits (64 bits), there is always a defective bit in each area in any FBM. Therefore, all the areas become defective pixels, and the defective pixels are filled. 5A, the whole area is filled in as shown in FIGS. 5A to 5C.

FIGS. 6A to 6C show that the original FBMs 22A, 22B, and 22C are divided by a degenerate area (1 × 32 bits) of the FBM-B, and a degenerate threshold of 1 bit (shown in the recognition rule).ず) based on the degenerate F
BM24A, 24B, and 24C are shown, respectively.

The original FB shown in FIGS. 4A to 4C
When the M22A, 22B, and 22C are reduced to an area of 1 bit in the x direction and 32 bits in the y direction, each of the original FBMs 22A and 22C,
Since there is always a defective bit in each area, all the areas become defective pixels. When the defective pixels are shown by being filled out, the entire area is shown in FIGS. 6A and 6C in the drawing. The result is a solid figure. However, in the original FBM 22B, only the area corresponding to the defective bit string FBL has a stripe-shaped defective pixel FPL.
6B, a pattern in which a plurality of defective pixels FPL exist at 3-bit intervals in the x direction as shown in FIG. 6B.

FIGS. 7A to 7C show that the original FBMs 22A, 22B, and 22C are divided by a degenerate area (32 × 1 bit) of the FBM-C, and a degenerate threshold of 1 bit (shown in the recognition rule).ず) based on the degenerate F
BM25A, 25B, and 25C are shown, respectively.

The original FB shown in FIGS. 4A to 4C
When the M22A, 22B, and 22C are reduced to an area of 32 × 1 bits of 32 bits in the x direction and 1 bit in the y direction, in the original FBMs 22A and 22B,
Since there is always a defective bit in each area, all the areas become defective pixels. When the defective pixels are shown by being filled out, the entire area is shown in FIG. 7A and FIG. 7B. The result is a solid figure. However, in the original FBM 22C, only the area corresponding to the defective bit string FBL has a stripe-like defective pixel FPL.
In the drawing, as shown in FIG. 7C, a pattern in which a plurality of defective pixels FPL exist at 3-bit intervals in the y direction.

Next, a block failure (A-Block-Fail) is selected first as a recognition failure based on the setting in the recognition rule setting item 16 (recognition order of the recognition failure) (step ST3). .

Thereafter, the FBM-A is set on the basis of the setting in the setting item 15 of the recognition rule (scanned FBM name).
Degenerated FBMs 23A and 23B degenerated in the degenerated area of
23C is selected, and a 32 × 32 bit area is selected from the areas of the degenerated FBMs 23A, 23B and 23C based on the setting in the setting item 17 (defective size) (step ST4).

In this example, the scan size set in the setting item 20 is also 32 × 32 bits and thus matches the defect size, but the defect size does not always match the scan size.

Next, the defect rate in the area selected in step ST4 is calculated (step ST5).

The defect rate is a percentage of a value obtained by dividing the number of defective pixels in the degenerated FBM by the number of pixels matching the defective size set in the setting item 17, and is shown in FIG.
In the degenerated FBMs 23A, 23B, and 23C shown in (C) to (C), the number of defective pixels is 16 and the number of pixels matching the defective size is also 16 pixels.
The failure rate is 100%.

Then, based on the failure rate (100%) set in the setting item 18 and the setting (adjacency possible) of the setting item 19 (whether or not the recognition target defect is adjacent), a step S is performed.
Determining defective pixels in the region selected at T4;
When both the determination conditions are satisfied, the defective pixel in the area is recognized (estimated) as a recognition target defect, that is, a block defect, and the process proceeds to the next step ST7, and when not satisfied, the process proceeds to step ST9 (step ST6). ).

Here, the degenerate F shown in FIGS.
BM23A, 23B and 23C all have 100% failure rate
Since the defect rate set in the setting item 18 is satisfied and the setting item 19 is set to be adjacent, the block is recognized (estimated) as a block defect, and the process proceeds to step ST7.

In step ST7, the defect rate in the area selected in step ST4 is calculated for the other degenerated FBMs that have been degenerated in areas other than the degenerated area of the FBM-A, and are standardized using the defect rates calculated in step ST5. Become

Here, in the degenerated FBMs 24A and 24C shown in FIGS. 6A and 6C, the number of defective pixels is 32 pixels, and the total number of pixels in the 32 × 32 bit area is also 32 pixels. Therefore, the defect rate becomes 100%, and the degenerated FBM calculated in step ST5 is used.
When standardized with a defect rate of 100% for 23A and 23C,
Both become 1.

In the degenerated FBM 24B shown in FIG. 6B, the number of defective pixels is 8 and the total number of pixels is 32, so that the defective rate is 25%.
When standardized with a 100% defect rate of the degenerated FBM23B,
0.25.

In the degenerated FBMs 25A and 25B shown in FIGS. 7A and 7B, the number of defective pixels is 32, and the total number of pixels in a 32 × 32 bit area is also 32. So the defect rate is 1
00%, and the degenerated FBM2 calculated in step ST5
When normalized with a defect rate of 100% for 3A and 23B, both become 1. In the degenerated FBM 25C shown in FIG. 7C, the number of defective pixels is 8, and 32 × 32
Since the total number of pixels in the bit area is 32 pixels, the failure rate is 25%, which is 0.25 when normalized with the 100% failure rate of the degenerated FBM 23C.

Next, the setting item 2 of the recognition rule shown in FIG.
Based on 1 (defective shape determination rule based on the defect rate of other degenerated FBMs degenerated in areas other than the degenerated area of FBM-A), the previously recognized defect is re-recognized (step ST8).

That is, the original F shown in FIG.
The BM 22A has a standardized failure rate of 1 when degenerated in the degenerated area of the FBM-B and FBM-C.
Therefore, FBM-B and FBM in the setting item 21
Based on the BM-C standardized determination rule based on the failure rate, the block is re-recognized (specified) as a block failure (NORMAL).

The original FBM shown in FIG.
22B, the standardized failure rates when degenerated in the degenerated areas of the FBM-B and the FBM-C are each 0.
Since they are 25 and 1, they are re-recognized (specified) as line defects (X-Line) arranged in the x direction.

The original FBM shown in FIG.
22C is a line defect (Y-Line) arranged in the y-direction because the standardized failure rates when degenerated in the degenerate areas of the FBM-B and FBM-C are 1 and 0.25, respectively. Is re-recognized (specified).

Next, in step ST9, it is determined whether or not an unscanned area remains in the semiconductor device. If the unscanned area remains, the next scan area (here, 32 × 32 bits set in setting item 20) is determined. Is selected, and the operation after step ST5 is repeated (step S5).
T12). If all the scans in the semiconductor device have been completed, the process proceeds to step ST10.

Next, in step ST10, it is determined whether or not an unselected recognition target defect exists among the recognition target defects set in the recognition rule shown in FIG. A defect is selected, and the operation after step ST4 is repeated (step ST13). If all the scans in the semiconductor device have been completed, step ST1
Proceed to 1. In the recognition rule shown in FIG. 3, after the block failure (A-Block-Fail), the line failure (B-line-F
ail) is set as the recognition target failure, so that the operation after step ST4 is repeated based on the setting items 15 to 21 for the line failure.

Then, in step ST11, the area recognized by the operations (coarse recognition operation) of steps ST3 to ST10 is scanned at the 1-bit level to obtain detailed information such as the actual defect size and the number of defective bits. This ends the defective shape recognition in one semiconductor device.

Since a plurality of semiconductor devices are usually formed on the wafer, the step S
The operation from T3 to ST11 is performed.

<A-3. Operation and Effect> According to the failure analysis method of the first embodiment described above, a plurality of degenerated FBMs having different degeneration areas are created as the degeneration conditions, and the defect shape is determined based on the respective defect rates. As compared with the case where the defective shape is determined only by the defective rate of the degenerated FBM formed under the degenerate condition, more types of defective shapes can be specified, and the accuracy of the classification of the defective shape is improved.

<B. Second Embodiment> FIG. 8 is a flowchart illustrating a second embodiment of the failure analysis method according to the present invention. FIG. 9 is an example of a failure shape recognition rule when the failure analysis method according to the second embodiment is executed. FIG.

<B-1. Recognition Rule> First, the defective shape recognition rule will be described with reference to FIG.

In FIG. 9, items 26 and 27 are setting items of the degeneration condition. In this example, an example of changing the degeneration threshold, which is one of the degeneration conditions, is shown.
As shown in the figure, although the degeneration area is only one type of 8 × 8 bits, the setting item 27 is set to FBM as the degeneration threshold.
Two types of degeneration thresholds, -A (1 bit) and FBM-B (5 bits), are set.

Here, the degeneracy threshold is an index value for determining whether a predetermined degenerate area (pixel) is a pass pixel or a defective pixel, and is defined as the number of defective bits existing in the predetermined degenerate area. Is set. For example,
When the degeneration threshold is 1 bit, if there is one or more defective bits in the degenerated area, it becomes a defective pixel.

The first embodiment described with reference to FIG.
The same reference numerals are given to the same setting items as those of the failure shape recognition rule when the failure analysis method is executed.
Hereinafter, the setting contents of each setting item will be enumerated.

A line defect is set in the setting item 14 (recognition target defect name). In FIG. 8, the line defect will be described as an example.

Setting item 15 (scan target reduced FBM)
In (name), FBM-A is selected.

The setting item 16 (recognition order of each recognition target defect) is set so that the line defect is recognized first.

In the setting item 17 (defective size of the defect to be recognized), 8 × 32 bits (meaning 8 rows and 32 columns) are set.

The setting item 18 (defective rate) is set so that when the defective rate is 100%, it is determined to be defective.

In the setting item 19 (whether or not the recognition target defect is adjacent), it is set so that the adjacency is not allowed.

The setting item 20 (scan size) is set to 8 × 32 bits.

In the setting item 21 (defective shape determination rule), it is determined whether or not the line is defective (NORMAL) or not recognized based on a standardized defective rate when the degeneracy threshold of FBM-B is used. .

For example, when the standardized failure rate in the case of using the FBM-B degeneration threshold is in the range of 0.75 to 1.25, it is determined that the line is defective, and the FBM-B degeneration threshold is used. If the standardized defect rate is 0 to 0.5
Is determined to not be recognized.

<B-2. Analysis Operation> Next, the failure analysis operation will be described with reference to FIG. 8 and FIGS. 9 and 10 to 12. FIG. 10 is a diagram showing an original FBM in which data relating to the position of a defective memory cell detected by the LSI tester 1 shown in FIG. 1 is mapped to an area divided by x × y = 32 bits × 32 bits. The two different types of defective patterns are shown in FIGS. 10A and 10B as an original FBM 28A and an original FBM 28B.

The original FBM 28 shown in FIG.
A is a pattern in which a defective bit string FBL in which defective bits are arranged in a single row in the y direction exists in a single row near the left end as viewed in the drawing.

The original FB shown in FIG.
M28B is biased to the left as viewed in FIG.
Are scattered patterns.

In the following, this original FBM2
The data analysis operation for 8A and 28B will be described.

In FIG. 8, when the defect shape recognition is started, first, FIG. 9 which is set according to the type of the semiconductor device is set.
Is read (step ST21).

Next, the original FBMs 28A and 28B shown in FIGS. 10A and 10B are reduced based on the numerical value of the reduced area set in the setting item 26 (reduced area) of the recognition rule. The plurality of degenerate FBs are set using the plurality of degenerate thresholds set in
M is created (step ST22).

Here, FIGS. 11A and 11B show:
Degeneration area (8 × 8 bits) set in setting item 26
Shows the degenerated FBMs 29A and 29B obtained by degenerating the original FBMs 28A and 28B based on the degeneration threshold of the FBM-A set in the setting item 27, respectively.

When the original FBMs 28A and 28B shown in FIGS. 10A and 10B are reduced to an area of 8 × 8 bits (64 bits), each is divided into a 4 × 4 pixel matrix, and these are divided into FBM- When the determination is made based on the degeneracy threshold value (1 bit) of A, all of the left column of the pixel matrix becomes the defective pixel FPL, and when the defective pixel is shown by being filled, as shown in FIGS. 11A and 11B, This is a diagram in which one left column is filled.

Here, FIG. 12A and FIG.
Degeneration area (8 × 8 bits) set in setting item 26
Here, the degenerated FBMs 30A and 30B obtained by degenerating the original FBMs 28A and 28B based on the degeneration threshold of the FBM-B set in the setting item 27 are shown.

When the original FBMs 28A and 28B shown in FIGS. 10A and 10B are reduced to an area of 8 × 8 bits (64 bits), each of them is divided into a 4 × 4 pixel matrix, and these are divided into FBM- When the pixel is degenerated by the degeneration threshold of B (5 bits), there is no pixel having two or more defective bits, so that the entire pixel matrix becomes the pass pixel PP.

Next, a line failure (A-Line-Fail) is selected first as a recognition failure based on the setting in the recognition rule setting item 16 (recognition order of the recognition failure) (step ST23). .

Thereafter, the FBM-A is set based on the setting of the setting item 15 (scan target reduced FBM name) of the recognition rule.
Of the reduced FBMs 29A and 29B based on the setting in the setting item 17 (defective size) are selected based on the setting in the setting item 17 (defective size).
A 32-bit area is selected (step ST24).

Next, the defect rate in the area selected in step ST24 is calculated (step ST25).

The degenerated FB shown in FIGS. 11A and 11B
In M29A, the number of defective pixels is 4 pixels, and the number of pixels matching the defective size (8 × 32 bits) set in the setting item 17 is also 4 pixels, so that the defective rate is 100%.

Then, based on the defect rate (100%) set in the setting item 18 and the setting (non-adjacent) of the setting item 19 (adjacency of the recognition target defect), the area within the area selected in step ST24 is determined. The defective pixel is determined, and if both of the determination conditions are satisfied, the defective pixel in the area is recognized (estimated) as a recognition target defect, and the process proceeds to the next step ST27, and if not, the process proceeds to step ST29 ( Step ST26).

Here, the failure rates of the degenerated FBMs 29A and 29B shown in FIGS.
%, Which satisfies the defect rate set in the setting item 18, and in the setting item 19, the non-adjacency is set, but outside the area defined by 8 × 32 bits corresponding to the defective pixel area. Does not exist adjacent to any defective pixel FPL,
Proceed to 27.

In step ST27, the defect rate in the area selected in step ST24 is calculated for the other degenerated FBMs that have been degenerated at a value other than the degeneration threshold of the FBM-A, and are standardized using the defect rate calculated in step ST25. Become

Here, the degenerated FBM3 shown in FIG.
At 0A, the number of bad pixels is 4 pixels,
Defective size set in setting item 17 (8 x 32 bits)
Is also 4 pixels, the defect rate is 100%, and the degeneration F calculated in step ST25 is
When normalized with the defect rate of BM29A of 100%, it becomes 1.

In the degenerated FBM 30B shown in FIG. 12B, since the number of defective pixels is 0, the defective rate is 0%.
And normalized to 0 when the defect rate of the degenerated FBM 29B is 100%.

Next, the setting item 2 of the recognition rule shown in FIG.
1 (defective shape determination rule based on the defect rate for other degenerated FBMs degenerated at other than the degeneration threshold of FBM-A)
Re-recognize defects identified so far based on
(Step ST28).

That is, in the original FBM 28A shown in FIG. 10A, since the standardized failure rate when degenerated by the degeneration threshold of FBM-B is 1, the setting item 21
Is re-recognized (specified) as a line defect (NORMAL) based on the determination rule based on the standardized defect rate of the FBM-B.

The original FB shown in FIG.
M28B does not recognize the failure rate because the standardized failure rate in the case of degeneration with the degeneration threshold of FBM-B is 0 (NOT
RECOGNIZE).

Thereafter, the operations in steps ST29 to ST33 are the same as the operations in steps ST9 to ST13 (see FIG. 2) in the first embodiment, and a description thereof will not be repeated.

<B-3. Operation and Effect> According to the failure analysis method of the second embodiment described above, a plurality of degenerated FBMs having different degeneration thresholds are created as the degeneration conditions, and the defect shape is determined based on the respective defect rates. Can be recognized in consideration of the above, the misidentification of the defective shape is reduced and the accuracy of the classification of the defective shape is improved as compared with a case where the defective shape is determined only by the defect rate of the degenerated FBM created under one kind of degenerate condition. I do.

<C. Third Embodiment> In the first embodiment described above, a plurality of degenerate FBMs are formed by changing the size of the degenerate area. In the second embodiment, the plurality of degenerate areas are the same, and the plurality of degenerate FBMs are changed by changing the degenerate threshold. The failure analysis method of forming the FBM and specifying the failure shape using the FBM has been described. However, in the third embodiment according to the present invention, the failure in the case where both the size of the degradation area and the degradation threshold can be changed. The analysis method will be described.

FIG. 13 is a flowchart for explaining a failure analysis method according to a third embodiment of the present invention. FIG. 14 shows an example of a failure shape recognition rule when the failure analysis method according to the third embodiment is executed. FIG.

<C-1. Recognition Rule> First, a recognition rule for a defective shape will be described with reference to FIG.

Basically, the setting is the same as that of the recognition rule according to the first embodiment described with reference to FIG. 3. However, instead of the setting item 13 in FIG. Item 31 is included.

That is, in this example, the combination of the degeneration area and the degeneration threshold is used as the degeneration condition, and the FBM-A
(Degeneration area 8 × 8 bits, degeneration threshold 1 bit), FB
MB (degeneration area 1 × 32 bits, degeneration threshold 1 bit), FBM-C (degeneration area 32 × 1 bits, degeneration threshold 1 bit), FBM-D (degeneration area 8 × 8 bits,
(Degeneration threshold 8 bits) are set.

In the setting item 21 (defective shape determination rule), a standardized defect rate other than the reduced FBM to be scanned, that is, other reduced FBMs reduced by the reduced area and the reduced threshold of the FBM-A. Is a setting item of a defective shape determination rule based on the FBM-B to FBM-
The determination is made based on the standardized defect rate when the data is reduced using the reduced area of D and the reduced threshold.

For example, if the standardized failure rates in the reduced areas FBM-B to FBM-D fall within the range of 0.75 to 1.25, it is determined that the block is defective. .

Further, a case where no failure is recognized is determined based on a standardized failure rate when the degeneracy threshold of the FBM-D is used.

For example, if the standardized failure rate in the case of using the FBM-D degeneration threshold is in the range of 0 to 0.5, it is determined that no failure is recognized.

Note that line defects (X
-Line), line failure arranged in the y direction (Y-Line)
Is the same as the recognition rule of the first embodiment.

The setting contents of the other setting items 14 to 20 are the same as the recognition rules of the first embodiment.

<C-2. Analysis Operation> The failure analysis operation in steps ST41 to ST53 of the flowchart shown in FIG. 13 is basically the same as steps ST1 to ST13 of the flowchart shown in FIG. 2, except that in step ST42, the original FBM A point that the degeneration is performed based on a numerical value of a set of a plurality of degeneration areas and a degeneration threshold set in the setting item 31 (degeneration area);
The point is that the defect shape determination rule used in the failure re-recognition in step ST48 is complicated by the addition of the degeneracy threshold of FBM-D.

In the defective shape recognition rule shown in FIG. 14, the FBM-D has a reduced area of 8 × 8 bits and a reduced threshold of 8 bits. This is an example of a combination of the reduced area and the reduced threshold. This shows that the adoption of conditions different from the degeneration conditions of -A to FBM-C increases the number of types of defective shapes that can be specified. For example, FBM
By adopting a condition that complements the degeneration conditions of -A to FBM-C, it is possible to specify a defective shape that cannot be specified under the degeneration conditions of FBM-A to FBM-C.

<C-3. Operation and Effect> According to the failure analysis method of the third embodiment described above, a plurality of degenerated FBMs having different degeneration areas and different degeneration thresholds are created as the degeneration conditions, and the defect shape is determined based on the respective defect rates. Further, as compared with the case where the degeneration condition is only the degeneration area or only the degeneration threshold, more types of defective shapes can be specified, and the accuracy of the classification of defective shapes is improved.

<D. Fourth Embodiment><D-1. Derivation Operation of Degeneration Threshold> In the above-described second and third embodiments, an example has been described in which the original FBM is degenerated using the degeneration threshold, but the degeneration threshold must be set to an appropriate value depending on the shape of the defective pattern. No. In the second and third embodiments, a preset degeneracy threshold is used. However, in the present embodiment, a method of automatically acquiring an appropriate degeneration threshold based on the shape of a defective pattern will be described with reference to FIGS. This will be described with reference to FIG.

FIG. 15 shows the data regarding the position of the defective memory cell detected by the LSI tester 1 shown in FIG.
FIG. 15 is a diagram showing an original FBM mapped to an area divided by × y = 32 bits × 32 bits, wherein two different types of defective patterns are shown in FIG.
(B) Original FBM32A, Original FBM3
Shown as 2B.

The original FBM 32 shown in FIG.
A is a pattern in which a defective bit string FBL in which defective bits are arranged in a single row in the y direction exists in a single row near the left end as viewed in the drawing.

The original FB shown in FIG.
M32B is biased to the left as viewed in FIG.
Are scattered patterns.

In the following, this original FBM3
A method of automatically acquiring the degeneration threshold based on the data of 2A and 32B will be described with reference to the flowchart shown in FIG.

First, in step ST61, the original FBMs 32A and 32B are degenerated based on a predetermined degeneration area. The numerical values are set, for example, in the setting items 26 (in the recognition rule of the second embodiment described with reference to FIG. 9). 8 × 8 bits set in the degenerate area.

When the original FBMs 32A and 32B shown in FIGS. 15A and 15B are reduced to an area of 8 × 8 bits (64 bits), each is divided into a 4 × 4 pixel matrix.

Next, the number of defective bits in each pixel (degenerate area) is counted (step ST62). Here, a list of the number of defective bits in each pixel is shown in FIGS. 17A and 17B.

In FIG. 17A, four pixels in the leftmost column in FIG. 17 include eight defective bits, but the other pixels do not include defective bits.

In FIG. 17 (B), the pixels in the leftmost column in FIG. 17 include one defective bit up to the third pixel from the top, and 2 pixels in the bottom pixel.
Are included. Other pixels do not contain bad bits.

Next, based on the number of defective bits in each pixel counted in step ST62, the existence characteristic of defective bits included in the pixel is obtained (step ST63).

The concept of this operation is as shown in FIG.
This can be explained by creating a graph in which the number of defective bits included in one pixel is the horizontal axis and the number of pixels is the vertical axis.

That is, in FIG. 18, the number of pixels including one defective bit is three, the number of pixels including two defective bits is one, and the number of pixels including eight defective bits is four. It can be seen that the number of pixels including eight defective bits is the largest, followed by the number of pixels including one defective bit.

From this graph, it is estimated that the characteristic of the presence of the defective bit is approximated by a quadratic curve having the minimum value of the number of pixels 0, and the degeneration threshold is calculated from the minimum value of the characteristic of the occurrence of the defective bit (step ST64). .

Specifically, when the number of defective bits is 1, the number of pixels is counted, and the number of pixels is 0, that is, the number of defective bits when the minimum value is first reached (the value on the horizontal axis). Is automatically derived as a degeneration threshold. Note that the degeneration threshold obtained by this method is 3 bits in the case of this example.

The operation of deriving the degeneracy threshold described above may be executed, for example, when creating the recognition rule shown in FIG.
In setting the degeneration threshold of the setting item 27, the calculated degeneration threshold can be used as the degeneration threshold of the FBM-B.

<D-2. Operation / Effect> As described above, by calculating the degeneracy threshold from the existence characteristics of the defective bit included in the pixel, it is possible to obtain a threshold that does not recognize a bit defect that occurs randomly.

That is, in the case of a block defect or a line defect, the probability that a plurality of defective bits exist in one pixel increases, but in the case of a randomly generated bit defect, the probability that a plurality of defective bits exist in one pixel is low. Become. Therefore, if the method of the present embodiment, in which the degeneration threshold is likely to be larger than 1, is adopted, a failure analysis method for recognizing only a block failure or a line failure will not be recognized for a randomly generated bit failure. Can be automatically obtained.

<E. Example of Implementing Failure Analysis Method> In implementing the failure analysis method according to the present invention described above, for example, a computer system as shown in FIG. 19 may be used.

That is, the data analysis EWS shown in FIG.
2 is configured by a computer system as shown in FIG.

In FIG. 19, EWS2 for data analysis is
Computer main body 101, display device 102, magnetic tape device 103 on which magnetic tape 104 is mounted, keyboard 105, mouse 106, CD-ROM (Compac
t DISC-READ ONLY MEMORY)
A ROM device 107 and a communication modem 109 are provided. As a recording medium, a magnetic tape or a CD-ROM
It goes without saying that a configuration that can use other components may be used.

The failure analysis method according to the present invention described with reference to the flowcharts shown in FIGS. 2, 8 and 13 can be realized by executing a computer program on a computer. It is supplied by a recording medium such as a magnetic tape 104 or a CD-ROM 108. In addition, the program can be transmitted on a communication path in the form of a signal, and further downloaded to a recording medium.

A program for realizing the failure analysis method according to the present invention (referred to as a failure analysis program) is executed by the computer main body 101, and the operator operates the display device 10.
By operating the keyboard 105 or the mouse 106 while looking at 2, the failure analysis is performed. Further, the failure analysis program may be supplied to the computer main body 101 from another computer via the communication line via the communication modem 109.

FIG. 20 is a block diagram showing the configuration of the computer system shown in FIG. The computer main unit 101 shown in FIG. 19 includes a CPU (CENTRAL PROCESSING
UNIT) 200, ROM (READ ONLY MEMORY) 201,
It has a RAM (RANDOM ACCESS MEMORY) 202 and a hard disk 203.

The CPU 200 controls the display device 10
2. Magnetic tape device 103, keyboard 105, mouse 106, CD-ROM device 107, communication modem 109,
Processing is performed while data is input and output between the ROM 201, the RAM 202, and the hard disk 203.

Magnetic tape 104 or CD-ROM 1
The failure analysis program recorded on a recording medium such as 08
The data is temporarily stored in the hard disk 203 by the CPU 200. The CPU 200 performs a failure analysis by appropriately loading a failure analysis program from the hard disk 203 into the RAM 202 and executing the program.

The computer system described above is only an example, and the computer system is not limited to this as long as it can execute a failure analysis program.

It is needless to say that the degenerate threshold deriving program described in the fourth embodiment with reference to the flowchart shown in FIG. 16 can be realized by the computer system.

<F. Fifth Embodiment><F-1. Example of Classified Failure Group> FIG. 21 is an original FBM 50 showing a failure group classified by applying the fifth embodiment of the failure analysis method according to the present invention.

The original FBM 50 is an original FBM of a semiconductor wafer 512 on which 28 semiconductor devices 511 having a memory cell number of x × y = 32 bits × 16 bits (total 512 bits) are formed. In the following description, the semiconductor device 511 may be described with reference numerals 5111 to 5113 and 5115 to 5118 for convenience.

In FIG. 21, a defective memory cell, that is, a defective bit FB is shown by being filled, and a defective bit exists in an upper left area (area) 513 and a right area (area) 514 as viewed in the figure. .

In the region 513, the density of defective bits (hereinafter referred to as the defect density) is high, and in the region 514, the distribution of the defective density is low.

FIG. 22 shows details of the area 513. FIG.
As shown in the figure, the defective bit FB is caused by the entire region of the semiconductor device 5111 at the left corner and the semiconductor device 5112 adjacent thereto.
And 5113 near the boundary.

<F-2. Analysis Operation> Next, the failure analysis operation of the sixth embodiment will be described with reference to FIGS. 21, 22, and 24 to 27 using the flowchart shown in FIG.

First, in step ST71, initial settings are read. Here, as an initial setting, the size of the degeneration area is 8 × 8 bits, the adjacency determination distance is 1 pixel, the number of FBMs to be created is two, and the degeneration threshold of the degeneration condition FBM-1 that defines one of them is The degeneration threshold of the degeneration condition FBM-2 that defines four bits and the other is one bit.

Here, the adjacency determination distance is a parameter that defines that defective pixels within a predetermined distance (defined by the number of pixels) with respect to a specific defective pixel belong to the same group. In this case, Defective pixels within one pixel belong to the same group.

Note that the specific defective pixel may be any defective pixel. First, any defective pixel is selected, and a defective pixel within the adjacent determination distance centered on the defective pixel is examined. The grouping is performed by repeating the adjacent determination centering on any of the defective pixels.

Next, in step ST72, the variable n
Is set as 1. Here, the variable n refers to the step ST
It is a numerical value that is incremented by one each time a series of processing from 73 to ST75 is repeated, and is incremented until the number of created FBMs set in step ST71 is reached.

By setting the variable n = 1, degeneration is performed based on the degeneration condition FBM-1, and the original FBM 50 shown in FIG.
Are divided by the degeneration area (8 × 8 bits) set in step ST71, and are degenerated based on the degeneration threshold (4 bits) of the degeneration condition FBM-1 to generate the degeneration FBM 51.

FIG. 24 shows the degenerated FBM 51. When the original FBM 50 shown in FIGS. 21 and 22 is reduced to an area of 8 × 8 bits of 8 bits in the x direction and 8 bits in the y direction, and the pass / fail threshold is determined to be good / bad, the area 513A has Although defective pixels (indicated by hatching) are densely present, there are no defective pixels in the region 514A. Note that regions 513A and 513A
14A is a region on the degenerated FBM corresponding to the regions 513 and 514 in FIG.

This indicates that in the area 514A, all the pixels have defects of less than 4 bits, and all the pixels are pass pixels.

Returning to the description of FIG. 23, step ST
At 74, defective pixels that are close to each other within the adjacent determination distance (1 pixel) in the degenerated FBM 51 are grouped and extracted as a level 1 group. Here, all the defective pixels in the area 513A are extracted as a level 1 group.

It should be noted that the level 1 means a result obtained by performing the processing with the variable n = 1 set in step ST72.

Then, the defective bits of the group extracted in step ST74 are deleted from the original FBM (step ST75). Here, the defective bit in the area 513 is deleted from the original FBM 50, and the processed original FBM 50A shown in FIG. 25 is obtained.

In FIG. 25, defective bits are deleted from region 513B, and defective bit FB exists only in region 514B. Note that regions 513B and 514B
Is an area on the processed original FBM corresponding to the areas 513 and 514 in FIG.

As described above, a series of grouping processing is completed through steps ST73 to ST75.
At 76, it is confirmed whether or not the variable n has reached 2 which is the number of created FBMs.

Here, since the number of created FBMs has not reached 2, 1 is added to the variable n in step ST78, and the processing from step ST73 is repeated.

Here, FIG. 26 shows details of the area 514B in FIG. As shown in FIG.
B occurs sparsely in the semiconductor device 5115 and the semiconductor devices 5116, 5117, and 5118 adjacent thereto.

By setting variable n = 2, degeneration is performed based on the degeneration condition FBM-2. In step ST73, the processed original FBM shown in FIG.
50A is set in the degeneration area (8
× 8 bits) and degenerate based on the setting (1 bit) of the degeneration threshold of the degeneration condition FBM-2 to generate the degenerate FBM5
Create 2.

FIG. 27 shows the degenerated FBM 52. When the processed original FBM 50A shown in FIG. 25 is reduced to an area of 8 × 8 bits of 8 bits in the x direction and 8 bits in the y direction, and the pass / fail is determined based on the 1-bit reduction threshold, a defect is found in the area 514C. Pixels (indicated by hatching) are densely present. In the processed original FBM 50A, the defective bit is deleted in the area 513C, so that there is no defective pixel. The regions 513C and 514C correspond to the region 51 in FIG.
Regions on the degenerated FBM corresponding to 3 and 514.

Returning to the description of FIG.
At 74, defective pixels that are close to each other within the adjacent determination distance (1 pixel) in the degenerated FBM 52 are grouped and extracted as a level 2 group. Here, all the defective pixels in the area 514C are extracted as a level 2 group.

[0188] The level 2 means the result of performing the process with the variable 2 set in step ST72.

Then, the defective bits of the group extracted in step ST74 are deleted from the original FBM (step ST75). Here, the defective bit in the area 514C is deleted from the processed original FBM 50A, and there is no defective bit on the FBM.

As described above, a series of grouping processing is completed through steps ST73 to ST75.
At 76, it is confirmed whether or not the variable n has reached 2 which is the number of created FBMs.

Here, since the variable n is 2 and has reached the number of created FBMs of 2, the process proceeds to step ST77.
In step ST77, the defective shapes in the extracted groups are classified for each extracted group.

In classifying the defect shape for each group, the defect analysis method described in the first to fourth embodiments may be used, or another general defect analysis method may be used.

<F-3. Operation and Effect> According to the failure analysis method of the fifth embodiment described above, a plurality of degenerate FBMs in which the degeneracy threshold is changed are created, and the pixels existing within a predetermined adjacent determination distance are the same for each degenerate FBM. By treating them as belonging to a group, areas having different defect densities can be grouped as separate groups, and by classifying the defect shapes for each group after grouping, the cause of the defect can be effectively specified. be able to.

In other words, when the defects are densely generated, it is considered that the cause is the local concentration of foreign matter, but the cause differs depending on the defect density. By performing the grouping and classifying the defect shape, the cause of the defect can be specified more accurately.

<G. Sixth Embodiment><G-1. Example of Classified Failure Group> FIG. 28 shows an original FBM 60 showing a failure group classified by applying the failure analysis method according to the sixth embodiment of the present invention.

The basic configuration of the original FBM 60 is shown in FIG.
Are the same as those of the original FBM 50 shown in FIG. 1, and the same components are denoted by the same reference numerals and overlapping description will be omitted.

In the following description, the semiconductor device 511 may be denoted by reference numerals 5111 to 5116 for convenience.

In FIG. 28, a defective memory cell, that is, a defective bit FB is shown by being filled, and a defective bit exists in a region (area) 517 at the upper left of the drawing. The region 517 has a distribution state in which the defect density has shading.

FIG. 29 shows the details of the area 517. FIG.
As shown in the figure, the defective bit FB is caused by the semiconductor device 5111 in the left corner and the semiconductor devices 5112 to 5116 in the vicinity thereof.
The defect density is relatively high near the boundary between the semiconductor device 5111 and the semiconductor devices 5112 and 5113 adjacent to the semiconductor device 5111, and decreases as the distance from the semiconductor device 5111 increases.

<G-2. Analysis Operation> Next, a failure analysis operation of the sixth embodiment will be described with reference to FIGS. 28, 29, and 31 to 33 using a flowchart shown in FIG.

Steps ST81 to ST8
The processing in step 4 is performed in step ST71 described with reference to FIG.
To ST74, and a duplicate description will be omitted.

First, after steps ST81 and ST82, in step ST83, the original FBM 60 shown in FIG. 29 is divided by the reduction area (8 × 8 bits) set in step ST81, and the reduction threshold value of the reduction condition FBM-1 is set. The reduced FBM 61 is created based on the setting (4 bits).

FIG. 31 shows the degenerated FBM 61. The original FBM 60 shown in FIG. 28 and FIG.
When the bit is shrunk to an area of 8 × 8 bits in the y direction in the y direction, and good / bad is determined by the shrinking threshold of 4 bits,
Semiconductor device 5111 and semiconductor device 51 adjacent thereto
In the vicinity of the boundary between 12 and 5113, defective pixels (indicated by hatching) are densely present, but in the other semiconductor devices 5112 to 5116, there are no defective pixels. The area 517A is an area on the degenerated FBM corresponding to the area 517 in FIG.

This indicates that the hatched portion of the region 517A is a region having a relatively high defect density in which a defect of 4 bits or more exists per pixel, and the other region has one pixel. In this case, only less than 4 bits of defects exist per unit area, indicating that the region has a low defect density.

Returning to the description of FIG. 30, step ST
At 84, defective pixels that are close to each other within the adjacent determination distance (1 pixel) in the degenerated FBM 61 are grouped and extracted as a level 1 group. Here, all the defective pixels in the area 517A are extracted as a level 1 group.

As described above, a series of grouping processes is completed through steps ST83 and ST84. Next, in step ST85, it is confirmed whether or not the variable n has reached 2 which is the number of created FBMs.

In this case, since the number of created FBMs has not reached 2, 1 is added to the variable n in step ST88, and the processing in and after step ST83 is repeated.

By setting the variable n = 2, degeneration is performed based on the degeneration condition FBM-2. In step ST83, the processed original FBM 60 shown in FIGS. 28 and 29 is set in step ST81. Divided by the degenerated area (8 × 8 bits) and the degeneration condition FBM-2
Is generated based on the setting (1 bit) of the degeneracy threshold value of the degenerate FBM 62.

FIG. 32 shows the degenerated FBM 62. The original FBM 60 shown in FIG. 28 and FIG.
When the bit is shrunk to an area of 8 × 8 bits in the y direction in the y direction and the pass / fail is determined by the shrinkage threshold of 1 bit,
Semiconductor device 5111 and semiconductor device 5112 near it
5116, defective pixels (displayed by hatching) are densely present. Note that the region 517B corresponds to FIG.
8 is an area on the degenerated FBM corresponding to the area 517 of FIG.

Returning to the description of FIG. 30, step ST
At 84, defective pixels that are close to each other within the adjacent determination distance (1 pixel) in the degenerated FBM 62 are grouped and extracted as a level 2 group. Here, all the defective pixels in the area 517B are extracted as a level 2 group.

As described above, a series of grouping processes is completed through steps ST83 and ST84. Next, in step ST85, it is confirmed whether or not the variable n has reached 2 which is the number of created FBMs.

Here, since the variable n is 2 and has reached 2 which is the number of created FBMs, the process proceeds to step ST86.
The inclusion relation is checked for each extracted level group, and the included group is associated with the included group. Here, the level 1 defective pixel group in the area 517A is included in the level 2 defective pixel group in the area 517B, and the area 517A is the area 5
17B.

In order to examine the inclusion relation between groups, a defective pixel forming region constituting each group on the degenerate fail bit map, here, a level 1 defective pixel shown by hatching in FIG. Is compared with the x-coordinate and y-coordinate of the group of level 2 defective pixels indicated by hatching in FIG. 32, and the relationship between the included group and the included group is defined.

For example, a group of defective pixels at level 1 has a spread of x coordinates 0 to 20 and y coordinates 0 to 20,
A group of bad pixels of level 2 has x coordinates 0 to 30,
If the y-coordinate has a spread of 0 to 30, it is determined that the level 1 defective pixel group is included in the level 2 defective pixel group.

In step ST87, the defective shapes in the groups are classified for each extracted group to obtain the defective shape classification results as shown in FIG.

FIG. 33 shows the result of outputting the classification result of the defect shape as a system diagram so that the inclusive relation can be understood. The level 2 group includes the level 1 group and the other defect types. Bit failure A as
ＤD are included. The level 1 group indicates that bit failures E to J are included.

Here, bit defects A to J show examples in which a part of each bit defect is numbered for convenience and obtained by analyzing the defective bit shape of the original FBM 60 shown in FIGS. 28 and 29. It is only an example. It goes without saying that block failures and line failures can be numbered by analyzing the failure bit shape.

In classifying the defect shape for each group, the defect analysis method described in the first to fourth embodiments may be used, or another general defect analysis method may be used.

<G-3. Operation and Effect> According to the failure analysis method of the sixth embodiment described above, a plurality of degenerate FBMs in which the degeneracy threshold is changed are created, and for each of the degenerate FBMs, the pixels existing within a predetermined adjacent determination distance are the same. By treating them as belonging to a group, regions with different defect densities can be grouped as separate groups. After grouping, inclusion relations between groups are checked, and defect shapes are classified for each group. Thus, the cause of the defect can be specified effectively.

In other words, when the defects are densely generated, it is considered that the cause is the local concentration of foreign substances, but the cause differs depending on the defect density. By performing the grouping and classifying the defect shape, the cause of the defect can be specified more accurately. Also, by examining the comprehension relationship,
It is possible to know the defective bit density distribution and to obtain effective judgment data for identifying the cause of the defect.

<H. Seventh Embodiment><H-1. Example of Classified Failure Group> FIG. 34 shows an original FBM 70 showing a failure group classified by applying the seventh embodiment of the failure analysis method according to the present invention.

The basic structure of the original FBM 70 is shown in FIG.
Are the same as those of the original FBM 50 shown in FIG. 1, and the same components are denoted by the same reference numerals and overlapping description will be omitted.

In the following description, the semiconductor device 511 may be described with reference numerals 5111 to 5117 for convenience.

In FIG. 34, an upper left area (area) 521 and a right area (area) 522 as viewed in the figure.
, Line defects (X
-Line) and a line defect (Y-Li) arranged in the y direction.
ne) exists. In addition, the line defect is shown by filling out.

FIG. 35 shows the details of the area 521. FIG.
As shown in (1), the defective bit string FBL in which the defective bits are arranged in one row in the y direction is generated in the entire region of the semiconductor device 5111 at the left corner and near the boundary of the semiconductor device 5112 adjacent thereto.

FIG. 36 shows the details of the area 522.
As shown in FIG. 36, a defective bit string FBL in which defective bits are arranged in a row in the x direction occurs in the entire region of the semiconductor device 5113 and the semiconductor devices 5114 to 5117 in the vicinity thereof.

<H-2. Analysis Operation> Next, referring to the flowcharts shown in FIGS. 37 and 38, FIGS.
6, a failure analysis operation according to the seventh embodiment will be described with reference to FIGS. 37 and 38.
Are connected at symbol A and symbol B.

First, initial settings are read in step ST91. Here, as an initial setting, the adjacency determination distance is one pixel, the number of FBMs to be created is two, and the number of degenerations of the degeneration condition FBM-1, which defines one of them, is two.
The number of times of degeneration of FBM-2 is 2.

Here, the number of times of degeneration is the number of times that one FBM is subjected to degeneration processing. If the number of times of degeneration is 2, the degeneration processing is performed twice. Then, since the degeneration conditions are changed between the first degeneration and the second degeneration, a total of four types of degeneration conditions are set.

The four types of degeneration conditions are the degeneration conditions FB
In M-1-1, the degeneration threshold is 6 bits, the size of the degeneration area is 1 × 8 bits, and in the degeneration condition FBM-1-2, the degeneration threshold is 1 pixel, the size of the degeneration area is 8 × 1 pixels, and the degeneration condition is In the FBM-2-1, the compression threshold is 12 bits, the size of the compression area is 16 × 1 bits, and in the compression condition FBM-2-2, the compression threshold is 1 pixel, and the size of the compression area is 1 × 8 pixels.

The degenerate conditions FBM-1-1 and FBM-1-2 are degenerate conditions in consideration of the defective shape of the area 521, and the degenerate conditions FBM-2-1 and FBM-2-2 are This is a degeneration condition in consideration of the defective shape of the region 522.

Next, 1 is set as a variable n in step ST92, and 1 is set as a variable m in step ST93.

Here, the variable m is a numerical value that is incremented by one each time the process of step ST94 is repeated, and is incremented until the number of degenerations set in step ST91 is reached.

The variable n is defined in steps ST94 to S94.
It is a numerical value that is incremented by one each time the process of T96 is repeated, and is incremented until the number of created FBMs set in step ST91 is reached.

By setting the variable n = 1 and the variable m = 1, degeneration is performed based on the degeneration condition FBM-1-1. In step ST94, the original FBM 70 shown in FIGS. Degeneration area (1 × 8 bits) of the degeneration condition FBM-1-1 set in step ST91
And degenerate based on the setting (6 bits) of the degeneration threshold to create the degenerate FBM 71.

FIGS. 39 and 40 show the degenerated FBM 71. FIG. The original FBM 70 shown in FIGS.
In the area 521A, a defective pixel (filled and displayed) is present when the area is reduced by 1 bit in the direction of 1 bit and 8 bits in the y direction in an area of 1 × 8 bits, and determination of good / bad is made with a reduction bit of 6 bits. In the region 522A, there are no defective pixels. The regions 521A and 521A
2A is a region on the degenerated FBM corresponding to the regions 521 and 522 in FIG.

FIG. 40 is a diagram showing the details of the region 521A shown in FIG. 39. In the entire region of the semiconductor device 5111 and the vicinity of the boundary between the semiconductor devices 5112 adjacent thereto, there are a plurality of defective pixels FPL in a stripe shape.

Returning to the description of FIG. 37, step ST
At 95, the variable m is the number of degenerations of FBM-1 2
Check to see if you have reached

Here, since the number of times of degeneration of FBM-1 has not reached 2, 1 is added to variable m in step ST100, and the process of step ST94 is repeated.

By setting the variable m = 2, degeneration is performed based on the degeneration condition FBM-1-2. In step ST94, the degeneration FBM 71 shown in FIG. 39 is replaced with the degeneration condition set in step ST91. FBM-1-2 is divided by the degenerate area (8 × 1 pixel), and further degenerate based on the setting of the degenerate threshold (1 pixel).
Create BM72.

FIG. 41 shows the overlap reduction FBM 72. FIG.
The reduced FBM 71 shown in FIG. 9 is further reduced to an area of 8 × 1 pixels of 8 pixels in the x direction and 1 pixel in the y direction.
In the region 521B, defective pixels (indicated by hatching) are densely present in the entire region of the semiconductor device 5111 and in the vicinity of the boundary portion of the semiconductor device 5112 adjacent thereto. Needless to say, there is no defective pixel in the region 522B.

The regions 521B and 522B are regions on the degenerated FBM corresponding to the regions 521 and 522 in FIG.

Returning to the description of FIG. 37 again, in step ST95, it is confirmed whether or not the variable m has reached 2 which is the number of times of degeneration of the FBM-1.

In this case, since the number of times of degeneration of the FBM-1 has reached 2, the process proceeds to step ST96 shown in FIG. 38. In step ST96, the FBM-1 exists close to the adjacent reduced distance (1 pixel) within the overlap-reduced FBM 72. The defective pixels to be processed are grouped and extracted as a level 1 group (line defects arranged in the x direction).

Here, all the defective pixels in the area 521B are extracted as a level 1 group.

It should be noted that the level 1 means a result obtained by performing the process with the variable n = 1 set in step ST92.

As described above, steps ST94 to ST96 shown in FIGS. 37 and 38 are repeated to complete a series of grouping processing. Next, in step ST97, the variable n
Of the number of created FBMs has reached 2 or not.

In this case, since the number of created FBMs has not reached 2, 1 is added to the variable n in step ST101, and the processing from step ST93 is repeated.

First, by setting 1 as the variable m in step ST93, the variable n becomes 2 and the variable m becomes 1, and the degeneration is performed based on the degeneration condition FBM-2-1.

Therefore, in step ST94, the original FBM 70 shown in FIG. 34 is divided by the degeneration area (16 × 1 bit) of the degeneration condition FBM-2-1 set in step ST91, and the degeneration threshold is set (12 bits). To generate the reduced FBM 73.

FIGS. 42 and 43 show the degenerated FBM 73. FIG. The original FBM 70 shown in FIG.
When the area is reduced to an area of 16 × 1 bits of 6 bits and 1 bit in the y direction and good / bad is determined by the reduction bit of 12 bits, a defective pixel (filled and displayed) exists in the area 522C, but the area 521C In, there are no defective pixels. Note that the regions 521C and 522
C is a region on the degenerated FBM corresponding to the regions 521 and 522 in FIG.

FIG. 43 is a diagram showing the details of the region 522C shown in FIG. 42. In the entire semiconductor device 5113 and the semiconductor devices 5114 to 5117 in the vicinity thereof, a plurality of defective pixels FPL in a stripe shape exist.

Returning to the description of FIG. 37, step ST
At 95, the variable m is the number of degenerations of FBM-2, 2
Check to see if you have reached

Here, since the number of times of degeneration of FBM-2 has not reached 2, 1 is added to variable m in step ST100, and the process of step ST94 is repeated.

By setting the variable m = 2, degeneration is performed based on the degeneration condition FBM-2-2. In step ST94, the degeneration FBM 73 shown in FIG. 42 is replaced with the degeneration condition set in step ST91. FBM-2-2 is divided by the degenerate area (1 × 8 pixels), and further degenerate based on the setting of the degenerate threshold (1 pixel).
Create BM74.

FIG. 44 shows the overlap reduction FBM 74. FIG.
When the degenerated FBM 73 shown in FIG. 2 is further reduced to an area of 1 × 8 pixels of 1 pixel in the x direction and 8 pixels in the y direction, good / bad is determined by a degeneration threshold of 1 pixel,
In the region 522D, defective pixels (displayed by hatching) are densely present in the entire semiconductor device 5113 and the semiconductor devices 5114 to 5117 in the vicinity thereof. Needless to say, there is no defective pixel in the region 521D.

The regions 521D and 522D are regions on the degenerated FBM corresponding to the regions 521 and 522 in FIG.

Returning to the description of FIG. 37 again, in step ST95, it is checked whether or not the variable m has reached 2 which is the number of times of degeneration of the FBM-2.

In this case, since the number of times of degeneration of FBM-2 has reached 2, the process proceeds to step ST96 shown in FIG. 38. In step ST96, the FBM-2 exists close to the adjacency determination distance (1 pixel) within the overlapped degenerate FBM 74. The defective pixels to be processed are grouped and extracted as a level 1 group (line defects arranged in the y direction).

Here, all the defective pixels in the area 522D are extracted as a level 2 group.

Note that the level 2 corresponds to the step ST101.
Means the result of processing with the variable n = 2 set in.

As described above, steps ST94 to ST96 shown in FIG. 37 and FIG. 38 are repeated to complete a series of grouping processes.
Of the number of created FBMs has reached 2 or not.

Here, since the variable n is 2, and the number of created FBMs has reached 2, the process proceeds to step ST98.
The inclusion relation is checked for each extracted level group, and the included group is associated with the included group.

Here, the level 1 group and the level 2
Since there is no inclusive relation with the group, no association processing is performed.

Next, in step ST99, the defective shapes in the groups are classified for each extracted group.

In classifying the defect shape for each group, the defect analysis method described in the first to fourth embodiments may be used, or another general defect analysis method may be used.

<H-3. Operation and Effect> According to the failure analysis method of the seventh embodiment described above, the degeneration process is repeated by executing the degeneration process under the degeneration conditions in which the degeneration threshold and the degeneration area are changed.
By creating a plurality of BMs and treating pixels existing within a predetermined adjacent determination distance as belonging to the same group, regions having different defective shapes can be grouped as separate groups. Check for comprehension relationships between groups,
By classifying the defect shapes for each group, the cause of the defect can be effectively specified.

That is, for example, the cause is different between a case where a plurality of line failures are arranged in the x direction and a case where a plurality of line failures are arranged in the y direction.
Regions having different defect shapes are grouped as separate groups, and the defect shape is classified, whereby the cause of the defect can be specified more accurately. Further, by examining the inclusion relation, it is possible to know the positional relationship between the areas having different defective shapes, and it is possible to obtain effective judgment material for identifying the cause of the defect.

<I. Eighth Embodiment> A method of automatically obtaining an appropriate degeneration threshold based on the shape of a defective pattern has been described in the fourth embodiment with reference to FIGS. Obtaining the degeneration threshold by this method is also effective in the fifth and sixth embodiments.
A description will be given as an eighth embodiment.

Here, the original FBM shown in FIG.
The description will be made by taking 50 as an example. First, the original FBM 50 shown in FIG. 21 is degenerated based on a predetermined degenerated area. The numerical value is, for example, 8 which is the degenerated area set in the initial setting of the fifth embodiment described with reference to FIG.
× 8 bits.

Next, the number of defective bits in each pixel (degenerate area) is counted. FIG. 45 shows a list of the number of defective bits in each pixel.

FIG. 45 shows a graph in which the number of defective bits included in one pixel is represented on the horizontal axis and the number of pixels is represented on the vertical axis. The number of pixels including one defective bit is 20, and the number of defective bits is 20. The number of pixels including two is 5,
The number of pixels including two defective bits is reduced to three, and the number of pixels including four or five defective bits is zero.

The number of pixels including six defective bits is increasing to one, and the number of pixels including seven defective bits is increasing to three. Is estimated to be approximated by a quadratic curve having a minimum value.

This is the same as the characteristic shown in FIG.
In the same manner as in the fourth embodiment, the degeneration threshold is calculated from the minimum value of the occurrence characteristic of the defective bit. The degeneration threshold obtained by this method is 4 bits in the case of this example.

The method for automatically acquiring the degeneration threshold based on the data of the original FBM 50 is the same as that shown in the flowchart of FIG. 16, so that further description will be omitted. The operation and effect are the same as those of the fourth embodiment.

<J. Display Example 1 of Analysis Result> In the failure analysis methods described in the fifth to seventh embodiments according to the present invention described above, a method of grouping regions having different failure densities and failure shapes as separate groups has been described. The obtained result may be displayed as shown in FIGS.

FIGS. 46 and 47 show processed original FBMs 50B and 50C individually showing the defective groups extracted as level 1 and level 2 groups in the fifth embodiment. Note that regions 513D and 514D shown in FIGS.
This is an area on the processed original FBM corresponding to the areas 513 and 514 of No. 1.

As described above, by extracting the distribution of the defective groups from the original FBM and displaying them individually, it is easy to visually recognize the distribution of each defective group.

<K. Display Example 2 of Analysis Result> Further, as a display example of the grouping result, a display as shown in FIGS. 48 and 49 may be performed.

FIGS. 48 and 49 show processing in which defective groups extracted as level 1 and level 2 groups are color-coded for each group (in the figures, hatching is changed) and displayed simultaneously in the fifth embodiment. It is a partial view showing the finished original FBM50D. FIG.
8 and regions 513E and 514E shown in FIG.
This is an area on the processed original FBM corresponding to the areas 513 and 514 in FIG.

As described above, the distribution of the defect groups is extracted from the original FBM, and the distribution of each defect group is visually recognized easily by color-coding each group and displaying them simultaneously. Such a display method is suitable for displaying a failure group having a relation of inclusion and inclusion described in the fifth embodiment.

<L. Display Example 3 of Analysis Result> In the failure analysis method described in the fifth to seventh embodiments according to the present invention,
Regions having different defect densities and shapes are grouped as separate groups, and the results are displayed as processed FBMs or degenerated FBMs. However, as described below with reference to FIGS. It may be displayed.

FIG. 50 shows an area division 531 on the wafer used for counting the failure groups.
Regions R2 to R6 are arranged in a concentric annular shape around 1. Note that the radial lengths of the regions R1 to R6 may be set as appropriate.

FIG. 51 is a graph summarizing the results of performing the failure analysis described in the fifth to seventh embodiments on a plurality of wafers. FIG. 51 shows the results of each failure bit of the failure group extracted as a level 1 group. The position is shown by applying it to the area section 531 shown in FIG.

That is, the region R1 of the defective bit constituting the defective group extracted as the level 1 group
It is a graph which shows the number of existence in R6.
4 shows the distribution of defective bits in R6 to R6.

In FIG. 51, it can be seen that the maximum peak of the defective bit is in the region R4, and the center position of the level 1 defective group exists in the region R4.

FIG. 52 is a diagram showing the position of the defect group extracted as a level 2 group applied to the area division 531 shown in FIG. 50. 9 is a graph showing the number of defective bits present in regions R1 to R6.

In FIG. 52, it can be seen that the maximum peak of defective bits is in area R1, and the center position of the level 2 defective group exists in area R1.

As described above, the distribution of the defective groups is extracted from the original FBM, and the distribution of the defective bits is shown in a graph for each group, so that the statistical distribution of the defective groups can be visually recognized. Becomes

<M. Display Example 4 of Analysis Result> As a display example of the grouping result, a method described with reference to FIGS. 53 to 55 may be adopted.

FIG. 53 shows an area division 532 on the wafer used for counting the failure groups. The area is divided radially into a plurality of areas at a predetermined angle around the center of the wafer.
1 to R18 are provided.

FIG. 54 is a graph summarizing the results of performing the failure analysis described in the fifth to seventh embodiments on a plurality of wafers. FIG. 54 shows the level of each failure bit of the failure group extracted as a level 1 group. The position is shown as being applied to the area section 532 shown in FIG.

That is, the region R1 of the defective bit constituting the defective group extracted as the level 1 group
6 is a graph showing the number of existing bits in 1 to R18, showing the distribution of defective bits in regions R11 to R18.

In FIG. 54, it can be seen that there is a maximum peak of the defective bit in the region R15, and the center position of the level 1 defective group exists in the region R15.

FIG. 55 is a diagram showing the position of the defect group extracted as the level 2 group, applied to the area division 532 shown in FIG. 53, and shows the defect group extracted as the level 2 group. 9 is a graph showing the number of defective bits present in regions R11 to R18.

In FIG. 55, it can be seen that there is a maximum peak of defective bits in the region R11, and the center position of the level 2 defective group exists in the region R11.

As described above, the distribution of the defective groups is extracted from the original FBM, and the distribution of the defective bits is shown in a graph for each group, so that the statistical distribution of the defective groups can be visually recognized. Becomes

The area division on the wafer is shown in FIG.
Also, the present invention is not limited to the area divisions 531 and 532 shown in FIG. 53, and may be, for example, a division into a square lattice.

<N. Example of Implementing Failure Analysis Method> In order to realize the fifth to eighth embodiments of the failure analysis method according to the present invention described above, the computer system described with reference to FIG. Same as # 4.

The failure analysis method according to the present invention described with reference to the flowcharts shown in FIGS. 23, 30, 37, and 38 can be realized by executing a computer program on a computer. The program (failure analysis program) is a magnetic tape 10
4 or a recording medium such as a CD-ROM 108. In addition, the program can be transmitted on a communication path in the form of a signal, and further downloaded to a recording medium.

[0301] A computer system that carries a failure analysis program and executes it can be called a failure analysis device.

[0302]

According to the defect analysis method of the present invention, a plurality of degenerate fail bitmaps having different degenerate areas are created as a degenerate condition, and a defective shape is specified based on each defective rate. Therefore, more types of defective shapes can be specified as compared with the case where defective shapes are specified only by the defect rate of the degenerated FBM formed under one type of degenerate condition, and the accuracy of the classification of defective shapes is improved.

According to the defect analysis method of the present invention, a plurality of degenerated FBMs having different degeneration thresholds are created as the degeneration conditions, and the defect shape is determined based on the respective defect rates. Recognition in consideration of the density becomes possible, and the misidentification of the defective shape is reduced, and the accuracy of the classification of the defective shape is reduced as compared with the case where the defective shape is determined only by the defect rate of the degenerated FBM created under one type of degenerate condition improves.

According to the failure analysis method of the third aspect of the present invention, a plurality of degenerate FBMs having different degenerate areas and different degenerate thresholds are created as the degenerate conditions, and the defect shape is determined based on the respective defect rates. Therefore, more types of defective shapes can be specified as compared with the case where the degeneration condition is only the degeneration area or only the degeneration threshold, and the accuracy of the defect shape classification is improved.

According to the failure analysis method according to the fourth aspect of the present invention, the failure rate is specified by comparing the standardized failure rate with the failure shape determination rule. And the setting of the defective shape determination rule can be facilitated.

According to the defect analysis method according to the fifth aspect of the present invention, for example, if there is no adjacent pixel with a defective pixel outside the predetermined area, it is possible to estimate a line defect, and the defective pixel outside the predetermined area can be estimated. If there is an adjacent block, it can be estimated that there is a block defect or a bit defect, and the estimation accuracy of the defective shape can be improved.

According to the degenerate threshold value deriving method according to the sixth aspect of the present invention, a threshold value that does not recognize a bit defect that occurs randomly is calculated by calculating a degenerate threshold value from the existence characteristics of defective bits included in a pixel. Can be obtained.

According to the degeneration threshold deriving method of the present invention, the degeneration threshold can be specifically calculated from the existence characteristics of defective bits.

According to the recording medium of the eighth aspect of the present invention, it is possible to realize a method of deriving a degeneration threshold for automatically obtaining a threshold that does not recognize a randomly generated bit defect.

According to the defect analysis method of the ninth aspect of the present invention, a pixel defect is determined based on the degeneration threshold, and a pixel in which the number of defective bits equal to or greater than the degeneration threshold exists is determined as a defective pixel. A fail bit map is created, defective pixels existing within a predetermined number are determined as the same group, and defective bits included therein are extracted as the same group. By creating a fail bitmap, regions having different defect densities can be grouped as separate groups, and after the grouping, the defect shape is classified for each group, thereby effectively identifying the cause of the defect. be able to.

According to the defect analysis method of the tenth aspect of the present invention, a step of creating a processed original fail bitmap by deleting defective bits extracted as the same group from the original fail bitmap.
(c), wherein steps (a) to (c) are repeated a predetermined number of times, and step (a) is based on the processed original fail bitmap instead of the original fail bitmap for the second and subsequent times. By creating a degenerate fail bitmap in this way, only unprocessed groups can be continuously grouped, and grouping of defective bits that exist independently of each other can be effectively performed.

According to the defect analysis method of the present invention, the steps (a) and (b) are repeated a predetermined number of times to generate a plurality of degenerate fail bit maps, and then the defective bits included in the same group And the inclusion relation between the defective bits of the other groups is defined by comparing the coordinates of the defective pixel formation area, so that the density distribution of the defective bits can be known, for example, which is an effective method for identifying the cause of the defect. You can get some insight.

According to the defect analysis method of the twelfth aspect of the present invention, the original fail bitmap is divided based on the first degenerate area of a predetermined size, and the first fail bitmap is classified based on the first degenerate threshold. First, a degenerate fail bitmap is created using the first pixel having the number of defective bits equal to or greater than the number of defective bits matching the degeneration threshold as the first defective pixel, and Segmenting based on a second degenerate area of size,
Based on the second degeneracy threshold, the second pixel is determined to be defective, and a second pixel in which the number of first defective pixels equal to or greater than the second degenerate threshold is present is determined as a second defective pixel. A degenerate fail bit map is created, the second defective pixels within a predetermined number are determined as the same group, and the defective bits included therein are extracted as the same group. The regions can be grouped as separate groups, and by classifying the defect shapes for each group after grouping, the cause of the defect can be specified effectively.

According to the defect analysis method of the thirteenth aspect of the present invention, after the steps (a) to (c) are repeated a predetermined number of times to generate a plurality of degenerate fail bit maps, the defective bits included in the same group Is defined by comparing the coordinates of the formation region of the second defective pixel, for example, the positional relationship between regions having different defective shapes can be known. Effective information for determining the cause can be obtained.

According to the failure analysis method of the present invention, only the failure bits of the same group are displayed on the fail bit map, thereby visually recognizing the distribution of each failure group. Becomes easier.

According to the defect analysis method of the present invention, the defective bits of the same group and the defective bits of another group are displayed on a fail bit map at the same time by color coding, so that each defective bit is displayed. It is easier to visually recognize the group distribution.

According to the defect analysis method of the present invention, each of the plurality of wafers is divided into a plurality of concentric annular regions with the central portion of the wafer as a central region, and the number of defective bits in the same group is determined. The number of defective bits in other groups in a plurality of concentric annular regions is tabulated for a plurality of the wafers, and, for example, the results are shown in a graph to visually recognize the statistical distribution of the defective groups. It becomes possible.

According to the defect analysis method of the seventeenth aspect of the present invention, each of the plurality of wafers is radially divided into a plurality of regions at a predetermined angle centering on the center of the wafer, and the defective bits of the same group and others are divided. The number of defective bits in a group of
By tabulating a plurality of the wafers and, for example, displaying the results in a graph, it is possible to visually recognize the statistical distribution of the defective groups.

According to the recording medium of the eighteenth aspect of the present invention, as compared with the case where the defect shape is specified only by the defect rate of the degenerated FBM formed under one type of degeneration condition, more types of defect are specified. A shape can be specified, and a failure analysis method in which the accuracy of the classification of a defective shape is improved can be realized. Also, by creating a plurality of degenerate fail bitmaps by changing the degeneration conditions and extracting defective bits within a predetermined range as the same group, grouping of defective bits becomes possible. By classifying the defect shape, the cause of the defect can be specified effectively.

[Brief description of the drawings]

FIG. 1 is a diagram showing a system configuration for executing a failure analysis method according to the present invention.

FIG. 2 is a flowchart illustrating a failure analysis method according to the first embodiment of the present invention.

FIG. 3 is a diagram illustrating an example of a recognition rule used in the failure analysis method according to the first embodiment of the present invention.

FIG. 4 is a diagram showing an original FBM for explaining a failure analysis method according to the first embodiment of the present invention.

FIG. 5 is a diagram showing a degenerated FBM for explaining a failure analysis method according to the first embodiment of the present invention.

FIG. 6 is a diagram showing a degenerated FBM for explaining a failure analysis method according to the first embodiment of the present invention.

FIG. 7 is a diagram showing a degenerated FBM for explaining a failure analysis method according to the first embodiment of the present invention.

FIG. 8 is a flowchart illustrating a failure analysis method according to a second embodiment of the present invention.

FIG. 9 is a diagram illustrating an example of a recognition rule used in the failure analysis method according to the second embodiment of the present invention.

FIG. 10 is a diagram showing an original FBM for explaining a failure analysis method according to a second embodiment of the present invention.

FIG. 11 is a diagram illustrating a degenerated FBM for explaining a failure analysis method according to a second embodiment of the present invention.

FIG. 12 is a diagram showing a degenerated FBM for explaining a failure analysis method according to a second embodiment of the present invention.

FIG. 13 is a flowchart illustrating a failure analysis method according to a third embodiment of the present invention.

FIG. 14 is a diagram illustrating an example of a recognition rule used in the failure analysis method according to the third embodiment of the present invention.

FIG. 15 is a diagram illustrating an original FBM for describing a method of deriving a degeneration threshold according to the fourth embodiment of the present invention.

FIG. 16 is a flowchart illustrating a method for deriving a degeneration threshold according to the fourth embodiment of the present invention.

FIG. 17 is a diagram illustrating a method for deriving a degeneration threshold according to the fourth embodiment of the present invention.

FIG. 18 is a diagram illustrating a method for deriving a degeneration threshold according to the fourth embodiment of the present invention.

FIG. 19 is an external view of a computer system that implements the failure analysis method according to the present invention.

FIG. 20 is a diagram showing a configuration of a computer system for realizing the failure analysis method according to the present invention.

FIG. 21 is a diagram showing an original FBM for explaining a failure analysis method according to a fifth embodiment of the present invention.

FIG. 22 is a diagram showing partial details of an original FBM for explaining a failure analysis method according to a fifth embodiment of the present invention.

FIG. 23 is a flowchart illustrating a failure analysis method according to a fifth embodiment of the present invention.

FIG. 24 is a diagram showing a degenerated FBM for explaining a failure analysis method according to a fifth embodiment of the present invention.

FIG. 25 is a diagram showing a processed original FBM according to the fifth embodiment of the present invention.

FIG. 26 is a diagram showing partial details of an original FBM for explaining a failure analysis method according to a fifth embodiment of the present invention.

FIG. 27 is a diagram showing a degenerated FBM for explaining a failure analysis method according to a fifth embodiment of the present invention.

FIG. 28 shows an original F according to the sixth embodiment of the present invention.
It is a figure showing BM.

FIG. 29 is a diagram showing partial details of an original FBM for explaining a failure analysis method according to a sixth embodiment of the present invention.

FIG. 30 is a flowchart illustrating a failure analysis method according to a sixth embodiment of the present invention.

FIG. 31 is a diagram illustrating a degenerated FBM for explaining a failure analysis method according to a sixth embodiment of the present invention.

FIG. 32 is a diagram showing a degenerated FBM for explaining a failure analysis method according to a sixth embodiment of the present invention.

FIG. 33 is a diagram showing the inclusion relation of a defect group and the classification result of a defect shape.

FIG. 34 shows an original F according to the seventh embodiment of the present invention.
It is a figure showing BM.

FIG. 35 is a diagram showing partial details of an original FBM for explaining a failure analysis method according to a seventh embodiment of the present invention.

FIG. 36 is a diagram showing partial details of an original FBM for explaining a failure analysis method according to a seventh embodiment of the present invention.

FIG. 37 is a flowchart illustrating a failure analysis method according to a seventh embodiment of the present invention.

FIG. 38 is a flowchart illustrating a failure analysis method according to a seventh embodiment of the present invention.

FIG. 39 is a diagram illustrating a degenerated FBM for explaining a failure analysis method according to a seventh embodiment of the present invention;

FIG. 40 is a diagram illustrating partial details of a degenerated FBM for explaining a failure analysis method according to a seventh embodiment of the present invention;

FIG. 41 is a diagram illustrating an overlap degenerate FBM for explaining a failure analysis method according to a seventh embodiment of the present invention;

FIG. 42 is a diagram illustrating a degenerated FBM for explaining a failure analysis method according to a seventh embodiment of the present invention;

FIG. 43 is a diagram showing partial details of a degenerated FBM for explaining a failure analysis method according to a seventh embodiment of the present invention.

FIG. 44 is a diagram showing an overlap-degenerate FBM for explaining a failure analysis method according to a seventh embodiment of the present invention.

FIG. 45 is a diagram illustrating a method for deriving a degeneration threshold according to the eighth embodiment of the present invention.

FIG. 46 is a diagram showing a processed original FBM showing a display example of a failure analysis result.

FIG. 47 is a diagram showing a processed original FBM showing a display example of a failure analysis result.

FIG. 48 is a diagram showing a partial detail of a processed original FBM showing a display example of a failure analysis result.

FIG. 49 is a diagram showing a partial detail of a processed original FBM showing a display example of a failure analysis result.

FIG. 50 is a diagram showing an area division on a wafer used for tabulating the failure analysis results.

FIG. 51 is a diagram showing a failure analysis result as a graph.

FIG. 52 is a diagram showing a failure analysis result as a graph.

FIG. 53 is a diagram showing an area division on a wafer used for tabulating the failure analysis results.

FIG. 54 is a diagram showing a failure analysis result as a graph.

FIG. 55 is a diagram showing a failure analysis result as a graph.

FIG. 56 is a diagram showing an original FBM for explaining a problem of a conventional failure analysis method.

FIG. 57 is a diagram showing a degenerated FBM for explaining a problem of a conventional failure analysis method.

FIG. 58 is a diagram showing a degenerated FBM for explaining a problem of a conventional failure analysis method.

[Explanation of symbols]

FB bad bit, FBL bad bit string, FPL bad pixel.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G01R 31 / 28H

Claims (18)

[Claims] 1. A method for associating a defective memory cell with a defective bit in units of bits based on data on a position of the defective memory cell having a defective electrical characteristic among a plurality of memory cells arranged in a matrix. A failure analysis method for performing failure analysis using an original fail bitmap created by mapping according to the arrangement of the memory cells, comprising: (a) a plurality of types of degenerated fail bitmaps from the original fail bitmap; And (b) calculating a defect rate for each of the plurality of degenerate fail bitmaps, and identifying a defect shape based on the defect rate. Classifies the original fail bitmap based on a plurality of degenerate areas of different sizes. And converting the pixel having the size corresponding to the degenerate area into an array in which the defective bit is present as a defective pixel. The defect rate is a percentage of the defective pixel in a predetermined area. Failure analysis method specified in. 2. A method of associating a defective memory cell with a defective bit in units of bits based on data on a position of the defective memory cell having a defective electrical characteristic among a plurality of memory cells arranged in a matrix. A failure analysis method for performing failure analysis using an original fail bitmap created by mapping according to the arrangement of the memory cells, comprising: (a) a plurality of types of degenerated fail bitmaps from the original fail bitmap; And (b) calculating a defect rate for each of the plurality of degenerate fail bitmaps, and identifying a defect shape based on the defect rate. Partitioning the original fail bitmap based on a predetermined degenerate area, While converting to a form in which pixels of the size corresponding to the rear are arranged, based on a plurality of degeneration thresholds defined by the number of the defective bits in the pixel, to determine the failure of the pixel, the degeneration threshold A defect analysis method, wherein the pixels in which the number of the defective bits matching the number of the defective bits are present are created as defective pixels, and the defect rate is defined by a ratio of the defective pixels in a predetermined area. 3. A method of associating a defective memory cell with a defective bit in units of bits based on data on a position of the defective memory cell having a defective electrical characteristic among a plurality of memory cells arranged in a matrix. A failure analysis method for performing failure analysis using an original fail bitmap created by mapping according to the arrangement of the memory cells, comprising: (a) a plurality of types of degenerated fail bitmaps from the original fail bitmap; And (b) calculating a defect rate for each of the plurality of degenerate fail bitmaps, and identifying a defect shape based on the defect rate. Divides the original fail bitmap based on a plurality of degenerate areas of different sizes. Then, while converting to a form in which pixels of a size corresponding to the degenerate area are arranged, based on a plurality of degenerate thresholds defined by the number of the defective bits in the pixel, to determine the failure of the pixel A defect analysis method, wherein the pixels in which the number of the defective bits equal to or greater than the number of the defective bits is present are generated as defective pixels, and the defect rate is defined by a ratio of the defective pixels to a predetermined area. 4. The method according to claim 1, wherein the step (b) comprises: (b-1) setting the failure rate for one of the degenerate fail bitmaps as a reference failure rate and at least a predetermined failure specifying a preset failure shape. Estimating a defect shape by comparing the defect rate with the reference failure rate; (b-2) using the reference failure rate as a denominator, a value obtained by normalizing the failure rate of the remaining degenerate fail bitmap,
(B-3) comparing each of the index values with a preset defective shape determination rule;
4. The failure analysis method according to claim 1, further comprising the step of: identifying a failure shape in combination with the failure shape estimation result in (b-1). 5. The step (b) further includes a step of determining whether the defective pixel in the predetermined area is adjacent to the defective pixel outside the predetermined area, and the step (b-1). 5. The failure analysis method according to claim 4, further comprising: estimating a failure shape based on a comparison result between the predetermined failure rate and the reference failure rate and a determination result of the presence / absence of the adjacency. 6. A plurality of memory cells arranged in a matrix, wherein the defective memory cells are converted into defective bits on a bit-by-bit basis based on data relating to the positions of the defective memory cells having defective electrical characteristics. A derivation threshold deriving method used in a failure analysis method for performing failure analysis using an original fail bitmap created by mapping in accordance with the arrangement of the memory cells, wherein (a) the original fail bitmap Is divided based on a predetermined degenerate area, and converted into a form in which pixels of a size corresponding to the degenerate area are arranged; (b) the number of the defective bits in the pixel for each of the pixels Counting; (c) the number of bad bits represented by the number of pixels relative to the number of bad bits in the pixels And calculating the degeneracy threshold based on the existence characteristic. 7. In the step (c), in the existence characteristic of the defective bit, when the number of the defective bit is one, the number of pixels is started to be counted, and when the number of the pixels first reaches the minimum value, 7. The step of setting the number of the defective bits as a degeneration threshold.
Derivation method of the described degeneration threshold. 8. A computer-readable recording medium in which a program for causing a computer to execute the degeneration threshold deriving method according to claim 6 is recorded. 9. A method of associating a defective memory cell with a defective bit in units of bits based on data on a position of the defective memory cell having a defective electrical characteristic among a plurality of memory cells arranged in a matrix. A failure analysis method for performing failure analysis using an original fail bitmap created by mapping according to the arrangement of the memory cells, wherein (a) creating a degenerated fail bitmap from the original fail bitmap And (b) extracting the defective bits within a preset range as the same group of defective bits with respect to the degenerate fail bitmap, wherein the degenerate fail bitmap comprises the original fail bitmap. Are classified based on the degenerate area of a predetermined size, A is converted to a form in which pixels having a size corresponding to a are arranged, and based on a degeneration threshold defined by the number of the defective bits in the pixel, a defect determination of the pixel is performed, and the pixel is determined to match the degeneration threshold. The number of the defective bits is equal to or greater than the number of the defective bits is created as a defective pixel, the step (a) includes a step of reducing the original fail bitmap with the reduction threshold, Defined by a predetermined number of pixels, the step (b) includes a step of determining the defective pixels existing within the predetermined number as the same group, and extracting the defective bits included therein as the same group, Failure analysis method. 10. After the step (b), the method further comprises: (c) creating a processed original fail bitmap by deleting the bad bits extracted as the same group from the original fail bitmap, The steps (a) to (c) are repeated a predetermined number of times to extract the defective bits of another group, and the step (a) is performed in place of the original fail bit map for the second and subsequent times. 10. The failure analysis method according to claim 9, wherein the degenerated fail bitmap is created based on the processed original fail bitmap. 11. After repeating the steps (a) and (b) a predetermined number of times, (c) determining the inclusive relation between the defective bits included in the same group and the defective bits in another group. The step (c) further comprises the step of: comparing the coordinates of the formation area of the defective pixel constituting each group on the degenerate fail bitmap, thereby including the included group and the included group. The failure analysis method according to claim 10, further comprising the step of: 12. A method of associating a defective memory cell with a defective bit in units of bits based on data on a position of a defective memory cell having a defective electrical characteristic among a plurality of memory cells arranged in a matrix. A failure analysis method for performing failure analysis using an original fail bitmap created by mapping according to the arrangement of the memory cells, wherein (a) creating a degenerated fail bitmap from the original fail bitmap (B) generating a redundant reduced fail bitmap by further reducing the reduced fail bitmap a predetermined number of times; and (c) setting the redundant reduced fail bitmap within a preset range. Extracting the defective bit as a defective bit in the same group. The degenerate fail bitmap divides the original fail bitmap based on a first degenerated area of a predetermined size, and a first pixel of a size corresponding to the first degenerated area is arranged. And the first pixel is determined to be defective based on a first degeneration threshold defined by the number of the defective bits in the first pixel. The first pixel in which the number of the defective bits equal to or greater than the matching number is present is generated as a first defective pixel, and the overlap-reduced fail bitmap is obtained by converting the reduced fail bitmap into a second reduced area having a predetermined size. And converted into a form in which second pixels of a size corresponding to the second degenerate area are arranged, and Based on a second degeneration threshold defined by the number of the first defective pixels, a defect determination of the second pixel is performed, and the number of the first defective pixels equal to or greater than the number of the first defective pixels is determined. Is created as a second defective pixel, and the step (a) includes a step of reducing the original fail bitmap with the first reduced area and the first reduced threshold. The step (b) includes the step of reducing the reduced fail bitmap with the second reduced area and the second reduced threshold, wherein the predetermined range is a predetermined number of the second pixels. The step (c) includes determining the second defective pixels within the predetermined number as the same group, and including the defective bit included therein. A failure analysis method including the step of extracting the same as the same group. 13. After repeating the steps (a) to (c) a predetermined number of times, (d) determining the inclusive relation between the defective bit included in the same group and the defective bit in another group. The step (d) further comprises the step of: comparing the coordinates of the formation region of the second defective pixel constituting each group on the overlap-degenerate fail bitmap, thereby including the included group and the included group. The failure analysis method according to claim 12, further comprising a step of defining a group that is set. 14. The method according to claim 10, further comprising the step of displaying only the bad bits of the same group on a fail bit map.
7. The failure analysis method according to any one of the above. 15. The apparatus according to claim 10, further comprising a step of displaying the defective bits of the same group and the defective bits of the other group simultaneously on a fail bit map by color coding.
7. The failure analysis method according to any one of the above. 16. The failure analysis method is performed on a plurality of wafers, and each of the plurality of wafers is divided into a plurality of concentric annular regions with a wafer central portion as a central region, and the plurality of wafers are divided into a plurality of concentric annular regions. 12. The method according to claim 10, further comprising: counting the number of defective bits and the defective bits of the other group in the plurality of concentric annular regions for the plurality of wafers.
14. The failure analysis method according to claim 13. 17. The failure analysis method is performed on a plurality of wafers, each of the plurality of wafers is radially divided into a plurality of regions at a predetermined angle around a wafer center, and the failures in the same group are divided. 14. The method according to claim 10, further comprising: counting the number of bits and the defective bits of the another group in the plurality of radial regions for the plurality of wafers. Failure analysis method described in. 18. A computer-readable recording medium on which is recorded a program for causing a computer to execute the failure analysis method according to any one of claims 1 to 5 and 9 to 13. .