JP2001237906A - Method for automatic frequency control and afc circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an AFC circuit which makes a base station or a calling terminal follow a frequency even in the case that a frequency deviation Δf from the base station or the calling terminal meets relation 1/8<=|Δf.T|<1/4 (T: symbol period) in a terminal reception device using a delay detection system. SOLUTION: The AFC circuit is provided with a level comparison part which compares and discriminates a reception power before VCXO control and that after VCXO control, an AFC correction part which takes phase error information of an AFC part output and discrimination information of the level comparison part output as inputs to calculate and output phase information, and a switch SW which takes the AFC part output and the AFC correction part output as inputs and switches output information by a radio control part, and the VCXO is controlled by phase error information of the AFC part output, and the VCXO is controlled by phase information of the AFC correction part output.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an AFC (Automatic Frequencies) of a receiving apparatus for receiving a modulated signal using a differential detection method.
quency control) circuit, especially used in receivers of digital radio communication systems using π / 4 shift QPSK modulation
It relates to improvement of AFC circuit.

[0002]

2. Description of the Related Art In order to make effective use of frequency, a π / 4 shift QPSK modulation method having high frequency use efficiency is adopted as a standard method for automobiles and mobile phones in Japan, and a simple circuit configuration is used for a demodulator. A delay detection method having excellent anti-fading characteristics is generally used. A typical wireless system includes a control station that controls a wireless channel, a base station that performs wireless communication with a terminal (mobile station), and a plurality of terminals. A terminal in such a wireless system uses an AFC for following a carrier frequency of a base station.
Function is required. Referring to FIG. 2, the operation of the terminal receiving apparatus and the AFC function in the conventional wireless system will be described.
FIG. 2 is a diagram illustrating an example of a configuration of a terminal receiving device used in a wireless system.

In FIG. 2, a received signal (π / 4-shifted QPSK modulated wave signal) transmitted from a base station (not shown) and arriving is input to an input terminal 1 via an antenna of a receiving apparatus, and is received by a receiving high-frequency circuit. High-frequency amplification is performed in the section 3 and the amplified signal is supplied to the mixer 4. A VCXO (voltage controlled oscillator) 13 generates a reference frequency signal and supplies it to a first local oscillator 14 and a second local oscillator 15. The first local oscillator 14 generates a first local oscillation signal (LO1) corresponding to the reception frequency based on the reference frequency signal provided from the VCXO 13 and frequency information (described later) provided from the wireless controller 16. To mixer 4. Second local office 15
Generates a second local oscillation signal (LO2) corresponding to the reception frequency based on a given reference frequency signal, and generates a second local oscillation signal (LO2).
Give to. In the mixer 4, the input high-frequency amplified signal is mixed by the LO 1, converted into an intermediate frequency (IF frequency), and supplied to the band-pass filter (BPF) 5. The received signal converted to the IF frequency (hereinafter, referred to as IF signal)
After being band-limited by BPF5, quadrature demodulator 6 and level detector 1
Given to 2.

A quadrature demodulator 6 quadrature demodulates an IF signal by LO2, converts the IF signal into an in-phase component I and a quadrature component Q of a baseband signal, and outputs the result. The in-phase component signal I is converted into a digital signal via a low-pass filter (LPF) 7a and an A / D converter 23a, and is provided to a delay detector 8 and a clock synchronizer 11. The quadrature component signal Q is also converted to a low-pass filter (LPF). ) 7b,
The signal is converted into a digital signal via the A / D converter 23b, and supplied to the delay detector 8 and the clock synchronization unit 11.

The clock synchronization section 11 detects the symbol timing of the modulated signal from each of the input signals, outputs clock signals (symbol clocks) synchronized with the detected signal timings, and supplies the clock signals to the delay detection section 8. The delay detection unit 8 performs a delay detection process on each of the in-phase component signal and the quadrature component signal input to the A / D in synchronization with the symbol clock. Delay detector
The in-phase component signal and quadrature component signal output from the AFC unit 9
The AFC unit 9 calculates a steady-state phase error Δθ corresponding to the frequency error Δf between the received signal and LO1 (that is, the frequency error between the base station and the terminal receiving apparatus) from the input in-phase component signal and quadrature component signal. After the detection, the in-phase component signal and the quadrature component signal corrected for the phase error Δθ are given to the code reproducing unit 10,
Further, information on the phase error Δθ is given to the AFC control unit 17.
The code reproduction unit 10 reproduces code data from the input in-phase component signal and quadrature component signal and outputs the code data via the output terminal 2 to a data processing unit such as a channel codec.

The level detector 12 receives the IF signal from the BPF 5, detects the power value of the received signal, and supplies a voltage proportional to the detected received power value to the A / D converter 23C. The A / D converter 23C converts the input voltage into a digital signal (reception power data) representing the reception power, and
Give to. The radio control unit 16 gives the frequency setting information to the first local oscillation unit 14, and also initializes the AFC control for the AFC control unit 17 and controls the operation timing. Further, the wireless control unit 16 inputs the received power data output from the A / D converter 23C, monitors a plurality of input reception frequencies, and determines an optimum (for example, the highest reception level) reception frequency. This is used as a criterion for determination. Furthermore, the received power data is also used as diversity control information when performing diversity reception. In the case of performing diversity reception, although not shown in FIG. 2, reception is generally performed by combining a plurality of receivers.

[0007] The AFC control unit 17 determines the frequency of the reference signal generated by the VCXO 13 based on the input information of the phase error Δθ.
Control data is given to the D / A converter 18 in order to make Δf variable. The D / A converter 18 converts the input control data into an analog signal, outputs a control voltage for adjusting the frequency of the VCXO 13, and supplies the control voltage to the VCXO 13. As a result, the frequency of the reference frequency signal of the VCXO 13 is adjusted to operate so as to follow the base station frequency.

In FIG. 2, a delay detection unit 8, an AFC unit 9, a code recovery unit 10, and a clock synchronization unit 11 are software-designed using a digital signal processor (DSP) 25, and a radio control unit 16 and an AFC control unit. The unit 17 is generally designed by software using a microcomputer (microcomputer) 26.

Next, the operation of the AFC unit 9 and the AFC control unit 17 will be described with reference to FIG. FIG. 3A shows the distribution of the in-phase component signal I and the quadrature component signal Q output from the differential detection unit 8 on an IQ coordinate plane. No frequency error between base station and terminal (Δf =
0), the delay detection output signal (output of the delay detection unit 8)
Points A, B, C, and D on the IQ coordinate plane in FIG. 3A (the phases of the points are π / 4, 3π / 4, -3π / 4, and -π / 4 rad, respectively). Point on a concentric circle). However, as shown in FIG. 3 (b), the local oscillation frequency (F1 ′) of the terminal is shifted by Δf from the base station frequency (F1) (F1 ′).
= F1 + Δf, | Δf · T | <1/8), the frequency error Δf
In-phase component signal I and quadrature component signal Q of differential detection output
Then, a stationary phase error Δθ represented by the equation (1) occurs. That is, points A, B, C, and D become points A ', B', C ', and D' whose phases have been shifted by .DELTA..theta. Is done. Δθ = 2π · Δf · T, (T: symbol period) ‥‥‥ Equation (1)

The AFC unit 9 receives the in-phase component signal I and the quadrature component signal Q (points A ', B', C ', and D') output from the delay detection unit 8, and calculates the coordinates of the signal points. Phase error Δθ (π / 4, 3π /
4, -3π / 4, -π / 4), and the code reproducing unit 10 corrects the phase error, and outputs the in-phase component signal and the quadrature component at points A, B, C, and D. And output signals. Also, AFC
The unit 9 outputs information on the phase error Δθ to the AFC control unit 17, and outputs
The control unit 17 provides the D / A converter 18 with control data for changing the frequency of the local oscillation signal by -Δf based on the input information on the phase error Δθ. The D / A converter 18 converts the input control data into an analog value, and applies a control voltage for adjusting the frequency of the reference signal generated by the VCXO 13 to the VCXO 13,
13 varies the frequency of the reference signal generated according to the magnitude of the applied control voltage.

As shown in FIG. 5, for example, the AFC controller 17 controls VCXO control voltage data (D _k (Δθ _k ), k = 0 to n−1, where n = 0, corresponding to the input terminal 1a, the output terminal 2a, and Δθ. Is an integer greater than or equal to 2), using the information of Δθ input from the input terminal 1a as an input address in the memory 30 and the corresponding data stored in a predetermined address in the memory 30 in advance. It is composed of a memory circuit that outputs _Dk from the output terminal 2a.

By the operation of the AFC unit 9 and the AFC control unit 17 as described above, the local oscillation frequency F1 'of the terminal shown in FIG. It can follow the station frequency.

Next, another conventional receiving apparatus will be described with reference to FIG. In FIG. 8, a received signal transmitted from a base station (not shown) is input to an input terminal 1 via an antenna of a receiving device, is high-frequency amplified by a receiving high-frequency circuit unit 3, and is then input to a mixer 4. , 1st local oscillator 1
It is mixed with LO1 given from 4 and converted to IF frequency. The received signal converted to the IF frequency is band-limited by the BPF 5, and then input to the limiter amplifier 24 and the level detector 12.

The limiter amplifier 24 limiter-amplifies the input IF signal and supplies the amplified signal to the phase detector 28. The phase detector 28
In response to a given signal, a second local oscillator 15 input separately
And outputs the phase information to the clock synchronizer 11b. The clock synchronization unit 11b detects the symbol timing of the modulation signal from the state of the change in the phase of the input signal, outputs a clock signal synchronized with this, and provides the clock signal to the phase detection 28, and the phase detection unit 28 Synchronously, the phase change amount Φ for one clock with respect to the phase of the signal (detected signal) given from the limiter amplifier 24 is given to the AFC unit 9b. Note that this phase Φ is the output (I + jQ) of the delay detection unit 8 in FIG.
This is information equivalent to and has a relationship such as equation (2). Φ = ∠ (I + jQ) = tan ^-1 (Q / I) ‥‥‥ Equation (2)

The AFC unit 9b detects a stationary phase error Δθ corresponding to the frequency error Δf between the received signal and the signal from the receiving station from the input φ signal, and then corrects the phase error Δθ.
The signal is output to the code reproducing unit 10b, and the phase error Δθ
To the AFC controller 17. The code reproducing unit 10b reproduces code data from the input Φ signal and outputs the code data via the output terminal 2.

Hereinafter, a level detector 12, an A / D converter 23c, a radio controller 16, a first local oscillator 14, a second local oscillator 15, an AFC controller 17, a D / A converter 18, The operation of the VCXO 13 and the VCXO 13 are the same as those described with reference to FIG.
By controlling the frequency of the reference signal generated by 3, the reception frequency of the mobile station (terminal) follows the base station frequency.

In FIG. 8, a phase detector 28, an AFC unit 9b,
The code reproducing unit 10b and the clock synchronizing unit 11b are provided by a gate array LSI (LSI: Large Scale Integrated circuit).
Generally, for example, hardware is designed as a detection LSI or the like using the 27, and the radio controller 16 and the AFC controller 17 are generally designed as software using the microcomputer 26. Further, a method of phase-detecting a received IF signal using an LSI after limiter amplification of the received IF signal as shown in FIG. 8 is widely used in domestic automobile telephones and mobile telephones.

However, the conventional AFC as described above
In the function, when the frequency error Δf satisfies the condition of Expression (3) and the phase error Δθ is in the state of Expression (4), the frequency control by the AFC performs an incorrect operation. 1/8 ≤ | Δf ・ T | <1/4 ‥‥‥ equation (3) π / 4 ≤ | Δθ | <π / 2 ‥‥‥ equation (4)

A specific description will be given with reference to FIG. Fig. 4 (b)
As shown in the figure, when the local oscillation frequency of the terminal is F1 ′ (F1 ′ = F1 + Δf, Δf = 1 / (8T) + Δf ′) with respect to the base station frequency F1, the frequency error Δf Steady-state phase error Δθ
Is given by | Δθ | ≧ π / 4 from the equation (1). For example, the IQ coordinates of the differential detection output are, as shown in FIG. Points A, B, C, and D on the plane, which are phase-shifted by Δθ from points C and D, are output from the differential detection unit 8.

Now, the point A ″ (A point A in the first quadrant is Δ
Focusing on the θ phase-shifted point), the AFC unit 9 determines that this is −Δθ ′ (= Δθ−π / 4, −Δ
The phase error is determined to be a point shifted by (phase error corresponding to f ′), and the phase error information of −Δθ ′ is output to the AFC control unit 17 (points “B”, “C” and D ”). The phase error -Δθ ′ with respect to the reference points (points C, D and A) of the quadrant including each point is output.) As a result, the AFC control unit
17 outputs control voltage data to the VCXO 13 to the D / A converter 18 so as to vary the frequency of the reference signal by + Δf ′,
Since the frequency of the VCXO 13 is adjusted by the / A converter 18 according to the output data, the frequency of LO1 is changed from F1 as shown in FIG.
Erroneous AFC control such as changing to F1 ″ will be performed.

In particular, when AFC is executed in a receiving apparatus for narrowband digital wireless communication, the following problems arise. For example, 9.6 kbps (4.8 kbps) using a π / 4 shift QPSK modulation scheme as a 400 MHz narrowband digital radio scheme.
kbaud) and a channel spacing of 6.25 kHz are known. In this system, the accuracy of the frequency stability at the base station and the terminal is specified to be ± 0.2 ppm or less (equivalent to approximately ± 80 Hz) at the base station and ± 1.5 ppm or less (equivalent to approximately ± 600 HZ) at the terminal. However, first, the initial frequency deviation when the base station follows the frequency of the terminal is 1.7 ppm (corresponding to about 680 Hz) at the maximum. Therefore, Δf · T = (400 MHz × 1.7 pp
m) × (1 / 4.8 kHz) = 0.142, which exceeds 1/8 (Δf = 600 Hz when converted to frequency), so that an error occurs in AFC control. Second, in the above narrowband digital radio system, a communication mode in which terminals (mobile stations) directly communicate with each other by a simplex without passing through a base station is defined. The AFC on the calling side must follow the frequency of the calling terminal. However, if the frequency stability of the terminal is ± 1.5 ppm or less, the initial frequency deviation between terminals is 3 ppm at maximum (corresponding to about 1.2 KHz). Therefore, Δf · T = (400 Mhz × 3 ppm) × (1 / 4.8 kHz) = 0.25
Because it exceeds 1/8, error occurs in AFC control.

In the case described above, the conventional AFC method and circuit cannot cope at all. Therefore, an AFC method and circuit corresponding to such a problem must be newly developed. In particular, in the case of the receiving apparatus as shown in FIG.
SI must be developed. On the other hand, as a solution, it is conceivable to replace the frequency reference source of the mobile station with a highly stable frequency reference source such as that used in a base station (for example, an OCXO (crystal oscillator with constant temperature chamber)). In particular, when a portable terminal is commercialized, it is practically difficult to adopt the OCXO in terms of miniaturization and cost reduction.

[0023]

The above-mentioned prior art includes the following:
If the predetermined condition is not satisfied, there is a disadvantage that the frequency control by the AFC performs an erroneous operation. In particular, in a receiving device for narrowband digital wireless communication, frequency stability at terminals is poor, and further, in a communication mode in which terminals communicate directly with each other by simplex, initial frequency deviation between terminals is poor.
There was a disadvantage that the predetermined conditions were not satisfied. In addition, existing LS
I cannot respond to these shortcomings, so a new L
Some hair shops had to develop SI. Further, as a solution, it is conceivable to replace the frequency reference source of the mobile station with a highly stable frequency reference source such as that used in a base station (for example, an OCXO (crystal oscillator with constant temperature chamber)). In particular, when OCXO is used to commercialize a mobile terminal, there is a disadvantage that it is not possible to reduce the size and the price. An object of the present invention is to eliminate the above-mentioned drawbacks and maintain the conventional AFC system and circuit, and can follow the frequencies of the base station and the calling terminal regardless of any frequency deviation. To provide a simple AFC circuit.

[0024]

In order to achieve the above object, an automatic frequency control method according to the present invention is a receiving apparatus for detecting a received signal, wherein the receiving apparatus follows a carrier signal frequency transmitted by a transmitting side. The AFC circuit compares the received power output by the level detector before and after controlling the reference signal generator, and generates a reference signal based on the AFC control amount (information such as frequency error or phase error) according to the change in received power. Control the vessel.

Further, according to the automatic frequency control method of the present invention, the phase of the reference signal generated by the reference signal generator of the receiving apparatus is shifted, and the received signal before the phase shift and the received signal after the phase shift are shifted. Then, the phase of the reference signal is shifted according to the change in power before and after.

Further, according to the frequency automatic control method of the present invention, when the power value of the received signal before and after changing the phase of the reference signal is small, the phase of the reference signal is further increased by a predetermined amount (for example,-).
π / 2 rad).

Still further, the AFC circuit of the present invention is a receiving device for inputting a received signal, comprising: a reference signal generator for generating a reference frequency signal; and a frequency converter for converting the received signal to a predetermined frequency based on the reference frequency signal. A mixer that performs conversion, a level detection unit that detects power of the frequency-converted signal, a symbol synchronization unit that detects symbol timing from the received signal,
A delay detector that delay-detects the received signal according to the symbol timing, an AFC section that detects phase error information from the signal delayed-detected by the delay detector, and corrects the phase of the received signal based on the phase error information; An AFC control unit that outputs control data for shifting the phase of the reference frequency signal in accordance with the AFC control circuit, wherein the AFC circuit shifts the frequency of the receiving device by shifting the phase of the reference frequency signal by the control data. The unit has level comparing means for comparing the power of the received signal before shifting the phase of the reference frequency signal with the power of the received signal after shifting the phase, and determines the result of the comparison by the level comparing means as the determination information. Is output as AFC based on the judgment information.
The phase of the reference frequency signal is shifted either by shifting the phase of the reference frequency signal according to only the phase error information output by the section or by further shifting the phase by a predetermined amount (for example, -π / 2 rad). Shift.

Further, the AFC circuit of the present invention comprises a high-frequency circuit for receiving a received signal and amplifying the high-frequency signal, a reference signal generator for generating a reference frequency signal, and outputting a first local oscillation signal based on the reference frequency signal. A first localization unit,
A mixer for frequency-converting the output signal of the high-frequency circuit section to a predetermined frequency by a local oscillation signal of the same, a filter for band-limiting the signal frequency-converted by the mixer, and a level detection for detecting power of the signal band-limited by the filter Unit, a symbol synchronization unit for detecting symbol timing from the band-limited signal, a delay detection unit for delay-detecting the band-limited signal in synchronization with the symbol timing of the symbol synchronization unit output, and a signal from the delay-detected signal. An AFC unit that detects phase error information and outputs a signal with the phase error corrected according to the detected phase error information, a code reproduction unit that reproduces code data from the signal with the phase error corrected, and a reference based on the phase error information An AFC control unit that outputs control data for shifting the phase of the frequency signal, and a reference frequency signal based on the control data. The AFC circuit that controls the phase has level comparing means for comparing and judging the received power before and after shifting the phase of the reference frequency signal and outputting judgment information, and according to the judgment information, a phase error The reference frequency signal is shifted only by the information, or the phase is further shifted by a predetermined amount (for example, -π / 2 rad).

The AFC circuit of the present invention further includes a predetermined amount (eg, -π / 2) based on the phase error information when the received power after the shift is smaller than the received power before the phase of the reference frequency signal is shifted. rad) Shift the phase. As described above, according to the present invention, it is possible to follow the frequencies of the base station and the calling terminal even if any frequency deviation occurs.
AFC circuit can be realized.

[0030]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the AFC circuit according to the present invention will be described with reference to FIG. FIG. 1 is a block diagram showing the configuration of a terminal receiving device according to the present invention. Components having the same functions as those described above are denoted by the same reference numerals. FIG. 1 shows the apparatus of FIG. 2 in which a level comparison unit 20 for comparing and judging received power before and after controlling the frequency of a reference signal generated by the VCXO 13 and θ information of a phase error Δ of an output of the AFC unit 9 AFC correction unit 21 for inputting determination information K of the output of level comparison unit 20 and calculating and outputting phase information Δθa, and a radio control unit for receiving the output of AFC unit 9 and the output of AFC correction unit 21 It has a configuration in which a switch (SW) 22 for switching its output according to 16 instructions is added. In addition, the same components as those in FIG. 2 have the same functions, and a received signal arriving from a base station is input from an input terminal 1 via an antenna and output from an output terminal 2 via various components. Operation up to and VCXO1
3. The operations of the first and second local oscillators 14, 15, the level detector 12, the A / D converter 23C, the D / A converter 18, the radio controller 16, and the AFC controller 17 are the same as those in FIG. Therefore, descriptions other than those particularly necessary for the present invention will be omitted. The AFC control in FIG. 1 controls the VCXO 13 based on information on the phase error Δθ output from the AFC unit 9.
And the phase information Δθa output from the AFC correction unit 21.
And a second control stage for controlling the VCXO 13.

In FIG. 1, after detecting a stationary phase error Δθ corresponding to a frequency error Δf between the received signal and the received local oscillation signal, the AFC unit 9 converts the in-phase component signal and the quadrature component signal whose phase errors have been corrected. The information is supplied to the code reproducing unit 10 and the information of the phase error Δθ is supplied to the IN1 side of the SW 22 and the AFC correction unit 21.

The level detector 12 receives the IF signal, detects the power value of the received signal, outputs a voltage proportional to the detected received power value, and supplies the voltage to the A / D converter 23c. A / D converter 2
3c converts the given signal into a digital signal representing the received power, and outputs the digital signal to the wireless control unit 16 and the level comparison unit 20. The wireless controller 16 outputs the frequency setting information to the first local oscillator 14, controls the switching of the output of the SW 22,
The C control unit 17, the level comparison unit 20, and the AFC correction unit 21 are initialized, and the operation timing of the AFC is controlled. Further, the radio control unit 16 receives the received power data provided from the A / D converter 23c, monitors a plurality of received frequencies, and uses the monitored data as a criterion when determining an optimal (highest received level) receiving frequency. .

The first local oscillator 14 receives the reference signal from the VCXO 13, generates an LO 1 corresponding to the reception frequency based on the frequency information given from the radio controller 16, and outputs the LO 1 to the mixer 4. The second local oscillator 15 receives the reference signal supplied from the VCXO 13, generates LO2, and outputs the LO2 to the quadrature demodulator 6.
The input of the SW22 on the IN2 side is provided with the output of the AFC correction unit 21, and in the first control stage, information (IN1 side) of the phase error Δθ provided from the AFC unit 9 is selected and output. In the second control stage, the phase information Δθa (IN2 side) provided from the AFC correction unit 21 is selected and output.

The AFC controller 17 receives the information supplied from the SW 22 and outputs control data to a D / A converter 18 that outputs a control voltage for varying the frequency of the VCXO 13, and the D / A converter 18 receives the information. The control data is converted into an analog signal and sent to the VCXO 13. To the level comparing section 20, the received power information provided from the level detecting section 12 and the timing signal provided from the wireless control section 16 are input. As a result, in the level comparison unit 20, the information of the phase error Δθ given from the AFC unit 9 by the wireless control unit 16 is selected as the output of the SW22, and the first control for controlling the frequency of the reference signal generated by the VCXO 13 is thereby performed. In the stage, the magnitude of the received power before and after the frequency image of the reference signal is changed is compared and determined, and the determination information K, which is the result of the comparison, is given to the AFC correction unit 21.

As shown in FIG. 6, for example, the level comparing section 20 has an input terminal 1b for receiving power information, an input terminal 1b 'for a timing signal supplied from the radio control section 16, and a sample / hold (S / H) section 31a. , A comparator 32, and an output terminal 2b, and the S / H unit 31a holds the received power information input from the input terminal 1b immediately before the VCXO 13 is controlled. Then, immediately after the VCXO 13 is controlled, the received power information input from the input terminal 1b and the content held in the S / H unit 31a are respectively given to the comparator 32, and after comparing the magnitude, the determination result K is determined. Output via the output terminal 2b. The operation timing of the level comparison unit in FIG. 6 is controlled by a timing signal provided from input terminal 1b. The same applies to the operation timings of the AFC correction unit 21 and SW22.

The AFC correction unit 21 receives the information of the phase error Δθ given from the AFC unit 9, the judgment information K outputted from the level comparison unit 20, and the timing signal given from the radio control unit 16. The phase information Δθa represented by the equation (5) is calculated using the information on the phase error Δθ given in the first control stage and the determination information K given after the first control stage ends. However, before and after the first control stage, when the reception level increases, K = 0, and when the reception level decreases, K = 1, and sign (x) is a function (sign (x) representing the sign of the argument X. x) = + 1: X> 0, sign (x) =-1: x <0, sign (x) =
0: x = 0). Δθa = Δθ- (π / 2) × K × sign (Δθ) ‥‥‥ Equation (5)

The AFC corrector 21 has an input terminal 1c for information on the phase error Δθ and an input terminal 1c for the determination information K as shown in FIG.
c ′, an input terminal 1c ″ for a timing signal given from the wireless control unit 16, an S / H unit 31b, a calculation unit 33, and an output terminal 2c, and the phase error Δ input in the first control stage.
The information of θ is held in the S / H unit 31b, and the determination information K input after the end of the first control stage and the held contents of the S / H unit 31b are given to the calculation unit 33, respectively, and the equation (5) To calculate the phase information Δθa.

The present invention will be further described with reference to FIGS. 3 and 4 used in the description of the prior art. As shown in FIG.
When | Δf · T | <1/8 (| Δθ | <π / 4), the frequency F1 ′ of the terminal follows the base station frequency F1 by the first control stage (operation similar to the conventional technique). Therefore, the power output from the IF filter 5 increases compared to before the control. Because, when the frequency error Δθ exists,
This is because the reception signal is band-limited by the IF filter 5 and the reception power becomes maximum when the frequency is synchronized to Δf = 0. Therefore, when K = 0, Δθa = Δθ from Expression (5), and the second
In the control stage, the same processing as in the first control stage is repeated. Note that | Δf · T | <1/8 (| Δθ | <
In the case of (π / 4), the second control stage can be omitted.

On the other hand, as shown in FIG. 4, 1/8 ≦ | Δf · T | <1/4
In the case of (π / 4 ≦ | Δθ | <π / 2), as described above, Δθ is −1 in the first control stage (operation similar to the conventional technique).
Because it is determined to be Δθ ′, the terminal frequency F1 ′ is shifted to F1 ″ in the wrong direction (direction away from the base station frequency F1), and the power output from the IF filter 5 is lower than before control. Therefore, when K = 1, from equation (5), Δθa = −Δ
θ '-(π / 2) × 1 × (-1) =-Δθ' + π / 2 = Δθ,
In the second control stage, the AFC control unit 17 gives Δθa = Δθ
The control data given to the VCXO 13 to shift the frequency of the local oscillation signal by -Δf
7, the terminal's local oscillation frequency F1 ″ can be shifted to F1 to follow the base station frequency.

The level comparing section 20 and the AFC correcting section 2 shown in FIG.
1 and SW22 can be easily designed in software by the programming language.
It is also possible to take in as a part of the function of.

Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 9 is a block diagram showing a configuration of the terminal receiving device of the present invention. FIG. 9 shows FIG. 8 described in the prior art.
1, a level comparison unit 20, an AFC correction unit 21, and a SW 22 are added to the configuration of FIG. In addition, the same components as those in FIG. 8 have the same functions, and a received signal arriving from the base station is input from the input terminal 1 via the antenna, and is output from the output terminal 2 via the components. And the operations of the VCXO 13, the first and second local oscillators 14, 15, the level detector 12, the A / D converter 23C, the D / A converter 18, the radio controller 16, and the AFC controller 17. The operation is also the same as that of FIG.

In FIG. 9, the AFC unit 9b detects a steady-state phase error Δθ corresponding to the frequency error Δf between the received signal and the received local oscillation signal from the input Φ signal, and then converts the detected Φ signal into a corrected Φ signal. The information is supplied to the code reproducing unit 10b, and further the information of the phase error Δθ is supplied to the IN1 side input of SW22 and the AFC correction unit 21. Hereinafter, the level detector 12, the A / D converter 23c, the radio controller 16, the first and second local oscillators 14, 15, the AFC controller 17, the D / A converter 18, the VCXO 13, the level comparator 20 , AFC correction unit 21, and S
The operation of W22 is the same as that of FIG. Then, as in FIG. 1, in the first control stage, the AFC
The information (IN1 side) of the phase error Δθ output from the unit 9 is selected and output by the SW22, and the phase information Δθa (IN2 side) output from the AFC correction unit 21 is selected by the SW22 in the second control stage. And output to the AFC control unit 17, where the VCXO 13
Is performed to follow the base station frequency.

In the above embodiment, the VCXO is described as a component for generating a reference frequency signal. However, it is obvious that any other signal generator that generates a reference frequency signal having predetermined characteristics may be used. It is. Since the level comparison unit 20, the AFC correction unit 21, and the SW 22 in FIG. 9 can be easily designed in software by a programming language, they can be easily incorporated into the microcomputer 26 '. , AFC correction unit 21, SW22, wireless control unit 16
And the AFC control unit 17 and a microcomputer 26 '.

[0044]

As described above, according to the AFC circuit of the present invention, the case where the frequency of the mobile station is made to follow the frequency of the base station and the case where the mobile stations directly communicate with each other by simplex without passing through the base station In the case where the frequency of the calling mobile station is made to follow the frequency of the calling mobile station, the initial deviation of the frequency between the two stations on the transmitting station side and the receiving station side is, for example, a differential detection output signal. Deviates from the ideal coordinate plane, 1 /
Even under the condition of 8 ≦ | Δf · T | <1/4 (T: symbol period), the frequency can be made to follow. Further, according to the present invention, there is no need to change the circuit of the conventional receiver or the LSI (new development), and it can be performed only by changing the software of the DSP or the microcomputer. Can be extended.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a receiving apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a conventional terminal receiving device.

FIG. 3 illustrates an operation of a conventional AFC circuit.

FIG. 4 is a diagram illustrating a malfunction of a conventional AFC circuit.

FIG. 5 is a block diagram showing a configuration of a conventional AFC control unit.

FIG. 6 is a block diagram illustrating a configuration of a level comparison unit according to one embodiment of the present invention.

FIG. 7 is a block diagram illustrating a configuration of an AFC correction unit according to one embodiment of the present invention.

FIG. 8 is a block diagram showing a configuration of a conventional receiving apparatus.

FIG. 9 is a block diagram showing the configuration of a receiving apparatus according to one embodiment of the present invention.

[Explanation of symbols]

1, 1b, 1b ', 1c, 1c', 1c ": Input terminal, 2, 2b, 2
c: output terminal, 3: reception high-frequency circuit, 4: mixer,
5: BPF, 6: Quadrature demodulator, 7a, 7b: LPF, 8: Delay detector, 9, 9b: AFC section, 10, 10b: Code recovery section, 1
1, 11b: Clock synchronization section, 12: Level detector, 13:
VCXO, 14: first local office, 15: second local office, 1
6: Wireless controller, 17: AFC controller, 18: D / A converter,
20: Level comparison section, 21: AFC correction section, 22: SW, 2
3a, 23b, 23C: A / D converter, 24: Limiter amplifier, 2
5: DSP, 26, 26 ': microcomputer, 27: LSI, 28: phase detector, 30: memory, 31a, 31b: S / H, 32:
Comparator, 33: arithmetic unit.

Claims (7)

[Claims] 1. A receiving device for detecting a received signal, comprising:
AF for tracking the carrier signal frequency transmitted by the transmitting side
In a C (Automatic Frequency Control) circuit, the phase of the reference signal generated by the reference signal generator of the receiving device is shifted, and the power of the received signal before the phase shift and the power of the received signal after the phase shift are shifted. And automatically shifting the phase of the reference signal in accordance with the change in power. 2. A receiver for detecting a received signal, comprising:
AF for tracking the carrier signal frequency transmitted by the transmitting side
In the C circuit, a change in power between the received signal before the phase is shifted and the received signal after the phase is shifted is compared. If the power value of the received signal after the phase is small, the reference signal An automatic frequency control method, wherein the phase is shifted by a predetermined amount. 3. The automatic frequency control method according to claim 2, wherein the predetermined amount for shifting the phase is -π / 2 rad. 4. A receiving device for inputting a received signal, comprising:
A reference signal generator that generates a reference frequency signal, a mixer that converts the frequency of the received signal to a predetermined frequency based on the reference frequency signal, a level detection unit that detects power of the frequency-converted signal, A symbol synchronization section for detecting a symbol timing from the received signal, a delay detection section for delay-detecting the received signal according to the symbol timing, and detecting phase error information from the signal delayed-detected by the delay detection section; An AFC unit that corrects the phase of the received signal with information, and an AFC control unit that outputs control data for shifting the phase of the reference frequency signal in accordance with the phase error information, An AFC circuit that shifts the frequency of the receiving device by shifting the phase of a frequency signal, wherein the AFC control unit is Level comparing means for comparing the power of the received signal before shifting the phase of the reference frequency signal with the power of the received signal after shifting the phase, and judges the result of the comparison judgment by the level comparing means Output as information, based on the determination information, either in accordance with only the phase error information output by the AFC unit, the phase of the reference frequency signal is shifted, or the phase is further shifted by a predetermined amount. An AFC circuit, wherein the phase of the reference frequency signal is shifted according to the above. 5. A high-frequency circuit for inputting a received signal and amplifying the high-frequency signal, a reference signal generator for generating a reference frequency signal, and a first local oscillator for outputting a first local oscillation signal based on the reference frequency signal A mixer for frequency-converting the output signal of the high-frequency circuit unit to a predetermined frequency by the first local oscillation signal, a filter for band-limiting the signal frequency-converted by the mixer, and a band-limited filter for the filter A level detection unit for detecting the power of the signal, a symbol synchronization unit for detecting a symbol timing from the band-limited signal, and delay detection of the band-limited signal in synchronization with the symbol timing of the symbol synchronization unit output A delay detection section for detecting phase error information from the delayed detected signal and outputting a signal having a phase error corrected based on the detected phase error information; An AFC unit, a code reproducing unit that reproduces code data from the signal in which the phase error is corrected, and an AFC control unit that outputs control data for shifting the phase of the reference frequency signal in accordance with the phase error information. And an AFC circuit that controls the phase of the reference frequency signal according to the control data. A level comparing unit that compares and determines received power before and after shifting the phase of the reference frequency signal and outputs determination information. An AFC circuit, comprising: shifting the reference frequency signal only by the phase error information or further shifting the phase by a predetermined amount according to the determination information. 6. The AFC circuit according to claim 5, wherein the received power before shifting the phase of the reference frequency signal is
An AFC circuit characterized in that when the received power after the shift is small, the phase is further shifted by a predetermined amount from the phase error information. 7. The AFC circuit according to claim 4, wherein the predetermined amount is -π / 2 rad.