JP2001237812A - Digital broadcast receiver and interface unit used for it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a digital broadcast receiver that can surely transfer data within a transfer rate allowed by an external digital device in the case that the digital broadcast receiver transfers the data to the external digital device and to provide an interface unit used for the digital broadcast receiver. SOLUTION: In the case that a digital broadcast receiver R transfers data to the external digital device PC, an I/O control circuit 21 compares a communication bits rate allowed by a communication port of the digital device with a bit rate of the transferred data and the digital broadcast receiver R transfer- outputs the data by decreasing the bit rate of the transferred data to a bit rate less than the communication bit rate when the bit rate of the transferred data is higher than the communication bit rate.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital broadcast receiver for receiving digital broadcasts and an interface device used for the digital broadcast receiver, and more particularly to a device for transferring received digital data to an external digital device such as a personal computer.

[0002]

2. Description of the Related Art Various programs composed of video, audio, text, and the like can be converted into digital data and distributed to homes through various transmission paths such as terrestrial waves, satellite waves, and cables (cable broadcasting). With this digitization, the number of program channels that can be selected by viewers has been significantly increased. For example, digital audio satellite broadcasting is a multi-channel broadcasting in which audio data of each channel is multiplexed in a TDM (time division multiplexing) system, QPSK modulated, and then delivered to each home as one satellite broadcast wave. A desired channel can be selected from many channels by a receiver installed at home (see, for example, JP-A-11-146379).

[0003] On the other hand, the spread of personal computers to homes due to the innovation of digital technology has been remarkable, and the processing of reproducing images and sounds of digital data received by a digital broadcast receiver and the digital recording of data can also be performed by personal computers. Is required.

[0004]

In order to meet this demand, a digital broadcast receiver is provided with an output port for received digital data so that data can be transferred to a digital device such as a personal computer. .

In digital devices such as personal computers, the bit rate at a communication (input) port can be set, for example, from 110 bps to 921600 bps, and can be set to, for example, “9600 bps” according to the hardware capabilities of the digital device. Thus, the maximum bit rate at which communication can be guaranteed is set. The bit rate of the digital data received by the digital broadcast receiver is, for example, 16 kbps to 128 kbps, which is 16k.
It is set for each channel in bps steps.

[0006] For this reason, when data is transferred from a digital broadcast receiver to an external digital device, the bit rate of the data to be transferred differs for each channel, and depending on the data, the transfer rate is higher than the transfer rate of the communication port of the digital device. May be transferred. If data transfer is performed at a rate higher than the transfer rate permitted (guaranteed) by the communication port of the digital device, the digital device may not be able to correctly receive the data. Video and audio) will be different from the original ones.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and when data is transferred to an external digital device, the data is transferred within a transfer rate permitted by the digital device, thereby enabling reliable data transfer. It is an object of the present invention to provide a digital broadcast receiver and an interface device used for the digital broadcast receiver.

[0008]

According to a first aspect of the present invention, there is provided a digital broadcast receiver for receiving a signal in which data of a plurality of channels having different bit rates are multiplexed. Data extraction means for extracting data of a specific channel from a signal, bit rate detection means for detecting a bit rate of the extracted data,
A clock generating means having a variable frequency of a generated clock; a data output means for outputting data extracted by the data extracting means to an external digital device; and a communication means for communicating with the external digital device connected to the data output means. Bit rate storage means for storing a bit rate, wherein when the bit rate detected by the bit rate detection means is higher than the bit rate stored in the bit rate storage means, the bit rate is stored in the bit rate storage means by the clock generation means. A clock having a frequency equal to or lower than the frequency corresponding to the bit rate is generated, and data is output from the data output means to an external digital device in accordance with the clock generated by the clock generation means.

According to a second aspect of the present invention, there is provided a digital broadcast receiver according to the first aspect, further comprising input means for inputting a communication bit rate to a bit rate storage means.

According to a third aspect of the present invention, there is provided an interface device for transferring data between a digital broadcast receiver for outputting data of a broadcast program including related information and a digital device having communication means. An apparatus, wherein buffer means for temporarily storing data of a broadcast program, bit rate detection means for detecting a bit rate of data of the broadcast program from related information, and clock generation means having a variable frequency of a generated clock. ,
A bit rate storage means for storing a communication bit rate in a communication means of the digital device, and a bit rate detected by the bit rate detection means and a bit rate stored in the bit rate storage means, and detected by the bit rate detection means. When the set bit rate is greater than the bit rate stored in the bit rate storage means, the clock generation means generates a clock having a frequency equal to or lower than the frequency corresponding to the bit rate stored in the bit rate storage means and generates the clock at the clock generation means. Control means for outputting data from the buffer means to the communication means of the digital device in accordance with the clock.

According to a fourth aspect of the present invention, there is provided the interface device according to the third aspect, further comprising an input unit for inputting a communication bit rate to the bit rate storage unit.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is applied to a digital broadcast receiver for receiving a digital audio satellite broadcast will be described below with reference to the drawings.

Digital audio satellite broadcasting is capable of transmitting a broadcasting program of many channels from a broadcasting satellite in one transmission frequency band having one center carrier frequency. , Video or text data) in the TDM (time division multiplexing) system,
After performing K modulation, it is transmitted as one broadcast wave and distributed to each home. At each home, a desired channel is selected and received by the receiver.

FIG. 2 shows a schematic configuration of a TDM bit stream having a periodic frame structure in which a plurality of audio data are time-division multiplexed. Each frame is a sync signal,
It comprises a header and a plurality of slots (1 to n), and each slot contains data of a predetermined number of bits.
The header of each frame includes a plurality of slots (1 to
n) corresponding to a plurality of labels (1 to n),
Each label includes a code (channel identification data) for identifying which channel the data stored in the corresponding slot is data of.

For example, if the number of slots in one frame is 7 and 3
When two channels A, B, and C are multiplexed, the channel identification data in labels 1 to 7 is A, B, C, A, C, A, 0 (0 represents an empty slot) as shown in FIG. ), The data of channel A is transmitted using slots 1 and 4 and 6 of each frame. When the channel A is selected by the receiver, the data of the slots 1, 4 and 6 is extracted from each frame of the TDM bit stream, and these data are combined in a time series to form a series of channels A. Channel data is obtained.

The channel data composed of one frame of the TDM bit stream has a frame structure composed of a header and data of the contents of the broadcast program itself (for example, audio data; this area is called a service area). I have. The service area is composed of a plurality of service components. Each service component includes broadcast data (audio data) in Japanese, broadcast data (audio data) in English, broadcast data (audio data) in French, and image data. Alternatively, a plurality of types of data provided by the channel, such as text data, are divided and included. In the header, in addition to the synchronization word, program-related data such as broadcast station name data indicating the name of a broadcast station, data indicating the scramble state of the program, bit rate data indicating the transmission bit rate of the program, and the broadcast date and time of the program Time data, data indicating the number of service components, type data indicating the type of program (music, speech, etc.) for each service component, language data indicating the language used for each service component, and data type of the service component for each service component ( Type data representing types such as MPEG audio data, video data, and general data).

In the receiver, a desired channel is selected, one of the service components in the selected channel is selected, and a broadcast having contents based on the data of the selected service component is reproduced.

FIG. 1 is a schematic configuration diagram of an interface device according to an embodiment of the present invention and a digital satellite broadcast receiver provided with the interface device. R is a basic component of the digital broadcast receiver, I is an interface device, and when incorporated in the digital broadcast receiver R, is configured as data output means.

First, the basic configuration and operation of the digital broadcast receiver R will be described.

Reference numeral 1 denotes an antenna having a built-in down-converter, which receives broadcast waves from satellites. The built-in down-converter down-converts a received signal into a signal of a predetermined frequency and outputs the signal to the tuner 2. The tuner 2 controls the frequency division ratio of the programmable frequency divider adopting the PLL synthesizer system based on the control from the control circuit 5 which controls the whole of the down-converted received signals, thereby controlling the predetermined reception frequency. The signal is selected and output to the QPSK demodulation circuit 3. The QPSK demodulation circuit 3 performs QPSK demodulation of the received signal and outputs a TDM bit stream of the received signal.

TDM output from QPSK demodulation circuit 3
The bit stream is input to a TDM demodulation / channel decoder 4 as data extraction means, which separates and reconstructs data of each channel as described above, and converts the data BCD of the channel designated by the control circuit 5 into channel data. Output together with a clock BCC of a frequency based on bit rate data indicating the transmission bit rate of the broadcast program contained in the BCD. Although not shown, the TDM demodulation / channel decoder 4 includes a control circuit 5
May be configured to output a specific one service component of the channel data BCD controlled and output.

The channel data BCD output from the TDM demodulation / channel decoder 4 is input to an input buffer 6 according to a clock BCC, and further input to a demultiplexer 7. In the demultiplexer 7, a predetermined service component SC is selected and output according to the control of the control circuit 5 (here, it is assumed that the data is audio data).
The data is output to the MPEG audio decoder 8 and MPEG data of the broadcast program data (the selected service component SC) is decoded. Then, after the data passes through the D / A converter 9 and the amplifier 10, a desired broadcast program (the selected service component SC) is reproduced and output by the speaker 11 and is listened to by the user. Further, the demultiplexer 7 may be configured to output other service components SC not selected and output to the MPEG audio decoder 8 from another output terminal.

The instruction to the control circuit 5 is given by an input device 12 comprising a plurality of keys for performing various settings, selections, and other operations.

Next, the configuration of the interface device I will be described.

An I / O control circuit 21 is a bit rate detecting means for inputting the channel data BCD and detecting a transmission bit rate of the broadcast program contained in the channel data BCD, and also a control means for performing transfer control. A register 22 is provided as bit rate storage means for temporarily storing information on a communication bit rate permitted in a communication port which is a communication means of a personal computer PC which is a digital device.

Reference numeral 23 denotes a clock generator serving as a clock generating means that generates a variable frequency of a clock. The clock generator 23 receives a clock BCC input together with channel data BCD, and controls the I / O control circuit 21 to control the input clock. It outputs the BCC as it is or generates a clock having the frequency specified by the I / O control circuit 21. Reference numeral 24 denotes a data buffer as buffer means for temporarily storing the input channel data BCD. Data is output from the data buffer 24 in accordance with the clock CK from the clock generator 23. Reference numeral 25 denotes I / O of the input channel data BCD and the output from the data buffer 24.
These switches are switched and output under the control of the O control circuit 21.

The interface device I is connected to the channel data BCD of the digital broadcast receiver R, the output terminal OUT of the clock BCC, and the communication port of the personal computer PC by a connector (not shown), and mediates data transfer.

In such a configuration, the digital broadcast receiver R
When data is transferred from the personal computer PC to the personal computer PC, first, the interface device I receives information on the communication bit rate permitted at the communication port from the personal computer PC and stores it in the register 22 of the I / O control circuit 21. Keep it.

When a desired channel is selected and the channel data BCD of the broadcast program is output from the output terminal OUT of the digital broadcast receiver R, the I / O control circuit 21 inputs the channel data BCD and inputs the channel data BCD. Check the bit rate data of the program-related data in it. Further, the I / O control circuit 21 compares the value of the bit rate data with the value of the communication bit rate stored in the register 22.

As a result of the comparison, if the value of the bit rate data is equal to or less than the value of the communication bit rate, the I / O control circuit 21 sends the clock signal from the clock generator 23 to the clock generator 2.
The clock BCC input to the data buffer 2 is passed through as it is as the clock CK and is output.
Channel data BC, not output from 4
The switch 25 is switched and controlled so that a signal obtained by passing through D as it is is output. As a result, the channel data BCD and the clock BCC output from the output terminal OUT are transferred (input) to the communication port as they are (the clock BCC is the clock CK).

As a result of the comparison, if the value of the bit rate data is larger than the value of the communication bit rate, the I / O control circuit 21 causes the clock generator 23 to output a clock having a frequency corresponding to the value of the communication bit rate (or A clock having a frequency lower than that is generated and output as a clock CK, and the switch 25 is controlled so that the output from the data buffer 24 is selectively output. From the data buffer 24, a clock CK of a frequency corresponding to the value of the communication bit rate (or a clock of a lower frequency)
, The channel data BCD is output (input) to the communication port at a bit rate lower than the allowable communication bit rate. The above situation is shown in FIG.

For example, the communication bit rate permitted by the communication port of the personal computer PC is 19200 bp.
If it is s, it is assumed that this value is stored in the register 22. If the bit rate data of the channel data BCD output from the output terminal OUT is 16 kbps, the value of the bit rate data is equal to or less than the communication bit rate, so that the channel data BCD and the clock BCC (CK) are communicated as they are. Output to port. If the bit rate data of the channel data BCD output from the output terminal OUT is 32 kbps, the value of the bit rate data is greater than the value of the communication bit rate. 23 generates a clock having a frequency equivalent to 19200 bps and outputs it as a clock CK, and switches the switch 25 so that the output from the data buffer 24 is selectively output. Thus, the channel data BCD is transferred (inputted) to the communication port at a bit rate of 19200 bps, which is an allowable communication bit rate.

In this embodiment, the value of the communication bit rate temporarily stored in the register 22 is obtained by receiving information on the communication bit rate permitted at the communication port from the personal computer PC. However, the present invention is not limited to this. For example, the input device such as a key switch for inputting an instruction to the I / O control circuit 21 is provided in the interface device I, and the user manually inputs from the input device. May be.

In this embodiment, the digital broadcast receiver R and the interface device I have been described as having different configurations. However, the digital broadcast receiver may have a configuration in which R includes the interface device I. , The interface device I will function as data output means,
The output terminal OUT is omitted. Then, the control circuit 5 outputs the I /
The O control circuit 21 may also serve as a configuration, and if it further includes the input means for communication bit rate input described above,
The input device 12 may also serve as the input means.

[0035]

As is apparent from the above description, according to the present invention, when data is transferred from a digital broadcast receiver to an external digital device, the communication bit rate allowed (guaranteed) by the communication port of the digital device is determined. Compare the bit rate of the data to be transferred and, if the bit rate of the data to be transferred is higher than the communication bit rate, ensure that the data rate of the data to be transferred is equal to or lower than the communication bit rate to ensure that the data is transferred to the external digital device. Can be done. Therefore, it is possible to reproduce the broadcast program based on the data on the external digital device that has received the data transfer in a favorable state.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of an interface device and a digital satellite broadcast receiver including the same according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating a data configuration of a TDM bit stream.

FIG. 3 is a diagram illustrating a frame structure of a TDM bit stream and channel data.

FIG. 4 is a flowchart illustrating a control flow according to an embodiment of the present invention.

[Explanation of symbols]

R Digital broadcast receiver 1 Antenna 2 Tuner 3 QSPK demodulation circuit 4 TDM demodulation / channel decoder (data extraction means) 5 Control circuit 7 Demultiplexer 8 MPEG audio decoder 11 Speaker 12 Input device (Input device) I Interface device (Data output device) 21) I / O control circuit (bit rate detection means, control means) 22 register (bit rate storage means) 23 clock generator (clock generation means) 24 data buffer (buffer means) 25 switch PC personal computer (external digital device) )

Claims (4)

[Claims] 1. A digital broadcast receiver for receiving a signal in which data of a plurality of channels having different bit rates are multiplexed, a data extracting means for extracting data of a specific channel from the received signal, and a bit of the extracted data. A bit rate detecting means for detecting a rate, a clock generating means having a variable frequency of a generated clock, a data output means for outputting data extracted by the data extracting means to an external digital device, and a data output means. Bit rate storage means for storing a communication bit rate in a communication means of an external digital device, wherein when the bit rate detected by the bit rate detection means is higher than the bit rate stored in the bit rate storage means, The generation means corresponds to the bit rate stored in the bit rate storage means. It generates the following clock frequency, the digital broadcast receiver and outputting the data output means data to an external digital device in accordance with the generated clock in the clock generating means. 2. The digital broadcast receiver according to claim 1, further comprising input means for inputting a communication bit rate to the bit rate storage means. 3. An interface device for performing data transfer between a digital broadcast receiver for outputting data of a broadcast program including related information and a digital device having communication means, wherein the data of the broadcast program is temporarily stored. , A bit rate detecting means for detecting a bit rate of data of a broadcast program from related information, a clock generating means having a variable frequency of a generated clock, and a communication bit rate in a communication means of a digital device. Comparing the bit rate detected by the bit rate detecting means with the bit rate stored in the bit rate storing means, and storing the bit rate detected by the bit rate detecting means in the bit rate storing means. If the bit rate is higher than the Control means for generating a clock having a frequency equal to or lower than the frequency corresponding to the bit rate stored in the trait storage means and outputting data from the buffer means to the communication means of the digital device in accordance with the clock generated by the clock generation means. An interface device characterized by the above-mentioned. 4. The interface device according to claim 3, further comprising input means for inputting a communication bit rate to the bit rate storage means.