JP2001217703A - Dc signal receiving circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a DC signal receiving circuit capable of generating a pair of fail-safe two-wire type signals by receiving a DC input signal and suitable for receiving a long-distance transmitting signal. SOLUTION: When the side of an input terminal A is positively polarized and the side of an input terminal B is negatively polarized, in synchronism with the ON/OFF of an optically coupled bidirectional switch 11 corresponding to a pulse signal CK1 of a signal generator 31, an AC signal y1 is generated from a photocoupler PC1 and a rectified output S1 is generated from a rectifier circuit 21. When the side of the input terminal A is negatively polarized and the side of the input terminal B is positively polarized, synchronously with the ON/OFF of the optically coupled bidirectional switch 11, an AC signal y2 is generated from another photocoupler PC2 and a rectified output S2 is generated from a rectifier circuit 22.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DC signal receiving circuit for generating a dual bilinear signal, and more particularly to a DC signal receiving circuit suitable for receiving a transmission signal from a long distance.

[0002]

2. Description of the Related Art An example of a receiving circuit which receives an input signal and outputs a dual bilinear signal is disclosed in, for example, FIG. 1 of Japanese Patent Application Laid-Open No. 6-84088 previously proposed by the present applicant. There is something.

This circuit comprises two switches each having a normally closed contact and a normally open contact interlocked with each other, and connected to a pulse signal source via these two switches so that the forward directions of the currents are opposite to each other. Two photocouplers having light emitting elements connected in parallel;
An output unit that outputs dual bilinear signals from two output terminals based on the output from each photocoupler.

[0004] The operation will be described. When the normally closed contacts of both switches are turned on, and when the normally open contact is set to O
When N is reached, the input polarity of the pulse signal source is inverted and the direction of the input current is reversed. When an output is generated from one photocoupler, no output is generated from the other photocoupler. As a result, two outputs having a dual relationship are obtained, and such two output signals are referred to as a dual bilinear signal. The above circuit simplifies a receiving circuit that generates a dual dual linear signal by connecting the light emitting elements of the photocoupler in parallel so that the forward directions of the currents are opposite to each other and omitting a rectifying diode. .

In order to obtain a fail-safe dual-two linear signal, when a failure occurs in a circuit such as a short circuit in a light emitting element of a photocoupler or the like, when an input signal is inputted, the polarity of the input signal at that time is originally determined. When no output signal to be generated is generated and no input signal is input, it is necessary to have a configuration in which both output signals are not generated. Therefore, in the circuit described above,
By using a pulse signal as an input signal, a fail-safe dual 2-linear signal is generated.

[0006]

However, in the above-described circuit, in order to realize fail-safe signal processing,
An AC signal is supplied by using a pulse (AC) signal source as an input signal source. However, in the configuration for supplying an AC signal, if the transmission line is long, the signal is greatly attenuated. This is a problem when the signal from the signal source is transmitted over a long distance to the receiving circuit.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and is a DC signal receiving circuit suitable for receiving long-distance transmission signals, capable of receiving a DC input signal and generating a fail-safe dual 2-linear signal. The purpose is to provide.

[0008]

In order to achieve the above object, a DC receiving circuit according to a first aspect of the present invention provides a light emitting element of a first photocoupler and a light emitting element of a second photocoupler in the order of current input. The first and second photocouplers are connected in parallel so that the directions are opposite to each other, the parallel circuit of the light emitting elements is connected in series to a pair of input terminals, and the polarity of a DC signal input to the pair of input terminals is switched. Output a dual signal from the light receiving element side, and input / output an AC signal to turn ON / O
A signal receiving unit including a first switch unit that performs FF is provided, and the current flowing through the parallel circuit of the signal receiving unit is turned on / off by controlling ON / OFF of the first switch unit.

In this configuration, a DC signal is input from the input terminal, and if the current direction at that time is the forward direction of the light emitting element of the first photocoupler, a current flows through this light emitting element. This current is controlled by turning on / off the first switch means,
By shutting off, an AC output is generated from the light receiving element side of the first photocoupler, and no output is generated from the second photocoupler. When the +/- polarity of the DC signal input to the input terminal is reversed, a current flows through the light emitting element of the second photocoupler, and an AC output is generated from the second photocoupler by ON / OFF operation of the first switch means. However, no output is generated from the first photocoupler.

According to a second aspect of the present invention, a power consuming circuit is provided in parallel with the signal receiving unit, and the power consuming circuit consumes a direct current when the first switch means interrupts the current.

In this configuration, when the first switch means of the signal receiving unit is off, a direct current flows into the power consumption circuit. As a result, the input impedance of the signal receiving unit can be substantially reduced, and the influence of electromagnetic noise entering the transmission line can be eliminated without increasing the input direct current, and the first and second signals of the signal receiving unit can be eliminated. The element life of the photocoupler can be extended.

According to a third aspect of the present invention, the power consuming circuit includes:
The input DC signal is level-tested, and when the signal level is a predetermined level and the circuit is normal, a function confirmation signal indicating normal operation is output. Specifically, a second switch means which is turned on / off in a complementary relationship with the first switch means by inputting a first and second resistor and an AC signal is connected in series between the input terminals. A series circuit of the second resistor and the second switch means, a third zener diode having a zener voltage higher than the applied voltage when the second switch means is on and lower than the applied voltage when the second switch means is off; And a fourth resistor connected in parallel, and a fifth resistor and a third photocoupler are connected in parallel with the series circuit of the first and second resistors and the second switch means and the series circuit of the Zener diode and the third and fourth resistors. A series circuit of a light emitting element and a transistor is connected, a base terminal of the transistor is connected to an intermediate point between the third and fourth resistors, and the function confirmation signal is output from a light receiving element side of the third photocoupler. Configuration to that.

In such a configuration, the first switch means is turned on.
When a current is flowing through the signal receiving unit, the second switch means is turned off, a voltage higher than the zener voltage is applied to the zener diode, and the transistor is turned on. Generates a function confirmation signal indicating normal operation. When the first switch is turned off and no current flows in the signal receiving section, the second switch means is turned on, and a divided voltage of the first resistor and the second resistor, which is lower than the Zener voltage, is applied to the Zener diode, and the transistor is turned on.
The state becomes the FF state, and no output is generated from the light receiving element side of the third photocoupler. Then, even when one of the elements of the power consumption circuit fails, no output is generated from the light receiving element side of the third photocoupler. In this way, the output of the power consuming circuit stops when the power consuming circuit fails or when there is no input of a normal level DC signal, so that the transmission of the output signal of the signal receiving unit is stopped by stopping the output of the power consuming circuit. In addition, it is possible to prevent malfunction due to output of an error generated from the signal receiving unit in the absence of an input signal.

According to a fifth aspect of the present invention, an AC signal input to the second switch means and an AC signal input to the first switch means are supplied from the same AC signal source. The operation of the consumer circuit can be easily synchronized.

According to a sixth aspect of the present invention, the sum of the current consumption of the signal receiving unit and the current consumption of the power consumption circuit is always substantially constant. Specifically, the power consuming circuit and the signal receiving unit have the same configuration, and alternating signals having a complementary relationship to each other are supplied to the switch unit of the signal receiving unit and the power consuming circuit. It is good to have composition. As a result, the value of the current flowing through the receiving circuit can be kept constant, and the adverse effect on the signal line due to the change in the value of the current flowing through the signal line can be avoided.

According to another aspect of the present invention, a pair of zener diodes for input signal level verification connected in series so that their forward directions face each other are connected in series to each parallel circuit of the signal receiving unit and the power consumption circuit. According to a ninth aspect of the present invention, if the output of the signal receiving unit and the power consumption circuit is configured to have a level test circuit for performing a level test, the input signal can be level tested.

According to a tenth aspect of the present invention, an even number of zener diode and switch series circuits are interposed in series on a DC signal transmission line connected to the pair of input terminals, and half of the even number series circuits are: With a configuration in which the forward direction of the Zener diode is opposite to the forward direction of the Zener diode in the remaining series circuit, the DC signal input to the receiving circuit is level-tested to detect a short-circuit fault in the transmission line. It is possible to check whether or not the transmission line has been correctly implemented. Moreover, the number of series circuits that can be interposed in the transmission line under the same level test condition can be doubled as compared with the case where all the forward directions of the Zener diodes are connected in the same direction.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. 1 and 2 show a first embodiment of a DC signal receiving circuit according to the present invention.

In FIG. 1, a DC signal receiving circuit according to the present embodiment includes a pair of input terminals A and B and a pair of output terminals C and D.
Signal receiving unit 10 having the first and second rectifier circuits 2
1 and 22 and a signal generator 31 for generating a pulse signal CK1 as an AC signal.

The input terminals A and B of the signal receiving section 10 are
It is connected to a DC power supply 1 via a polarity switching circuit 2 and transmission lines 3 and 4. When the switches 2a and 2b are on, the switches 2c and 2d are off and the polarity switching circuit 2
The switches 2c and 2d are linked so that the switches 2c and 2d are turned on when a and 2b are off. The polarity of +/- (plus / minus) of the DC signal applied to the input terminals A and B of the signal receiving unit 10 is changed. It is for switching.

FIG. 2 shows a circuit configuration of the signal receiving unit 10. In FIG. 2, the light emitting element of the first photocoupler PC1 and the light emitting element of the second photocoupler PC2 are connected in parallel so that the forward directions of the current inputs are opposite to each other, and this parallel circuit is connected to the resistor R10 and the optical coupling bidirectional. A series circuit of the light receiving element 11A of the switch 11 is connected in series to the pair of input terminals A and B. The light receiving element of the first photocoupler PC1 has a collector connected to the power supply line of the voltage Vcc via a resistor, connected to the first rectifier circuit 21 via one output terminal C of the signal receiving unit 10, and an emitter connected to the ground. Connecting. The light receiving element of the second photocoupler PC2 has a collector connected to a voltage V via a resistor.
The power supply line is connected to the second rectifier circuit 22 via the other output terminal D of the signal receiving unit 10, and the emitter is connected to the ground.

The light emitting element 11B of the optically coupled bidirectional switch 11 has an anode connected to a power supply line of a voltage Vcc via a resistor, and a cathode connected to the ground via a transistor T1. In the base of the transistor T1,
The pulse signal CK1 is input from the signal generator 31. When the transistor T1 is turned on / off by the input of the AC signal CK1 of the signal generator 31, the light-coupling switch 11 causes the light emitting element 11B to blink due to current supply / interruption,
The light receiving element 11A is turned on / off at this blinking cycle, and the current flowing to the light emitting element of the first photocoupler PC1 or the second photocoupler PC2 is controlled to be turned on / off in accordance with the polarity of the input terminals A and B. Therefore, the first switch means is constituted by the optically coupled bidirectional switch 11 and the transistor T1.

The operation of the first embodiment will be described below.
When the switches 2a and 2b of the polarity switching circuit 2 are ON and the switches 2c and 2d are OFF, the DC signal from the DC power supply 1 receives + (plus) on the input terminal A side and − on the input terminal B side.
When the signal is input to the signal receiving unit 10 with a (minus) polarity, a current flows through the light emitting element of the first photocoupler PC1. The current is turned on / off by turning on / off the optical coupling bidirectional switch 11 by the pulse signal CK1 of the signal generator 31.
As a result, an AC output y1 synchronized with the ON / OFF cycle of the pulse signal CK1 is generated from the light receiving element side of the first photocoupler PC1, and is rectified by the first rectifier circuit 21 to generate a rectified output S1. At this time, no current flows through the light emitting element of the second photocoupler PC2, and no AC output y2 and no rectified output S2 are generated.

On the other hand, on the contrary, the switch 2 of the polarity switching circuit 2
When a and 2b are OFF and switches 2c and 2d are ON,
When a DC signal is input to the signal receiving unit 10 with the input terminal A side having a negative polarity and the input terminal B side having a positive polarity, the second photocoupler PC
A current flows through the two light emitting elements, and an AC output y2 and a rectified output S2 are generated in synchronization with the ON / OFF operation of the optical coupling bidirectional switch 11 by the pulse signal CK1. At this time, neither the AC output y1 nor the rectified output S1 is generated. Therefore, the rectified outputs S1 and S2 are dual linear signals.

According to this configuration, since the DC signal is transmitted to the signal receiving unit 10 via the transmission lines 3 and 4, the signal receiving unit 1 is not attenuated even if the input signal is transmitted over a long distance.
0 can be transmitted. Moreover, the signal receiving unit 10
The signal is converted into an alternating current in the
y2, the first or second photocoupler PC
1, when the AC outputs y1 and y2 are not generated due to a failure of the PC2 or the optically coupled bidirectional switch 11, etc., the rectified outputs S1 and S2.
Does not occur, and fail-safe signal processing is possible.

Next, FIG. 3 shows a second embodiment of the present invention. In the second embodiment shown in FIG. 3, a power consumption circuit 40 is connected in parallel to the signal receiving unit 10, and an output y of the power consumption circuit 40 is output.
3, a first AND operation circuit 52 that performs an AND operation on the output S1 of the first rectification circuit 21 and the output S3 of the third rectification circuit 51, and an output S2 of the second rectification circuit 22 And a second AND operation circuit 53 that performs an AND operation on the output S3 of the third rectifier circuit 51. The signal receiving unit 10 and the rectifier circuits 21 and 22 in the figure are the same as in the first embodiment.

The power consuming circuit 40 of this embodiment performs a level test on an input DC signal and generates an output y3 as a function confirmation signal indicating normal operation when the signal level is a predetermined level and the circuit is normal and power can be consumed. The configuration is shown in FIG. 4 and described.

In FIG. 4, a power consuming circuit 40 includes a first and a second rectifying circuit 41 and a filter 42 between input terminals E and F connected in parallel to input terminals A and B of the signal receiving unit 10. The series circuit of the light receiving elements of the photocoupler PC41 as the second switch means is connected to the resistors R41 and R42. The light emitting element of the photocoupler PC41 has an anode connected to a power supply line of a voltage Vcc via a resistor, and a pulse signal CK2 applied to a cathode.
For example, by using the same signal as the pulse signal CK1 generated from the signal generator 31 as the pulse signal CK2, the photocoupler PC41 is turned ON / OFF in a complementary relationship with the optical coupling switch 11. The series circuit of the second resistor R42 and the light receiving element of the photocoupler PC41 has a photocoupler PC higher than the applied voltage when the photocoupler PC41 is ON.
41, a Zener diode ZD having a Zener voltage Vz lower than the applied voltage when OFF, and a third and fourth resistor R4.
3, R44 in series, and the first and second
The series circuit of the resistors R41 and R42 and the light receiving element of the photocoupler PC41 and the third and fourth Zener diodes ZD.
A fifth resistor R4 is connected in parallel with the series circuit of the resistors R43 and R43.
5 and a light emitting element of a photocoupler PC42 as a third photocoupler are connected to a series circuit of a transistor T2, and a base of the transistor T2 is connected to an intermediate point between the third and fourth resistors R43 and R44. The third photocoupler P
The light-receiving element of C42 has a collector connected to a voltage Vcc via a resistor.
Of the third rectifier circuit 51, and the emitter is connected to the ground.

The pulse signals CK1 and CK2 do not necessarily have to be generated from the same signal generator, but need only be in phase. The operation of the second embodiment will be described.

The DC input signal of the power consuming circuit 40 is passed through a diode rectifier circuit 41 and a filter 42 to a filter 4.
It is transmitted to the second stage. With a DC signal input,
When the pulse signal CK2 is at a high level, the photocoupler PC4
1 is turned off, the input voltage VD is applied to the Zener diode ZD, and if VD> Vz, the transistor T
2 turns ON. When the pulse signal CK2 is at a low level, the photocoupler PC41 is turned on, and the divided voltage (r42 / r41 + r42) V of the first resistor R41 and the second resistor R42.
D is applied to the Zener diode ZD, and (r42 / r4
1 + r42) If VD <Vz, the transistor T2 is O
FF. Note that r41 and r42 indicate the resistance values of the resistors R41 and R42. Therefore, when the input voltage VD is Vz <VD <
When the condition of (1 + r41 / r42) Vz is satisfied, the transistor T2 operates ON / OFF in synchronization with the ON / OFF cycle of the pulse signal CK2, and the third photocoupler PC4
2 is turned ON / OFF, and an AC function confirmation output y3 indicating normal operation is generated from the power consumption circuit 40.

In the power consuming circuit 40, for example, a failure occurs in the photocoupler PC41 and the photocoupler PC41
Is fixed to the OFF state or the ON state, the transistor T2 stops the switching operation and the AC output y3 stops. If the Zener diode ZD is short-circuited while the input voltage VD is being input, the transistor T2 is fixed to the ON state, and the AC output y3 is stopped.

The current consumption of the power consumption circuit 40 is about VD / (r41 + r4) when the photocoupler PC41 is ON.
2), and when the photocoupler PC41 is OFF, the voltage is about V
D / r45. Note that r45 is the resistance value of the fifth resistor R45. Then, in the signal receiving unit 10, as shown in FIG. 5, when the pulse signal CK1 is ON (the pulse signal CK2
Is turned on and the photocoupler PC41 is turned off), the optical coupling bidirectional switch 11 is turned on to consume current, and the pulse signal CK1 is turned off (when the pulse signal CK2 is turned off and the photocoupler PC41 is turned on). Does not flow and is not consumed. From FIG. 5, when the current consumption of the signal receiving unit 10 is 0, the current consumption of the power consumption circuit 100 is VD / (r41 + r
42), and the current consumption of the signal receiving unit 10 is the input voltage V
When D is VD / r10, the current consumption of the power consumption circuit 40 is VD / r45. Note that r10 is the signal receiving unit 10
Is the resistance value of the resistor R10. Therefore, r41 + r4
Each resistor R41, R4 is set so that 2 = r10 + r45.
By setting the resistance values of R2, R10, and R45, the current consumption of the entire receiving circuit, which is the sum of the currents consumed by the signal receiving unit 10 and the power consumption circuit 40, can be kept constant.

When a signal is transmitted over a long distance, there is a possibility that the signal receiving unit 10 malfunctions due to electromagnetic noise entering a transmission line and generates an erroneous output. If shielded wires cannot be used as an enforcement measure, the only way to prevent malfunction due to electromagnetic noise is to increase the transmission signal current in DC signal transmission as compared to the energy of the electromagnetic noise. In this case, it is necessary to supply a signal current that is at least about twice the normal signal current in consideration of the variation (the difference between the highest and the lowest) of the current transmission efficiency of the photocouplers PC1 and PC2. However, flowing such a large current has a problem in the life cycle of the photocouplers PC1 and PC2.

When the power consuming circuit 40 is connected in parallel to the signal receiving unit 10 as in the present embodiment, the input impedance of the signal receiving unit 10 can be substantially reduced, and the photocoupler PC1 can be used without increasing the signal current. , Can eliminate the effect of intruding electromagnetic noise without impairing the life of PC2,
Electromagnetic noise resistance can be improved.

Further, when the current in the signal receiving unit 10 is turned on / off, an AC signal is generated on the signal line, and if another signal line is present close to the signal line depending on the state of operation, this may have an adverse effect. However, if the power consumption circuit 40 is provided and the current consumption of the entire receiving circuit is constantly controlled as in this embodiment, a constant current always flows through the transmission lines 3 and 4 and the entire receiving circuit, and other signals are transmitted. The adverse effect on the line can be prevented.

If the first and second AND operation circuits 52 and 53 are provided as in this embodiment, if both the signal receiving unit 10 and the power consumption circuit 40 are normal at the time of receiving a DC signal, The signal receiving unit 10 according to the input polarity of the DC signal
Either output y1 or output y2 is generated from power consumption circuit 40, and output y3 is generated from power consumption circuit 40.
1 or S2 and the rectified output S3, the output K1 or K2 of the logical value 1 is generated from either the first AND operation circuit 52 or the second AND operation circuit 53 to inform the normality of the receiving circuit. it can. If any one of the signal receiving unit 10 and the power consumption circuit 40 has a failure, the outputs K1 and K2 have a logical value of 0, thereby indicating an abnormality. At this time, if the generation of the pulse signals CK1 and CK2 is stopped, the reception is stopped. An adverse effect on other transmission lines due to a change in the circuit operating current can be avoided.

FIG. 6 shows a third embodiment of the present invention. FIG.
Is an example in which the signal receiving unit and the power consumption circuit have the same circuit configuration. 6, the power consumption circuit 60 has the same configuration as the signal receiving unit 10 shown in FIG. The photocouplers PC1 'and PC2', the resistor R10 ', the optically coupled bidirectional switch 11', and the transistor T1 'of the power consumption circuit 60 are the same as the corresponding elements in the signal receiving unit 10. The pulse signal CK2 input to the power consumption circuit 60 is obtained by converting the pulse signal CK1 generated from the signal generator 31 into an inverter 61.
And are complementary to each other with the pulse signal CK1. The rectifier circuit for rectifying the AC outputs y1, y2, y1 ', y2' is not shown.

In such a configuration, the pulse signals CK1 and CK
2 are complementary to each other, the signal CK2 is low when the signal CK1 is high, and the signal CK2 is high when the signal CK1 is low. Therefore, when the current is consumed in the signal receiving unit 10, no current is consumed in the power consumption circuit 60, and when the current is consumed in the power consumption circuit 60, no current is consumed in the signal receiving unit 10. Therefore, the signal receiving unit 1
The current consumption of the entire receiving circuit, which is the sum of the current consumption of the power consumption circuit 60 and 0, can be kept constant.

In the configuration of the third embodiment shown in FIG. 6, there is no level verification function for the input signal. To add the level verification function, for example, a level verification circuit is added after the signal receiving unit 10 and the power consumption circuit 60. And outputs y1, y2, y1 ',
y2 'may be level tested.

FIG. 7 shows a circuit configuration example of such a level test circuit. In the level test circuit 70 of FIG. 7, after the AC output signal y1 of the signal receiving unit 10 is amplified by the amplifier circuit 71, the power supply voltage Vcc is superimposed by the coupling capacitor C1 and the diode D1 and converted into an AC signal outside the power supply frame. , Through the Zener diode ZD1, and is input to the amplifier circuit 72 and converted into an AC signal in the power supply frame. The amplified AC signal is output as a DC signal Vout1 outside the power supply frame by a voltage doubler rectifier circuit 73 including two diodes and two capacitors. Although the output signal y1 has been described in FIG. 7, a level test circuit 70 is provided for each of the output signals y2, y1 ', and y2' to perform level test. If the level test circuit 70 having the configuration shown in FIG. 7 is provided, the rectifier circuits shown in FIGS. 1, 3 and the like can be omitted.

According to the level test circuit 70, if the Zener voltage of the Zener diode ZD1 is set between the upper limit value and the lower limit value of the applied AC signal, if the AC signal is at a normal level, the amplifying circuit 72 And outputs a DC signal via the voltage doubler rectifier circuit 73.

Therefore, in the receiving circuit shown in FIG. 6 in which the level test circuit 70 is provided for each of the output signals y1, y2, y1 ', y2', the input terminal A has a positive polarity and the input terminal B has a negative polarity. When a signal is input, the DC signals Vout1 and Vout1 'are output from the level test circuit 70 only when the receiving circuit is normal.
Occurs. Conversely, when an input signal is input with the input terminal A having a negative polarity and the input terminal B having a positive polarity, the DC signals Vout2 and Vo are output from the level verification circuit 70 only when the receiving circuit is normal.
ut2 'occurs.

If only one of the DC signals Vout1 and Vout1 '(or DC signals Vout2 and Vout2') is generated, it is determined that there is an abnormality, and for example, the generation of a pulse signal from the signal generator is stopped. An adverse effect on other transmission lines due to a change in operating current of the receiving circuit can be avoided.

FIG. 8 shows a fourth embodiment of the present invention. FIG.
Is similar to the signal receiving unit 10 'and the power consuming circuit 80 shown in FIG.
Are the same circuit configuration, and a zener diode for level verification of an input signal is provided inside the circuit.

In FIG. 8, a signal receiving section 10 'is connected to an optically coupled bidirectional switch 11 in parallel with a parallel circuit of light emitting diodes of the photocouplers PC1 and PC2, so that the forward directions face each other in series with the parallel circuit. And Zener diodes ZD10 and ZD11, and resistors R11-R
The configuration is the same as that of the signal receiving unit 10 of FIG. The power consuming circuit 80 has the same configuration as that of the signal receiving unit 10 '. An optical coupling bidirectional switch 11' is connected in parallel with a parallel circuit of light emitting diodes of the photocouplers PC1 'and PC2', and is connected in series with the parallel circuit. The Zener diodes ZD10 ', ZD
11 'are interposed, and resistors R11' to R14 'are provided. The pulse signals CK1 and CK2 are complementary to each other as in the embodiment of FIG.

In such a configuration, both the signal receiving section 10 'and the power consuming circuit 80 are provided with the optically coupled bidirectional switches 11, 1
When 1 'is turned off, output signals y1, y1' (y2, y2 'when the input signal has the opposite polarity) are generated, and when turned on, the output signals y1, y1' (or y2, y2 ') are stopped.

The input terminal A is + and the input terminal B is-
When the input voltage VD is Vz <VD <(1 + r1
When the condition of 1 / (r12 + r13 + r14) Vz is satisfied, output output signals y1 and y1 'are generated. When the polarities of the input terminals A and B are opposite, Vz <VD <(1+
When the condition of r12 / (r11 + r13 + r14) Vz is satisfied, output output signals y2 and y2 'are generated. still,
In the present embodiment, a rectifier circuit may be provided when the outputs y1, y1 ', y2, y2' are converted to DC signals.

According to such a configuration, the level test circuit 70 of FIG. 7 is unnecessary. By the way, when the switch means is installed away from the receiving circuit, it is not easy to check whether the operation of the switch means is correct. less than,
In the following, an embodiment will be described in which a short circuit failure is considered, including a check on the implementation of a switch means in a transmission line of a DC signal receiving circuit.

FIG. 9 shows an example in which two terminal devices are connected in series to a transmission line. In FIG. 9, each terminal device 1
The switches 10 and 120 have switches 111 and 121 which are turned on in a normal state and turned off in a fault state, and are connected in series to the transmission lines 101 and 102, respectively. Then, the Zener diode 112 as short-circuit detecting means,
122 is interposed in series with the switches 111 and 121, respectively. In the figure, reference numeral 100 denotes a DC power supply, and 103 denotes a DC signal receiving circuit having a function of verifying the level of an input signal.

Next, the operation will be described. In FIG. 9, L in FIG.
1, L2 indicates a portion that may be short-circuited due to a wiring error.

When the transmission lines 101 and 102 are correctly implemented, the DC signal from the DC power supply 100 is applied to the Zener diodes 112 and 122 and the switches 111 and 121.
Is transmitted to the receiving circuit 103 via Therefore, assuming that the power supply voltage E and the zener voltage of each of the zener diodes 112 and 122 are Vz, a voltage (E-one Vz) whose potential drops by 2 Vz is transmitted to the receiving circuit 103.

On the other hand, for example, when at least one of L1 and L2 is short-circuited as shown by a dotted line, the switch 1
Even when 12 is in the OFF state, the DC signal E is transmitted to the receiving circuit 103, and the potential of the DC signal input to the receiving circuit 103 increases to E−Vz or E. The same is true when the Zener diodes 112 and 122 are short-circuited.

Therefore, the level test threshold of the receiving circuit 103 is set between E-Vz and E-2Vz, and when the input signal level is between E-2Vz and E-Vz, the DC output signal Vout is Set to generate.

When the input signal level falls within the range between E-Vz and E-2Vz, the optically coupled bidirectional switch
When N, the first photocoupler PC1 is turned ON, and when the optical coupling bidirectional switch is OFF, the first photocoupler PC1 is turned ON.
The FF is turned on / off at the cycle of the pulse signal CK1, and a DC output signal Vout is generated via a rectifier circuit based on the AC output from the first photocoupler PC. The input signal level of the receiving circuit 103 becomes EV due to a short circuit of the transmission line or the like.
When it increases to more than z, the output of the first photocoupler PC1 is fixed to the ON state, and the DC output signal Vout is not generated.

The description of the operation of the power consumption circuit is omitted. By the way, when the number of terminal devices connected in series increases, the following problem occurs. Assuming that the number of terminal devices connected in series is N, the voltage E-NVz and the voltage E-1 (N
-1) Vz must be distinguished, and the power supply voltage E must be increased or the zener voltage Vz must be reduced. However, increasing the power supply voltage E increases the risk of electric shock. Also, when the Zener voltage Vz is reduced, the difference Vz between E-NVz and E- (N-1) Vz is reduced, so that the detection becomes difficult.

FIG. 10 shows a configuration example in which a short-circuit of a transmission line can be easily detected without changing the power supply voltage E or the zener voltage Vz even when the number of terminal devices increases. FIG. 10 shows a case where there are four terminal devices. In the figure, a DC power supply 100 is connected to a transmission line 10 via a polarity switching circuit 104.
1, 102. Zener diodes 112 and 122 built in terminal devices 110 and 120 interposed in series on transmission lines 101 and 102 and terminal devices 130 and 14
The Zener diodes 132 and 142 built in 0 are connected in opposite directions. Note that 111, 121, 131,
Reference numeral 141 denotes a switch that is turned on when it is normal and turns off when it is abnormal. Reference numeral 150 denotes a receiving circuit. The polarity switching circuit 104 is similar to the polarity switching circuit 2 shown in FIG. In the figure, L1 to L4 are transmission lines 101, 1
02 indicates a portion that may be short-circuited.

As shown in FIG. 12, the receiving circuit 150 of this embodiment comprises a signal receiving section 151 and a rectifying circuit 15 for rectifying dual AC signals y1 and y2 from the signal receiving section 151.
2,153 and the rectified output S of the rectifier circuits 152,153.
1 and S2 are provided with an AND operation circuit 154, and capacitors C151 and C152 forming an off-delay circuit together with the input resistance of the AND operation circuit 1542. The signal receiving unit 151 is as shown in FIG. The illustration of the power consumption circuit is omitted.

Next, the operation will be described with reference to the time chart of FIG. When a DC signal is transmitted to the transmission lines 101 and 102 via the polarity switching circuit 104, the switch 2
When a and 2b are ON and the input terminal A side has a positive polarity, each Zener diode 112 of the terminal device 110 and 120,
The voltage drops by the amount of the zener voltage 2 Vz of 122. Conversely, when the switches 2c and 2d are ON and the input terminal B side has a positive polarity, the voltage drops by the Zener voltage 2Vz of each of the Zener diodes 132 and 132 of the terminal devices 130 and 140. Therefore, in a normal state, the input level of the receiving circuit 150 becomes E-2Vz.

FIG. 11 shows the voltage level of the transmission line 101 based on the transmission line 102. Tx is a switching cycle of the polarity switching circuit 104. When the input terminal A side has a positive polarity, the rectifier circuit 152 outputs V
When out1 is generated and the input terminal B side has a positive polarity, Vout2 is generated from the rectifier circuit 153 based on the AC output y2.
The switching cycle of the rectified outputs Vout1 and Vout2 is Tx in FIG. The ON / OFF cycle (cycle of the AC signal CK1) of the optically coupled bidirectional switch of the signal receiving unit 151 is T
Assuming that w, Tw≪Tx, and each rectifier circuit 152, 1
53 is set so that the AC signals y1 and y2 based on the ON / OFF cycle Tw of the optical coupling bidirectional switch are rectified, and the AC signal having the cycle Tx is not rectified. Rectified output Vout1,
Vout2 has capacitors C151 and C152 falling at the falling edge.
Is off-delayed as shown in FIG. This off-delay time is set longer than Tx.

Therefore, the transmission lines 101 and 102 are normal without being short-circuited, and the zener diodes 112 and 12 are normal.
2, 132, 142, one output Vout1
Before the (or Vout2) level falls below the threshold value of the AND operation circuit 154, the other output Vout2 (or Vout1) level becomes equal to or higher than the threshold value of the AND operation circuit 154. The output Vout continuously occurs. A short-circuit fault may occur in the transmission lines 101 and 102, or the Zener diodes 112, 122, 132 and 14
2 has failed and the input level of the receiving circuit 150 has risen, one or both of the rectified outputs Vout1 and Vout2 do not occur, so that the output Vout of the AND operation circuit 154 has a logical value of 0. Therefore, an abnormality can be notified.

According to this configuration, when the polarity of the input terminal A is +, it is possible to check whether the Zener diodes 112 and 122 are normal / abnormal and whether or not the L1 and L2 portions are short-circuited. In this case, it is possible to check whether the Zener diodes 132 and 142 are normal or abnormal and whether or not the L3 and L4 portions are short-circuited. If there is no short circuit,
Even one of the switches 111, 121, 131, 141
In the FF state, the DC signal is immediately cut off regardless of the polarity of the DC signal and is not input to the receiving circuit 150.

Therefore, if a maximum of m terminal devices can be connected in series in FIG. 9, according to the configuration of the present embodiment, the same as FIG. Under the conditions of the power supply voltage E and the zener voltage Vz, abnormality detection such as execution can be performed.

[0063]

As described above, according to the first aspect of the present invention, it is possible to provide a receiving circuit suitable for receiving a signal transmitted over a long distance and capable of performing fail-safe signal processing.

According to the second to fourth aspects of the present invention, in addition to the effect of the first aspect, the input impedance of the receiving circuit can be substantially reduced, and the electromagnetic noise resistance can be improved without increasing the transmission signal level. At the same time, it is not necessary to reduce the life cycle of the photocoupler in the receiving circuit.

According to the fifth aspect of the present invention, only one AC signal source is required and the circuit can be simplified. According to the sixth and seventh aspects of the present invention, the current consumption in the receiving circuit becomes constant, and it is possible to prevent adverse effects on other adjacent signal transmission lines.

According to the eighth and ninth aspects of the present invention,
7, the electromagnetic noise resistance can be improved. According to the tenth aspect of the present invention, by performing a level test on the DC signal input to the receiving circuit, it is possible to easily check whether a short-circuit fault in the transmission line can be detected and whether the transmission line has been correctly implemented. Further, the number of series circuits that can be interposed in the transmission line under the same level test condition can be doubled as compared with the case where all the forward directions of the Zener diodes are connected in the same direction.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a first embodiment of the present invention.

FIG. 2 is a configuration diagram of a signal receiving unit according to the first embodiment;

FIG. 3 is a configuration diagram of a second embodiment of the present invention.

FIG. 4 is a configuration diagram of a power consumption circuit according to the second embodiment;

FIG. 5 is a diagram showing a relationship between current consumption of a signal receiving unit and a power consumption circuit of the embodiment.

FIG. 6 is a configuration diagram of a third embodiment of the present invention.

FIG. 7 is a configuration diagram of a level test circuit applied to the level test of FIG. 6;

FIG. 8 is a configuration diagram of a fourth embodiment of the present invention.

FIG. 9 is a configuration diagram for explaining a signal transmission line short-circuit detection function.

FIG. 10 is a configuration diagram of another embodiment of the present invention having a signal transmission line short-circuit detection function.

FIG. 11 is a time chart of a signal transmission line signal level at the time of polarity switching in FIG. 10;

FIG. 12 is a configuration diagram of a receiving circuit of the embodiment of FIG. 10;

FIG. 13 is an operation time chart of the embodiment in FIG. 10;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 DC power supply 2 Polarity switching circuit 3, 4 Signal transmission line 10 Signal receiving part 11, 11 'Optical coupling bidirectional switch 21, 22, 51 Rectifier circuit 31 Signal generator 40, 60 Power consumption circuit 61 Inverter 70 Level verification circuit PC1 , PC1, PC1 ', PC2', PC41, PC
42 Photocoupler ZD, ZD10, ZD11, ZD10 ', ZD11'
Zener diode

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[Procedure amendment]

[Submission Date] February 8, 2000 (200.2.8)

[Procedure amendment 1]

[Document name to be amended] Drawing

[Correction target item name] Fig. 9

[Correction method] Change

[Correction contents]

FIG. 9

[Procedure amendment 2]

[Document name to be amended] Drawing

[Correction target item name] FIG.

[Correction method] Change

[Correction contents]

FIG. 10

Claims (10)

[Claims] 1. A light emitting element of a first photocoupler and a light emitting element of a second photocoupler are connected in parallel so that forward directions of current input are opposite to each other, and a parallel circuit of the light emitting elements is connected in series to a pair of input terminals. The first and second photocouplers output dual signals from the light receiving element side of the first and second photocouplers by switching the polarity of the DC signals input to the pair of input terminals, and turn ON / OFF by inputting an AC signal. A signal receiving unit configured to include a switch unit, wherein the first switch unit is turned on / off to turn on / off a current flowing through the parallel circuit of the signal receiving unit. DC signal receiving circuit. 2. A DC signal according to claim 1, wherein a power consumption circuit is provided in parallel with said signal receiving section, and wherein the DC current is consumed by said power consumption circuit when said first switch means cuts off current. Receiver circuit. 3. The DC power supply according to claim 2, wherein the power consumption circuit is configured to perform a level test on an input DC signal and output a function confirmation signal indicating normal operation when the signal level is a predetermined level and the circuit is normal. Signal receiving circuit. 4. The power consuming circuit further comprises a second switch connected in series between input terminals, the second switch being turned on / off in a complementary relationship with the first switch by input of a first and a second resistor and an AC signal; A series circuit of the second resistor and the second switch means includes a Zener diode having a Zener voltage higher than the applied voltage when the second switch means is turned on and lower than the applied voltage when the second switch means is turned off. the 4th
A resistor is connected in parallel, and a series circuit of the first and second resistors and the second switch means and a zener diode are connected to the third and third switches.
A series circuit of a transistor, a fifth resistor, a light emitting element of a third photocoupler, and a transistor connected in parallel with a series circuit of four resistors; a base terminal of the transistor connected to an intermediate point between the third and fourth resistors; The DC signal receiving circuit according to claim 3, wherein the function confirmation signal is output from the light receiving element side of the third photocoupler. 5. The DC signal receiving circuit according to claim 4, wherein the AC signal input to the second switch means and the AC signal input to the first switch means are supplied from the same AC signal source. 6. The DC signal receiving apparatus according to claim 2, wherein an addition value of a current consumption value of said signal receiving unit and a current consumption value of said power consumption circuit is always substantially constant. circuit. 7. The power consumption circuit has the same configuration as that of the signal receiving unit, and supplies AC signals having a complementary relationship to each other to a switch unit of the signal reception unit and the power consumption circuit. 3. The DC signal receiving circuit according to 2. 8. The configuration according to claim 7, wherein a pair of zener diodes for input signal level test connected in series so that their forward directions face each other are connected in series to each parallel circuit of said signal receiving section and power consumption circuit. The DC signal receiving circuit according to the above. 9. The DC signal receiving circuit according to claim 7, further comprising a level test circuit for level-testing each output of the signal receiving section and the power consumption circuit. 10. A DC signal transmission line connected to said pair of input terminals, wherein an even number of series circuits of zener diodes and switches are interposed in series, and half of said even number series circuits are connected in the forward direction of the zener diode. 2. The DC signal receiving circuit according to claim 1, wherein the direction of the DC signal is opposite to the direction of the forward direction of the Zener diode of the remaining series circuit.