JP2001216168A - Program converter, program converting method and program storage medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a program converter to generate a program to minimize execution time by minimizing increase of the number of branching instructions to be executed in a program after tail merge is optimized. SOLUTION: This program converter is provided with an extracting means 309 to extract a set of common instructions 307, 308, 309 hierarchically exiting from the tail end of plural basic blocks 301, 302, 303 304, 305 to be unconditionally branched to the same basic block 306 to the head by targeting at them, a selecting means to select one basic block in each of the extracted set of common instruction strings according to positional relation of the basic blocks in which instruction strings are included and a code converting means to convert the program so that the instruction string to be included in the selected basic block is shared.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a computer program conversion technique, and more particularly to a program optimization technique.

[0002]

2. Description of the Related Art In recent years, in software development, development using a high-level language has become mainstream in order to improve development efficiency and maintainability. However, a target program generated by a compiler from such a high-level language generally has a longer execution time and a larger code size than a target program created by a human using an assembler or the like. For this reason, it is required for a compiler to generate a program having a shorter execution time and a smaller code size. In particular, there is a strong demand for code size reduction for programs that operate in an execution environment where storage capacity is severely limited, for example, programs for embedded applications.

[0003] The conversion of a program for the purpose of reducing the execution time and the code size or the conversion of the program for the purpose of improving either the execution time or the code size is called optimization. In the optimization for improving either the execution time or the code size, the code size may be increased by reducing the execution time, or the execution time may be increased by reducing the code size.

[0004] Various techniques for performing optimization are known. Among them, one technique for reducing the code size is known.
One is common instruction sequence merging optimization (also called tail merge optimization). Tail merge optimization is a code size conversion by converting a program so that one instruction sequence is shared among the same instruction sequences at the end of a plurality of basic blocks that unconditionally transfer control to the same basic block. Is a technique to reduce The set having the same instruction sequence as an element is hereinafter referred to as a common instruction sequence set.

Here, the basic block is a series of instruction strings, and is the longest instruction string that does not branch from an intermediate instruction and does not branch to an intermediate instruction. FIG. 19 shows examples of programs before and after tail merge optimization.
1100a is a program before optimization, 1100b is a program after optimization, 1101a, 1101b, 1102
a, 1102b, 1103, and 1104 are basic blocks;
1105 is a common instruction sequence set, 1106 is a shared instruction sequence, and 1107 to 1110 are branch instructions.

In the tail merge optimization of this example, the conventional compiler leaves the common instruction sequence included in the basic block 1102a for the common instruction sequence set 1105 and deletes the common instruction sequence included in the basic block 1101a.
The program is converted such that the branch destination of the branch instruction 1107 is changed and the remaining instruction sequence 1106 is executed. By this conversion, the code size corresponding to the common instruction sequence deleted from the basic block 1101a can be reduced.

However, by performing this optimization, the execution time of the program increases. In the program 1100a before optimization, one branch instruction 1107 is executed in the processing passing through the basic block 1101a, but in the program 1100b after optimization, the branch instruction 1109,
Two of 1110 are performed. That is, by performing the optimization, the number of branch instructions executed in the processing passing through the basic block 1101b increases by one, and therefore, the execution time of the program increases.

After the optimization, the number of branch instructions executed in the processing passing through the basic block 1102b is the same as before the optimization, and the number of branch instructions increases by 1 as a whole program. FIG. 20 is a program example showing a process in which tail merge optimization is repeated twice. 1200a is a program before optimization, 1200b is a program after the first tail merge optimization, 1200c is a program after the second tail merge optimization, 1201a, 1201b, and 1202
a, 1202b, 1202c, 1203a, 1203
b, 1203c, 1204, 1205, 1206 are basic blocks, 1207 to 1208 are common instruction sequence sets, 12
09-1210 are shared instruction sequences, 1211-121
8 is a branch instruction.

[0009] Repeating the tail merge optimization to share the instruction sequence in this manner is called multi-stage tail merge optimization. The multi-stage tail merge optimization of FIG.
The program is converted such that the common instruction sequence included in the basic block 1201a is shared for the first common instruction sequence set 1207, and the common instruction sequence included in the basic block 1203b is shared for the second common instruction sequence set 1208. An example is shown in which the program is converted as follows.

With respect to the program 1200c after the optimization, basic blocks 1201b, 1202c, 1203
The number of branch instructions executed in the process passing through c is 1, 3, and 2, respectively, for a total of 6. FIG. 21 shows FIG.
9 is a program example showing a process of performing multi-stage tail merge optimization so that an instruction sequence included in a basic block different from 0 is shared. 1300a is a program before optimization, 1300b is a program after the first tail merge optimization, 1300c is a program after the second tail merge optimization, 1301a, 1301b, 1302a, 1
302b, 1302c, 1303a, 1303b, 13
03c, 1304, 1305, and 1306 are basic blocks, 1307 to 1308 are a common instruction sequence set, and 1309 to 1309.
1310 is a shared instruction sequence, and 1311 to 1318 are branch instructions.

The multi-stage tail merge optimization shown in FIG.
Basic block 1 for common instruction sequence set 1307
An example is shown in which the program is converted so that the common instruction sequence included in the basic block 1303b is shared by sharing the common instruction sequence included in the basic block 1303b with respect to the common instruction sequence set 1308 for the second time. I have.

With respect to the program 1300c after the optimization, basic blocks 1301b, 1302c, and 1303
The number of branch instructions executed in the process passing through c is 2, 2, and 1, respectively, for a total of 5. As described above, in the multi-stage tail merge optimization, the number of branch instructions to be executed as an entire program after optimization depends on the combination of the common instruction sequence included in each basic block in each stage. Are different. In the comparison of the examples of FIGS. 20 and 21, it is more common to share the common instruction sequence included in the same basic block in each stage (FIG. 21) than to share the common instruction sequence included in different basic blocks (FIG. 21). 2
0) The number of branch instructions can be reduced.

[0013]

However, in the conventional multi-stage tail merge optimization, as shown in FIG. 20, the instruction is executed by a combination that minimizes the number of branch instructions executed in the program after optimization. Columns may not be shared. In other words, there is a problem that a program with the shortest execution time cannot always be obtained.

In view of the above problems, the present invention is a program conversion apparatus for converting a program so that one of the same instruction strings at the end of a plurality of basic blocks is shared, thereby reducing the code size. It is another object of the present invention to provide an apparatus for generating a program in which the number of executed branch instructions is minimized.

[0015]

In order to solve the above-mentioned problem, a program conversion apparatus according to the present invention converts a program so that one of the same instruction sequence at the end of a plurality of basic blocks is shared. A program conversion device for reducing a code size by using a set of the same instruction sequences existing in different basic blocks for a plurality of other basic blocks that unconditionally follow a specific basic block. Extracting means for extracting a common instruction sequence set hierarchically existing from the tail to the beginning of the basic blocks, and a basic block including any one of the instruction sequences in each of the extracted common instruction sequence sets. Selecting means for selecting according to a positional relationship with a basic block selected in another common instruction sequence set, and an instruction sequence in the selected basic block being a different basic block. Tsu and a code converting means for converting the program to be shared in the click.

[0016] The extraction means is a common instruction string set extraction means for extracting a common instruction string set at the end of the basic blocks for a plurality of basic blocks, and unconditionally follows the same basic block for the first time. The common instruction sequence set extraction unit extracts a common instruction sequence set for a plurality of basic blocks, and excludes a common instruction sequence extracted immediately before from a plurality of basic blocks having a common instruction sequence for the second and subsequent times. Extraction control means for causing the common instruction sequence set extraction means to extract the common instruction sequence set with respect to the program part.

[0017] The selecting means may select the same basic block for a common instruction sequence set extending over a plurality of vertically consecutive layers when a pair of common instruction sequence sets is vertically adjacent. The selecting means, when a plurality of upper-layer common instruction sequence sets contact one lower-layer common instruction sequence set with respect to a plurality of upper-lower consecutive common instruction sequence sets, the upper-layer common instruction sequence The same basic block may be selected in the instruction sequence set and the lower common instruction sequence set.

[0018] The selecting means may select the basic block when an instruction sequence included in a basic block whose tail is not a branch instruction belongs to a common instruction sequence set. The selecting means selects 1 in each of the extracted common instruction sequence sets.
A combination of a selection candidate extracting unit that selects the above basic blocks as selection candidates according to the positional relationship with the basic blocks in another common instruction sequence set, and a combination that selects one basic block as a selection candidate in each common instruction sequence set And a branch instruction size calculation unit that calculates in advance the code size of a branch instruction that is changed when a basic block is selected according to each of the listed combinations and the conversion is performed, The basic block may be selected according to the combination having the smallest calculated code size.

The program conversion device further calculates a code size change amount of the instruction sequence deleted by the conversion and the changed branch instruction, and deletes and deletes the instruction sequence in a basic block whose code size is not reduced by the conversion. Control means for controlling the code conversion means so as not to change the branch instruction may be provided. A program conversion method according to the present invention is a program conversion method used in a program conversion apparatus that converts a program so that one of the same instruction strings at the end of a plurality of basic blocks is shared and reduces the code size. A set of the same instruction sequence existing in different basic blocks, targeting a plurality of other basic blocks unconditionally following a specific basic block, and starting from the end of those basic blocks A first step of extracting a set of common instruction sequences existing hierarchically toward
A second step of selecting a basic block including any one of the instruction sequences in each of the common instruction sequence sets extracted in the step (b) in accordance with the positional relationship with the basic block selected in another common instruction sequence set; Converting the program so that the instruction sequence in the basic block selected in the second step is shared by other basic blocks.

A program recording medium according to the present invention is used in a program conversion apparatus for converting a program so that one of the same instruction sequence at the end of a plurality of basic blocks is shared, thereby reducing a code size. A plurality of other basic blocks unconditionally following a specific basic block, and a set of the same instruction sequences existing in the different basic blocks. A first step of extracting a set of common instruction strings that exist hierarchically from the tail to the beginning of the basic blocks, and any one of the common instruction string sets extracted in the first step. Is selected according to the positional relationship with the basic block selected in another common instruction sequence set. And second step, the instruction sequence in the selected basic block in the second step is storing the program and a third step of converting the program to be shared in other basic blocks.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS <First Embodiment> A program conversion device according to the present invention in a first embodiment will be described. <Overall Configuration> The program conversion device 100 of the present invention is a device for converting a source program into a target program. As shown in FIG. 1, a lexical analysis unit 102, a syntax analysis unit 103, an intermediate code generation unit 104, an intermediate code It comprises an optimization unit 105 and a target program generation unit 107.

The program conversion device 100 is, specifically, a processor (ROM) storing a program.
read-only memory), work RAM
(Random Access Memory). The function of each part is RO
This is realized by the processor executing the program stored in M. The transfer of data between the units is performed via hardware such as a RAM.

The lexical analyzer 102 analyzes the input source program 101 and recognizes the lexical constituents of the source program 101. The syntax analysis unit 103 executes the source program 1 based on the lexical characters recognized by the lexical analysis unit 102.
Parse 01. The intermediate code generation unit 104 generates an intermediate code in which the meaning of the syntax analyzed by the syntax analysis unit 103 is described using an intermediate language. The intermediate code optimizing unit 105 optimizes the intermediate code generated by the intermediate code generating unit 104 as described below. The target program generator 107 generates the target program 106 according to the intermediate code optimized by the intermediate code optimizer 105.

The configuration other than the intermediate code optimization unit 105 is as follows.
Since this is a known technique widely implemented in a general compiler, a detailed description thereof is omitted here. <Intermediate code optimization unit> FIG.
It is a block diagram which shows 05. As shown in the figure, the intermediate code optimization unit 105 includes a basic block analysis unit 111,
And a tail merge optimization unit 112.

The basic block analysis unit 111 analyzes the intermediate code generated by the intermediate code generation unit 104 to control the basic blocks, the control flow between the basic blocks, and unconditionally transfer control to the same basic block. A set of a set including a plurality of basic blocks as elements (hereinafter referred to as an unconditional preceding block set) and a subsequent basic block is extracted.

FIG. 3A is a schematic diagram of a basic block extracted by the basic block analysis unit 111 and a control flow between the basic blocks, and FIG. 3B is an example showing a list of unconditionally preceding block sets. Reference numerals 201 to 207 denote basic blocks, reference numerals 211 to 219 denote control flows between the basic blocks, and reference numeral 220 denotes a list of sets of unconditional preceding block sets and succeeding basic blocks.

The processing performed by the basic block analysis unit 111 is a well-known technique widely implemented in a general compiler, and a detailed description thereof will be omitted. The tail merge optimization unit 112 includes a common instruction sequence set extraction unit 114, a common part selection unit 115, and a code conversion unit 116. <Common instruction sequence set extractor> Common instruction sequence set extractor 114
Performs an extraction preparation process including a recursive extraction process based on the basic block, the control flow, and the unconditional preceding block set extracted by the basic block analysis unit 111, so that the tail of the unconditional preceding block set is obtained. , A set of common instruction strings existing hierarchically from the top to the top is extracted. <Extraction Preparation Processing> FIG. 4 is a flowchart showing the extraction preparation processing. FIG. 6 is an example of a program (intermediate code) used to show the process of this processing, where 300 is an unconditional preceding block set, 301 to 305 are basic blocks belonging to the unconditional preceding block set 300, and 306 is a subsequent basic block set. Block, 307 to 309 are a common instruction sequence set, 31
1 to 356 are instructions.

Hereinafter, the extraction preparation process will be described with reference to the flowchart of FIG. 4 and the program example of FIG. The common instruction sequence set extraction unit 114 determines in step S1
Through the repetition of steps 0 to S13, for each unconditional preceding block set extracted by the basic block analysis unit 111, the last instruction excluding the branch instruction of each basic block belonging to the unconditional preceding block set is determined (step S13). S11), the extraction process is called by designating the obtained command (step S12).

In the example of FIG. 6, the unconditional preceding block set 3
Instructions 315, 325, and 33 which are the last instructions excluding the branch instructions of the basic blocks 301 to 305 belonging to 00
5, 345 and 355 are designated, and the extraction process is called. <Extraction Process> FIG. 5 is a flowchart showing details of the extraction process in step S12. Hereinafter, the extraction processing will be described with reference to the flowchart in FIG. 5 and the example of the program in FIG.

In the first extraction processing, the common instruction sequence set extraction unit 114 classifies the instructions specified in the processing of step S12 into the same type (step S2).
0). In this example, five instructions, all of which are mov R0, (_a) instructions, are specified, and are classified into one type.
The common instruction sequence set extraction unit 114 determines, for each instruction type in which two or more identical instructions are classified by the repetition processing of steps S21 to S25, the instruction difference from the instruction of the type toward the beginning of the basic block. Are sequentially compared, a part where the same instruction is continuous in all the basic blocks is obtained (step S22), and a common instruction sequence set including the obtained part as an element is created (step S23).

In the example shown in FIG. 6, instructions 315, 325, 335, 345, 3
Instruction differences are sequentially compared from 55 to the beginning of the basic block, and the same instruction is a continuous part in the basic blocks 301 to 305, ie, instructions 314 to 315, instructions 324 to 325, instructions 334 to 335, and instructions 344 to 344. 3
45, a common instruction sequence set 307 having instructions 354 to 355 as elements is created.

The common instruction sequence set extractor 114 recursively calls the extraction process shown in the flowchart of FIG. 5 by designating the instruction located immediately before each element of the created common instruction sequence set, and Is extracted repeatedly (step S2)
4). In the example of FIG. 6, the generated common instruction sequence set 307
Instructions 313, 323, 33 located immediately before each element of
3, 343 and 353 are designated and the second extraction process is called.

In the second extraction process, the common instruction sequence set extraction unit 114 extracts the specified instructions 313, 323, 3
33, 343, and 353 are mov (_d), instructions 313 and 323 that are R1 instructions, and mov (_c),
Instructions 333, 343, and 353, which are R1 instructions, are classified into two types (step S20). mov (_d), R1
For instructions, instructions 312 to 313, instructions 322 to 32
A common instruction sequence set 308 having 3 as an element is created, and instructions 311 and 321 located immediately before each of the elements are designated, and a third extraction process is called.

In the third extraction process, the common instruction sequence set extraction unit 114 extracts the specified instructions 311, 312
Mov (_a), an instruction 311 which is an R1 instruction, and m
ov (_b) and an instruction 312 which is an R1 instruction (step S20). Each type of instruction is one,
Since the conditions for the repetition processing of steps S21 to S25 are not satisfied, the common instruction string set extraction processing is not performed on the portion from the instructions 311 and 321 to the beginning of the basic block, and the processing returns to the continuation of the second extraction processing.

In the continuation of the second extraction process, mov
(_C), for the R1 instruction, instructions 332 to 333;
A common instruction sequence set 309 having instructions 342 to 343 and instructions 352 to 353 as elements is created, and instructions 331, 341 and 3 located immediately before the created common instruction sequence set 309.
51 is designated and the fourth extraction process is called. 4
In the third extraction process, similarly to the third extraction process, the instruction 33
The extraction processing of the common instruction sequence set is not performed on the portion from 1, 341, 351 toward the beginning of the basic block.

As a result, the unconditional preceding block set 300
, Common instruction sequence sets 307 to 309 are extracted. <Shared Part Selection Unit> The shared part selection unit 115 performs a selection preparation process including a recursive selection process, so that the common instruction sequence set extracted by the common instruction sequence set extraction unit 114 Is selected according to the positional relationship with the basic block selected in another common instruction sequence set. <Selection preparation processing> FIG. 7 is a flowchart showing the selection preparation processing. The flowchart of FIG. 7 and FIG.
The selection preparation process will be described with reference to the example program.

The common part selecting unit 115 determines in step S30
Through the repetition of steps S35 to S35, for each unconditional preceding block set extracted by the basic block analysis unit 111, a common instruction sequence set located at the end of the unconditional preceding block set excluding the branch instruction is obtained (step S3).
1) Further, by repeating the processing of steps S32 to S34, the obtained common instruction sequence set is sequentially designated to perform the selection processing (step S33).

In the example of FIG. 6, the unconditional preceding block set 3
The common instruction sequence set 307 at the end of 00 is specified, and the selection process is called. <Selection Process> FIG. 8 is a flowchart showing details of the selection process in step S33. Hereinafter, the selection process will be described with reference to the flowchart of FIG. 8 and the example of the program of FIG.

In the first half of the selection processing, when another common instruction sequence set exists immediately before the designated common instruction sequence set (step S40), the common part selecting unit 115 performs the repetition processing of steps S41 to S43. Then, each common instruction sequence set existing immediately before is sequentially specified, and the selection process shown in the flowchart of FIG. 8 is recursively called (step S42). By repeating this call recursively, before selecting a basic block in the specified common instruction sequence set, all common instruction sequence sets hierarchically existing from the common instruction sequence set toward the beginning are selected. A basic block including an instruction sequence to be shared in is selected in advance.

In the latter half of the selection process, the shared part selecting unit 115 selects a basic block including an instruction sequence to be shared in the designated common instruction sequence set according to the following condition judgment. That is, when a basic block whose tail is not a branch instruction belongs to the specified common instruction sequence set (step S44), the basic block is selected (step S45). If a plurality of common instruction sequence sets exist immediately before the designated common instruction sequence set (step S
46) The basic block selected from the plurality of common instruction sequence sets having the largest number of elements is selected (step S47). If one common instruction sequence set exists immediately before the designated common instruction sequence set (step S48), the basic block selected in the common instruction sequence set is selected (step S49). If none of the above cases applies, an arbitrary basic block belonging to the specified common instruction sequence set is selected (step S50).

In the example of FIG. 6, the initial selection process is called by designating the common instruction sequence set 307 and calling the common instruction sequence sets 308 and 309 located immediately before the common instruction sequence set 307 in the first half of the process. 2nd, 3rd
The third selection process is called. In the first half of the second selection process, since there is no common instruction sequence set located immediately before the designated common instruction sequence set 308, the selection process is not recursively called. In the latter half of the process, a basic block including an instruction sequence to be shared in the common instruction sequence set 308 is selected. In this case, none of the conditions of steps S44, S46, and S48 is met,
According to step S50, any one basic block is selected. Here, it is assumed that the basic block 301 including the instructions 312 to 313 is selected.

In the third selection processing, the same processing and condition determination as in the second processing are performed on the designated common instruction sequence set 309. Here, instructions 332 to 33
It is assumed that the basic block 303 including No. 3 is selected.
After the second and third selection processes are performed, the latter half of the first selection process is performed. Immediately before the common instruction sequence set 307, the common instruction sequence sets 308 and 309 exist, and step S
In order to satisfy the condition of 46, the basic block 303 selected for the common instruction sequence set 309 in step S47 is selected.

As a result, the common instruction sequence sets 307 and 30
8 and 309 as basic blocks including a sequence of instructions to be shared, respectively.
01 is selected. <Reason for selection condition> Hereinafter, steps S44 to S50 will be described.
13 to 16 that the number of executions of the branch instruction in the program after optimization can be minimized by sharing the instruction sequence included in the basic block selected by (1).

In the tail merge optimization, the compiler replaces the instruction sequence of the basic block which is not selected in each common instruction sequence set with a branch instruction to the head of the instruction sequence of the selected basic block, thereby obtaining the selected basic instruction sequence. The instruction sequence of the block is shared. Therefore, the replaced branch instruction is executed in the process in which the instruction sequence of the unselected basic block was originally executed. The number of executions of such a branch instruction is obtained as follows.

FIG. 13A is a conceptual diagram showing a case where no other common instruction sequence set exists immediately before the common instruction sequence set a, and the common instruction sequence set a is composed of m elements. FIG.
As shown in (b) and (c), the basic block 1
(M-1), the basic block m
When the instruction sequence is shared, in (m-1) processes,
The replaced branch instruction jmp L1 is executed. The number of executed branch instructions is (m-1) regardless of the instruction sequence included in any of the basic blocks, and there is no difference. Therefore, in step S50, any one basic block is selected.

FIG. 14A shows that one common instruction sequence set b exists immediately before the common instruction sequence set a, and the common instruction sequence set a
Is a conceptual diagram showing a case where m is a common instruction sequence set b and i (1 <i <m) elements. FIG. 14 (b),
As shown in (c), when the instruction sequence included in the same basic block as the instruction sequence a shared in the common instruction sequence set a is shared (mi), the other instruction sequences are shared. And (m-1) processes, the replaced branch instruction jmp L1 is executed. Where (m
-I) <(m-1), and the number of branch instructions to be executed can be reduced by sharing the instruction sequence included in the same basic block as the instruction sequence shared in the immediately preceding common instruction sequence set. . Therefore, in steps S48 and S49, the basic block selected in the immediately preceding common instruction sequence set is selected.

FIG. 15A shows that a plurality of common instruction sequence sets b, c,... Exist immediately before a common instruction sequence set a, and m common instruction sequence sets a and common instruction sequence sets b, c , ... is i,
It is a conceptual diagram showing the case where it consists of j, ... (1 <... <j <i <m) elements. As shown in FIGS. 15B, 15C, and 15D, when the instruction sequence immediately after the instruction sequence shared in the common instruction sequence set b is shared, (mi)
When the instruction sequence immediately after the instruction sequence shared in the common instruction sequence set c is shared, (mj) instructions are replaced, and when the other instruction sequences are shared, (m-1) processes are replaced. The executed branch instruction jmp L1 is executed. Here, (m−i) <(m−j) <(m−1), and is included in the same basic block as the instruction sequence shared in the immediately preceding common instruction sequence set having the largest number of elements. When the instruction sequence is shared, the number of executions of the branch instruction can be reduced. Therefore, in steps S46 and S47, the basic block selected with the largest number of elements in the immediately preceding common instruction sequence set is selected.

In addition to the branch instruction for sharing the instruction sequence, a branch instruction for transferring control to a subsequent basic block may be executed. Such a branch instruction exists at the end of all basic blocks except at most one basic block in which the subsequent basic block and the memory area are continuous. FIG. 16A is a conceptual diagram illustrating a case where m basic blocks belong to the unconditional preceding block set and the last instruction of the basic block 1 is not a branch instruction. As shown in FIGS. 16B and 16C, when the instruction sequence included in the basic block 1 is shared, the branch instruction jmp L0 is not executed at all, and the instruction sequence included in the other basic blocks is shared. And the m branch instructions jmpL0 are executed.

Since the number m is larger than any of the number of branch instructions executed to share the instruction sequence, if an instruction sequence not including this branch instruction is selected in preference to other conditions, the branch instruction Can be performed less frequently.
Therefore, in steps S44 and S45, when the basic block whose tail is not a branch instruction belongs to the common instruction sequence set, the basic block is selected in preference to other conditions.

As described above, by sharing the instruction sequence included in the basic blocks selected in steps S44 to S50, the number of executions of the branch instruction in the optimized program can be minimized. <Code conversion unit> The code conversion unit 116 executes a code conversion preparation process including a recursive code conversion process, and the instruction sequence included in the basic block selected by the shared part selection unit 115 is included in each common instruction sequence set. Convert programs to be shared. <Code Conversion Preparation Processing> FIG. 9 is a flowchart showing the code conversion preparation processing, and FIGS. 11 and 12 are examples of programs used to show the steps of the code conversion preparation processing and the code conversion processing. FIG. 11 shows a program as a result of sharing the instruction sequence included in the basic block selected by the shared part selecting unit 115 with respect to the common instruction sequence sets 308 and 309 with respect to the program in FIG.
a, 301b, 302a, 303a, 303b, 304
a, 305a, 306 are basic blocks, 307, 30
8, 309 are a common instruction sequence set, 311 to 325, 326
a, 331 to 345, 346a, 351 to 355, 35
6a is an instruction and a label. FIG. 12 shows a program resulting from sharing the instruction sequence included in the basic block selected by the shared part selecting unit 115 with the common instruction sequence set 307 with respect to the program of FIG.
a, 301c, 302a, 303a, 303b, 303
c, 304a, 305a, 306 are basic blocks, 30
7, 308 and 309 are common instruction sequence sets, 311 to 31
3, 316a, 317, 321, 326a, 331 to 3
41, 346a, 351, 356a are instructions and labels.

The flowchart of FIG. 9 and the flowchart of FIG.
The code conversion preparation process will be described with reference to the example program. The code conversion unit 116 determines in step S6
From 0, the last common instruction sequence set excluding the branch instruction of the unconditional preceding block set is obtained for each unconditional preceding block set extracted by the basic block analysis unit 111 (step S61). ,
Further, by repeating the steps S62 to S64, the obtained common instruction sequence set is sequentially designated to perform the code conversion process (step S63).

In the example of FIG. 11, the common instruction sequence set 307 located at the end of the unconditional preceding block set 300 is specified, and the code conversion process is called. <Code Conversion Processing> FIG. 10 is a flowchart showing details of the code conversion processing in step S63. Hereinafter, the code conversion processing will be described with reference to the flowchart of FIG. 10 and the program examples of FIGS. 11 and 12.

In the first half of the code conversion process, when another common instruction sequence set exists immediately before the designated common instruction sequence set (step S70), the code conversion unit 116 performs the repetition of steps S71 to S73. The code conversion process shown in the flowchart of FIG. 10 is recursively called by sequentially designating each common instruction sequence set existing immediately before (step S72). By repeating this call recursively, before performing code conversion in the specified common instruction sequence set, in all the common instruction sequence sets that exist hierarchically from the common instruction sequence set to the beginning, The program is converted so that the instruction sequence included in the basic block selected by the common part selection unit 115 is shared.

In the latter half of the code conversion process, if there is no label immediately before the instruction sequence included in the basic block selected by the common part selection unit 115 (step S74), the code conversion unit 116 newly adds the label to the location. A label is created (step S75), and the following processing is sequentially performed on each of the basic blocks that are not selected by repeating the processing from step S76 to step S80. That is, if the branch destination has not been updated for the last branch instruction of the basic block (step S77), the instruction is changed immediately before the instruction sequence of the selected basic block (step S78), and the unselected basic block is changed. Is deleted (step S79).

In the examples of FIGS. 11 and 12, the first code conversion process is called by designating the common instruction sequence set 307, and in the first half of the process, the common instruction sequence set located immediately before the common instruction sequence set 307 is called. The second and third code conversion processes are called by designating 308 and 309, respectively. In the first half of the second code conversion process, since there is no other common instruction sequence set located immediately before the designated common instruction sequence set 308, a recursive call of the code conversion process is not performed. In the latter half of the process, the basic block 301a selected by the shared portion selection unit 115
Is newly created just before the instruction sequence consisting of the instructions 312 to 313 included in the instruction, the branch destination of the branch instruction 326a is changed to L2, and the instruction sequence of the unselected basic block is deleted.

In the first half of the third code conversion process, similar to the second process, the recursive call of the code conversion process is not performed, and in the second half of the process, the basic block selected by the shared portion selection unit 115 is used. A new label 337 is created immediately before the instruction sequence including the instructions 332 to 333 included in the instruction 301b, and the branch instructions 346a and 346 are generated.
The branch destination of 6a is changed to L3, and the instruction sequence of the unselected basic block is deleted.

As a result, the program shown in FIG. 11 is obtained. After the second and third code conversion processes are performed, the latter half of the first code conversion process is executed. Basic block 303 selected by common part selecting section 115
A new label 338 is created immediately before the instruction sequence consisting of the instructions 334 to 335 included in the instruction c, the branch destination of the branch instruction 316a that has not been changed is changed to L4, and the instruction sequence of the unselected basic block is changed to L4. Deleted.

As a result, the program shown in FIG. 12 is obtained. According to this configuration, the number of branch instructions executed in the program after the multi-stage tail merge optimization can be minimized. The common instruction sequence set extraction unit 114 is provided with a common instruction sequence set extraction unit and a common instruction sequence set extraction control unit, and the steps S22 to S2 of the extraction process are performed.
3 may be executed by the common instruction sequence set extraction means, and the other steps of the extraction processing and each step of the extraction preparation processing may be executed by the common instruction sequence set extraction control means.

In the selection process of the common part selecting unit 115, a common instruction sequence set in which one instruction sequence should be arbitrarily selected, and a common instruction sequence in which a plurality of common instruction sequence sets having the maximum number of elements exist immediately before. In the sequence set, there are a plurality of instruction sequence candidates to be shared. In the unconditional preceding block set including the common instruction string set, there are a plurality of instruction string combinations that minimize the number of executions of the branch instruction.

In such a case, the common part selecting unit 115
Enumerates in advance combinations that select one instruction sequence candidate to be shared in each common instruction sequence set, calculates the size of the branch instruction for the program in which the instruction sequence is shared according to each combination, and calculates the size of the branch instruction. The smallest combination may be selected. According to this configuration, it is possible to minimize the number of branch instructions executed in the program after the multi-stage tail merge optimization, and also to minimize the size of the branch instruction.

Some target programs have a characteristic that the code size of a branch instruction increases or decreases according to the branch distance. When generating a target program having such characteristics, the present program conversion apparatus calculates in advance the amount of change in code size for an instruction sequence to be deleted and a branch instruction to be changed when the code conversion unit 116 performs the conversion. Control means may be provided for controlling the code conversion unit 116 so as not to delete an instruction sequence and change a branch instruction in a basic block whose code size is not reduced by the conversion.

According to this configuration, for example, when the code size is increased by changing the branch destination for the last branch instruction of the basic block 301c in FIG. 12, the increased code size is deleted. If the code size is equal to or larger than the code size of the instruction sequence, the deletion of the instruction sequence and the change of the branch instruction in the basic block 301c are not performed. As a result, it is possible to eliminate the possibility that the code size increases due to the conversion in the target program having the above characteristics.

It should be noted that some compilers optimize the generated target program. Such a compiler may be configured to perform tail merge optimization on a target program. FIG. 17 is a diagram showing a configuration of such a program conversion device 120. The target program optimization unit 108 includes a basic block analysis unit 12
1. The target program including the tail merge optimizing unit 122 and the target program generated by the target program generating unit 107 is input,
The same processing as that of the intermediate code optimizing unit 105 is performed, and the target program 106 is output.

According to this configuration, the present invention can be applied to a compiler that optimizes a target program. <Second Embodiment> The program conversion device according to the second embodiment is different from the first embodiment in that the shared part selection unit 115
Works differently. In the second embodiment, the shared part selection unit 115 calculates the size of a branch instruction in a program that shares the selected instruction sequence. The size of the branch instruction differs depending on the positional relationship of the basic block including the instruction sequence to be shared, and the shared portion selection unit 115 selects the instruction sequence with the smallest size as the instruction sequence to be shared. <Selection Processing> FIG. 18 is a flowchart showing the selection processing in the second embodiment. Hereinafter, the selection processing in the second embodiment will be described with reference to the flowchart in FIG.

The common part selection unit 115 determines in step S90
Through the repetition processing of step S94, for each unconditional preceding block set extracted by the basic block analysis unit 111, a combination of instruction sequences that minimizes the size of a branch instruction when shared is obtained. Specifically, a combination for selecting one basic block from each common instruction sequence set is enumerated (step S91), and by repeating the steps S92 to S94, for each of the enumerated combinations, the basic block selected according to the combination is selected. Calculate the size of the branch instruction in the program when the instruction sequence included in
The combination that minimizes the size of the branch instruction is selected as a basic block including an instruction sequence to be shared (step S95).

According to this configuration, the size of the branch instruction in the program after the multi-stage tail merge optimization can be minimized. Note that a compiler that performs optimization on the generated target program may be configured to perform tail merge optimization on the target program. According to this configuration, the present invention can be applied to a compiler that optimizes a target program.

[0067]

The program conversion device of the present invention is a program conversion device for converting a program so that one of the same instruction sequence at the end of a plurality of basic blocks is shared, thereby reducing the code size. A set of the same instruction sequence existing in different basic blocks for a plurality of other basic blocks that unconditionally follow a specific basic block, and Extracting means for extracting a common instruction sequence set existing in a hierarchical manner, and selecting a basic block including any one instruction sequence in each extracted common instruction sequence set in another common instruction sequence set Selection means for selecting in accordance with the positional relationship between the program and the program so that the instruction sequence in the selected basic block is shared by other basic blocks. Converting a and a code converting means.

According to this configuration, all common instruction sequence sets existing in a hierarchy are extracted in advance, and the positional relationship of the basic block including the instruction sequence to be shared is examined over a plurality of hierarchies, and optimization is performed. Knowing the number of branch instructions to be executed in a program and selecting the basic block containing the instruction sequence to be shared, the number of branch instructions is reduced compared to the conventional multi-stage tail merge optimization can do.

[0069] The extraction means is a common instruction string set extraction means for extracting a common instruction string set at the end of the basic blocks for a plurality of basic blocks. The common instruction sequence set extraction unit extracts a common instruction sequence set for a plurality of basic blocks, and excludes a common instruction sequence extracted immediately before from a plurality of basic blocks having a common instruction sequence for the second and subsequent times. Extraction control means for causing the common instruction sequence set extraction means to extract the common instruction sequence set with respect to the program part.

According to this configuration, the common instruction sequence set existing in the hierarchy can be efficiently extracted. The selection means may select the same basic block in a common instruction sequence set extending over a plurality of layers that are vertically continuous when a pair of common instruction sequence sets is vertically in contact with each other.

The selecting means has the largest number of elements when a plurality of upper-layer common instruction sequence sets contact one lower-layer common instruction sequence set with respect to a plurality of upper-lower-level common instruction sequence sets. The same basic block may be selected in the upper-layer common instruction sequence set and the lower-layer common instruction sequence set. The selecting means may select the basic block when the instruction sequence included in the basic block whose tail is not a branch instruction belongs to a common instruction sequence set.

According to these configurations, the number of branch instructions executed in the optimized program can be minimized. A selection candidate extraction unit that selects one or more basic blocks in each of the extracted common instruction sequence sets according to a positional relationship with a basic block in another common instruction sequence set; A combination enumeration unit for enumerating all combinations for selecting one basic block selected as a selection candidate in a column set, and a branch instruction changed when a basic block is selected according to each enumerated combination and the conversion is performed. A branch instruction size calculator for calculating a code size in advance may be provided, and the basic block may be selected according to a combination having the smallest calculated code size.

According to this configuration, after minimizing the number of branch instructions executed in the optimized program,
The size of the branch instruction can be minimized. The program conversion device further calculates a code size change amount for the instruction sequence to be deleted by the conversion and the branch instruction to be changed, and deletes and deletes the instruction sequence and the branch instruction in the basic block whose code size is not reduced by the conversion. A control means for controlling the code conversion means so as not to make a change may be provided.

According to this configuration, when the code size of the branch instruction of the target program to be generated has a characteristic of increasing or decreasing according to the branch distance, the possibility of increasing the code size by performing optimization can be eliminated. .

[Brief description of the drawings]

FIG. 1 is a functional block diagram of a program conversion device.

FIG. 2 is a functional block diagram of an intermediate code optimization unit.

FIG. 3 is an example showing a schematic diagram of a basic block and a control flow between the basic blocks, and a list of unconditionally preceding block sets.

FIG. 4 is a flowchart showing extraction preparation processing.

FIG. 5 is a flowchart illustrating an extraction process.

FIG. 6 is an example of a program used to show a process of an extraction process.

FIG. 7 is a flowchart illustrating a selection preparation process.

FIG. 8 is a flowchart showing a selection process.

FIG. 9 is a flowchart showing a code conversion preparation process.

FIG. 10 is a flowchart showing a code conversion process.

FIG. 11 is an example of a program used to show a process of a code conversion process.

FIG. 12 is an example of a program used to show a process of a code conversion process.

FIG. 13 is a conceptual diagram used to show the basis of a selection condition.

FIG. 14 is a conceptual diagram used to show the basis of a selection condition.

FIG. 15 is a conceptual diagram used to show the basis of a selection condition.

FIG. 16 is a conceptual diagram used to show the basis of a selection condition.

FIG. 17 is a functional block diagram of a program conversion device.

FIG. 18 is a flowchart illustrating a selection process according to the second embodiment.

FIG. 19 is an example of a program before and after tail merge optimization.

FIG. 20 is a program example showing a process in which tail merge optimization is repeated twice.

FIG. 21 is a program example showing a process in which tail merge optimization is repeated twice.

[Explanation of symbols]

REFERENCE SIGNS LIST 100 program converter 101 source program 102 lexical analyzer 103 syntax analyzer 104 intermediate code generator 105 intermediate code optimizer 106 objective program 107 objective program generator 108 objective program optimizer 111 basic block analyzer 112 tail merge optimization Unit 114 common instruction sequence set extraction unit 115 common part selection unit 116 code conversion unit 120 program conversion device 121 basic block analysis unit 122 tail merge optimization unit 300 unconditional preceding block set 301-305, 301a-305a, 301b, 30
1c, 303c Basic blocks 307 to 309 Common instruction sequence set 311 to 356, 316a, 326a, 346a, 35
6a instruction 317, 337, 338 label 1100a, 1100b program 1101a, 1101b, 1102a, 1102b, 1
103, 1104 basic block 1105 common instruction sequence set 1106 shared instruction sequence 1107-1110 branch instruction 1200a, 1200b, 1200c program 1201a, 1201b, 1202a, 1202b, 1
202c, 1203a, 1203b, 1203c, 12
04, 1205, 1206 Basic block 1207, 1208 Common instruction sequence set 1209, 1210 Shared instruction sequence 1211-1218 Branch instruction 1300a, 1300b, 1300c Program 1301a, 1301b, 1302a, 1302b, 1
302c, 1303a, 1303b, 1303c, 13
04, 1305, 1306 Basic block 1307, 1308 Common instruction sequence set 1309, 1310 Shared instruction sequence 1311 to 1318 Branch instruction

Claims (9)

[Claims] 1. A program conversion apparatus for reducing a code size by converting a program so that one of the same instruction sequence at the end of a plurality of basic blocks is shared. A set of the same instruction sequence existing in different basic blocks for a plurality of other basic blocks following the condition, and a common set of hierarchically existing from the tail to the head of the basic blocks. Extracting means for extracting a set of instruction sequences; selection for selecting a basic block including any one of the instruction sequences in each of the extracted common instruction sequence sets according to a positional relationship with a basic block in another common instruction sequence set Means, and code conversion means for converting the program so that the instruction sequence in the selected basic block is shared by other basic blocks. And a program conversion device. 2. The extraction means, comprising: a common instruction string set extracting means for extracting a common instruction string set at a tail of a plurality of basic blocks; and an unconditionally following the same basic block for the first time. The common instruction sequence set extraction means extracts a common instruction sequence set for a plurality of basic blocks, and excludes a common instruction sequence extracted immediately before from a plurality of basic blocks having a common instruction sequence for the second and subsequent times. 2. The program conversion device according to claim 1, further comprising extraction control means for causing the common instruction sequence set extracting means to extract a common instruction sequence set for the program portion. 3. The method according to claim 1, wherein the selecting means selects the same basic block for a common instruction sequence set extending over a plurality of layers that are vertically continuous when the pair of common instruction sequence sets is vertically adjacent to each other. 3. The program conversion device according to claim 1, wherein 4. The method according to claim 1, wherein the selecting means is configured such that, when the common instruction sequence set in the upper layer is in contact with the common instruction sequence set in the lower layer, the number of elements is equal to one common instruction sequence set in the lower layer. 3. The program conversion apparatus according to claim 1, wherein the same basic block is selected in the uppermost common instruction sequence set and the lowermost common instruction sequence set. 5. An apparatus according to claim 1, wherein said selecting means selects said basic block when an instruction sequence included in a basic block whose tail is not a branch instruction belongs to a common instruction sequence set. 3. The program conversion device according to 2. 6. A selection candidate extraction unit for selecting one or more basic blocks in each extracted common instruction sequence set as selection candidates according to a positional relationship with a basic block in another common instruction sequence set. And a combination enumeration unit that enumerates all combinations that select one basic block selected as a selection candidate in each common instruction sequence set, and changes when the conversion is performed by selecting a basic block according to each enumerated combination. 3. The program conversion device according to claim 1, further comprising: a branch instruction size calculator for calculating a code size of the branch instruction to be calculated in advance, wherein the basic block is selected according to a combination having the smallest calculated code size. . 7. The program conversion device further calculates an amount of change in code size for an instruction sequence deleted by the conversion and a branch instruction to be changed, and converts the instruction sequence in a basic block whose code size does not decrease by the conversion. 3. The program conversion device according to claim 1, further comprising control means for controlling the code conversion means so as not to delete or change the branch instruction. 8. A program conversion method used in a program conversion apparatus for reducing a code size by converting a program so that one of the same instruction sequences at the end of a plurality of basic blocks is shared, A set of identical instruction sequences existing in different basic blocks, targeting a plurality of other basic blocks that unconditionally follow a specific basic block. A first step of extracting a common instruction sequence set existing in a hierarchy, and a basic instruction block including any one instruction sequence in each of the common instruction sequence sets extracted in the first step is replaced with another common instruction sequence set. A second step of selecting in accordance with the positional relationship with the basic block selected in the above, and an instruction sequence in the basic block selected in the second step And a third step of converting the program so that the program is shared by other basic blocks. 9. A computer storing a program used in a program conversion apparatus for reducing a code size by converting a program so that one of the same instruction sequence at the end of a plurality of basic blocks is shared. A readable recording medium, which is a set of identical instruction sequences existing in different basic blocks for a plurality of other basic blocks unconditionally following a specific basic block, and A first step of extracting a common instruction sequence set existing hierarchically from the tail to the beginning of the basic block, and a basic instruction sequence including any one instruction sequence in each of the common instruction sequence sets extracted in the first step A second step of selecting a block in accordance with a positional relationship with a basic block selected in another common instruction sequence set; And a third step of converting the program so that the instruction sequence in the basic block selected in the step is shared by other basic blocks.