JP2001211061A - Photoelectricity converting circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To automatically set a reference signal level which is required for a circuit connected to a subsequent stage without depending on the intensity of incoming light. SOLUTION: Cathode of photodiode PD1 is connected to ground via a register RL1, anode thereof being connected to VSS1 via a resister RL2, capacity Cp being connected in parallel with the resister RL2. Voltage of cathode of PD1 is outputted as an output voltage Vout according to a source follower circuit 3, while a voltage of anode thereof is outputted as a reference voltage Vref according to a source follower circuit 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photoelectric conversion circuit in a semiconductor integrated circuit, and more particularly to a technique for enabling automatic setting of a reference signal level matching a circuit interface connected to a subsequent stage.

[0002]

2. Description of the Related Art FIG. 6 shows a circuit configuration example of a conventional photoelectric conversion circuit. This circuit comprises a resistor RL5 having one end connected to the ground, a photodiode PD3 having a cathode connected to the other end of the resistor RL5 and an anode connected to the bias terminal 11, and an output terminal connected to the cathode of the photodiode PD3. 12 is connected. A negative bias voltage Vb is applied to the bias terminal 11.

The operation of this circuit will be described with reference to FIG. 7, the horizontal axis represents time, and the vertical axis represents output terminal 1.
2 is the voltage value. In the photodiode PD3, a photocurrent Ip is generated in accordance with the intensity of the incident optical signal. Therefore, a voltage Vout corresponding to the product of the resistance value of the resistor RL5 and the current value of the photocurrent Ip is output to the output terminal 12. . In addition,
In FIG. 7, the state of the change of the output voltage according to the input optical signal intensity is shown by gradually spelling the time axis.

In an optical communication receiving circuit, since an input optical signal is weak, an amplifier by an electric circuit is connected to a stage subsequent to the output terminal 12, and the voltage is amplified to a desired level there. It is a target. In this circuit configuration, it is necessary to reduce the value of the resistor RL5 in order to guarantee a wide band operation, and it is generally called a low impedance type photoelectric conversion circuit (for example, K. Pederotti, "Hig"
h Speed Circuits for Lightwave Communication, "Inte
rnational Journal of High Speed Electronics and Sy
stems, vol. 9, no. 2, pp. 1-34, 1998.).

When an optical receiver is configured, a voltage amplifier is generally connected to a stage subsequent to the photoelectric conversion circuit for the purpose of amplifying a voltage signal. In recent years, a receiver configuration in which a photoelectric conversion circuit is directly connected to a high-speed digital circuit using a photodiode having a high saturation output has been proposed (for example, Y. Miyamoto, et.al., "40 Gbit"). / s high sensit
ivity optical receiver with uni-traveling-carrier
photodiode acting asdecision IC driver, "IEE Electr
on. Lett., vol. 34, no. 2, pp. 214-215, 1998.).

In any of the configurations, the optical receiving circuit is required to have a wide band / high sensitivity characteristic. For this purpose, in an optical receiving circuit having an operation speed exceeding Gbit / s, a differential circuit configuration is generally adopted for an amplifier or a digital circuit connected to the subsequent stage of the photoelectric conversion circuit.

[0007]

However, in order to drive the differential circuit, a reference level (a level for discriminating "0" and "1") is required in addition to the output signal of the photoelectric conversion circuit. A bias voltage or a complementary signal of the output signal is required. In the conventional photoelectric conversion circuit configuration, since only a single-phase signal is output, it was necessary to externally apply a reference potential to drive the differential circuit.

Further, as shown in FIG. 7, since the optimum reference level for the subsequent circuit fluctuates from Vref1, Vref2, Vref3 according to the intensity of the optical input signal, it is necessary to independently adjust the potential level from the outside. was there.

As described above, in the conventional photoelectric conversion circuit,
Since reference adjustment according to the input signal strength is required, application to an actual transmission system has been difficult. Further, there is a disadvantage that a margin for a change in input light intensity is poor.

The present invention has been made in view of such a point, and an object of the present invention is to reduce the reference signal level required for a differential circuit connected to a subsequent stage without depending on the optical input intensity. An object of the present invention is to provide a photoelectric conversion circuit capable of automatic setting.

[0011]

According to a first aspect of the present invention, there is provided a photodiode, a first resistor connected between a cathode of the photodiode and a high potential power supply terminal, A second resistor connected between the anode of the diode and the low potential power supply terminal, a third resistor connected in parallel with the photodiode, and a photoelectric converter having a capacitor connected in parallel with the second resistor; A level generating unit having a configuration in which the capacitance is removed from the configuration of the photoelectric conversion unit; and first and second source follower circuits having a source follower transistor and a current source transistor. A cathode of the photodiode of the conversion circuit is connected to a gate of the source follower transistor of the first source follower circuit; The anode of the photodiode of the path is connected to the gate of the current source transistor of the second source follower circuit, and the cathode of the photodiode of the level generator is connected to the source follower transistor of the second source follower circuit. Connected to a gate, an anode of the photodiode of the level generating unit is connected to a gate of the current source transistor of the first source follower circuit, and an optical signal is input to the photodiode of the photoelectric conversion unit; An output signal is extracted from the source of the source follower transistor of the first source follower circuit, and a reference signal is extracted from the source of the source follower transistor of the second source follower circuit.

According to a second aspect of the present invention, there is provided a photodiode, a first resistor connected between a cathode of the photodiode and a high potential power supply terminal, and a photodiode connected between an anode of the photodiode and a low potential power supply terminal. A photoelectric converter having a second resistor, a third resistor connected in parallel to the photodiode, and a capacitor connected in parallel to the second resistor; and A level generator having a detached configuration, and a differential amplifier having a pair of differentially connected transistors, wherein the anode of the photodiode of the photoelectric conversion unit is connected to the gate of one of the transistors of the differential connection. Connected to the drain of the one transistor, the cathode of the photodiode of the level generating section is connected, and the other transistor of the differential connection The anode of the photodiode of the level generating unit is connected to the gate, the cathode of the photodiode of the photoelectric conversion unit is connected to the drain of the other transistor, and the photodiode of the photoelectric conversion unit is connected to the photodiode. A signal is input, an output signal is extracted from the cathode of the photodiode of the photoelectric conversion unit, and a reference signal is extracted from the cathode of the photodiode of the level generation unit.

In a third aspect based on the first or second aspect, each of the transistors is a bipolar transistor.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, a photo-electric conversion unit in which a load resistor is connected to both ends of an optical receiving photodiode, a level conversion unit similar to the photo-electric conversion unit, a source follower circuit or a differential amplifier. A reference potential automatic adjustment unit is provided. Then, by receiving light, one of the differential voltages generated at each resistor connected to both ends of the light receiving photodiode of the photoelectric conversion unit is set as a signal output voltage, and the other voltage is integrated to set a reference voltage. The reference voltage is sent to a subsequent source follower circuit or a differential amplifier, and is accurately converted to a voltage level at the center of the signal output voltage. This enables automatic adjustment of the reference potential, which was impossible with the prior art. The details will be described below.

[First Embodiment] FIG. 1 is a circuit diagram of a photoelectric conversion circuit according to a first embodiment of the present invention. In this circuit, 1 photoelectric conversion unit, 2 is a level generation unit,
Reference numeral 4 denotes first and second source follower circuits.

The photoelectric conversion unit 1 includes a photodiode PD1 as a light receiving element, a load first resistor RL1 connected between the cathode of the photodiode PD1 and ground (high-potential power supply terminal), Photodiode P
A second resistor RL2 for the load connected between the anode of D1 and the low potential power supply terminal 5, a third resistor Rpd1 for the photodiode bias connected in parallel with the photodiode PD1, and a parallel connection with the resistor RL2. Is connected to the integrating capacitor Cp.

The level generating section 2 includes a photodiode PD2 that does not receive light, a fourth resistor RL3 for load connected between the cathode of the photodiode PD2 and the ground, and a low level resistor connected to the anode of the photodiode PD2. Fifth resistor R for load connected between potential power supply terminals 5
L4, and a sixth photodiode bias resistor Rpd2 connected in parallel with the photodiode PD2. The level generator 2 has the same configuration as that of the photoelectric converter 1 except that the capacitor Cp is removed.

The first source follower circuit 3 comprises a source follower transistor XF1 and a current source transistor XF2, and the second source follower circuit 4 comprises a source follower transistor XF3 and a current source transistor XF4. 7 is an output terminal for the signal voltage Vout, and 8 is an output terminal for the reference signal voltage Vref.

In the first source follower circuit 3, the gate of the transistor XF1 is connected to the photodiode PD.
1 (node A) and the transistor X
The gate of F2 is connected to the anode (node D) of photodiode PD2. In the second source follower circuit 4, the gate of the transistor XF3 is connected to the cathode (node C) of the photodiode PD2, and the gate of the transistor XF4 is connected to the photodiode P2.
Connected to the cathode of D1 (node B).

The light signal is applied to the photodiode PD1 of the photoelectric conversion unit 1, the output electric signal Vout is outputted from the source of the transistor XF1 to the output terminal 7, and the reference signal Vref is sent from the source of the transistor XF3 to the reference output terminal 8. Is output.

Here, each node C,
The potentials Vc and Vd of D must be matched with the potentials Va and Vb of the corresponding nodes A and B in the photoelectric conversion unit 1 when no optical signal is input, and Vc = Va and Vd = Vb. is there. Therefore, the resistances RL1 to RL4, Rpd
1, Rpd2 are RL1 = RL3, RL2 = R
L4, Rpd1 = Rpd2.
The photodiode PD2 of the level generator 2 is inserted to compensate for the resistance of the photodiode PD1 of the photoelectric conversion unit 1 when light is not irradiated, and has the same size as the photodiode PD1.

The operation of the circuit will be described with reference to FIG. 2, the horizontal axis represents time, and the vertical axis represents the levels of the voltages Va, Vb, Vc, Vd of the nodes A, B, C, D in FIG. 1, and the levels of the voltages Vout, Vref of the output terminals 7, 8. . Further, in order to simplify the description of the operation, the resistors RL1,
It is assumed that the resistance values of RL2, RL3, and RL4 are all equal.

First, the operation of the photoelectric conversion unit 1 and the level generation unit 2 will be described. In the photoelectric conversion unit 1, the photodiode PD1 generates a photocurrent Ip in proportion to the intensity of the incident optical signal. As a result, node A
Generates a voltage Va having an amplitude corresponding to the product of the resistance value of the resistor RL1 and the current value of the photocurrent Ip.

However, a voltage Vb (voltage Va) generated because the capacitor Cp is connected in parallel is connected to the node B.
When the mark ratio (the probability that the optical signal is 0 and the probability that the optical signal is 1) of the input signal is 1/2,
The voltage Vb is a voltage corresponding to the center level of the signal voltage Va generated at the node A. The voltage Vb of this value becomes higher by ΔV than the voltage Vd of the node D of the level generator 2 having the same circuit configuration as the photoelectric converter 1.

Here, the potential ΔV is half the value of the product (= Va) of the photocurrent Ip and the resistance RL1, and is proportional to the intensity of the input optical signal. For example, a larger photocurrent Ip ′ For (Ip ′> Ip), the potential becomes ΔV ′ (ΔV ′> ΔV) as shown in the figure. Where the potential Δ
V 'is a half value of the product of the photocurrent Ip' and the resistance RL1. It should be noted here that when the mark ratio is 1/2 as described above, ΔV or ΔV ′ is always the amplitude of the voltage Va at the node A which is the output of the photoelectric conversion unit 1. That is, the voltage corresponds to the center level.

On the other hand, the voltage Vc of the node C has the same voltage level as the high level of the voltage Va output to the node A since the level generator 2 and the photoelectric converter 1 have the same circuit configuration. Become.

In summary, the node A has a photocurrent Ip
And a signal voltage Va corresponding to the product of RL1 and the resistance RL1,
A voltage Vc at a level corresponding to the high level of the node A is output to the node C. Further, a signal Va output to the node A with respect to the voltage Vd at the level of the node D is applied to the node B.
Is output at a voltage level higher by a voltage level ΔV corresponding to the center level of.

Next, the operation of the source follower circuits 3 and 4 will be described. In the first source follower circuit 3, the voltages Va and Vd of the nodes A and D are input to the gates of the transistors XF1 and XF2. As described above, the value of the voltage Vd at the node D is a constant voltage that has no relation to the optical input signal. Now, assuming that the source voltage of the transistor XF2 is equal to the voltage Vd of the node D (the gate-source connection of the transistor XF2).
Of the output terminal 7 becomes equal to the source potential of the
Output a signal of the same level as the voltage Va of the node A.

On the other hand, in the second source follower circuit 4, the voltages Vc and Vb of the nodes C and B are input to the gates of the transistors XF3 and XF4. Transistor X
As described above, the gate potential Vb of F4 is higher than the source potential (= Vd) by ΔV. Since the source follower circuit operates so that the potential between the gate and the source of the transistor always becomes equal, the source potential (Vref) of the transistor XF3 outputs a voltage level-shifted by ΔV lower than the potential Vc of the node C. Will be.

Accordingly, the output signal Vout and the reference signal Vref are as shown in FIG. 2, and the reference signal Vref always outputs the center level of the output signal Vout regardless of the intensity of the input optical signal.

In this embodiment, consideration will be given to the resistance to fluctuations in optical signal intensity. In this circuit configuration, the resistance to the fluctuation of the optical signal intensity can be replaced by the problem of how much the magnitude of ΔV can be tolerated. The magnitude of ΔV that can be tolerated in the present embodiment using the source follower circuit is substantially determined by the DC characteristics of the FET. However, if an attempt is made to ensure sufficient high-frequency characteristics in the FET using the Schottky gate, the maximum It is about 0.4V. Now, when the photocurrent is calculated by setting the resistance RL1 to 50Ω, 16
mA. That is, according to the present circuit configuration, it is possible to operate even from a small photocurrent to a large photocurrent of about 16 mA, and it can be seen that it can greatly contribute to expansion of the dynamic range of the optical receiver.

As described above, according to the present embodiment, the reference output level of the photoelectric conversion circuit is always adjusted to an optimum level for the subsequent-stage differential circuit regardless of the intensity of the input optical signal without any external adjustment. It is possible to match.
In addition, a sufficiently large margin can be secured for fluctuations in the input optical signal strength, which can greatly contribute to expansion of the dynamic range of the optical receiver.

[Second Embodiment] FIG. 3 is a circuit diagram of a photoelectric conversion circuit according to a second embodiment of the present invention. In this circuit, the photoelectric conversion unit 1 and the level generation unit 2 are the same as those shown in FIG. Reference numeral 9 denotes a differential amplifier, which is composed of differentially connected transistors XF5 and XF6 and a current source transistor XF7.

The photodiode PD1 of the photoelectric conversion unit 1
(Node B) of the differential amplifier 9 is input to the gate of the transistor XF5, and the drain of the transistor XF5 is connected to the cathode (node C) of the photodiode PD2 of the level generator 2. Also, the anode (node D) of the photodiode PD2 of the level generator 2
Is input to the gate of the transistor XF6 of the differential amplifier 9, and the drain of the transistor XF6 is connected to the cathode (node A) of the photodiode PD1 of the photoelectric conversion unit 1. The optical signal is applied to the photodiode PD1 of the photoelectric conversion unit 1, and the output electric signal Vout and the reference electric signal Vref are output from the drains of the transistors XF6 and XF5.

Here, similarly to the first embodiment, the potentials Vc and Vd of the nodes C and D in the level generator 2 correspond to the respective potentials of the photoelectric converter 1 in the case where no optical signal is input. It is necessary to match the potentials Va and Vb of the nodes A and B. Therefore, RL1 = RL3, RL2 = RL4, R
It must be designed that pd1 = Rpd2. The photodiode PD2 of the level generator 2 is inserted to compensate for the resistance of the photodiode PD1 of the photoelectric conversion unit 1 when light is not irradiated, and has the same size as the photodiode PD1.

The operation of this circuit will be described with reference to FIGS. 5, the horizontal axis represents time, and the vertical axis represents FIG.
Vout (= Va) of each of the nodes A, B, C, and D in
Vb, Vref (= Vc), and Vd. Also,
The resistors RL1, RL2, R
It is assumed that the resistance values of L3 and RL4 are all equal.

The operations of the photoelectric conversion unit 1 and the level generation unit 2 are the same as in the first embodiment. That is, a voltage Vd having a constant voltage value is output to the node D, and the output terminal 7 is output to the node B with respect to the level of the voltage Vd of the node D.
Voltage level Δ corresponding to the center level of the signal output to
A voltage Vb at a level higher by V is output regardless of the magnitude of the optical signal.

The second embodiment differs from the first embodiment in that a differential amplifier 9 is used for level adjustment. In this circuit configuration, the transistors XF5 and XF6 of the differential amplifier 9 generate a current corresponding to the input voltage ΔV between both gates, and generate a voltage at the resistors RL1 and RL3 to output the signal Vout and the reference output Vr.
Adjust the level of ef. Here, the differential amplifier 9 is
It is assumed that the differential amplifier has a DC voltage characteristic of 1 as shown in FIG.

Next, the operation of the differential amplifier 9 will be described. Now, Δ is applied between the gates of the transistors XF5 and XF6.
When a voltage of V (the gate of XF5 is higher by ΔV) is applied, the potential Vout of the output terminal 7 rises by ΔV / 2 from the potential when the photocurrent is zero, and the reference output terminal 8
Is reduced by ΔV / 2. That is, the reference voltage Vref is set to a voltage that is exactly ΔV lower than the high level of the output voltage Vout.

As described above, since ΔV is a half of the product of the photocurrent Ip and the resistance RL1, the level of the reference voltage Vref matches the center level of the output signal Vout. This is the same even when the intensity of the input optical signal changes. FIG. 5 shows a larger photocurrent
Voltage Δ generated for the case of Ip ′ (Ip ′> Ip)
An example of V ′ (ΔV ′> ΔV) is also shown. Therefore, the output signal Vout and the reference signal Vref are
Thus, the reference signal Vref always outputs the center level of the output signal Vout regardless of the intensity of the input optical signal.

The present embodiment will be described with respect to the resistance to the fluctuation of the optical signal intensity. Also in the present circuit configuration, as in the first embodiment, the resistance to optical signal intensity fluctuation is ΔV
Is equivalent to the question of how large the size of can be. The magnitude of ΔV that can be tolerated in the present embodiment using the differential amplifier circuit 9 is not only the DC characteristic of the FET but also the current source transistor XF7 and the transistor X forming a differential pair.
It can also be adjusted by the size of F5 and XF6. Therefore, the present invention can be applied to ΔV larger than that of the circuit of the first embodiment, and a sufficiently large resistance to an optical signal intensity can be realized.

As described above, according to the present embodiment, the reference output level of the photoelectric conversion circuit is always adjusted to the optimum level for the subsequent differential circuit without any external adjustment, regardless of the intensity of the input optical signal. Can be matched to In addition, a sufficiently large margin can be secured for fluctuations in the input optical signal strength, which can greatly contribute to expansion of the dynamic range of the optical receiver.

[Other Embodiments] The first,
In the second embodiment, an example in which a field effect transistor (FET) is used as a transistor has been described. However, needless to say, a similar circuit configuration can be applied to a case where a bipolar transistor is used. in this case,
The base corresponds to the gate, the collector corresponds to the drain, and the emitter corresponds to the source.

[0044]

As described above, according to the present invention,
It is possible to automatically set the reference signal level required for the differential circuit connected to the subsequent stage without depending on the light input intensity. Further, the operation margin can be increased with respect to the fluctuation of the optical input intensity, and it can greatly contribute to the expansion of the dynamic range of the optical receiver.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a photoelectric conversion circuit according to a first embodiment of the present invention.

FIG. 2 is a waveform chart for explaining the operation of the photoelectric conversion circuit of FIG. 1;

FIG. 3 is a circuit diagram of a photoelectric conversion circuit according to a second embodiment of the present invention.

FIG. 4 is a DC characteristic diagram of the differential amplifier of the photoelectric conversion circuit of FIG. 3;

FIG. 5 is a waveform chart for explaining the operation of the photoelectric conversion circuit in FIG. 3;

FIG. 6 is a circuit diagram of a conventional photoelectric conversion circuit.

FIG. 7 is a waveform chart for explaining the operation of the photoelectric conversion circuit of FIG. 6;

[Explanation of symbols]

1: photoelectric conversion unit, 2: level generation unit, 3: first source follower circuit, 4: second source follower circuit, 5,
6: power supply terminal, 7: signal output terminal, 8: reference output terminal, 9: differential amplifier.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H03F 3/45 H01L 31/10 G 5J092 // H04B 10/28 H04B 9/00 Y 5K002 10/26 10 / 14 10/04 10/06 F term (reference) 2G065 AA04 BA09 BC05 BC10 4M118 AA10 AB05 BA02 CA02 DD09 DD10 FC01 FC06 GB09 5F049 MA01 UA20 5J050 AA01 BB21 CC12 DD01 DD18 EE14 EE17 EE31 5J066 AA01 HA25 HA32 CA32 HA29 HA44 KA31 MA02 MA21 MA22 ND01 ND11 ND22 ND23 PD01 TA02 TA06 5J092 AA01 AA12 AA56 CA32 CA98 FA09 HA02 HA09 HA19 HA25 HA29 HA44 KA31 MA02 MA21 MA22 TA02 TA06 UL02 5K002 AA03 CA08 DA06

Claims (3)

[Claims] 1. A photodiode, a first resistor connected between a cathode of the photodiode and a high-potential power supply terminal, and a second resistor connected between an anode of the photodiode and a low-potential power supply terminal. A photoelectric converter having a resistor, a third resistor connected in parallel to the photodiode, and a capacitor connected in parallel to the second resistor; and a configuration in which the capacitor is removed from the configuration of the photoelectric converter. And a first and a second source follower circuit having a source follower transistor and a current source transistor, wherein the cathode of the photodiode of the photoelectric conversion circuit has the cathode of the first source follower circuit. The anode of the photodiode of the photoelectric conversion circuit is connected to the gate of the source follower transistor, and the anode of the photodiode is connected to the second source transistor. Connected to the gate of the current source transistor of the follower circuit, the cathode of the photodiode of the level generation unit is connected to the gate of the source follower transistor of the second source follower circuit, and the photodiode of the level generation unit Is connected to the gate of the current source transistor of the first source follower circuit, an optical signal is input to the photodiode of the photoelectric conversion unit, and the anode of the source follower transistor of the first source follower circuit is An opto-electrical conversion circuit wherein an output signal is taken out from a source, and a reference signal is taken out from a source of the source follower transistor of the second source follower circuit. 2. A photodiode, a first resistor connected between a cathode of the photodiode and a high-potential power supply terminal, and a second resistor connected between an anode of the photodiode and a low-potential power supply terminal. A photoelectric converter having a resistor, a third resistor connected in parallel to the photodiode, and a capacitor connected in parallel to the second resistor; and a configuration in which the capacitor is removed from the configuration of the photoelectric converter. And a differential amplifier having a pair of differentially connected transistors, wherein an anode of the photodiode of the photoelectric conversion unit is connected to a gate of one of the transistors of the differential connection, The cathode of the photodiode of the level generator is connected to the drain of one transistor, and the gate of the other transistor in the differential connection is connected to the gate of the other transistor. The anode of the photodiode of the bell generating unit is connected, the cathode of the photodiode of the photoelectric conversion unit is connected to the drain of the other transistor, and an optical signal is input to the photodiode of the photoelectric conversion unit. An output signal is extracted from a cathode of the photodiode of the photoelectric conversion unit, and a reference signal is extracted from a cathode of the photodiode of the level generation unit. 3. The photoelectric conversion circuit according to claim 1, wherein each of the transistors is a bipolar transistor.