JP2001184271A - Device and method for simulation of serial function, and recording medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To verify a serial function with a high working efficiency without considering a timing in which a serial function reads a signal. SOLUTION: A serial data part 105 describes serial classifications, communication protocol information, terminal information, and serial data necessary for constituting a virtual serial function in a serial signal preparing tool 104. The serial signal preparing tool 104 constitutes the virtual serial function corresponding to each serial function 103 on the basis of information described in the serial data part 105. The serial signal preparing tool 104 transmits a signal from the virtual serial function in response to a transmission request from the serial function 103, and receives the signal from the serial function 103. In this way, the serial function 103 is verified. The verified result of the serial function 103 is transmitted from an output processing part 107 to a result outputting part 108 and displayed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to, for example, an apparatus and method for simulating a serial function (communication function: the same applies hereinafter) included in a microcomputer and a computer-readable recording medium storing a program for realizing the same.

[0002]

2. Description of the Related Art FIG. 13 is a diagram showing a functional configuration of a general serial function simulation apparatus (simulator) and a flow of serial data in the prior art (hereinafter referred to as prior art 1). As shown
This simulation device has a plurality of serial functions 13
, An input processing unit 1304, and an output processing unit 1
306 and a simulator unit 1301 having the same.

The single-chip microcomputer function unit 1302 includes a program describing the functions of the single-chip microcomputer, and executes the programs to realize the functions of the single-chip microcomputer in a simulated manner. The serial function 1303 is
Similarly, the serial function included in the single-chip microcomputer is simulated by executing a program.

The input processing unit 1304 receives a terminal name of the serial function 1303 for inputting a signal, and data describing the value of the input signal and its time. The input processing unit 1304 transmits (inputs) the value of the signal to the serial function 1303 of the single-chip microcomputer function unit 1302 at the designated time. The output processing unit 1306 receives a signal transmitted to the serial function
It processes the signal transmitted (output) from C.03 and outputs it to the outside.

FIG. 14 is a flowchart showing a method for verifying a serial function in the prior art 1. First, a simulation device including the simulator unit 1301 is started (step 1401). Next, the serial function 130
Time to input signal to 3 and signal value (High or Low)
Is input to the input processing unit 1304 and set in advance (step 1402).

Next, the input processing unit 1304 selects a program of the serial function 1303 to be verified, and starts verification of the selected serial function 1303 (step 1403). Then, the selected serial function 1303 is operated for a certain period, and the resulting output signal is
Output from the output processing unit 1306 to the outside (step 1
404). Next, it is determined whether or not the selected serial function 1303 is performing an intended operation based on the content of the output signal (step 1405). If the intended operation has been performed, the verification of the serial function 1303 ends.

If the intended operation has not been performed, the contents of the program of the serial function 1303 to be verified are confirmed (step 1406). If an error is found in the program, the program is corrected and the serial function 1303 is verified again (step 140).
8). Then, similarly, the serial function 1303 is operated (step 1404).

On the other hand, when there is no mistake in the program, the time for transmitting the signal to the serial function 1303 is out of the time for reading the signal by the serial function 1303 one bit at a time.
It means that the intended signal has not been input from 304. Therefore, after correcting the signal input time and the signal value to the serial function 1303, the serial function 1
033 is verified (step 1407). Then, similarly, the serial function 1303 is operated (step 1404).

[0009]

In the prior art 1 described above, the above-described processing is repeated to sequentially verify (simulate) the serial function 1303 of the single-chip microcomputer unit 1302.
can do. However, the above-mentioned prior art 1
Had the following problems.

First, in the prior art 1, the verification could be performed only by the CPU alone. That is, even if a CPU has a plurality of serial functions, there is no serial function of another CPU that transmits and receives the serial functions. For this reason, for example, a serial function having a master state and a slave state is fully verified, for example, a CPU in a master reception state sends a signal to start transmission, and a CPU in a slave transmission state that receives the signal starts transmission. I couldn't.

In the prior art 1, the serial function 13
03 cannot read the signal one bit at a time, especially in the case of the asynchronous type. Therefore, the time for inputting a signal to the serial function 1303,
If the time for the serial function 1303 to read the signal one bit at a time does not match, the intended signal could not be input to the serial function 1303.

Further, for the same reason, in the prior art 1, there is a problem that a signal violating the communication protocol is intentionally input to the serial function 1303 and verification cannot be performed sufficiently.

Therefore, as a technique for solving these problems, there is an automatic test simulator for communication software described in Japanese Patent Application Laid-Open No. H10-65762 (hereinafter referred to as Conventional Technique 2). FIG. 15 is a block diagram illustrating a functional configuration of an automatic test simulator for communication software according to the conventional technique 2.

In the prior art 2, a transmitting unit 1501 first inputs a protocol type and a message to be transmitted from an input unit 1502, and sends a transmission information file 1503.
To be held. Next, the message editing unit 1504, based on the information held in the transmission information file 1503,
Template file 15 corresponding to protocol type
Generate a transmission message in a format conforming to 05. Then, the transmission message unit 1506 transmits the generated transmission message to the program under test 1507.

Next, the program under test 1507 issues a received message to the receiving unit 1508. Receiver 1
In 508, when the received message unit 1509 receives the received message, the message editing unit 1511 reads the expected reception value file 1510, and reads the template file 1512 corresponding to the type of the received protocol.
, A reception expectation value message is generated. Then, the edit output unit 1513 collates the actually received message with the generated expected expectation message, and displays the received message on the screen output unit 1515 according to the collation result.
And stored in the file output unit 1516.

As described above, in the prior art 2, it is possible to perform an operation confirmation test of a plurality of different communication protocols. However, in the prior art 2, since the transmission unit 1501 is only a single unit, if the single-chip microcomputer function 1302 has a plurality of serial functions 1303, the plurality of serial functions 1303 are simultaneously verified in parallel. There was a problem that it was not possible.
In addition, a serial function having a master state and a slave state cannot be sufficiently verified.

An object of the present invention is to provide a serial function simulation apparatus and method capable of verifying a serial function with high work efficiency without considering a timing at which the serial function reads signals, and a program for realizing the same. An object of the present invention is to provide a recorded recording medium.

It is another object of the present invention to provide a serial function simulation apparatus and method capable of verifying a communication protocol violation, and a recording medium storing a program for realizing the same.

Still another object of the present invention is to provide a serial function simulation apparatus and method capable of simultaneously simulating a plurality of serial functions, and a recording medium storing a program for realizing the same.

[0020]

In order to achieve the above object, a serial function simulation apparatus according to a first aspect of the present invention executes a program describing a serial function to be verified according to a transmitted signal. A serial function means for simulating the serial function by executing the program, and a virtual serial function including a signal to be transmitted to the serial function, and simulating the serial function to execute the serial function. Means for receiving a signal output from the means, and transmitting a signal included in a virtual serial function configured based on the received signal to the serial function, so as to simulate the serial function; The signal output by the simulated execution of the serial function by the serial function means is excluded. And an outputting process for outputting to.

In the above-described serial function simulation apparatus, the signal output by the simulated execution of the serial function by the serial function means includes a signal transmission request for the virtual serial function configured by the serial signal creation means. Is also good. In this case, the serial signal generation means may transmit a signal to the serial function in response to a transmission request for a signal output from the serial function means.

At this time, the serial signal creating means includes:
It is preferable that a signal is transmitted to the serial function one bit at a time in response to a transmission request for a signal output from the serial function means.

In the above-mentioned serial function simulation apparatus, there may be a plurality of serial functions to be verified. In this case, the serial signal generation means configures a plurality of virtual serial functions corresponding to each of the plurality of serial functions, and sequentially transmits signals from the plurality of virtual serial functions to the corresponding serial functions. be able to.

In the serial function simulation apparatus, the serial signal generating means can constitute a virtual serial function including a signal violating a communication protocol as a signal to be transmitted to the serial function. Means may be provided for determining a violation of the communication protocol based on a signal received from the means.

The serial function simulation apparatus may further include a serial data description unit that describes information necessary for the serial signal generation unit to configure the virtual serial function. In this case, the serial signal creation means can configure the virtual serial function according to the description of the serial data description means.

At this time, the serial signal generating means includes:
There may be provided a means for rewriting the description contents of the serial data description means in accordance with the serial function to be verified.

In the above-described simulation apparatus for serial functions, the serial signal generating means may constitute a plurality of virtual serial functions for one serial function. In this case, the signal output by the simulated execution of the serial function by the serial function means identifies the virtual serial function of the request destination together with the signal transmission request for the plurality of virtual serial functions configured by the serial signal creation means. Identifying information that
The serial signal generating means transmits, to the serial function, a signal included in the virtual serial function indicated by the identification information attached to the transmission request in response to a transmission request for a signal output from the serial function means. It can be.

In the serial function simulation apparatus, the serial signal generating means may include means for making a transmission interval of a signal to the serial function indefinite.

In the serial function simulation apparatus, the serial function realized by the serial function means by executing a program may be, for example, a serial function included in a single-chip microcomputer.

To achieve the above object, a serial function simulation method according to a second aspect of the present invention comprises:
A method of simulating a serial function for verifying the serial function by executing a program describing a serial function to be verified according to a transmitted signal, wherein the virtual serial function includes a signal to be transmitted to the serial function. A virtual serial function configuration step to configure, a signal reception step of receiving a signal output by executing a program describing the serial function, and, based on the signal received in the signal reception step,
A signal transmission step of transmitting a signal included in the virtual serial function configured in the virtual serial function configuration step to the serial function, and an output step of outputting a signal output by executing a program describing the serial function to the outside. It is characterized by including.

In the method for simulating a serial function, the signal output by executing the program describing the serial function includes a request for transmitting a signal to the virtual serial function configured in the virtual serial function configuration step. Is also good. In this case, the signal transmitting step may transmit a signal to the serial function one bit at a time in response to a transmission request included in the signal received in the signal receiving step.

In the method for simulating the serial function, the method may include a plurality of serial functions to be verified. In this case, the virtual serial function configuration step can configure a plurality of virtual serial functions corresponding to each of the plurality of serial functions, and the signal transmission step includes, for the configured virtual serial functions, Signals can be sequentially transmitted to corresponding serial functions.

In the above-described method for simulating a serial function, the virtual serial function configuring step may include configuring a virtual serial function including a signal violating a communication protocol as a signal transmitted to the serial function. In this case, the method may further include a violation determining step of determining a violation of a communication protocol based on the signal received in the signal receiving step.

In the above-described method for simulating a serial function, description of information necessary for configuring the virtual serial function in the virtual serial function configuration step is prepared prior to the configuration of virtual serial data in the virtual serial function configuration step. The method may further include an information description preparing step and an information rewriting step of rewriting the description content of the information prepared in the information description preparing step in accordance with the serial function to be verified.

In order to achieve the above object, a computer-readable recording medium according to a third aspect of the present invention comprises:
A computer-readable recording medium on which a program for verifying the serial function is recorded by executing a program describing a serial function to be verified in accordance with the transmitted signal. A virtual serial function configuration step for configuring a virtual serial function including a signal, a signal receiving step for receiving a signal output by executing a program describing the serial function, and a signal received in the signal receiving step, A signal transmission step of transmitting a signal included in the virtual serial function configured in the virtual serial function configuration step to the serial function, and an output step of outputting a signal output by executing a program describing the serial function to the outside. To run on a computer And characterized by recording a program.

In the above-mentioned recording medium, the signal output by executing the program describing the serial function may include a signal transmission request for the virtual serial function configured in the virtual serial function configuration step. In this case, the signal transmitting step may transmit a signal to the serial function one bit at a time in response to a transmission request included in the signal received in the signal receiving step.

In the computer readable recording medium, there may be a plurality of serial functions to be verified by executing the recorded program. in this case,
The virtual serial function configuration step may configure a plurality of virtual serial functions corresponding to each of the plurality of serial functions, and the signal transmission step sequentially corresponds to the configured virtual serial functions. Transmission of a signal to the serial function may be performed.

[0038] In the above-mentioned computer-readable recording medium, the virtual serial function configuration step may configure a virtual serial function including a signal violating a communication protocol as a signal transmitted to the serial function. In this case, the recording medium may store a program for causing a computer to further execute a violation determining step of determining a violation of a communication protocol based on the signal received in the signal receiving step.

The computer readable recording medium prepares a description of information necessary for configuring the virtual serial function in the virtual serial function configuration step prior to the configuration of the virtual serial data in the virtual serial function configuration step. A program for causing a computer to further execute an information description preparing step to perform, and an information rewriting step of rewriting the description content of the information prepared in the information description preparing step in accordance with the serial function to be verified. can do.

[0040]

Embodiments of the present invention will be described below with reference to the accompanying drawings.

[First Embodiment] FIG. 1 is a diagram showing the functional configuration of a serial function simulation apparatus (simulator) and the flow of serial data according to this embodiment. This serial function simulation device simulates a serial function included in a single-chip microcomputer.

This serial function simulation apparatus is realized by a general-purpose computer such as an engineering workstation that executes a software program. As shown in FIG. 1, a single chip having one or more serial functions 103 and a clock generation circuit unit 106 is provided.・
The simulator includes a microcomputer function unit 102, a serial signal creation tool 104, a simulator unit 101 including an output processing unit 107, a serial data unit 105, and a result output unit 108.

The single-chip microcomputer function unit 102 includes a program describing the functions of the single-chip microcomputer, and executes the program to realize the functions of the single-chip microcomputer in a simulated manner. The serial function 103 and the clock generation circuit unit 106 are respectively a serial function and a CPU included in a single-chip microcomputer.
Similarly, the function of the clock generation circuit for generating the operation clock (hereinafter referred to as CPU clock) is simulated by executing a program.

The serial signal creation tool 104, based on the information described in the serial data section 105,
A virtual serial function including a signal to be input to the. The serial signal creation tool 104 uses the serial function 1
A signal is transmitted from the virtual serial function in response to a transmission request from the serial function 103, and a signal from the serial function 103 is received. Thereby, the serial function 103 is simulated (verified). Details of the serial signal creation tool 104 will be described later.

The output processing unit 107 processes a signal transmitted (input) from the serial signal creation tool 104 to the serial function 103 and a signal transmitted (output) from the serial function 103 to the serial signal creation tool 104 and outputs the result. To the unit 108. The result output unit 108, for example,
It is composed of an RT (Cathode Ray Tube) display device,
The output signal supplied from the output processing unit 107 is displayed.

The serial data section 105 describes the serial type, communication protocol information, terminal information, serial data, and the like necessary for configuring the virtual serial function in the serial signal creation tool 104. The description of data in the serial data section 105 will be described later in detail.

FIG. 2 shows the serial signal creation tool 1 shown in FIG.
FIG. 4 is a block diagram showing a functional configuration of the information processing unit 04. As shown, the serial signal creation tool 104 includes an input unit 112
, A transmission determination unit 113, a transmission signal creation unit 114, a transmission unit 115, a reception unit 117, and a reception signal analysis unit 118
And an error message section 119. Cereal·
The data of the data unit 105 is input to the input unit 112,
The CPU clock of the clock generation circuit unit 106 is input to the transmission unit 115 and the reception unit 117.

The input section 112 is provided for the serial data section 10
The virtual serial function is configured in the serial signal creation tool 104 by inputting the information described in 5. The transmission determining unit 113 determines whether or not there is a serial function 103 to which a signal is to be transmitted among the configured virtual serial functions according to a transmission request (described later) from the serial function 103.

The transmission signal creation unit 114 receives a signal to be transmitted to the serial function 103 based on the serial type, communication protocol information, terminal information, and serial data of the information input to the input unit 112. Create
The transmission unit 115 receives the CP from the clock generation circuit unit 106.
An operation clock of the virtual serial function is generated based on the U clock, and the signal generated by the transmission signal generating unit 114 is transmitted to a target terminal of the serial function 103 according to the generated clock.

The receiving unit 117 includes the clock generation circuit unit 10
Serial function 103 based on CPU clock from 6
, And sends the sampling result to the received signal analyzing unit 118. Received signal analyzer 11
8 determines whether or not there is a violation of the communication protocol and whether or not a transmission request has been issued from the serial function 103 based on the sampling result of the transmission signal from the serial function 103.

The error message section 119 is used when the received signal analyzing section 118 determines that the communication protocol is violated.
The contents are passed to the output processing unit 107, and the result output unit 108
To display an error message. When determining that a transmission request has been issued from the serial function 103, the reception signal analysis unit 118 notifies the transmission determination unit 113 of the determination.

The operation of the serial function simulation apparatus according to this embodiment will be described below.

FIG. 3 is a flowchart showing a method for verifying a serial function in this embodiment. First, a simulation device including the simulator unit 101 is started (step 201). Next, for example, the input unit 112
The program of the serial function 103 to be verified is selected by input from the user (step 20).
2).

Next, the time for inputting a signal from the serial data section 105 to the serial function 103 and the signal value (High or Low) are input to the serial signal creation tool 104 and set, and the selected serial function 103 is set. Verification is started (step 203). Then, the serial signal creation tool 104 operates the selected serial function 103 for a certain period while transmitting and receiving signals as described later. The output signal of the operation result is output to the output processing unit 10.
7 and displayed on the result output unit 108 (step 204).

Next, it is determined whether or not the selected serial function 103 is performing an intended operation based on the content of the output signal (step 205). This determination may be made by the operator of the simulation apparatus according to the output signal of the result displayed on the result output unit 108, or may be made automatically by executing a predetermined program.

If the intended operation is not performed, the contents of the program of the serial function 103 to be verified are confirmed. If an error is found in the program, the program is corrected (step 207). After that, the serial function 103 is verified again. Then, the serial function 133 is operated similarly (step 20).
4). On the other hand, if the intended operation has been performed, the verification of the serial function 103 ends.

FIG. 4 is a flowchart showing the procedure for transmitting and receiving signals to and from the serial function 103 in the serial signal creation tool 104. In the processing of each step shown in this flowchart, step 301
And 302 are executed in step 203 of FIG. 3, and steps 303 to 315 are executed in step 204 of FIG.

First, information described in the serial data section 105 is input to the input section 112, and a virtual serial function is configured in the serial signal creation tool 104 (step 301). Then, the serial signal creation tool 104
Starts verification of the serial function 103 (step 3
02). Next, the transmission determination unit 113 first substitutes “1” for a variable n indicating the number of the virtual serial function to be operated in order to operate the virtual serial function 103 in order (step 303).

Next, if there is a terminal designated to oscillate the operation clock among the terminals of the virtual serial function indicated by the variable n, the transmitting unit 115 transmits the serial function 1 from that terminal.
The operation clock is transmitted to the corresponding terminal of the terminal 03 (step 304). Then, the transmission determining unit 113 determines whether the virtual serial function indicated by the variable n is in the transmission permission state (step 305).

If the virtual serial function indicated by the variable n is in the transmission-permitted state, the transmission signal creation unit 114 determines the transmission type according to the serial type, serial data and communication protocol information included in the information input from the serial data unit 105. Serial function 10 corresponding to virtual serial function
3 is created (step 305). Then, the transmitting unit 115 transmits the generated signal to the serial function 103 in accordance with the operation clock of the serial function 103 or the operation clock of the virtual serial function (step 306).

Further, the transmission judging section 113 judges whether or not there is serial data (referred to as a signal of one bit) not yet transmitted to the serial function 103 (step 311). If there is any serial data that has not been transmitted yet, the process directly proceeds to step 313.
If there is no serial data yet to be transmitted and all serial data has been transmitted, the transmission determination unit 11
3 sets the virtual serial function indicated by the variable n to the transmission non-permission state (step 312). Then, the process proceeds to step 313.

On the other hand, if the virtual serial function indicated by the variable n is not in the transmission permission state in step 305, the received signal analyzing unit 118 analyzes the serial data included in the signal received by the receiving unit 117 (step 308). It is determined whether a transmission request has been issued from the serial function 103 corresponding to the virtual serial function indicated by the variable n (step 309).

If a transmission request has been issued to the virtual serial function indicated by the variable n, the transmission judgment unit 113 sets the virtual serial function to a transmission permission state (step 310).
Then, the process proceeds to step 313. If a transmission request has not been issued to the virtual serial function indicated by the variable n, the process proceeds directly to step 313.

In step 313, the transmission judgment unit 113
Determines whether all virtual serial functions have transmitted / received signals to / from the corresponding serial function 103. If transmission / reception for all virtual serial functions has not been completed, the value of the variable n is incremented by "1" (step 314), and the process returns to step 304.

On the other hand, if the transmission / reception for all the virtual serial functions has been completed, the transmission determining unit 103 determines whether the verification of the serial function 103 has been completed (step 315). If the verification of the serial function 103 has not been completed, the process returns to step 303, where the value of the variable n is set to “1” again and the process is continued. On the other hand, when the verification of the serial function 103 ends, the processing of this flowchart ends.

FIG. 5 is a flowchart showing a processing procedure in received signal analyzing section 118. Steps 401 and 402 of the steps shown in this flowchart are:
Steps 405 and 406 are executed in step 308 of FIG. 4, and steps 309 and 3 of FIG.
10 and 10 respectively.

The reception signal analyzer 118 firstly receives the
17 obtains the result of sampling the received signal from the serial function 103 as binary data (step 401). Next, the received signal analysis unit 118 divides the obtained binary data into a serial data portion and a protocol signal portion according to the serial type of the virtual serial function designated in advance (step 402).

Next, the received signal analyzing section 118 determines whether or not the portion of the protocol signal separated in step 402 violates the communication protocol (step 403). If the communication protocol is violated, the received signal analyzing unit 118
9 is notified that there is a violation of the communication protocol and the content of the violation (step 404).

If the communication protocol has not been violated, or if the notification to the error message section 119 has been completed, the received signal analyzing section 118 proceeds to step 402.
In step 405, it is determined whether a transmission request from the virtual serial function to the serial function 103 has been issued in accordance with the portion of the serial data divided in step (405).

When a transmission request to serial function 103 has been issued, received signal analysis section 118 transmits to transmission determination section 11
3 is notified that a transmission request has been issued from the virtual serial function to the serial function 103 (step 40).
6). Then, the process of this flowchart ends.
On the other hand, when the transmission request to the serial function 103 has not been issued, the reception signal analysis unit 118 ends the processing of this flowchart as it is.

Hereinafter, description of data in serial data section 105 shown in FIGS. 1 and 2 will be described.

FIG. 6 is a diagram showing the description contents of the serial data section 105. The serial type item indicates the type of the serial function 103 corresponding to the virtual serial function, and is selected from the serial function types prepared in advance for the virtual serial function. The address item indicates an address number when the serial function in the master state selects the serial function in the slave state.

The protocol item is the serial function 103
Of the communication protocol, and varies depending on the serial function selected by the serial type. In the item of the communication protocol, whether or not to transmit as a signal can be selected. The item of the terminal indicates serial data transmitted by the virtual serial function to the terminal of the serial function 103 or an operation clock.

FIG. 7 is a diagram showing data storage in serial data section 105. No indicates the number of the virtual serial function. The item of type indicates the type of the serial function of the virtual serial function. The address item indicates an address number when the serial function in the master state selects the serial function in the slave state. In the case of a serial function in which no address is set, 00H is set.

The item of the protocol indicates a signal to be transmitted other than the serial data, and binary serial data is entered in the part of x. A hexadecimal number such as A may be entered in addition to 0, 1, and x, which is a value that varies depending on serial data. The item of the terminal indicates serial data transmitted by the virtual serial function to the terminal or an operation clock. The permission item indicates whether the virtual serial function may transmit a signal to the serial function 103. This value varies when a transmission request comes from the serial function or when there is no more serial data to be transmitted.

FIGS. 8A and 8B are diagrams showing conversion of the description contents of the serial data section 105 by changing the serial type. This description is converted by changing only the serial type of the serial data
, The input unit 112 automatically performs the contents of the serial data unit 105 according to the serial type. The details of the conversion are as follows.

Nothing is set in the address item in the case of a serial function without an address. In the case of a serial function having an address, a value obtained by adding "1" to the address of the currently set serial function is set. In the protocol item, the initial value of the serial function is set. In the terminal item, the settings of serial data and operation clock are inherited as they are. However, when changing to a serial function with a small number of terminals, data relating to the terminal is not set, and when the number of terminals increases, an initial value is set.

The serial function simulation apparatus according to the present embodiment has the above-described configuration and operation, and has the following effects.

First, as can be seen by comparing FIG. 3 and FIG. 14, the serial function simulation apparatus according to the present embodiment is conventionally required when the serial function 103 does not operate as intended. Serial function 1
There is no need for a procedure for changing the input time and value of the signal to 03. For this reason, work efficiency when verifying the serial function is increased. The reason is that the serial signal creation tool 10
No. 4 is because the signal is input one bit at a time to the serial function 103 according to the signal output from the serial function 103, so that it is not necessary to consider the time to read the signal from the serial function 103 as the data for verification. .

In the serial function simulation apparatus according to this embodiment, the CP in the master reception state is used.
U sends a signal to start transmission, and the CPU in the slave transmission state that receives the signal starts transmission.
A serial function having a master state and a slave state can be sufficiently verified. The reason is that the serial signal creation tool 104 appropriately returns a signal in response to a transmission request from the serial function 103.

Furthermore, in the serial function simulation apparatus according to this embodiment, when the single-chip microcomputer function unit 102 has a plurality of serial functions 103, a plurality of serial functions 103
Can be verified simultaneously. The reason is that a plurality of serial functions 103 and virtual serial functions are set so that signals can be transmitted and received between them.

Further, with the serial function simulation apparatus according to this embodiment, the operation of the serial function 103 that has received a signal violating the communication protocol can be verified. The reason is that a signal violating the communication protocol can be intentionally input to the serial function 103 from the virtual serial function.

Further, in the serial function simulation apparatus according to this embodiment, the serial function 103
The information described in the serial data unit 105 used for the verification of the serial data can be used for verifying other serial functions. The reason is serial signal creation tool 1
04 is because the information described in the serial data section 105 can be converted according to the serial function 103.

[Second Embodiment] In the above-described first embodiment, the virtual serial function configured by the serial signal creation tool 104 is singular. On the other hand, the serial function in the master state may include a plurality of serial functions in the slave state. Therefore, in the present embodiment, a configuration in which a plurality of virtual serial functions can be configured will be described.

FIG. 9 is a diagram showing a functional configuration of a serial function simulation apparatus (simulator) and a flow of serial data according to this embodiment. Here, the difference from the first embodiment (FIG. 1) lies in the virtual serial function configured by the serial signal creation tool 120.

In the serial signal creation tool 120, a plurality of virtual serial functions transmit / receive signals to / from one serial function 103. The serial function 103 transmits signals including addresses to a plurality of virtual serial functions, and selectively transmits and receives signals to and from the plurality of virtual serial functions.

FIG. 10 is a diagram showing the description contents of the serial data section 105 applied to this embodiment. As shown in the figure, the data of the virtual serial function 11 and the data of the virtual serial function 12 specify the same serial type, register, and terminal name, and specify different addresses in order to transmit and receive signals to and from the same serial function. I have.

The serial function 1 in the master state transmits address data together with signals to a plurality of virtual serial functions in the slave state. The virtual serial function whose address data matches the address data described in the serial data section 105 is designated as an object for transmitting and receiving signals to and from the serial function 1. The serial function 2 in the slave state receives address data together with signals from a plurality of virtual serial functions in the master state. When the address data matches the address data of the serial function 2, the virtual serial function that has received the address data is designated as a target for transmitting and receiving signals to and from the serial function 2.

In the serial function simulation apparatus according to this embodiment, the single-chip microcomputer function unit 102 has the above-described configuration, and a single master state serial function is replaced by a plurality of slave state serial functions. , The operation of the serial function 103 can be verified.

[Third Embodiment] In the first embodiment, the serial signal creation tool 101 transmits a signal from the virtual serial function at regular intervals in response to a transmission request from the serial function 103. Was. However,
Actually, noise is mixed in the transmission signal, and the interval between the signals may not be constant. Therefore, in the present embodiment, a serial function simulation apparatus that intentionally makes the interval between transmission signals indefinite and enables the operation of the serial function 103 at that time to be verified.

FIG. 11 is a block diagram showing a functional configuration of a serial signal creation tool applied in this embodiment. Here, the difference from the first embodiment (FIG. 2) is that a 1-bit transmission clock unit 130 is further provided, and the CPU clock generated by the clock generation circuit unit 106 is not a transmission unit 115 but a 1-bit transmission clock unit. This is input to the transmission clock unit 130. The configuration of the simulator unit 101 is the same as that of the first embodiment (FIG. 1).

The 1-bit transmission clock section 130 is a clock for transmitting a 1-bit signal from the virtual serial function to the serial function 103 based on the CPU clock from the clock generation circuit 106 of the single-chip microcomputer function section 102. Generate Transmission unit 115
Transmits a signal to a target terminal of the serial function unit 103 based on the clock generated by the 1-bit transmission clock unit 130.

FIG. 12 is a diagram showing the description contents of the serial data section 105 applied to this embodiment. The description here is the same as the description (FIG. 6) described in the first embodiment, except that the clock for transmitting the 1-bit signal by the transmitting unit 115, the method of describing the serial data at the terminal 1, and the like. Has been added.

The clock for transmitting the 1-bit signal by the transmitting unit 115 is the operation clock of the serial signal creation tool 104. In this example, the CPU clock is 1M.
Hz, and a clock for transmitting the 1-bit signal by the transmission unit 115 is 2 MHz.

The serial data of the terminal 1 is described in a binary number including a protocol signal. here,
Since the operation clock of the serial signal creation tool is 2 MHz, the length of the signal described in the binary number is doubled in order to transmit the signal in accordance with the CPU clock of 1 MHz. At this time, for example, the signal “1100110”
By describing “0” as “11101000”, the interval between signals transmitted from transmitting section 115 can be made indefinite.

In the serial function simulation apparatus according to the present embodiment, the operation of the serial function 103 can be verified by setting the interval of signals to be transmitted indefinitely by the above configuration.

[Modifications of Embodiment] The present invention is not limited to the above-described first to third embodiments, and various modifications and applications are possible. Hereinafter, modifications of the above-described embodiment applicable to the present invention will be described.

In the first to third embodiments, the data described in the serial data unit 105 is input to the input unit 1
12 and the serial signal creation tool 104
In advance. However,
Of the data described in the serial data section 105,
Necessary items may be selected and sequentially input to the input unit 112.

In the first to third embodiments, the simulation device for the serial function, more specifically, each function of the simulator unit 101 is implemented by executing a software program by a general-purpose computer such as an engineering workstation. Was to be realized.
However, even if a part thereof is realized by hardware configured by logical connection, the same result as in the above-described first to third embodiments can be obtained.

In the first to third embodiments, the simulation device for the serial function, more specifically, each function of the simulator unit 101 executes the program shown in the flowcharts shown in FIGS. For example, it is realized by a general-purpose computer such as an engineering workstation.

A program for realizing such a function may be provided by being stored in a computer-readable recording medium such as a CD-ROM or a DVD-ROM.
Alternatively, the data may be stored in a fixed disk device of the server device and provided to the client device through a network such as a WAN or a LAN. In this case, the provided program may implement only the functions of the serial signal creation tool 104, which are not available in the related art.

[0102]

As described above, according to the present invention,
There is no need to consider the timing at which the serial function reads signals, and the work efficiency in verifying the serial function can be increased.

Further, it is possible to verify a communication protocol violation and to simulate a plurality of serial functions at the same time.

[Brief description of the drawings]

FIG. 1 is a diagram showing a functional configuration of a serial function simulation device (simulator) and a flow of serial data according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a functional configuration of a serial signal creation tool of FIG. 1;

FIG. 3 is a flowchart illustrating a serial function verification method in a serial function simulation apparatus (simulator) according to the first embodiment of the present invention.

FIG. 4 is a flowchart showing a processing procedure in the serial signal creation tool of FIGS. 1 and 2;

FIG. 5 is a flowchart illustrating a processing procedure in a received signal analysis unit in FIG. 2;

FIG. 6 is a diagram showing description contents of a serial data part in FIGS. 1 and 2;

FIG. 7 is a diagram showing storage of data in a serial data section of FIGS. 1 and 2;

FIGS. 8A and 8B are diagrams showing conversion of description contents of a serial data portion by changing a serial type.

FIG. 9 is a diagram showing a functional configuration of a serial function simulation apparatus (simulator) and a flow of serial data according to a second embodiment of the present invention.

FIG. 10 is a diagram showing a description content of a serial data portion applied in the second embodiment of the present invention.

FIG. 11 is a block diagram showing a functional configuration of a serial signal creation tool applied in a third embodiment of the present invention.

FIG. 12 is a diagram showing a description content of a serial data portion applied in the third embodiment of the present invention.

FIG. 13 is a diagram showing a functional configuration and a flow of serial data of a simulation device (simulator) for a serial function according to Prior Art 1.

FIG. 14 is a diagram showing a serial function verification method in a serial function simulation device (simulator) according to Prior Art 1.

FIG. 15 is a diagram showing a functional configuration of an automatic test simulator for communication software according to the related art 2.

[Description of Signs] 101 Simulator section 102 Single-chip microcomputer function section 103 Serial function 104 Serial signal creation tool 105 Serial data section 106 Clock generation circuit section 107 Output processing section 108 Result output section 112 Input section 113 Transmission judgment section 114 Transmission signal creation section 115 Transmission section 117 Receiving section 118 Received signal analysis section 119 Error message section 120 Serial signal creation tool 130 1-bit transmission clock section

Claims (20)

[Claims] 1. A serial function means for executing a program describing a serial function to be verified according to a transmitted signal, and simulating the serial function by executing the program, and transmitting the serial function to the serial function. A virtual serial function including the signal of the above, while receiving the signal output from the serial function means by simulated execution of the serial function, the signal included in the virtual serial function configured based on the received signal A serial signal generating unit that simulates the serial function by transmitting to the serial function, and an output processing unit that externally outputs a signal output by the simulated execution of the serial function by the serial function unit. A simulation device for a serial function, comprising: 2. A signal output by simulated execution of a serial function by the serial function means includes a signal transmission request for a virtual serial function configured by the serial signal creation means, wherein the serial signal creation means includes: 2. The serial function simulation apparatus according to claim 1, wherein a signal is transmitted to the serial function in response to a transmission request for a signal output from the serial function means. 3. The serial signal generating means responds to a request for transmission of a signal output from the serial function means,
The serial function simulation apparatus according to claim 2, wherein a signal is transmitted to the serial function one bit at a time. 4. A serial function to be verified includes a plurality of serial functions. The serial signal creating means constitutes a plurality of virtual serial functions corresponding to the plurality of serial functions, respectively, and the serial function corresponding to the plurality of virtual serial functions. The serial function simulation apparatus according to claim 1, wherein signals are sequentially transmitted to the serial function. 5. The serial signal generating means can configure a virtual serial function including a signal violating a communication protocol as a signal to be transmitted to the serial function, and generate a signal received from the serial function means. The apparatus for simulating a serial function according to any one of claims 1 to 4, further comprising: means for determining a violation of a communication protocol based on the serial function. 6. The serial signal creating means further comprises serial data description means describing information necessary for configuring a virtual serial function, wherein the serial signal creation means is adapted to write the serial data according to the description of the serial data description means. The apparatus for simulating a serial function according to claim 1, wherein the apparatus comprises a virtual serial function. 7. The serial function simulation according to claim 6, wherein said serial signal generating means has means for rewriting the description content of said serial data description means in accordance with the serial function to be verified. apparatus. 8. The serial signal creating means constitutes a plurality of virtual serial functions for one serial function, and a signal output by the serial function means simulating execution of the serial function is the serial signal. A request for transmitting a signal to the plurality of virtual serial functions configured by the generating means and identification information for identifying the virtual serial function of the request destination are included, and the serial signal generating means includes a request for transmitting a signal output from the serial function means. 8. The serial function according to claim 1, wherein a signal included in the virtual serial function indicated by the identification information attached to the transmission request is transmitted to the serial function in response to the request. Simulation equipment. 9. A simulation of a serial function according to claim 1, wherein said serial signal generating means includes means for making a transmission interval of a signal to said serial function undefined. apparatus. 10. The serial function realized by the serial function means by executing a program is a single-chip serial function.
The serial function simulation apparatus according to claim 1, wherein the serial function is included in a microcomputer. 11. A method of simulating a serial function for verifying a serial function by executing a program describing a serial function to be verified in accordance with a transmitted signal, the method comprising: transmitting a signal to be transmitted to the serial function. A virtual serial function configuring step including configuring a virtual serial function, a signal receiving step of receiving a signal output by executing a program describing the serial function, and a virtual serial function based on the signal received in the signal receiving step. A signal transmission step of transmitting a signal included in the virtual serial function configured in the serial function configuration step to the serial function, and an output step of outputting a signal output by executing a program describing the serial function to the outside Simulation of serial function characterized by Method. 12. A signal output by execution of the program describing the serial function includes a request to transmit a signal to the virtual serial function configured in the virtual serial function configuration step, and the signal transmitting step includes receiving the signal. 12. The serial function simulation method according to claim 11, wherein a signal is transmitted to the serial function one bit at a time in response to a transmission request included in the signal received in the step. 13. A serial function to be verified in the method includes a plurality of serial functions, the virtual serial function configuring step configures a plurality of virtual serial functions corresponding to each of the plurality of serial functions, and the signal transmitting step includes: 13. The serial function simulation method according to claim 11, wherein signals are sequentially transmitted to the serial functions corresponding to the plurality of virtual serial functions configured. 14. The virtual serial function configuration step,
Configuring a virtual serial function including a signal that violates a communication protocol as a signal to be transmitted to the serial function, wherein the method includes a violation determining step of determining a violation of a communication protocol based on the signal received in the signal receiving step. 14. The method according to claim 11, further comprising:
The method for simulating a serial function according to any one of the preceding claims. 15. A description of information necessary for configuring a virtual serial function in the virtual serial function configuration step,
An information description preparation step for preparing prior to the configuration of virtual serial data in the virtual serial function configuration step; and an information rewriting step for rewriting the description content of the information prepared in the information description preparation step in accordance with the serial function to be verified. The method for simulating a serial function according to claim 11, further comprising: 16. A computer-readable recording medium having recorded thereon a program for verifying a serial function to be verified by executing a program describing a serial function to be verified in accordance with a transmitted signal. A virtual serial function configuration step of configuring a virtual serial function including a signal to be transmitted to, a signal reception step of receiving a signal output by executing a program describing the serial function, and a signal reception step of receiving the signal. A signal transmitting step of transmitting a signal included in the virtual serial function configured in the virtual serial function configuring step to the serial function based on the signal; and outputting a signal output by executing a program describing the serial function to the outside. Output steps to the computer A computer-readable recording medium having recorded thereon a program to be executed. 17. A signal output by execution of the program describing the serial function includes a request to transmit a signal to the virtual serial function configured in the virtual serial function configuration step, and the signal transmitting step includes receiving the signal. 17. The computer-readable recording medium according to claim 16, wherein a signal is transmitted to the serial function bit by bit in response to a transmission request included in the signal received in the step. 18. The method according to claim 18, wherein the method includes a plurality of serial functions to be verified, wherein the virtual serial function configuring step configures a plurality of virtual serial functions corresponding to each of the plurality of serial functions, and the signal transmitting step includes: 18. The computer-readable recording medium according to claim 16, wherein signals are sequentially transmitted to the serial functions corresponding to the plurality of virtual serial functions configured. 19. The virtual serial function configuration step,
A virtual serial function including a signal violating a communication protocol is configured as a signal transmitted to the serial function, and a violation determining step of determining a violation of the communication protocol based on the signal received in the signal receiving step is further performed by the computer. 19. The computer-readable recording medium according to claim 16, wherein a program for executing the program is recorded. 20. A description of information necessary for configuring a virtual serial function in the virtual serial function configuration step,
An information description preparation step for preparing prior to the configuration of virtual serial data in the virtual serial function configuration step; and an information rewriting step for rewriting the description content of the information prepared in the information description preparation step in accordance with the serial function to be verified. 20. The computer-readable recording medium according to claim 16, further comprising a program for causing a computer to execute the following.