JP2001177053A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP2001177053A JP2001177053A JP35676499A JP35676499A JP2001177053A JP 2001177053 A JP2001177053 A JP 2001177053A JP 35676499 A JP35676499 A JP 35676499A JP 35676499 A JP35676499 A JP 35676499A JP 2001177053 A JP2001177053 A JP 2001177053A
- Authority
- JP
- Japan
- Prior art keywords
- insulating substrate
- semiconductor device
- heat sink
- insulating film
- copper plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体素子を取り
付けた絶縁基板の破壊電圧を上昇させ信頼性の高い半導
体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a highly reliable semiconductor device which increases a breakdown voltage of an insulating substrate on which a semiconductor element is mounted.
【０００２】[0002]
【従来の技術】従来の半導体装置について、図７を用い
て説明する。図７において、複数のパワーチップ素子を
搭載したパワートランジスタモジュールなどは、絶縁基
板１に銅板２を付けその上に半導体素子３を取り付けリ
ード線４で結んでいる。絶縁基板は金属製の放熱板５に
取り付けられ、ケース６で囲われる。外部端子用リード
線７のついたターミナルホルダー８を取り付けシリコー
ンゲル９を流し込み硬化させ封止部材１０で密封する。2. Description of the Related Art A conventional semiconductor device will be described with reference to FIG. In FIG. 7, a power transistor module or the like having a plurality of power chip elements mounted thereon has a copper plate 2 on an insulating substrate 1, a semiconductor element 3 mounted thereon, and connected by lead wires 4. The insulating substrate is attached to a metal heat sink 5 and is surrounded by a case 6. A terminal holder 8 having an external terminal lead wire 7 is attached, a silicone gel 9 is poured thereinto, hardened, and sealed with a sealing member 10.
【０００３】[0003]
【発明が解決しようとする課題】従来の半導体装置で
は、シリコーンゲルを使用しているが、シリコーンゲル
は通常の固体絶縁物に比べ破壊電圧が低い欠点がある。
半導体素子３を取り付けた絶縁基板１は、全体がそのま
ま金属による放熱板５の上に配置されている。この時の
電位分布を図５に示す。等電位線１４は銅板２の上側を
高電圧に、銅板２の下側と放熱板５を接地電圧とし、そ
の間を１９等分したものである。図７に示した半導体装
置で絶縁破壊をすると、破壊経路１５は銅板の上側から
絶縁基板１とシリコーンゲル９の間に沿って進展するが
絶縁基板の側面の途中から絶縁基板から離れ、放熱板５
に直接進展する。これは、電界の方向（等電位線と直角
方向）に進展しやすいこととシリコーンゲルの絶縁強度
が低いことによる。一方、放熱板の無い半導体装置で
は、破壊経路１５が全路が絶縁基板に沿って進展する。
図６において、銅板と絶縁基板の端までの距離が１ｍ
ｍ、絶縁基板の厚さが１ｍｍの時の破壊電圧は約１７ｋ
Ｖである。しかし、放熱板に取付けると破壊電圧は約２
５％低下する欠点がある。そこで、本発明は、絶縁基板
の沿面の破壊電圧を上昇させ、信頼性の高い半導体装置
を提供することを目的とする。In a conventional semiconductor device, a silicone gel is used, but the silicone gel has a drawback that the breakdown voltage is lower than that of a normal solid insulator.
The insulating substrate 1 on which the semiconductor element 3 is mounted is entirely disposed on a heat radiating plate 5 made of metal. FIG. 5 shows the potential distribution at this time. The equipotential lines 14 are obtained by dividing the upper side of the copper plate 2 into a high voltage, the lower side of the copper plate 2 and the radiator plate 5 by a ground voltage, and divide the distance between them into 19 equal parts. When dielectric breakdown occurs in the semiconductor device shown in FIG. 7, the breakdown path 15 extends along the space between the insulating substrate 1 and the silicone gel 9 from the upper side of the copper plate. 5
Progress directly to This is because the silicone gel easily develops in the direction of the electric field (perpendicular to the equipotential lines) and the insulation strength of the silicone gel is low. On the other hand, in a semiconductor device without a heat sink, the entire destruction path 15 extends along the insulating substrate.
In FIG. 6, the distance between the copper plate and the edge of the insulating substrate is 1 m.
m, breakdown voltage when insulating substrate thickness is 1mm is about 17k
V. However, when mounted on a heat sink, the breakdown voltage is about 2
There is a disadvantage of 5% reduction. Therefore, an object of the present invention is to provide a highly reliable semiconductor device by increasing the breakdown voltage on the surface of an insulating substrate.
【０００４】[0004]
【課題を解決するための手段】上記目的を達成するため
に、請求項１記載の発明は、絶縁基板の上に銅板を付け
その上に半導体素子を配置した半導体装置において、上
記絶縁基板端部の下部の位置で溝を形成した放熱板を備
えたことを特徴とする。請求項２記載の発明は、絶縁基
板の上に銅板を付けその銅板の上に半導体素子を配置し
た半導体装置において、上記絶縁基板の下部に樹脂をコ
ーティングした放熱板を備えたことを特徴とする。ま
た、請求項３記載の発明は、絶縁基板の上に銅板を付け
その上に半導体素子を配置した半導体装置において、上
記絶縁基板の下部に設けられた放熱板と、上記絶縁基板
の端部の下部と前記放熱板の間に設けられた樹脂の薄板
とを備えたことを特徴とする。更に、請求項４記載の発
明は、絶縁基板の上に銅板を付けその上に半導体素子を
配置した半導体装置において、上記絶縁基板の下部に設
けられた放熱板と、上記絶縁基板の端部の下部と上記放
熱板の間に設けられた絶縁フィルムとを備えたことを特
徴とする。また更に、請求項５記載の発明は、放熱板に
形成された溝に樹脂を埋めるか或いは盛り上げることを
特徴とする。According to a first aspect of the present invention, there is provided a semiconductor device in which a copper plate is provided on an insulating substrate and a semiconductor element is disposed thereon. And a heat radiating plate having a groove formed at a lower position of the heat sink. According to a second aspect of the present invention, there is provided a semiconductor device in which a copper plate is provided on an insulating substrate and a semiconductor element is disposed on the copper plate, wherein a heat radiating plate coated with resin is provided below the insulating substrate. . According to a third aspect of the present invention, in a semiconductor device in which a copper plate is provided on an insulating substrate and a semiconductor element is disposed thereon, a heat radiating plate provided below the insulating substrate and an end portion of the insulating substrate are provided. It is characterized by comprising a resin thin plate provided between the lower part and the heat sink. Further, the invention according to claim 4 is a semiconductor device in which a copper plate is provided on an insulating substrate and a semiconductor element is disposed thereon, wherein a heat radiating plate provided below the insulating substrate and an end portion of the insulating substrate are provided. An insulating film provided between the lower part and the heat sink is provided. Still further, the invention according to claim 5 is characterized in that a resin is filled or raised in a groove formed in a heat sink.
【０００５】請求項６記載の発明は、放熱板に形成され
た溝を絶縁フィルムの形状に合わせた形状にして絶縁フ
ィルムを取付け固定できるようにしたことを特徴とす
る。また、請求項７記載の発明は、絶縁フィルムは、絶
縁基板端部の下部と放熱板の間に距離の半分の厚さを有
し、上記絶縁基板の辺に４ヶ所配置し、上記絶縁基板の
角で重ね合わせ固定されたことを特徴とする。更に、請
求項８記載の発明は、絶縁フィルムを樹脂を併用して固
定することを特徴とする。また更に、請求項９記載の発
明は、樹脂或いは前記絶縁フィルムをＬ字型にしたこと
を特徴とする。請求項１０記載の発明は、絶縁フィルム
或いは樹脂等の放熱板接触部分に導電性か半導電性材料
を付けたことを特徴とする。請求項１１記載の発明は、
絶縁基板端部と放熱板の距離を長くするために銅板の下
部と放熱板の接着に厚肉ハンダを用いたことを特徴とす
る。The invention according to claim 6 is characterized in that the groove formed in the heat sink is shaped to match the shape of the insulating film so that the insulating film can be attached and fixed. According to a seventh aspect of the present invention, the insulating film has a thickness of a half of a distance between a lower portion of an end portion of the insulating substrate and the heat sink, and is disposed at four places on a side of the insulating substrate. It is characterized by being overlapped and fixed. Further, the invention according to claim 8 is characterized in that the insulating film is fixed using a resin together. Further, the invention according to claim 9 is characterized in that the resin or the insulating film is L-shaped. The invention according to claim 10 is characterized in that a conductive or semiconductive material is attached to a contact portion of a heat sink such as an insulating film or a resin. The invention according to claim 11 is
In order to increase the distance between the end of the insulating substrate and the heat sink, a thick solder is used for bonding the lower part of the copper plate and the heat sink.
【０００６】[0006]
【発明の実施の形態】以下、本発明の実施の形態につい
て、図面を用いて説明する。 （第１の実施の形態）本発明の第1の実施の形態につい
て、図1を用いて説明する。図１に示すように、本実施
の形態は、絶縁基板１に銅板２を付け、この銅板２の上
に半導体素子３を取り付け、半導体素子間をリード線４
で接続している。絶縁基板１は、金属製の放熱板５に取
り付けられ、外囲器（ケース）６で囲われる。そして、
外部端子用リード線７のついたターミナルホルダー８を
取り付け、シリコーンゲル９を流し込み硬化させ封止部
材１０で密封する。更に、絶縁基板１の端部の下部に位
置する場所に対応する放熱板５の部位に溝１１を形成す
る。尚、絶縁基板１には熱伝導性の良い窒化アルミニウ
ムが使用されている。このように構成された本実施の形
態においては、以下のように作用する。沿面放電は、２
種類の絶縁物の界面で放電が進展しやすいことがわかっ
ている。また、絶縁物の絶縁強度が弱いと電界方向（等
電位線に垂直方向）に進展する。従って、図１に示すよ
うに、絶縁基板１の周辺部分にシリコーンゲル９が充填
されていると、絶縁基板１の上面では電界は絶縁基板１
内部に向かう方向であるが、絶縁基板１の絶縁強度はシ
リコーンゲル９よりはるかに高いため、絶縁基板１の表
面に沿って放電は進展する。Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) A first embodiment of the present invention will be described with reference to FIG. As shown in FIG. 1, in the present embodiment, a copper plate 2 is attached to an insulating substrate 1, a semiconductor element 3 is mounted on the copper plate 2, and a lead wire 4 is provided between the semiconductor elements.
Connected with. The insulating substrate 1 is attached to a metal radiator plate 5 and is surrounded by an envelope (case) 6. And
A terminal holder 8 having an external terminal lead wire 7 is attached, a silicone gel 9 is poured into the terminal holder 8 and the mixture is hardened and sealed with a sealing member 10. Further, a groove 11 is formed in a portion of the heat radiating plate 5 corresponding to a position located below an end of the insulating substrate 1. The insulating substrate 1 is made of aluminum nitride having good thermal conductivity. The present embodiment configured as above operates as follows. Creepage discharge is 2
It has been found that discharge easily develops at the interface between different types of insulators. Further, if the insulation strength of the insulator is weak, it progresses in the direction of the electric field (perpendicular to the equipotential lines). Therefore, as shown in FIG. 1, when the peripheral portion of the insulating substrate 1 is filled with the silicone gel 9, an electric field is generated on the upper surface of the insulating substrate 1.
Although the direction is toward the inside, since the insulating strength of the insulating substrate 1 is much higher than that of the silicone gel 9, the discharge proceeds along the surface of the insulating substrate 1.
【０００７】しかし、絶縁基板１の側面では電界は絶縁
基板１から離れていく方向になっている。このため、放
電は、下部の銅板２の方向ではなく、図５のように絶縁
距離の短い放熱板５の方向に向かっていく。ところが、
放電の進展方向の放熱板５に溝１１を取付けると、放熱
板５までの絶縁距離が長くなり、放電の進展しにくくな
り破壊電圧は上昇する。さらに、長くすると、下部の銅
板２の方向に放電は進展するようになり、放熱板５の無
い状態での破壊電圧に近くなる。このように絶縁基板１
の側面から放熱板５に進展する放電を防止することによ
り破壊電圧を上昇させることができる。従って、絶縁基
板１の側面から放熱板５までの絶縁距離を長くすること
により、破壊電圧を上昇させる。溝１１の幅と深さは絶
縁基板１の側面の下の端を中心にここから下部銅板２ま
での距離の半径以上であることが望ましいが、これ以下
であっても効果はある。溝１１の角はバリがなく、でき
るだけ丸い方がよい。 （第２の実施の形態）次に、本発明の第２の実施の形態
について、図２を用いて説明する。図２に示すように、
本実施の形態は、第１の実施の形態の溝１１を角形にし
てここに絶縁フィルム１２を固定したことを特徴とす
る。However, on the side surface of the insulating substrate 1, the electric field is directed away from the insulating substrate 1. Therefore, the discharge is not directed to the lower copper plate 2 but to the heat radiating plate 5 having a short insulation distance as shown in FIG. However,
When the groove 11 is attached to the heat radiating plate 5 in the direction of the progress of the discharge, the insulation distance to the heat radiating plate 5 becomes longer, the progress of the discharge becomes difficult, and the breakdown voltage increases. If the length is further increased, the discharge proceeds in the direction of the lower copper plate 2, and becomes close to the breakdown voltage without the heat sink 5. Thus, the insulating substrate 1
The breakdown voltage can be increased by preventing discharge from spreading to the heat sink 5 from the side surface of the substrate. Therefore, the breakdown voltage is increased by increasing the insulation distance from the side surface of the insulating substrate 1 to the heat sink 5. It is desirable that the width and depth of the groove 11 be equal to or greater than the radius of the distance from the lower end of the side surface of the insulating substrate 1 to the lower copper plate 2. It is preferable that the corners of the groove 11 have no burrs and are as round as possible. (Second Embodiment) Next, a second embodiment of the present invention will be described with reference to FIG. As shown in FIG.
The present embodiment is characterized in that the groove 11 of the first embodiment is square and the insulating film 12 is fixed here.
【０００８】これにより、絶縁距離を長くするだけでな
く、シリコーンゲル９より破壊強度の高い絶縁フィルム
１２を設置することにより、溝１１が浅くても効果があ
るようにしたものである。第１の実施の形態より溝１１
は浅くても良いが、幅は同等以上が望ましい。また、絶
縁フィルム１１の代わりに樹脂を充填したり樹脂の薄板
を設けても良い。更に、絶縁フィルム或いは樹脂等の放
熱板接触部分に導電性か半導電性材料を付けても良い。
従って、放熱板５の上にシリコーンゲル９より絶縁強度
の強い絶縁フィルム１１或いは樹脂を配置することによ
り、放熱板５に進展する破壊を防止することができる。
また、絶縁フィルム或いは樹脂等の放熱板接触部分に導
電性か半導電性材料を付けることで、より一層放熱板５
に進展する破壊を防止することができる。 （第３の実施の形態）次に、本発明の第３の実施の形態
について、図３を用いて説明する。図３に示すように、
本実施の形態は、溝を形成せずにシリコーンゲルより絶
縁強度の高い絶縁フィルム１３を絶縁基板１である窒化
アルミニウムの外周部にあたる位置に対応する放熱板５
上に設けている。従って、本実施の形態においては、放
熱板５に進展する破壊を防止することができると共に、
放熱板５の加工をする必要がないため、容易に実施でき
る。Thus, not only is the insulating distance increased, but the insulating film 12 having a higher breaking strength than the silicone gel 9 is provided, so that the effect can be obtained even when the groove 11 is shallow. Groove 11 according to the first embodiment
May be shallow, but the width is desirably equal or greater. Further, instead of the insulating film 11, resin may be filled or a thin plate of resin may be provided. Further, a conductive or semiconductive material may be attached to a contact portion of the heat sink such as an insulating film or a resin.
Therefore, by arranging the insulating film 11 or the resin having a higher insulating strength than the silicone gel 9 on the heat sink 5, it is possible to prevent the heat spreader 5 from breaking down.
Further, by attaching a conductive or semi-conductive material to a contact portion of the heat sink such as an insulating film or a resin, the heat sink 5 can be further improved.
Can be prevented from breaking down. Third Embodiment Next, a third embodiment of the present invention will be described with reference to FIG. As shown in FIG.
In the present embodiment, the heat dissipation plate 5 corresponding to the position corresponding to the outer peripheral portion of the aluminum nitride as the insulating substrate 1 is formed by forming the insulating film 13 having higher insulating strength than the silicone gel without forming the groove.
It is provided above. Therefore, in the present embodiment, it is possible to prevent the destruction that progresses to the heat sink 5 and
Since it is not necessary to process the heat radiating plate 5, it can be easily implemented.
【０００９】（第４の実施の形態）次に、本発明の第４
の実施の形態について、図４を用いて説明する。図４に
示すように、本実施の形態は、第３の実施の形態の変形
例であり、絶縁フィルム１４の端をＬ字型にすることに
より絶縁フィルム１４の幅を小さくしたものである。
尚、第２乃至第４の実施の形態において、絶縁フィルム
或いは樹脂の材料としては、絶縁基板の温度が１００〜
１２０℃に上昇するため、耐熱性がこれ以上でシリコー
ンゲルより絶縁強度が強い材料であればよい。一例とし
てエポキシ樹脂、不飽和ポリエステル樹脂、メラニン樹
脂、シリコーン樹脂等がある。絶縁フィルムとしてはポ
リエチレンテレフタレート、ポリエチレンナフタレー
ト、ポリイミド、ポリアミドイミド、テフロン等があ
る。無機材料としてはマイカ、窒化アルミニウム等のセ
ラミックがある。(Fourth Embodiment) Next, a fourth embodiment of the present invention will be described.
The embodiment will be described with reference to FIG. As shown in FIG. 4, the present embodiment is a modification of the third embodiment, in which the width of the insulating film 14 is reduced by making the end of the insulating film 14 L-shaped.
In the second to fourth embodiments, as the material of the insulating film or the resin, the temperature of the insulating substrate is 100 to 100.
Since the temperature rises to 120 ° C., any material may be used as long as the material has higher heat resistance and higher insulation strength than silicone gel. Examples include epoxy resins, unsaturated polyester resins, melanin resins, silicone resins, and the like. Examples of the insulating film include polyethylene terephthalate, polyethylene naphthalate, polyimide, polyamide imide, and Teflon. Examples of the inorganic material include ceramics such as mica and aluminum nitride.
【００１０】[0010]
【発明の効果】以上述べたように、本発明によれば、絶
縁基板の沿面の破壊電圧を上昇させ、信頼性の高い半導
体装置を提供することができる。As described above, according to the present invention, a high reliability semiconductor device can be provided by increasing the breakdown voltage on the surface of an insulating substrate.
【図１】 本発明の第１の実施の形態を示す断面図。FIG. 1 is a sectional view showing a first embodiment of the present invention.
【図２】 本発明の第２の実施の形態を示す断面図。FIG. 2 is a sectional view showing a second embodiment of the present invention.
【図３】 本発明の第３の実施の形態を示す断面図。FIG. 3 is a sectional view showing a third embodiment of the present invention.
【図４】 本発明の第４の実施の形態を示す断面図。FIG. 4 is a sectional view showing a fourth embodiment of the present invention.
【図５】 半導体装置における実際の電位分布と破壊経
路を示す断面図。FIG. 5 is a cross-sectional view illustrating an actual potential distribution and a breakdown path in a semiconductor device.
【図６】 半導体装置の放熱板が無いときの電位分布と
破壊経路を示す断面図。FIG. 6 is a cross-sectional view illustrating a potential distribution and a destruction path when a heat sink of a semiconductor device is not provided.
【図７】 従来の半導体装置を示す断面図。FIG. 7 is a cross-sectional view illustrating a conventional semiconductor device.
１…絶縁基板、２…銅板、３…半導体素子、４…リード
線、５…放熱板、６…外囲器（ケース）、７…外部接続
用リード線、８…ターミナルホルダー ９…シリコーンゲル、１０…封止部材、１１…溝、１
２，１３…絶縁フィルム、１４…Ｌ型絶縁フィルムDESCRIPTION OF SYMBOLS 1 ... Insulating board, 2 ... Copper plate, 3 ... Semiconductor element, 4 ... Lead wire, 5 ... Heat sink, 6 ... Enclosure (case), 7 ... Lead wire for external connection, 8 ... Terminal holder 9 ... Silicone gel, 10 sealing member, 11 groove, 1
2, 13 ... insulating film, 14 ... L-type insulating film
───────────────────────────────────────────────────── フロントページの続き (72)発明者 清水 敏夫 東京都港区芝浦一丁目１番１号 株式会社 東芝本社事務所内 (72)発明者 木島 研二 東京都港区芝浦一丁目１番１号 株式会社 東芝本社事務所内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Toshio Shimizu 1-1-1, Shibaura, Minato-ku, Tokyo Inside Toshiba Corporation Head Office (72) Inventor Kenji Kijima 1-1-1, Shibaura, Minato-ku, Tokyo Stock Company Toshiba head office
Claims (11)
体素子を配置した半導体装置において、前記絶縁基板端
部の下部の位置で溝を形成した放熱板を具備したことを
特徴とする半導体装置。1. A semiconductor device in which a copper plate is mounted on an insulating substrate and a semiconductor element is disposed thereon, further comprising a heat radiating plate having a groove formed at a position below an end of the insulating substrate. apparatus.
に半導体素子を配置した半導体装置において、前記絶縁
基板の下部に樹脂をコーティングした放熱板を具備した
ことを特徴とする半導体装置。2. A semiconductor device in which a copper plate is provided on an insulating substrate and a semiconductor element is disposed on the copper plate, wherein a heat radiating plate coated with resin is provided below the insulating substrate.
体素子を配置した半導体装置において、前記絶縁基板の
下部に設けられた放熱板と、前記絶縁基板の端部の下部
と前記放熱板の間に設けられた樹脂の薄板とを具備した
ことを特徴とする半導体装置。3. A semiconductor device in which a copper plate is mounted on an insulating substrate and a semiconductor element is disposed on the copper plate, wherein a heat radiating plate provided below the insulating substrate and a lower portion of an end of the insulating substrate and the heat radiating plate. And a resin thin plate provided in the semiconductor device.
体素子を配置した半導体装置において、前記絶縁基板の
下部に設けられた放熱板と、前記絶縁基板の端部の下部
と前記放熱板の間に設けられた絶縁フィルムとを具備し
たことを特徴とする半導体装置。4. In a semiconductor device in which a copper plate is mounted on an insulating substrate and a semiconductor element is disposed thereon, a heat radiating plate provided at a lower portion of the insulating substrate and a portion between a lower portion of an end portion of the insulating substrate and the heat radiating plate. And an insulating film provided on the semiconductor device.
るか或いは盛り上げることを特徴とする請求項１記載の
半導体装置。5. The semiconductor device according to claim 1, wherein a resin is buried or raised in a groove formed in said heat sink.
ムの形状に合わせた形状にして絶縁フィルムを取付け固
定できるようにしたことを特徴とする請求項１記載の半
導体装置。6. The semiconductor device according to claim 1, wherein the groove formed in the heat sink is shaped to match the shape of the insulating film so that the insulating film can be attached and fixed.
の下部と前記放熱板の間に距離の半分の厚さを有し、前
記絶縁基板の辺に４ヶ所配置し、前記絶縁基板の角で重
ね合わせ固定されたことを特徴とする請求項３記載の半
導体装置。7. The insulating film has a thickness of a half of a distance between a lower portion of an end portion of the insulating substrate and the heat radiating plate, is disposed at four places on a side of the insulating substrate, and overlaps at a corner of the insulating substrate. 4. The semiconductor device according to claim 3, wherein the semiconductor device is fixed.
することを特徴とする請求項３記載の半導体装置。8. The semiconductor device according to claim 3, wherein the insulating film is fixed using a resin.
型にしたことを特徴とする請求項２乃至６のいずれかに
記載の半導体装置。9. The semiconductor device according to claim 2, wherein said resin or said insulating film is L-shaped.
放熱板接触部分に導電性か半導電性材料を付けたことを
特徴とする請求項２乃至９のいずれかに記載の半導体装
置。10. The semiconductor device according to claim 2, wherein a conductive or semiconductive material is provided on a portion of the insulating film or the resin or the like that contacts the heat sink.
を長くするために前記銅板の下部と前記放熱板の接着に
厚肉ハンダを用いたことを特徴とする請求項１乃至１０
のいずれかに記載の半導体装置。11. The heat sink according to claim 1, wherein a thick solder is used to bond the lower part of the copper plate and the heat sink to increase the distance between the end of the insulating substrate and the heat sink.
The semiconductor device according to any one of the above.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35676499A JP2001177053A (en) | 1999-12-16 | 1999-12-16 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35676499A JP2001177053A (en) | 1999-12-16 | 1999-12-16 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2001177053A true JP2001177053A (en) | 2001-06-29 |
Family
ID=18450659
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP35676499A Pending JP2001177053A (en) | 1999-12-16 | 1999-12-16 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2001177053A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10607916B2 (en) | 2016-03-17 | 2020-03-31 | Fuji Electric Co., Ltd. | Substrate for semiconductor devices |
| JPWO2022049660A1 (en) * | 2020-09-02 | 2022-03-10 |
-
1999
- 1999-12-16 JP JP35676499A patent/JP2001177053A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10607916B2 (en) | 2016-03-17 | 2020-03-31 | Fuji Electric Co., Ltd. | Substrate for semiconductor devices |
| JPWO2022049660A1 (en) * | 2020-09-02 | 2022-03-10 | ||
| WO2022049660A1 (en) * | 2020-09-02 | 2022-03-10 | 三菱電機株式会社 | Semiconductor device, power conversion device, and mobile body |
| JP7403671B2 (en) | 2020-09-02 | 2023-12-22 | 三菱電機株式会社 | Semiconductor devices, power conversion devices, and mobile objects |
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