JP2001166995A - Data secrecy holding circuit for microcomputer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To substantially invalidate any illegal access from a third person to a non-volatile memory in a microcomputer in which data, in some care, including a program whose secrecy should be held are stored in the non-volatile memory. SOLUTION: An inhibition parameter Pinh for inhibiting any writing, reading, or deletion through a control signal line 8, address signal line 9, or data signal line 10 to a non-volatile memory 2 is written in an inhibition parameter area 11 in the non-volatile memory 2 in which secrecy data are written, Thus, the inhibition parameter monitoring circuit 12 which monitors the inhibition parameter area 11 outputs the inhibition signal Sinh for inhibiting any writing, reading, or deletion to the non-volatile memory 2 to a memory control circuit 5. Thus, the memory control circuit 5 inhibits any access to the non-volatile memory 2 so that any writing, reading, or deletion can not be executed by anyone again.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data security circuit for protecting data written in a nonvolatile memory in a microcomputer which controls reading and writing of the nonvolatile memory by a memory control circuit. The technique of the present invention is particularly effective in a microcomputer with a built-in nonvolatile memory in which a CPU (Central Processing Unit) and a nonvolatile memory are formed on the same chip. However, the present invention does not need to be limited to such, and can be applied to any other types of microcomputers.

[0002]

2. Description of the Related Art It is important from the viewpoint of increasing the confidentiality of data to make it impossible for a third party to illegally write, read, or erase a microcomputer with built-in nonvolatile memory.

FIG. 3 shows an example of realizing data security maintenance in a conventional microcomputer with a built-in nonvolatile memory. In FIG. 3, reference numeral 1 denotes a microcomputer (microcomputer), 2
Is a non-volatile memory, 3 is a secret number comparison circuit having a built-in secret number, 4 is a memory cell array in the non-volatile memory 2 that can be written, read and erased, 5 is a memory control circuit, 6 is a permission signal line, and 7 is a secret number. An input signal line 8 is a control signal line connecting the terminal of the microcomputer 1 and the nonvolatile memory 2, 9
Denotes an address signal line, and 10 denotes a data signal line.

The CPU (not shown) in the microcomputer 1 and the non-volatile memory 2 are connected to the control signal line 8, the address signal line 9, and the data signal line 10 by another signal line. The line cannot be monitored from outside the microcomputer 1.

The operation procedure of the data security circuit configured as described above will be described below. First, when the secret number Ns is input from the secret number input signal line 7, the secret number comparison circuit 3 compares the fixed secret number Ns built therein with the code N 'input as a secret number from the outside. Compare.

When the comparison results match, a permission signal Se for enabling writing / reading / erasing to / from the nonvolatile memory 2 is output to the memory control circuit 5 through the permission signal line 6. As a result, writing / reading / erasing to / from the nonvolatile memory 2 can be performed via the control signal line 8, the address signal line 9, and the data signal line 10.

Contrary to the above, if the comparison results in a mismatch, no enable signal is output to the memory control circuit 5 via the enable signal line 6. This is an access prohibition instruction for the memory control circuit 5. Therefore, writing / reading / erasing to / from the nonvolatile memory 2 via the control signal line 8, the address signal line 9, and the data signal line 10 is prohibited. That is,
The contents written in the non-volatile memory 2 are prevented from being decrypted by a third party and from being altered for the purpose of unauthorized use.

[0008]

However, in the data security circuit of the prior art having the above configuration, if the secret number is leaked, a third party is written in the nonvolatile memory. There has been a problem that data can be easily read and data confidentiality cannot be maintained.

The present invention solves such a problem. In a microcomputer storing data which may include a program requiring confidentiality in a non-volatile memory, the non-volatile memory is protected by a third party. An object of the present invention is to provide a data security circuit which makes unauthorized access substantially impossible.

[0010]

In order to attain this object, a data security circuit in a microcomputer according to the present invention stores a prohibited parameter in a nonvolatile memory when required data has been written to the nonvolatile memory. The memory control circuit is forcibly brought into the operation inhibition state through the inhibition parameter monitoring means based on the writing.

Further, when an access is made at the same address as an arbitrary address for writing data, the data in the nonvolatile memory is forcibly altered. Here, the alteration of data refers to a total destruction of data that may include a program, a destruction of a part including a main part, or a random change to meaningless data.

According to the present invention, when an unauthorized access to the nonvolatile memory is made by a third party, the access can be substantially invalidated to achieve data confidentiality.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be generally described.

A data security maintaining circuit in the microcomputer according to the first aspect of the present invention is a microcomputer which controls reading / writing from / to a nonvolatile memory by a memory control circuit, and monitors whether or not a prohibited parameter is written in the nonvolatile memory. And a prohibition parameter monitoring means for outputting a prohibition signal to the memory control circuit when the data is written to the memory control circuit.

In the above, the prohibition parameter is usually written at a specific address of the memory cell array in the nonvolatile memory.

According to the first aspect, the worker who writes the data that may include the program writes the prohibition parameter to the nonvolatile memory at the stage when the writing is completed. The prohibition parameter monitoring means monitors whether or not the prohibition parameter has been written, and when it is determined that the prohibition parameter has been written, outputs a prohibition signal to the memory control circuit to forcibly prohibit the operation. Then, from then on, anyone can write, read,
The erasure cannot be performed again. Therefore, even if there is an unauthorized access to the nonvolatile memory for the purpose of stealing, changing, or destroying data, the access can be substantially invalidated.

A data security maintaining circuit in the microcomputer according to the second invention of the present application is a microcomputer in which a memory control circuit controls reading / writing from / to a nonvolatile memory, wherein a trap for setting an arbitrary address of a data writing area in the nonvolatile memory is provided. An address storage area, and trap address determination means for instructing the memory control circuit to modify data in the nonvolatile memory when the input address is compared with the set address and matched. This is a configuration provided with.

In the above description, the data modification as a command which the trap address determination means makes to the memory control circuit includes the total destruction of data that may include a program, the destruction of a part including a main part, and the useless data. And random changes.

According to the second invention, an arbitrary address for the data write area is set in the trap address storage area at the stage when the worker who writes the data that may include the program is writing the data. Will be. The trap address determining means checks the address of the access to the non-volatile memory and monitors whether or not the access address matches an already set address. This instructs the circuit to modify data in the nonvolatile memory. As a result, the data in the non-volatile memory is subject to modifications such as total destruction of data that may include a program, destruction of a part including a main part, and random change to meaningless data. Therefore, even if there is an unauthorized access to the nonvolatile memory for the purpose of stealing data, the access can be substantially invalidated.

The data security circuit in the microcomputer according to the third aspect of the present invention is configured to have both the components of the first aspect and the components of the second aspect. According to this third aspect, the first aspect
The effects of both the invention of the second aspect and the second invention are obtained.

Hereinafter, a specific embodiment of a data security circuit in a microcomputer according to the present invention will be described in detail with reference to the drawings. In the following embodiments, a microcomputer with a built-in nonvolatile memory in which a CPU and a nonvolatile memory are formed on the same chip will be described as an example.

(Embodiment 1) FIG. 1 is a block diagram of a data security circuit in a microcomputer according to Embodiment 1 of the present invention. In FIG. 1, reference numeral 1 denotes a microcomputer (microcomputer), 2
Denotes a non-volatile memory, 4 denotes a memory cell array capable of writing / reading / erasing in the non-volatile memory 2, 5 denotes a memory control circuit for controlling writing / reading / erasing from the outside of the microcomputer 1 to the non-volatile memory 2, 8 denotes a microcomputer A control signal line for connecting the terminal 1 to the nonvolatile memory 2, 9 is an address signal line, and 10 is a data signal line. CPU (not shown) inside microcomputer 1
(Central processing unit) and the non-volatile memory 2 include a control signal line 8, an address signal line 9, a data signal line 10,
The signal line is connected to another signal line, and the signal line cannot be monitored from outside the microcomputer 1.

A reference numeral 11 as a new constituent element denotes a prohibited parameter area arranged at a specific address of the nonvolatile memory 2 for inhibiting writing, reading and erasing from the outside of the microcomputer 1 to the nonvolatile memory 2. When a prohibition parameter Pinh for prohibiting writing / reading / erasing from the outside of the microcomputer 1 to the non-volatile memory 2 is written into the prohibition parameter area 11, the memory control circuit 5 writes / reads from the outside of the microcomputer 1 to the non-volatile memory 2.・
This is a prohibition parameter monitoring circuit that outputs a prohibition signal Sinh for prohibiting erasure.

The use procedure and operation procedure of the data security circuit of the first embodiment configured as described above will be described below.

The state in which the prohibited parameter Pinh is not written in the prohibited parameter area 11 is the initial state of the prohibited parameter area 11. At this time, the prohibited parameter monitoring circuit 12 monitoring the prohibited parameter area 11
Indicates that the memory control circuit 5 writes the data to the nonvolatile memory 2.
The prohibition signal Sinh for prohibiting read / erase is not output. Therefore, at this time, data can be written to the nonvolatile memory 2 via the control signal line 8, the address signal line 9, and the data signal line 10. In many cases, the data written at this time is confidential data with a high degree of confidentiality requirement.

After the required data has been written into the nonvolatile memory 2, the prohibited parameter area 11 in the nonvolatile memory 2 is controlled via the control signal line 8, the address signal line 9, and the data signal line 10. A prohibition parameter Pinh for prohibiting writing / reading / erasing to the nonvolatile memory 2 is written. As a result, the prohibited parameter monitoring circuit 1 monitoring the prohibited parameter area 11
2 outputs to the memory control circuit 5 a prohibition signal Sinh for prohibiting writing, reading and erasing to and from the nonvolatile memory 2.

The memory control circuit 5 to which the inhibit signal Sinh has been input is connected to the non-volatile memory 2 including the inhibit parameter area 11 via the external control signal line 8, address signal line 9, and data signal line 10. Writing, reading and erasing are prohibited. Therefore, no one can write, read, or erase the nonvolatile memory 2 again.

As described above, according to the data confidentiality holding circuit of the first embodiment, a configuration in which means for inhibiting writing / reading / erasing to / from this nonvolatile memory is provided in the nonvolatile memory is adopted. As a result, no one can access the nonvolatile memory again, so that the confidentiality of the data can be reliably maintained.

(Embodiment 2) FIG. 2 is a block diagram of a data security circuit in a microcomputer according to Embodiment 2 of the present invention. Embodiment 1
The same reference numerals as those in FIG.
2 also indicate the same components, as described above, and the description is omitted here. In addition, items that have been described in the first embodiment and that are not described again in the second embodiment also apply to the second embodiment as they are, and a detailed description thereof will be omitted.

The configuration of the second embodiment is different from that of the first embodiment in the following points.

Reference numeral 13 as a new constituent element is a trap address determination circuit, and reference numeral 14 is a trap address storage area. In the trap address storage area 14, an arbitrary address input from the address signal line 9 can be set. The address set in this manner is an address corresponding to a storage area in the nonvolatile memory 2 where data is written.

The trap address determination circuit 13 compares the address set in the trap address storage area 14 with the address input from the address signal line 9, and if they match, the data in the non-volatile memory 2 is compared. Is output to the memory control circuit 5. Note that the data modification in this case includes the total destruction of data that may include a program, the destruction of a part including a main part, and random change to meaningless data.

The use procedure and operation procedure of the data security circuit of the second embodiment configured as described above will be described below.

The state where no address is written in the trap address storage area 14 is the initial state of the trap address storage area 14. At this time, the memory control circuit 5 can write data (confidential data) to the nonvolatile memory 2 via the control signal line 8, the address signal line 9, and the data signal line 10.

When a worker who writes data, which may include a program, is writing the data, the CPU
Sets an arbitrary address Ain input to the trap address storage area 14 via the address signal line 9 for the data write area of the memory cell array 4. As a result, it is substantially impossible to access the nonvolatile memory 2 again as described below.

That is, it is assumed that an address Ax for writing / reading / erasing data to / from the nonvolatile memory 2 is input from the outside of the microcomputer 1 via the address signal line 9. In this case, the trap address determination circuit 13
Compares the address Ain preset in the trap address storage area 14 with the newly input address Ax. If the result of the comparison is a match, a modification command Sexe for modifying data in the nonvolatile memory 2 is output to the memory control circuit 5. As a result, the confidential data in the nonvolatile memory 2 is forcibly altered. As a mode of the data modification, all destruction of confidential data that may include a program may be performed,
Destruction of a part including the main part may be performed, or random change to meaningless data may be performed.

Therefore, even if the data is stolen, it is not the original data that requires confidentiality, but the modified data that has lost its significance as a program or data. can do.

As described above, according to the data security circuit of the second embodiment, by providing a means for modifying the data in the nonvolatile memory when the nonvolatile memory 2 is accessed, This protects the confidential data from being stolen and ensures the confidentiality of the data.

(Embodiment 3) Although illustration is omitted, Embodiment 3 is based on the configuration of Embodiment 1 described above and Embodiment 2
And a hybrid configuration.

The secret function for confidential data can be double enhanced.

[0041]

According to the present invention, after data is written, by setting a prohibited parameter, access to the nonvolatile memory via the prohibited parameter monitoring means is substantially prohibited. When there is unauthorized access to the memory by a third party, the access can be substantially revoked to achieve data confidentiality.

Further, when an access is made at the same address as the address for writing data, the data in the nonvolatile memory is forcibly altered, so that there is an unauthorized access to the nonvolatile memory by a third party. When that happens, the access can be substantially revoked to achieve data confidentiality.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a data security circuit in a microcomputer according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a data security circuit in a microcomputer according to a second embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a conventional data security circuit;

[Explanation of symbols]

 1: microcomputer 2: nonvolatile memory 4: memory cell array 5: memory control circuit 8: control signal line 9: address signal line 10: data signal line 11: prohibited parameter area 12: prohibited parameter monitoring circuit 13: trap address determination circuit 14: Trap address storage area Pinh: Prohibition parameter Sinh: Prohibition signal Ain: Address stored in trap address storage area Sexe: Modification command

Claims (3)

[Claims] 1. A microcomputer which controls reading / writing from / to a nonvolatile memory by a memory control circuit, wherein the microcomputer monitors whether or not a prohibited parameter has been written to the nonvolatile memory. And a prohibition parameter monitoring means for outputting a prohibition signal for prohibiting the operation of the data security circuit in the microcomputer. 2. A microcomputer which controls reading and writing to and from a nonvolatile memory by a memory control circuit, wherein a trap address storage area for setting an arbitrary address of a data write area in the nonvolatile memory and an input address are stored in the microcomputer. Data confidentiality in the microcomputer, comprising: a trap address judging means for instructing the memory control circuit to alter data in the nonvolatile memory when the address coincides with the set address. Holding circuit. 3. A data security circuit in a microcomputer having both the components of claim 1 and the components of claim 2.