JP2001135245A - Plasma display panel and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve transition property from writing to holding. SOLUTION: In a plasma display panel that a plurality of electrode pairs 7 for display are provided on one substrate, while a plurality of address electrodes 5 are arranged counterposed on the other substrate 1 so as to cross the electrode pairs 7, and the electrode pairs 7 and electrodes 5 have been covered with a dielectric layers 10, 2, electrostatic capacitance of the portion, where the electrode pairs 7 and address electrodes 5 cross and the dielectric layer 2 covers the latter or that of the portion and its neighborhood, is made larger than regions other than this.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel and a method for manufacturing the same, and more particularly, to a plasma display panel in which a plurality of display electrode pairs are provided adjacent to one substrate and the other is disposed to face the one substrate The present invention relates to a plasma display panel in which a plurality of address electrodes are provided on a substrate in a direction intersecting the electrode pairs, and the electrode pairs and the address electrodes are covered with a dielectric layer, and a method of manufacturing the same.

[0002]

2. Description of the Related Art A plasma display panel performs display by intermittently generating a discharge by covering a facing electrode with a dielectric layer and applying a high-frequency AC signal between the electrodes. is there.

In a typical configuration of a plasma display panel, a plurality of stripe-shaped address electrodes are provided on the back substrate side, the address electrodes are covered with a dielectric layer, and a phosphor is further coated on the dielectric layer. On the other hand, a plurality of display electrode pairs are provided on the front substrate side facing the rear substrate in a direction intersecting the address electrodes, the display electrode pairs are covered with a dielectric layer, and a protective film is further formed. A discharge gas is sealed between the back substrate and the front substrate, and the phosphor is excited by ultraviolet rays generated by the discharge between the display electrodes forming the display electrode pair to generate visible light.

Image display is performed as follows. First, a certain writing voltage is applied between an address electrode of a desired pixel and one of the display electrodes to cause a discharge, and the generated charge is left on one of the display electrodes as a wall charge on the dielectric surface. Then, a desired pixel is turned on by alternately applying a sustaining voltage lower than the writing voltage (AC signal) between the display electrodes forming the display electrode pair. At this time, no discharge occurs in the pixel where no wall charge is generated even if the sustain voltage is applied. In this way, lighting of an arbitrary pixel can be performed. As such a plasma display panel, for example, Japanese Patent Application Laid-Open No. 11-2
No. 33026 discloses this.

[0005]

The above-mentioned plasma display panel is desired to have further improved characteristics, for example, an increase in panel driving margin, a reduction in power consumption, and an improvement in luminance and efficiency.

An object of the present invention is to provide a plasma display panel having improved characteristics such as a driving margin, power consumption, and luminance efficiency of the panel, and a method of manufacturing the same.

[0007]

According to the plasma display panel of the present invention, a plurality of display electrode pairs are provided on one substrate, and the other substrate disposed opposite to the one substrate has the electrode pairs. In a plasma display panel in which a plurality of address electrodes are provided in a direction intersecting with each other and the electrode pairs and the address electrodes are covered with a dielectric layer, the address of a region where the discharge gap of the electrode pairs intersects with the address electrodes is provided. A portion covering the electrode with the dielectric layer,
Alternatively, the capacitance of the portion and the vicinity thereof is larger than that of the other region. Note that the term “intersection” means that an electrode pair and an address electrode intersect at a certain interval so as to be orthogonal or nearly orthogonal.

According to the method of manufacturing a plasma display panel of the present invention, a plurality of display electrode pairs are provided on one substrate, and the other substrate disposed opposite to the one substrate has a direction intersecting the electrode pairs. Is provided with a plurality of address electrodes,
In the method for manufacturing a plasma display panel, wherein the electrode pair and the address electrode are covered with a dielectric layer, a plurality of address electrodes are formed on the other substrate,
A step of covering the plurality of address electrodes with a dielectric layer; and a step of covering the address electrodes in a region where the discharge electrodes of the display electrode pairs provided so as to face and intersect with the plurality of address electrodes intersect with the address electrodes. Forming a recess in a portion covering the electrode or in the portion and the dielectric layer in the vicinity thereof.

In the method of manufacturing a plasma display panel according to the present invention, a plurality of display electrode pairs are provided on one substrate and intersect with the electrode pair on the other substrate arranged opposite to the one substrate. A plurality of address electrodes are provided in the direction, in the method of manufacturing a plasma display panel wherein the electrode pairs and the address electrodes are covered with a dielectric layer, before forming the plurality of address electrodes on the other substrate, A step of providing a dielectric layer in a convex shape so as to push up the address electrode in a region where the discharge gap of the electrode pair intersects with the address electrode.

In the method of manufacturing a plasma display panel according to the present invention, a plurality of display electrode pairs are provided on one substrate and intersect with the electrode pair on the other substrate arranged opposite to the one substrate. A plurality of address electrodes are provided in a direction, and the electrode pair and the address electrodes are covered with a dielectric layer. In the method for manufacturing a plasma display panel, the plurality of address electrodes are formed on the other substrate; A step of increasing the film thickness of the address electrode in a region where the pair of discharge gaps intersects with the address electrode or in the region and the vicinity thereof.

Further, in the method of manufacturing a plasma display panel according to the present invention, a plurality of display electrode pairs are provided on one substrate and intersect with the electrode pairs on the other substrate disposed opposite to the one substrate. A plurality of address electrodes are provided in a direction, and in the method for manufacturing a plasma display panel, wherein the electrode pairs and the address electrodes are covered with a dielectric layer, the plurality of address electrodes are formed on the other substrate; A step of covering the address electrode in the region where the pair of discharge gaps and the address electrode intersect or the address electrode and its vicinity with a first dielectric layer, and the plurality of address electrodes and the first dielectric layer, Covering with a second dielectric layer lower than the dielectric constant of the first dielectric layer;
It is characterized by having.

In the method of manufacturing a plasma display panel according to the present invention, a plurality of display electrode pairs are provided on one substrate and intersect with the electrode pairs on the other substrate arranged opposite to the one substrate. A plurality of address electrodes are provided in a direction, in the method of manufacturing a plasma display panel wherein the electrode pairs and the address electrodes are covered with a dielectric layer, a step of forming the plurality of address electrodes on the other substrate, Covering the address electrode or the address electrode in the region where the discharge gap of the electrode pair intersects with the address electrode with the first dielectric layer, and intersecting the discharge gap of the electrode pair with the address electrode. Except for the address electrode or the address electrode and its vicinity in a region to be covered with the second dielectric layer having a lower dielectric constant than the first dielectric layer And having a degree, the.

According to the present invention, in a plasma display panel, a portion covering an address electrode in a region where a discharge gap formed by a display electrode pair on a front substrate intersects with an address electrode on a rear substrate, or the portion and its vicinity. By reducing the thickness of the dielectric layer of, for example, the portion covering the address electrode with the dielectric layer or the capacitance of the portion and the vicinity thereof is made larger than that of the other region, the writing is performed. It is to induce wall charges induced by discharge in the vicinity of a discharge gap where transition to sustain discharge is likely.

[0014]

Embodiments of the present invention will be described below in detail with reference to the drawings. (Embodiment 1) In this embodiment, a structure is shown in which the thickness of the dielectric layer is reduced and the capacitance is increased by forming a depression in the dielectric layer of the rear substrate.

FIG. 1 is a partially cutaway perspective view of a plasma display panel according to a first embodiment of the present invention, and FIG. 2 is a sectional view thereof.

1 and 2, on a rear substrate 1 made of glass or the like, an address electrode 5, a rear dielectric layer 2 covering the address electrode 5, a partition wall 3 separating the address electrodes 5, and a dielectric layer 2 are formed. And a phosphor 4 formed on the side wall of the partition wall 3. On the other hand, on a front substrate 11 such as glass,
A transparent electrode 7 serving as a display electrode pair, a bus electrode 8 provided on the transparent electrode 7, a front-side dielectric layer 10 covering the transparent electrode 7 and the bus electrode 8, and a protective layer formed on the dielectric layer 10 9 are provided. A space between the rear substrate 1 and the front substrate 11 is filled with a discharge gas such as a rare gas (He, Ne, Ar, Xe) or the like for exciting and emitting the phosphor 4 with ultraviolet rays, and is partitioned by the partition walls 3. Is a discharge space. The bus electrode 8 is formed to increase the conductivity of the transparent electrode 7.

A portion of the dielectric layer 2 covering the address electrode 5 (or this portion and the portion thereof) in a region where the discharge gap formed by the pair of transparent electrodes 7 of the front substrate 11 and the address electrode 5 of the rear substrate 1 intersect. Back substrate 1 so that
The recesses 6 are formed in a matrix in the dielectric layer 2. The dielectric layer 2 has a waffle shape.

In the method of forming the back substrate 1, the address electrodes 5 are formed on the back substrate 1 by pattern printing or the like, and the dielectric layer 2 is formed thereon by solid printing or the like. Next, a depression 6 is provided in the dielectric layer 2 by sandblasting or the like to form a waffle.

If the dielectric layer has a two-layer structure and the lower layer is made of a hard material which is less likely to be sandblasted than the upper layer, a depression can be provided only in the upper layer using the lower layer as a stopper layer so that the depths of the depressions are uniform. Can be formed.

FIG. 3 is a cross-sectional view for explaining the operation of the plasma display panel provided with the depressions.

As shown in FIG. 3, when a predetermined pulse for generating a write discharge is applied between one of the transparent electrodes 7 forming the display electrode pair and the address electrode 5, a dielectric film having a depression 6 having a thin film thickness is provided. Since the capacitance C is larger than the others on the body layer 2, the wall charges 12 easily accumulate, and the writing discharge starting voltage reaches between the display electrode and the address electrode of the front substrate 11, which is the shortest distance from the depression 6. As a result, write discharge occurs. As a result, the wall charges 1 are placed on the protective layer 9 covering the display electrode 7 at the shortest distance, that is, on the protective layer 9 near the discharge gap where the transition to the sustain discharge is likely to occur.
2 can be stored.

FIG. 4 is a sectional view comparing the interference between the lines of electric force and the dielectric. FIG. 4A shows the case of the plasma display panel of the present embodiment, and FIG. 4B shows the case of the conventional plasma display panel. With the structure according to the present embodiment, lines of electric force generated between the display electrodes are less likely to be pressed by the dielectric layer of the rear substrate, and a discharge space can be secured by the depression of the dielectric layer. As a result, the increase in the maintenance voltage can be suppressed.
Further, since the discharge space is widened, the amount of generated plasma is increased, so that the luminance is improved.

With the structure according to the present embodiment, the transition from writing to maintenance is improved, so that high-speed writing becomes possible.
Further, with the structure according to the present embodiment, the transition from the writing to the maintenance is improved, so that the increase in the maintenance voltage is suppressed,
The power consumption of the panel can be reduced.

In the structure according to the present embodiment, the wall charges induced at the time of the write discharge accumulate on the protective layer nearer to the discharge gap than to the non-discharge gap. Can be prevented from interfering with the discharge. With the structure according to the present embodiment, interference with the discharge of the vertically adjacent cells can be suppressed, so that the distance on the non-discharge gap side can be reduced. As a result, the bus electrode 8 on the transparent electrode 7 that blocks light emission of the phosphor with a high luminance at the center of the cell can be shifted to the outside of the cell with a low luminance, thereby improving the luminance.

According to the structure of this embodiment, since the dielectric layer at the portion of the rear substrate where the partition is to be formed has no irregularities, it is easy to form the partition.

In the structure according to the present embodiment, an isolated dent is formed in the rear substrate for each unit cell. However, this is not limited to an isolated shape, and is parallel to the discharge gap formed by the transparent electrode on the front substrate. Thus, the same effect can be obtained even if the depressions are formed in a stripe shape. FIG. 5 shows a stripe-shaped structure.

The cross-sectional shape of the depression in the structure according to the present embodiment can easily be trapezoidal, semicircular, triangular or the like, but the same effect is exhibited. (Embodiment 2) In this embodiment, a region other than a portion of the dielectric layer covering the address electrode or the vicinity thereof in a region where the discharge gap formed by the transparent electrode of the front substrate and the address electrode of the rear substrate intersects. Increase the film thickness.

FIG. 6 is a sectional view of a plasma display according to a second embodiment of the present invention. The basic configuration of the plasma display is the same as that of the first embodiment shown in FIG. 1 except for the structure of the dielectric layer.

In the method of forming the dielectric layer, the address electrodes 5 are formed on the rear substrate 1 by pattern printing or the like, and the dielectric layer 2 is printed thereon by solid printing. Further, by forming the dielectric layer 14 with stripe grooves by pattern printing or the like, a region where the discharge gap formed by the transparent electrode 7 on the front substrate 11 intersects with the address electrode 5 on the rear substrate 1 and its vicinity are formed. The portions other than the portion of the dielectric layer covering the address electrodes are laminated.

With the above-described structure, the thickness of the dielectric is increased in a region where the lines of electric force generated between the display electrodes are not compressed.
Since the phosphor rises, the distance between the phosphor and the sustain discharge at the time of the sustain discharge is narrowed, and the loss due to the absorption of the ultraviolet light by other gas particles, which occurs before the ultraviolet light generated by the discharge reaches the phosphor, can be reduced. Therefore, brightness and efficiency are improved.

With the above-described structure, the surface area of the phosphor is increased, so that the luminance and the efficiency are further improved.

In the above-described structure, the stripe-shaped depressions are formed in the dielectric layer. However, this is not limited to the stripe-shaped depressions. Since the area where the body approaches the sustain discharge can be increased, the luminance efficiency is further improved. (Embodiment 3) In this embodiment, a dielectric 15 serving as a projection is formed in a stripe shape by pattern printing or the like under an address electrode on the rear substrate so as to be parallel to the discharge gap formed by the transparent electrode on the front substrate. .

The sectional shape of the stripe-shaped dielectric 15 may be square, semi-elliptical, trapezoidal, triangular, or the like.
Similar effects are exhibited. Address electrodes are formed by pattern printing or the like so as to intersect the stripe-shaped dielectrics. An address electrode in a region where the discharge gap formed by the transparent electrode on the front substrate intersects with the address electrode on the rear substrate (or this region and its vicinity) is raised, and a dielectric layer is formed thereon by a coater or the like. As a result, the dielectric layer is formed thinner by the approach of the electrode. FIG. 7 shows a cross-sectional structure.

In the above-described structure, the dielectric 15 is formed in a stripe shape by pattern printing or the like on the rear substrate so as to be parallel to the discharge gap formed by the transparent electrode of the front substrate. Instead, the same effect can be obtained even if the dielectric is intermittently formed only under the address electrode by forming an additive or the like. FIG.
Fig. 9 shows a stripe-shaped structure, and Fig. 9 shows an intermittent structure. In FIG. 8, reference numeral 16 denotes a portion where the dielectric layer 5 rises, and in FIG. 9, reference numeral 17 denotes a portion where the dielectric is intermittently formed. (Embodiment 4) In this embodiment, the thickness of the address electrode in the region where the discharge gap formed by the transparent electrode on the front substrate intersects with the address electrode on the rear substrate (or this region and its vicinity) is increased. The formation method is such that the electrodes are stacked by pattern printing on the stripe-shaped address electrodes formed on the rear substrate by printing or the like, and a dielectric layer is formed thereon by a coater or the like, so that the electrodes are lifted up by the dielectric layer. Is formed thinly. FIG. 10 shows a cross-sectional structure.

The cross-sectional shapes of the laminated electrodes are round, square,
Although a triangle or the like can be considered, the same effect is exhibited. (Embodiment 5) In Embodiments 1 to 4 described above, the capacitance was increased by reducing the thickness of the dielectric layer. However, the discharge gap formed by the transparent electrodes on the front substrate and the address electrodes on the rear substrate were reduced. May be formed of a material having a high dielectric constant on the address electrode in a region where (a) and (b) intersect.

The method of forming the rear substrate is such that address electrodes 5 are formed on the rear substrate 1 by pattern printing or the like, and a discharge gap formed by the transparent electrodes 7 of the front substrate 11 and the address electrodes 5 of the rear substrate 1 are formed thereon. Is formed by printing using a first dielectric paste. Next, a second dielectric paste using a dielectric material having a higher dielectric constant than the dielectric material of the first dielectric paste is printed by printing so as to fill the openings. After firing, as shown in the sectional view of FIG.
A dielectric layer 21 and a dielectric layer 22 having a higher dielectric constant than the dielectric layer 21 are provided adjacent to each other, and a region where a discharge gap formed by a transparent electrode on the front substrate intersects with an address electrode on the rear substrate and in the vicinity thereof Are covered with a dielectric layer 22. The order of printing with the first dielectric paste and the second dielectric paste may be reversed.

The dielectric layer 21 and the dielectric layer 22 having a higher dielectric constant than the dielectric layer 21 need not be provided adjacent to each other, and the dielectric layer 22 having a higher dielectric constant is embedded. You may.

In this case, the address electrodes 5 are
Is formed by pattern printing or the like, and the front substrate 11 is formed thereon.
A first dielectric layer having a high dielectric constant is formed by printing or the like in the intersection area between the discharge gap formed by the transparent electrode 7 and the address electrode 5 of the rear substrate 1 and in the vicinity thereof. Further, a second dielectric layer having a lower dielectric constant than the first dielectric layer is formed on the entire surface by a coater or the like. In this case, the second dielectric layer is formed thin on the first dielectric layer.

[0039]

As described above, according to the present invention,
Since the transition from writing to maintenance is improved, high-speed writing becomes possible. In addition, since the transition from the writing to the maintenance is improved, the increase in the maintenance voltage is suppressed, and the power consumption of the panel can be reduced.

Further, according to the present invention, the wall charges induced at the time of the write discharge preferentially accumulate on the dielectric layer near the discharge gap, so that the interference with the discharge of the vertically adjacent cells is prevented. Can be suppressed. As a result, the distance on the non-discharge gap side can be reduced. As a result, the bus electrode on the display electrode, which blocks the phosphor light emission having a high luminance at the center of the cell, can be shifted to the outside of the cell having the low luminance, thereby improving the luminance.

Further, according to the present invention, since the dielectric layer in the portion of the rear substrate where the partition is to be formed has no irregularities, it is easy to form the partition.

Further, according to the present invention, the lines of electric force generated between the display electrodes are less likely to be pressed by the dielectric layer of the rear substrate, and the discharge space can be secured by the depression of the dielectric layer. Discharge is not hindered, and a rise in the sustain voltage can be suppressed. Further, since the discharge space is widened, the amount of generated plasma is increased, so that the luminance is improved.

Further, according to the present invention, since the phosphor on the rear substrate rises in a region where the lines of electric force generated between the display electrodes are not pressed, the distance between the phosphor and the sustain discharge during the sustain discharge is reduced, and Since the loss due to the absorption of ultraviolet light by other gas particles, which occurs before the generated ultraviolet light reaches the phosphor, can be reduced, and the luminance efficiency is improved. Further, since the surface area of the phosphor is also increased, the luminance efficiency is further improved.

[Brief description of the drawings]

FIG. 1 is a partially cutaway perspective view of a plasma display panel according to a first embodiment of the present invention. FIG. 2 is a cross-sectional view thereof.

FIG. 2 is a sectional view of the plasma display panel according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional view for explaining the operation of the plasma display panel provided with a depression.

FIG. 4 is a cross-sectional view comparing interference between lines of electric force and a dielectric layer.

FIG. 5 is a cross-sectional view of a plasma display panel in which a depression has a stripe-shaped structure.

FIG. 6 is a sectional view of a plasma display panel according to a second embodiment of the present invention.

FIG. 7 is a sectional view of a plasma display panel according to a third embodiment of the present invention.

FIG. 8 is a partially cutaway perspective view of a plasma display panel according to a third embodiment of the present invention.

FIG. 9 is a partially cutaway perspective view of a plasma display panel according to a modification of the third embodiment of the present invention.

FIG. 10 is a sectional view of a plasma display panel according to a fourth embodiment of the present invention.

FIG. 11 is a sectional view of a plasma display panel according to a fifth embodiment of the present invention.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 back glass substrate 2 back dielectric 3 partition wall 4 phosphor 5 address electrode 6 back dielectric recess 7 transparent electrode 8 bus electrode 9 protective layer 10 front dielectric 11 front glass substrate 12 wall charge 13 rear dielectric 14 A portion where the backside dielectric is laminated 15 A stripe-shaped protrusion of the backside dielectric 16 An address electrode which is pushed up by the backside dielectric protrusion 17 An intermittent protrusion of the backside dielectric

Claims (10)

[Claims] 1. A plurality of display electrode pairs are provided on one substrate, and a plurality of address electrodes are provided in a direction intersecting the electrode pairs on another substrate disposed opposite to the one substrate. In a plasma display panel in which an electrode pair and the address electrode are covered with a dielectric layer, a portion of the region where the discharge gap of the electrode pair intersects with the address electrode covers the address electrode with the dielectric layer, or A plasma display panel, wherein the capacitance of the portion and the vicinity thereof is larger than that of the other region. 2. The plasma display panel according to claim 1, wherein a portion of the region where the discharge gap of the electrode pair intersects with the address electrode covers the address electrode, or the portion and the dielectric layer near the portion. A plasma display panel characterized in that the capacitance is increased by making the thickness of the substrate smaller than other regions. 3. The plasma display panel according to claim 2, wherein a projection is provided below the address electrode, and the thickness of the dielectric layer is reduced by the projection. 4. The plasma display panel according to claim 2, wherein a thickness of the address electrode in a region where the discharge gap of the electrode pair intersects with the address electrode or in the region and the vicinity thereof is increased. A plasma display panel wherein the thickness of the dielectric layer is reduced. 5. The plasma display panel according to claim 1, wherein a portion of the region where the discharge gap of the electrode pair intersects with the address electrode covers the address electrode, or the portion and the dielectric layer in the vicinity thereof. Characterized by comprising a material having a higher dielectric constant than the dielectric layer in the other region. 6. A plurality of display electrode pairs are provided on one substrate, and a plurality of address electrodes are provided in a direction intersecting the electrode pairs on the other substrate disposed opposite to the one substrate. An electrode pair and a method for manufacturing a plasma display panel in which the address electrodes are covered with a dielectric layer, comprising: forming a plurality of address electrodes on the other substrate; and covering the plurality of address electrodes with a dielectric layer. A portion covering the address electrode in a region where the discharge electrode of the display electrode pair provided so as to face and intersect the plurality of address electrodes intersects with the address electrode, or a portion covering the address electrode and the dielectric in the vicinity thereof; Providing a depression in the body layer. A method for manufacturing a plasma display panel, comprising: 7. A plurality of display electrode pairs are provided on one substrate, and a plurality of address electrodes are provided in a direction intersecting the electrode pairs on the other substrate disposed opposite to the one substrate. In the method for manufacturing a plasma display panel, wherein the electrode pair and the address electrode are covered with a dielectric layer, before forming the plurality of address electrodes on the other substrate, the discharge gap of the electrode pair and the address electrode A step of providing a dielectric layer in a convex shape in order to raise the address electrode in an area where the address intersects with the plasma display panel. 8. A plurality of display electrode pairs are provided on one substrate, and a plurality of address electrodes are provided in a direction intersecting the electrode pairs on the other substrate arranged opposite to the one substrate. In a method for manufacturing a plasma display panel in which an electrode pair and the address electrode are covered with a dielectric layer, a plurality of the address electrodes are formed on the other substrate,
A method for manufacturing a plasma display panel, comprising a step of increasing a film thickness of an address electrode in a region where a discharge gap of the electrode pair intersects with the address electrode or in the region and the vicinity thereof. 9. A plurality of display electrode pairs are provided on one substrate, and a plurality of address electrodes are provided in a direction intersecting the electrode pairs on the other substrate disposed opposite to the one substrate. In a method for manufacturing a plasma display panel, wherein an electrode pair and the address electrode are covered with a dielectric layer, forming the plurality of address electrodes on the other substrate,
Covering the address electrode or the address electrode and the vicinity thereof in a region where the discharge gap of the electrode pair intersects with the address electrode with a first dielectric layer; and the plurality of address electrodes and the first dielectric layer. Covering with a second dielectric layer lower than the dielectric constant of the first dielectric layer. 10. A plurality of display electrode pairs are provided on one substrate, and a plurality of address electrodes are provided in a direction intersecting the pair of electrodes on the other substrate arranged opposite to the one substrate. In a method for manufacturing a plasma display panel in which an electrode pair and the address electrode are covered with a dielectric layer, a step of forming the plurality of address electrodes on the other substrate; a discharge gap of the electrode pair and the address electrode. A first dielectric layer covering the address electrode or the address electrode in a region where the address electrode intersects with the first dielectric layer, and the address electrode or the address electrode in a region where the discharge gap of the electrode pair intersects the address electrode. And covering with a second dielectric layer lower than the dielectric constant of the first dielectric layer except for the vicinity thereof. Manufacturing method of ray panel.