JP2001128353A - Warning circuit for breaker for interconnection - Google Patents

Abstract

PROBLEM TO BE SOLVED: To constitute a warning circuit combined with a breaker, for an interconnection, which detects the short circuit or the like of an electric circuit to be cut off automatically, in such a way that its reliability is high and is simple and small-sized. SOLUTION: A power supply 2 for a load-state detection circuit is established, a point c which is derived from a power-supply H cutoff detection circuit 5 is set at H state, a load-state detection circuit 3 detects a leak, a point d is set at an L state, a flip-flop (abbreviated as FF) 6 is set, and a point e is set at L state. By charging and discharging detection circuits 11, 13, a point a of an FF 14 is set at L state or H state, according to the charging/discharge state of a power supply 10 for setting. Thereby, an FET 8b repeats an on/off operation, and a capacitor 10b repeats discharging and charging operation, while the point e is in L state. During this time, an LED 17 for display is pulse-turned on, the setting coil 15a of a latch relay is energized surely, and a warning output contact 15c is closed. An electric circuit is restored to a normal state, and a switch 4 is pressed or the electric circuit is cut off. Then, the point c is set at L state, the terminal Q of the FF 6 is set at L state, an FET 9b is turned on, a capacitor 12b which always holds a voltage is discharged to resetting coil 15b, and the contact 15c is opened.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is to be combined with a circuit breaker provided on a switchboard or the like to detect an overload or a short circuit of the electric circuit and to automatically shut off the electric circuit, and to issue an alarm of the electric circuit. Detects a load condition, for example, a predetermined high-level circuit current that cannot be automatically cut off by the circuit breaker, or a leak in the presence of a load that would cause trouble if cut off immediately, such as in a hospital. The present invention relates to an alarm circuit for a circuit breaker as a circuit for issuing an alarm.

[0002]

2. Description of the Related Art A conventional alarm circuit for a circuit breaker of this type generally operates a relay by an output of a detection circuit for detecting a load state in which an alarm of the electric circuit is to be issued. An alarm output method is used.

[0003]

In such a conventional alarm circuit of a circuit breaker for wiring, it is necessary to generate a power supply for driving the relay from a commercial power supply. Since the small relay used in the circuit combined with the equipment has a low rated voltage and a large relay current compared to the load state detection circuit current, supplying the relay current from the load state detection circuit power supply Heat generation is large and cannot be adopted.

Therefore, for driving the relay, it is necessary to generate a low voltage in the transformer or use a switching power supply. For this reason, there has been a problem that the alarm circuit becomes complicated, the shape becomes large, and the cost increases.

[0005]

According to a first aspect of the present invention, there is provided an alarm circuit for a circuit breaker for wiring, which detects an overload, a short circuit, and the like of the electric circuit (the line of the AC power supply 1). An alarm circuit combined with a circuit breaker for automatically shutting off the electric circuit, powered by the electric circuit, operating and outputting an alarm, wherein a load state detection for detecting a state in which an alarm should be issued for a load on the electric circuit. Means (load state detection circuit 3), and storage means (RS) for storing that the state in which the alarm should be issued is detected by the load state detection means.
The contact (15c) for outputting an alarm to the outside by the activation of the flip-flop 6) and the set coil (15a) is closed (opened), and this state is maintained even after the coil is deactivated, and the reset coil (15b) is activated. A latch relay (15) that opens and closes the contact by force and keeps this state even after the coil is de-energized; a means for displaying an alarm; Means for repeatedly turning on and off the power supply, deenergization and alarm display means (set power supply 10, charge detection circuit 11, discharge detection circuit 13, RS flip-flop 14, set circuit 8, etc.), and means for inputting a reset command (Reset push button switch 4) and erases the memory of the storage means based on the operation of the reset command operation input means or the disappearance of the voltage of the electric circuit, Means for urging the yl (power-off detection circuit 5, RS flip-flop 6, the reset circuit 9, a reset power supply 12) and that a.

According to a second aspect of the present invention, there is provided an alarm circuit for a circuit breaker according to the first aspect, wherein the load state detecting means includes a (zero-phase current transformer 3a, a leakage detection circuit). 3b) to detect that the leakage current of the electric circuit has exceeded a predetermined value. According to a third aspect of the present invention, there is provided an alarm circuit for a circuit breaker according to the first aspect, wherein the load state detecting unit is configured to perform the operation (via a current transformer 3c and a current detection circuit 3d). It is configured to detect that the main current of the wiring breaker has exceeded a predetermined level that does not automatically cut off the wiring breaker.

According to a fourth aspect of the present invention, in the alarm circuit for a circuit breaker according to any one of the first to third aspects, the alarm display means is connected in series with the set coil. LED (display LED1
7). The alarm circuit for a circuit breaker according to claim 5 is the alarm circuit for a circuit breaker according to any one of claims 1 to 4, wherein the set coil detects the AC voltage of the electric circuit (such as the rectifier 2a or 10c). First capacitor (10b) which is charged by rectification
The reset coil is energized by the discharge current of the second capacitor (12b) charged from the first capacitor via the diode (12a).

According to a sixth aspect of the present invention, there is provided an alarm circuit for a circuit breaker according to any one of the first to fifth aspects, wherein the means for energizing the reset coil is further provided. Detection circuit 11, discharge detection circuit 1
3, via the RS flip-flop 14), the reset coil is repeatedly energized and deenergized during operation of the reset command operation input means.

The operation of the present invention is as follows. That is, when the power supply 2 for the load state detection circuit is established, the detection output (potential at the point c) of the power cutoff detection circuit 5 is “H”. In this state, when the load state detection circuit 3 detects a state (leakage or high-level current) at which a warning should be issued for the load on the AC circuit, the output (potential at point d) becomes "L", and
RS flip-flop (abbreviated as RS / FF) 6
Is set to memorize that a state in which an alarm should be issued has occurred, and its output (potential at point e) becomes "L".

On the other hand, the charge detection circuit 11 and the discharge detection circuit 1
3, if the set power supply 10 is in the charged state, the set terminal S of the second RS flip-flop 14
Is “L”, the potential of the reset terminal R is “H”, and the output of the RS • FF 14 (potential at point g) is “L”.
When the setting power supply 10 is in the discharging state, the potential of the set terminal S becomes “H”, the potential of the reset terminal R becomes “L”, and the output of the RS • FF 14 (g point potential) becomes “H”.

As a result, the FET 8b of the set circuit 8 having the two potentials at points e and g as inputs to the NOR circuit 8a.
Is repeated when the set power supply 10 is in a charged state and turned off when the set power supply 10 is in a discharged state, as long as the potential at point e is "L". Therefore, as long as the potential at the point e is “L”, the discharge from the capacitor 10 b of the set power supply 10 to the display LED 17 and the set coil 15 a of the latch relay 15 is repeated, and the display LED 17 is pulsed and turned on. The output contact 15c is closed and this relay 15
Set will be assured.

Next, the state in which an alarm should be issued is restored to normal and d
When the reset push button switch 4 is pressed or the AC circuit is cut off after the point potential becomes “H”, the potential at the point c becomes “L” and the RS • FF 6 is reset and its output is output. The potential of the terminal Q becomes “L” and the potential of the terminal QB (point e) becomes “H”. Therefore, the FET 8b of the set circuit
Is turned off, and the FET 9b of the reset circuit 9 that receives the two "L" potentials of the point c and the output terminal Q of the RS FF 6 (in the case of the first embodiment) as inputs of the NOR circuit 9a is turned on.

Therefore, the discharge current of the capacitor 12b of the reset power supply 12 which maintains the voltage even when the set power supply 10 is discharged is controlled by the diode 12a.
And the output contact 15c is opened. In the case of the second embodiment, the input of the NOR circuit 9a is changed to the above-mentioned two inputs, and the potential of the RS is changed to “L” / “H” according to the charging / discharging state of the setting power supply 10.
-The output of the FF 14 (g-point potential) is added to the three inputs, and even if the push button switch 4 is kept pressed, the discharging and charging of the capacitor 12b are repeated and the reset of the latch relay 15 is ensured.

As described above, according to the present invention, at least at the time of alarm output, a pulse is repeatedly supplied to the LED and the small latch relay, so that the alarm circuit is configured to be simple and small, and the operation is ensured.

[0015]

(Embodiment 1) FIG. 1 shows a first embodiment of the present invention.
FIG. 3 is a circuit diagram showing a configuration as an example of FIG. In FIG. 1, a load state detection circuit 3 includes a zero-phase current transformer 3a and a leakage detection circuit 3b, and has a function of detecting leakage of the AC circuit. In the drawings, the same reference numerals indicate the same or corresponding parts.

The power supply 2 for the load state detection circuit includes a diode bridge rectifier 2a, a resistor 2b, and a smoothing capacitor 2.
c. Note that the switch at the point a marked to open and close the AC power supply 1 is inserted for the sake of convenience in explaining the turning on and off of the power supply 1 in a time chart, and does not actually exist. The AC power supply 1 applied to the electric circuit is rectified by a diode bridge rectifier 2a, smoothed by a resistor 2b and a smoothing capacitor 2c, and
DC power supply suitable for

In the power cutoff detection circuit 5, the resistance 5b is on the reference potential side (in this case, the negative side of the capacitor 2c) between the load state detection circuit power supply (that is, the power supply generated at both ends of the capacitor 2c). A series circuit of a Zener diode 5a and a resistor 5b provided as described above, a base and an emitter are connected to both ends of the resistor 5b, a grounded emitter transistor 5c having a resistor 5d as a collector resistor, and a base connected to the collector of the transistor 5c. And a common emitter transistor 5e having the collector 5f as the resistor 5f.

The reset push button switch 4 for resetting the alarm output of the alarm circuit is a transistor 5e.
Is connected between the collector and the emitter. First RS
Set terminal S (d of flip-flop (RS / FF) 6
Point) is connected to the output of the load state detection circuit 3,
The transistor 5e is connected to the reset terminal R (point c) of the FF6.
The collector is connected.

The latch relay 15 includes a set coil 15a.
, A reset coil 15b, and an output contact 15c whose opening / closing state is output to the outside as an alarm. The output contact 15c is closed by the bias of the set coil 15a, and the set coil 15a is deenergized (current disappears). After that, the closed state is maintained and the reset coil 15b is opened by the urging of the reset coil 15b, and the open state is maintained even after the reset coil 15b is deenergized (current disappears). In addition,
An LED 17 for displaying an alarm is connected in series to the set coil 15a.

The setting power supply 10 is a bridge rectifier 2a.
And a series circuit of a resistor 10a and a capacitor 10b provided such that the capacitor 10b is on the reference potential side (negative side of the capacitor 2c) between the positive and negative DC terminals. The voltage of the capacitor 10b is indicated as a set coil 15a. For L
It is a DC power supply for a series circuit with ED17. Further, the reset power supply 12 includes a series circuit of a diode 12a and a capacitor 12b provided in parallel with the set power supply capacitor 10b so that the capacitor 12b is on the reference potential side and charged through the diode 12a. Thus, the voltage of the capacitor 12b serves as a DC power supply for the reset coil 15b of the latch relay 15.

A charge detecting circuit 11 for detecting that the capacitor 10b of the setting power source is charged is provided with a Zener diode 11a and a resistor 11 provided in parallel with the capacitor 10b such that the resistor 11b is on the reference potential side.
b, and a grounded emitter transistor 11c having a base and an emitter connected to both ends of the resistor 11b and having the resistor 11d as a collector resistor. The collector of the transistor 11c is connected to the set terminal S of the second RS flip-flop (RS / FF) 14.

The discharge detecting circuit 13 for detecting that the capacitor 10b of the setting power supply is in a discharged state comprises a comparator for inputting the voltage of the capacitor 10b and comparing it with a reference voltage (not shown).・ FF14
Are connected to the reset terminal R of The set circuit 8 that opens and closes the power supply of the set coil 15a of the latch relay includes a source grounded FE connected in series with the set coil 15a.
T8b and NOR circuit 8 for driving the gate of FET 8b
a, and one input of the NOR circuit 8a is the first R
The other input is connected to the inverted output terminal QB (point e) of the S • FF 6, and the other input is connected to the inverted output terminal QB (point g) of the second RS · FF 14.

The reset circuit 9 for opening and closing the power supply of the reset coil 15b of the latch relay includes a reset coil 15b.
A source-grounded FET 9b connected in series with
And a NOR circuit 9a for driving the gate of Nb 9b.
One input of the OR circuit 9a is connected to the output terminal Q of the first RS FF 6, and the other input is connected to the collector of the transistor 5e (and the reset terminal R (point c) of the RS FF 6).

FIG. 3 is a time chart showing an example of a logical level or a signal waveform of each part (points a to I) in FIG.
Next, the operation of FIG. 1 will be described with reference to FIG. Time t
1, when the AC power supply 1 is turned on (point a), the capacitor 2c of the load state detection circuit power supply 2 is charged via the bridge rectifier 2a and the resistor 2b, and a voltage (point b) is established.

At the same time, the capacitor 10 of the setting power source 10
b is also charged via the bridge rectifier 2a and the resistor 10a, and the capacitor 12b of the reset power supply 12 is also charged from the positive electrode of the capacitor 10b via the diode 12a. The charging time constant of the capacitor 10b is the charging time constant of the capacitor 2c. The voltage of the capacitor 10b (point f1) gradually rises behind the voltage of the capacitor 2c, and the voltage of the capacitor 12b (point f2) is at a level lower than the voltage of the capacitor 10b by the forward voltage drop of the diode 12a. It rises following the voltage of the capacitor 10b.

In this initial state, the potential of the set terminal S (point d) of the first RS FF 6 is “H” assuming that the load state detection circuit 3 has not detected the alarm state, and
The potential of the reset terminal R (point c) of the FF 6 is "L" (active) because the Zener diode 5a of the power cutoff detection circuit 5 is not conducting, the transistor 5c is off, and the transistor 5e is on. RS FF6
Of the inverted output terminal QB (point e) is “H”.

Similarly, in this initial state, the second RS FF1
The potential of the reset terminal R is “L” (active) because the discharge detection circuit 13 initially outputs a discharge detection signal.
And the potential of the set terminal S of the RS FF 14 is such that the Zener diode 11a of the charge detection circuit 11 is not conducting,
Since the transistor 11c is off, it is "H", and therefore, the inverted output terminal QB of the RS • FF 14 (point g).
Is “H”.

Next, at time t2, when the voltage of the capacitor 2c exceeds the detection level of the power cutoff detection circuit 5, the Zener diode 5a of the detection circuit 5 conducts, so that the transistor 5c is turned on and the transistor 5e is turned off. RS as collector potential of transistor 5d
-The potential of the reset terminal R (point c) of the FF6 becomes "H".

Next, at time t3, when a leakage occurs in the AC circuit and the output of the zero-phase current transformer 3a exceeds a predetermined value, the leakage detection circuit 3b outputs the "L" (active) detection signal. Since the signal is output to the set terminal S (point d) of the first RS FF 6, the potential of the inverted output terminal QB (point e) of the RS FF 6 becomes "L". Capacitor 1 of set power supply 10
0b and the charging of the capacitor 12b of the reset power supply 12 proceeds, and at time t4, the voltage of the capacitor 10b becomes the charge detection level (that is, the sum of the Zener voltage of the Zener diode 11a of the charge detection circuit 11 and the base-emitter voltage of the transistor 11c). ), The capacitor 10
b is limited to this charge detection level. At this time, the Zener diode 11a conducts and the transistor 1
1c is turned on, and the potential of the set terminal S of the second RS • FF 14 is set to “L” (active). At this time, the output potential of the discharge detection circuit 13 has changed to "H". Therefore, the potential of the inverted output terminal QB (point g) of the RS FF 14 becomes “L”.

On the other hand, among the two inputs of the NOR circuit 8a of the set circuit 8, the input from the RS / FF 6 (point e) has already been changed to "L" by the above-described leakage detection, so that two inputs are obtained at the time t4. Become "L", and the NOR circuit 8
The output of a changes to "H", the FET 8b turns on, and the discharge current (h) from the capacitor 10b of the set power supply via the display LED 17 and the set coil 15a of the latch relay.
A dotted arrow) flows. As a result, the output contact 15c of the latch relay is closed and an alarm is transmitted to the outside.

However, when a current flows through the set coil 15a, the voltage (f1)
Dot) is configured to decrease. At time t5
, The voltage of the capacitor 10b is
When the voltage falls below the detection voltage of the comparator, the discharge detection circuit 1
3 gives the output of "L" to the reset terminal R of the second RS FF14. On the other hand, since the potential of the set terminal S of the RS FF 14 has returned to “H”, the potential of the inverted output terminal QB (point g) of the RS FF 14 becomes “H”.

Thus, the NOR circuit 8a of the set circuit
Changes to "L", the FET 8b turns off, and the current of the set coil 15a of the latch relay disappears, but the output contact 15c of the latch relay remains closed (alarm output). When the FET 8b is turned off, the capacitor 10b of the power supply for setting is charged again, and at times t6 and t7,
The discharging and charging operations similar to those at time points t4 and t5 are repeated. Thereafter, this discharging operation is repeated as long as the potential of the inverted output terminal QB (point e) of the RS FF 6 is "L".

Since the pulse current continues to flow through the set coil 15a in this manner, the setting of the latch relay 15 is ensured, and at the same time, the display LED 17 is intermittently lit to indicate that a short circuit has occurred. The leak is temporary, and the set terminal S (d of the first RS FF 6 as the output of the leak detection circuit 3b is output at time t8.
Even if the potential at the point (point) returns to “H”, the RS • FF 6 continues the set state, the potential at the inverted output terminal QB (point e) remains “L”, The discharge charging of 10b is repeated.

Once the capacitor 12b of the reset power supply is charged, the charged state is maintained even if the capacitor 10b of the set power supply is discharged by the action of the diode 12a (see the f2 point voltage in FIG. 3). Power cutoff detection circuit 5
Is the voltage (b) of the capacitor 2c of the power supply for the load state detection circuit.
Point) is sufficiently high, as described above, the Zener diode 5a
Is turned on, the transistor 5c is turned on, and the transistor 5e is turned on.
Is off, the first RS · F is connected via the resistor 5f.
The potential of the reset terminal R (point c) of F6 is "H".

At time t9, the AC power supply 1 is cut off (point a), and at time t10, the voltage of the capacitor 2c of the load state detection circuit power supply (point b) is changed to the power supply cutoff detection circuit 5.
, Ie, below the Zener voltage of the Zener diode 5a, the transistor 5c is turned off and the transistor 5e is turned on, so that the potential of the reset terminal R (point c) of the first RS FF 6 becomes "L", RS ・ FF
6 is reset, the potential of the output terminal Q of the RS • FF 6 becomes “L”, and the potential of the inverted output terminal QB (point e) becomes “H”. Accordingly, the NOR circuit 9a of the reset circuit 9
Since both inputs are "L", the output potential of the NOR circuit 9a becomes "H" and the FET 9b is turned on.

When the FET 9b is turned on, a discharge current (arrow I) flows from the capacitor 12b of the reset power supply 12 to the reset coil 15b of the latch relay 15, the output contact 15c of the latch relay 15 opens, and the alarm output is released. . This operation is similarly performed when the reset push button switch 4 is pressed. (Embodiment 2) FIG. 2 is a circuit diagram showing a configuration as a second embodiment of the present invention. 1 is different from FIG. 1 in that the load state detection circuit 3 includes a current transformer 3c and a current detection circuit 3d, and has a function of detecting a current level required for alarming the electric circuit. Power supply 2
Is provided on the AC terminal side of the bridge rectifier 2a, and the setting power supply 10 is connected directly to the capacitor 10 via the resistor 10a and the rectifier 10c from the AC circuit.
b, the discharge detection circuit 13 is connected to the positive electrode of the load state detection circuit power supply 2 and the second RS
A resistor 13a connecting the reset terminal R of the FF 14;
The reset terminal R of the S-FF 14 has an anode, and the diode 13b having a cathode connected to the positive electrode of the capacitor 10b of the setting power source;
And the input of the NOR circuit 9a of the reset circuit 9
1 in that the potential of the inverted output terminal QB (point g) of the second RS • FF 14 is further added to the same two inputs as in FIG.

The time chart of FIG. 3 is similarly applied to the circuit of FIG. Regarding the above, the current detection circuit 3d in the load state detection circuit 3 converts the input of the current transformer 3c that extracts the current of the AC circuit into an effective value, and the value is a predetermined value, for example, when the wiring breaker is connected to the circuit breaker. When the current value exceeds 70% of the current value for automatically shutting off, the load state detection circuit 3 of this configuration issues a preliminary alarm output before the electric circuit is automatically cut off, thereby preventing the electric circuit cutoff. Used when you want to.

In the above, the resistor 2b of the power supply 2 for the load state detection circuit is placed on the AC terminal side of the rectifier 2a to lower the voltage applied to the rectifier 2a, thereby reducing the size of parts. Regarding the above, if the setting power supply 10 is to be produced from the DC output (positive pole) side of the rectifier 2a in the above configuration, the voltage of the setting power supply 10 can be made higher than the voltage of the load state detection circuit power supply 2. It is because it disappears.

With respect to the above, the discharge detection circuit 13 is configured as shown in FIG. 2 to detect a voltage drop due to the discharge of the setting power supply capacitor 10b with the threshold value of the input of the RS / FF 14. This eliminates the need for a comparator. As for the above, FIG.
In this case, while the reset push-button switch 4 is being pressed, the FET 9b continues to be turned on. At the beginning of the press, an effective (large) pulse current due to the discharge of the capacitor 12b flows through the reset coil 15b, but thereafter the invalid (small) Na) The current just keeps flowing.

However, in the case of FIG. 2, the FET 9b is turned on,
When the reset power supply capacitor 12b discharges, the voltage of the set power supply capacitor 10b also decreases. However, when this voltage falls below the detection level of the discharge detection circuit 13, the potential of the reset terminal R of the second RS FF 14 Becomes “L”, and the inverted output terminal QB (g
The potential of the reset circuit 9 becomes “H”.
The output potential of the R circuit 9a becomes "L" and the FET 9b turns off.

As a result, when the voltage of the capacitors 10b and 12b rises and the voltage of the capacitor 10b exceeds the charge detection level, the operation of the charge detection circuit 11
Since the potential of the inverting output terminal QB (point g) of the FF 14 becomes "L" again, the output of the NOR circuit 9a becomes "H" and the FET 9b is turned on. Therefore, while the reset push button switch 4 is kept pressed, the reset coil 1
The discharge of the capacitor 12b to 5b is repeated, and the reset of the latch relay 15 can be surely performed.

[0042]

According to the present invention, an overload and a short circuit of the electric circuit are detected and combined with a circuit breaker for automatically shutting off the electric circuit, the power is supplied from the electric circuit to operate, and an alarm is output. The following effects can be obtained in the alarm circuit. A latch relay is used as a means to output a warning about the load condition of the electric circuit, and a pulse is repeatedly driven at the same time as the warning display LED. Therefore, even if the average current is very small, sufficient brightness of the LED can be obtained. Since the latch relay is repeatedly pulse-driven, even if the latch relay is inverted due to an impact or the like, it is corrected by the next pulse, and the operation reliability is improved.

Since the latch relay is reset when the power is turned off, the state of the latch relay when the power is turned on is stabilized, and unnecessary troubles in the external sequence can be avoided. Since the reset capacitor 12b, which is the power source for resetting the latch relay, is charged from the setting capacitor 10b, which is the power source for setting the latch relay, via the diode 12a, the reset capacitor 12b must be reset when the latch relay needs to be reset. Is charged to a sufficient voltage, and the latch relay can be reliably reset.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration as a first embodiment of the present invention;

FIG. 2 is a circuit diagram showing a configuration as a second embodiment of the present invention;

FIG. 3 is a time chart showing an example of a logic level or a signal waveform of each unit in FIGS. 1 and 2;

[Explanation of symbols]

REFERENCE SIGNS LIST 1 AC power supply 2 Power supply for load state detection circuit 2a Bridge rectifier 2b Resistor 2c Capacitor 3 Load state detection circuit 3a Zero-phase current transformer 3b Leakage detection circuit 3c Current transformer 3d Current detection circuit 4 Push button switch for reset 5 Power cutoff detection Circuit 5a Zener diode 5b Resistance 5c Transistor 5d Resistance 5e Transistor 5f Resistance 6 First RS flip-flop (RS / FF) 8 Set circuit 8a NOR circuit 8b FET 9 Reset circuit 9a NOR circuit 9b FET 10 Set power supply 10a Resistance 10b Capacitor 10c Rectifier 11 Charge detection circuit 11a Zener diode 11b Resistance 11c Transistor 11d Resistance 12 Reset power supply 12a Diode 12b Capacitor 13 Discharge detection circuit 13a Resistance 13b Diode 14 Second RS flip-flop (RS · F
F) 15 Latch relay 15a Set coil 15b Reset coil 15c Output contact 17 LED for display

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification code FI Theme coat ゛ (Reference) H02H 3/16 H02H 3/16 BF term (Reference) 2G014 AA03 AA16 AA27 AB09 AC16 AC18 5C087 AA12 AA23 DD08 DD29 DD34 EE07 FF04 FF09 FF12 GG08 GG26 GG31 GG55 GG56 GG57 GG70 GG72 GG79 5G004 AA01 AB01 BA01 BA03 BA04 CA02 DA01 DB01 DB02 DC01 DC07 FA01 5G042 CC03 CC06 DD02 DD13 DD14

Claims (6)

[Claims] 1. An alarm circuit for detecting an overload, a short circuit, etc. of the electric circuit, being combined with a circuit breaker for automatically shutting off the electric circuit, being operated by being supplied with power from the electric circuit, and outputting an alarm. Load state detecting means for detecting a state in which an alarm should be issued for the load on the electric circuit; storage means for storing that the state in which the alarm should be issued by the load state detecting means has been performed; The contact that outputs an alarm to the outside is closed (opened) by this force, and this state is maintained even after the coil is deenergized.
A latch relay that opens (closes) the contact by the bias of the reset coil and maintains this state even after the coil is deenergized; a means for displaying an alarm; and a memory for storing the set coil. Means for repeating on and off of the energizing, deenergizing and alarm display means; means for inputting a reset command; and operation of the reset command input means or disappearance of the voltage of the electric circuit. Means for erasing the memory and energizing the reset coil. An alarm circuit for a circuit breaker for wiring. 2. An alarm circuit for a circuit breaker according to claim 1, wherein said load state detecting means detects that a leakage current of said electric circuit has exceeded a predetermined value. Alarm circuit for wiring breakers to be used. 3. The alarm circuit for a circuit breaker according to claim 1, wherein said load state detecting means sets a predetermined level at which a main current of said circuit breaker does not automatically cut off said circuit breaker. An alarm circuit for a circuit breaker for wiring, wherein the alarm circuit detects the exceeding. 4. An alarm circuit for a circuit breaker according to claim 1, wherein said alarm display means comprises an LED connected in series with said set coil. Alarm circuit for circuit breaker. 5. The alarm circuit for a circuit breaker according to claim 1, wherein the set coil is rectified by rectifying an AC voltage of the electric circuit and charged by a discharge current of a first capacitor. Energized,
An alarm circuit for a circuit breaker for wiring, wherein the reset coil is energized by a discharge current of a second capacitor charged from a first capacitor via a diode. 6. An alarm circuit for a circuit breaker according to claim 1, wherein said means for energizing said reset coil energizes said reset coil during operation of said reset command operation input means. An alarm circuit for a circuit breaker for wiring, characterized in that the deenergization is repeated.