JP2001127561A - Optical high frequency reception circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance the frequency band characteristic the optical high frequency reception circuit by improving the circuit. SOLUTION: A bias supply terminal 11, a signal output terminal 13 and plural ground patterns 15-18 are formed on one side of a printed circuit board 10. An N-electrode (bias side electrode) of a photo diode 20 (light receiving element) is connected to the bias supply terminal 11 and a P-electrode (ground side electrode) of the photodiode 20 is connected to the output terminal 13. One electrode of a high frequency capacitor 40 is connected to the bias supply terminal 11. One end of a load resistor 38 is connected to the output terminal 13. The other electrode of the high frequency capacitor 40 and the other end of the load resistor 38 are connected to the same ground pattern 15 formed on the one side 10a of the printed circuit board 10.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical high-frequency receiving circuit in an optical communication system for transmitting a high-frequency optical signal as a carrier.

[0002]

2. Description of the Related Art In recent years, widespread practical use of optical communication systems has begun, and microwaves (3 to 30 GHz) / sub-microwaves (1 to 3 GHz) are used in CATV, public communication, and the like.
Has been trialled and implemented in a communication field that handles signals in the frequency domain. In the above optical communication system, it is necessary for a user to receive an optical signal obtained by modulating a high-frequency signal and convert it into a high-frequency electric signal, and a receiver circuit having high response characteristics is being developed.

[0003] A conventional optical high-frequency receiving circuit will be described below. FIG. 15 shows a conventional optical high-frequency receiving circuit.
This structure has a circuit board 10. One surface 10a of the circuit board 10 has one bias supply terminal 1
1, the other six bias supply terminals 12, the signal output terminal 13, and the ground pattern 1 separated into a plurality (here, ten) by the bias supply terminals 11, 12.
4 to 18 are formed as a thin film. Note that a common ground pattern (not shown) is formed on the back surface of the circuit board 10, and the ground patterns 14 to 18 are connected to the common ground pattern via through holes 19.

The one end portions 11a and 12a of the bias supply terminals 11 and 12 are arranged side by side on one side (the upper side in FIG. 15) of the circuit board 10. The bias supply terminal 11 is elongated and the other end 11 b is located substantially at the center of the circuit board 10. This other end 11b
Has a substantially U-shape, and a pair of opposing pieces are connected to connecting portions 11x and 11y protruding in a direction approaching each other.

At approximately the center of the surface 10a of the circuit board 10, a photodiode 20 (light receiving element) is mounted. The photodiode 20 has a rectangular shape, and has N poles (cathode, bias side electrode) near two opposing sides thereof, and P poles (anode, ground side electrode) between them. The pair of N poles is connected to a pair of connecting portions 11x and 11y of the bias supply terminal 11.
It is connected to the.

The photodiode 20 has a face-down configuration in which electrode surfaces are arranged on the circuit board 10 side, and is mounted on the circuit board 10 by a flip-chip mounting method. FIG. 15 does not show an optical fiber and an optical coupling system for introducing an input optical signal.

The signal output terminal 13 extends from the photodiode 20 in a slender right direction and reaches the right side of the circuit board 10 or its vicinity. This signal output terminal 13
Is divided into a left first portion 13a and a right second portion 13b. The P pole of the photodiode 20 is connected to the left end of the first portion 13a.

[0008] An MMIC (monolithic microwave integrated circuit) chip 30 is mounted on the surface 10a of the circuit board 10 at the right side of the photodiode 20. This MMIC chip 30 (IC chip) has ten electrodes. That is, the signal input electrode 31 is provided at the center of the left side, the signal output electrode 32 is provided at the center of the right side, and two ground electrodes 33 and 34 are provided at the lower and left sides of the lower side. Bias electrodes 35 are provided at a total of six locations, two locations.

The MMIC chip 30 is arranged between the first portion 13a and the second portion 13b of the signal output terminal 13, the signal input electrode 31 is connected to the right end of the first portion 13a, and the signal output electrode 32 is connected to the left end of the second portion 13b.

The MMIC chip 30 includes a circuit in which a DC cut capacitor 36 and a preamplifier 37 (amplifier) are connected in series from a signal input electrode 31 to a signal output electrode 32, as shown in an equivalent circuit of FIG. , Load resistance 3
8 is provided. FIG. 15 shows only the load resistor 38. One end of the load resistor 38 is connected to the signal input electrode 31.
And the other end is connected to the ground electrode 33. The ground electrode 33 is connected to the ground pattern 15 of the circuit board 10.

The preamplifier 37 is constituted by a plurality of stages of FETs. The ground electrode 34 and the bias electrode 35 are for the preamplifier 37. The ground electrode 34 is connected to the ground pattern 16. The six bias supply terminals 12 of the circuit board 10 are elongated from the upper side of the circuit board 10 and the other ends are gathered at the place where the MMIC chip 30 is installed. The six bias electrodes 35 of the MMIC chip 30 are connected. Note that a high-frequency capacitor 50 is connected between the bias supply terminal 12 and the ground pattern 17.

Further, a high-frequency capacitor 40 is mounted on the surface 10a of the circuit board 10. One electrode of the high-frequency capacitor 40 is connected to the photodiode 20
Near the other end 1 of the bias supply terminal 11.
1b. The other electrode of the high-frequency capacitor 40 is connected to the ground pattern 14.

The operation of the conventional structure having the above structure will be described mainly with reference to an equivalent circuit shown in FIG. When a specified bias voltage V0 from an external power supply is applied to the N pole of the photodiode 20 via the monitor resistor 55 and the bias supply terminal 11 disposed outside the circuit board 10,
The photodiode 20 is activated. Note that the monitor resistor 55 is not an essential component in this optical high-frequency receiving circuit. For example, at the time of shipment, photodiode 2
A predetermined light is applied to 0 and the voltage between both ends of the monitor resistor 55 is monitored to check whether or not a current has normally flowed through the photodiode 20.

When the photodiode 20 in the operating state receives a high-frequency optical signal, a corresponding current flows. This current is applied to the first portion 13a of the signal output terminal 13.
And flows through the load resistor 38 of the MMIC chip 30 to the ground pattern 15 of the circuit board 10. And
The voltage drop at the load resistor 38 becomes a high-frequency electric signal. The DC component is cut by a DC cut capacitor 36 and applied to a preamplifier 37. It is sent to a circuit outside the substrate 10. The preamplifier 37 is connected to an external power supply V
It is activated by receiving a prescribed bias voltage from 1 to Vn (n = 6 in this conventional structure).

The high-frequency capacitor 40 prevents high-frequency components generated at the N pole of the photodiode 20 from flowing into the bias power supply. Photodiode 2
This is to ensure a stable bias to zero.

[0016]

The frequency response characteristics of the conventional structure will be described with reference to FIG. In FIG. 17, the horizontal axis represents frequency, and the vertical axis represents S21 (E / O), that is, the pass characteristic when converting an optical signal into an electric signal. As shown in FIG. 17, the 3 dB band (band degraded by 3 dB compared to the response level in the low frequency band) is 8.6 GHz.
And it was not possible to increase this band.
When using the conventional structure for the analog transmission system,
There is also a disadvantage that a deviation of the group delay characteristic occurs.

As a result of repeated studies on the above-mentioned deterioration of the frequency response characteristics, the present inventors have found out that the parasitic inductance between the load resistor 38 and the high-frequency capacitor 40 has a cause of deterioration. More specifically, in the conventional structure, as shown in FIG. 15, a high-frequency capacitor 40 is connected to the ground pattern 14 (this connection point is indicated by the symbol A in FIG. 16), and a load resistor 38 is connected via the ground electrode 33 to the ground pattern. 15 (this connection point is indicated by reference numeral B in FIG. 16).

As described above, the capacitor 40 and the load resistor 3
8 are connected to separate ground patterns 14 and 15 separated from each other, a parasitic inductance 101 and 102 caused by the through hole 19 of the ground patterns 14 and 15 and the circuit board 10 are provided between the connection points A and B. , A parasitic inductance component 103 caused by the common ground pattern on the back side is interposed. It has been determined that the parasitic inductances 101 to 103 cause the connection points A and B to have the same potential as a high-frequency signal, which deteriorates the frequency response characteristics.

More specifically, when the bias supply terminal 11 side is viewed from the photodiode 20, the high-frequency capacitor 40 looks like a ground short. High frequency signals are transmitted maximally for characteristic impedance (typically 50Ω) and are totally reflected for shorts. This serves to prevent a high-frequency signal from flowing into the bias power supply side. When the blocking function of the high-frequency capacitor 40 works effectively, the frequency band characteristic of the photodiode 20 can be maximized.
However, in the above-described conventional structure, when the bias supply terminal 11 side is viewed from the photodiode 20, the high-frequency capacitor 4
Since a large inductance (that is, parasitic inductances 101 to 103) in addition to zero is interposed between the ground and the ground, it is considered that the frequency band is deteriorated.

[0020]

According to a first aspect of the present invention, there is provided:
(A) a circuit board having a bias supply terminal and a signal output terminal formed on one surface; (b) a bias-side electrode connected to the bias supply terminal; a ground-side electrode connected to the signal output terminal; A bias voltage is applied via a bias supply terminal to be in an operation state, and in this operation state, a light receiving element for converting a high-frequency optical signal into an electric signal, and (c) a high-frequency capacitor having one electrode connected to the bias supply terminal And (d) a load resistor having one end connected to the signal output terminal, wherein the other electrode of the high-frequency capacitor and the other end of the load resistor are connected to the one end of the circuit board. Are connected to the same ground pattern formed on the surface.

According to a second aspect of the present invention, in the optical high-frequency receiving circuit of the first aspect, a plurality of high-frequency capacitors are connected to a ground pattern to which the other end of the load resistor is connected. I do. A third aspect of the present invention is the optical high-frequency receiving circuit according to the second aspect, further comprising a plurality of load resistors, wherein there are a plurality of sets each including at least one high-frequency capacitor and a load resistor. The load resistance is connected to the same ground pattern,
Different sets are connected to different ground patterns.

According to a fourth aspect of the present invention, in the optical high-frequency receiving circuit according to the third aspect, the light-receiving element has two bias-side electrodes.
These bias-side electrodes are disposed apart from the center of the light receiving element, one ground-side electrode is disposed between the bias-side electrodes, and a high-frequency capacitor and a load resistor correspond to the bias-side electrodes. One of the electrodes of each of the high-frequency capacitors is connected to the bias supply terminal near the corresponding bias-side electrode, and the high-frequency capacitor and the same set of load resistors corresponding thereto are connected to the same ground. It is characterized by being connected to a pattern. According to a fifth aspect of the present invention, in the optical high-frequency receiving circuit of the first to fourth aspects, a signal output terminal has a first portion and a second portion separated from each other, and the first portion has a ground side of the light receiving element. The electrodes are connected, and an amplifier is connected between the first portion and the second portion.

According to a sixth aspect of the present invention, there is provided the optical high-frequency receiving circuit according to the first aspect, wherein the first and second signal output terminals are separated from each other.
And a second portion, a ground-side electrode of the light receiving element is connected to the first portion, and an IC chip is connected between the first portion and the second portion. A signal input electrode connected to a first portion of the signal output terminal, a signal output electrode connected to a second portion of the signal output terminal, and a ground electrode; Is connected between the signal input electrode and the signal output electrode, the load resistance is connected between the signal input electrode and the ground electrode, and the ground electrode of the IC chip has the same ground as the high-frequency capacitor. It is characterized by being connected to a pattern.

According to a seventh aspect of the present invention, in the optical high-frequency receiving circuit of the sixth aspect, a plurality of high-frequency capacitors are mounted, and the IC chip has a plurality of built-in load resistors each forming a pair with the high-frequency capacitor. It has a plurality of ground electrodes corresponding to the load resistance, and each load resistance is connected to the same ground pattern as the same set of high-frequency capacitors via the corresponding ground electrode. It is characterized by being connected.

According to an eighth aspect of the present invention, in the optical high-frequency receiving circuit according to the seventh aspect, the light receiving element has two bias-side electrodes.
The bias-side electrodes are disposed apart from the center of the light receiving element, one ground-side electrode is disposed between the bias-side electrodes, and a high-frequency capacitor and a load resistor are connected to the two bias-side electrodes. And one electrode of each high-frequency capacitor is connected to a bias supply terminal near the corresponding bias-side electrode, and each high-frequency capacitor and the same set of load resistances corresponding thereto have the same load resistance. It is characterized by being connected to a ground pattern.

According to a ninth aspect of the present invention, in the optical high-frequency receiving circuit of the sixth to eighth aspects, another bias supply terminal for supplying a bias voltage to an amplifier of an IC chip is formed on a circuit board, The IC chip has a bias electrode connected to the bias supply terminal, and at least one bias electrode of the IC chip is located between a signal input electrode and a ground electrode, and has at least one bias electrode for the amplifier. One bias supply terminal is disposed between the bias supply terminal for the light receiving element and the ground pattern to which the load resistor is connected, and the high-frequency capacitor is connected to the bias supply terminal for the amplifier, and one of the electrodes is connected to the bias supply terminal. Is connected to a bias supply terminal for the light receiving element, and the other electrode is connected to the same ground pattern as the load resistance. And it features.

According to a tenth aspect of the present invention, in the optical high-frequency receiving circuit of the sixth to eighth aspects, another bias supply terminal for supplying a bias voltage to an amplifier of an IC chip is formed on a circuit board, The IC chip has a bias electrode connected to the bias supply terminal, and the signal input electrode and the ground electrode of the IC chip are adjacent to each other without the bias electrode interposed therebetween. The bias supply terminal and the ground pattern to which the load resistor is connected are adjacent without interposing the bias supply terminal for the amplifier, and one electrode of the high-frequency capacitor is connected to the bias supply terminal for the light receiving element. And the other electrode is connected to the same ground pattern as the load resistance.

According to an eleventh aspect of the present invention, in the optical high-frequency receiving circuits of the ninth and tenth aspects, the edge of the ground pattern to which the bias supply terminal for the light receiving element and the load resistor are connected is parallel. 11. The optical high-frequency receiving circuit according to claim 9, wherein the two electrodes of the high-frequency capacitor are close to each other and are connected near the edges so as to intersect with the parallel edges.

According to a twelfth aspect of the present invention, (a) a circuit board having a bias supply terminal and a signal output terminal formed on one surface, and (b) a bias side electrode is connected to the bias supply terminal. A light receiving element that is connected to the signal output terminal via the bias supply terminal, receives a bias voltage via the bias supply terminal, enters an operation state, and converts a high-frequency optical signal into an electric signal in the operation state;
(C) an optical high-frequency receiving circuit comprising: a high-frequency capacitor having one electrode connected to the bias supply terminal; wherein the other electrode of the high-frequency capacitor and the ground electrode of the light receiving element are connected to the ground electrode of the circuit board. It is characterized by being connected to the same ground pattern formed on one surface. According to a thirteenth aspect of the present invention, in the optical high-frequency receiving circuit of the first to twelfth aspects, the light receiving element comprises a photodiode, the N pole thereof serves as the bias side electrode, and the P pole serves as the ground side electrode. It is characterized by.

[0030]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of an optical high-frequency receiving circuit according to the present invention will be described below with reference to the drawings. In addition, about the structure which has the same function as the above-mentioned conventional structure, the same code | symbol shall be used.

FIGS. 1 to 3 show a first embodiment of the present invention. As shown in FIG. 1, the circuit mounting structure of this embodiment is almost the same as the conventional structure of FIG. 15, and the description of the common configuration and operation will be omitted. This embodiment differs from the conventional structure in that the high-frequency capacitor 40 is not the ground pattern 14 in the vicinity, but the MMIC chip 3.
This is a point connected to the ground pattern 15 near zero. As a result, the load resistor 38 and the high-frequency capacitor 40
Are connected to the same ground pattern 15.

In this embodiment, like the conventional structure, the MM
One of the bias electrodes 35 for the amplifier 37 (the bias electrode 35 at the lower left corner of the MMIC chip 30 in the figure) is arranged between the signal input electrode 31 on the left side of the IC chip 30 and the ground electrode 33 on the lower side. I have. Therefore, the other end 1 of the bias supply terminal 11 for the photodiode 20
A bias supply terminal 12 for an amplifier 37 is interposed between the ground pattern 1b and the ground pattern 15.
Therefore, the high-frequency capacitor 40 is disposed so as to straddle the bias supply terminal 12, and both electrodes thereof are connected to the other end 11 b of the bias supply terminal 11 and the ground pattern 15, respectively.

FIG. 2 shows an equivalent circuit of the first embodiment. It should be noted here that the connection point A of the high-frequency capacitor 40 to the ground pattern 15 and the connection point B of the load resistor 38 to the ground pattern 15 (actually, the connection point of the ground electrode 33 and the ground pattern 15). And the ground pattern 15 is connected only through a short portion thereof, so that no parasitic inductance is present between the connection points A and B as in the conventional structure, and these connection points A and B are at the same potential (like a high-frequency signal). (Same potential).

As a result, it is possible to prevent the frequency response characteristic from deteriorating due to the parasitic inductance. FIG. 3 shows the frequency response characteristics in the first embodiment. In FIG. 3, the horizontal axis represents frequency, and the vertical axis represents S21 (E / O), that is, the pass characteristic when converting an optical signal into an electric signal. As is clear from the figure, the 3 dB band is 13 GHz, which is a significant improvement compared to the frequency response characteristic of the conventional structure (see FIG. 17). In FIG. 3, since the parasitic inductance 102 caused by the through hole 19 of the ground pattern 15 is not interposed between the connection points A and B, it does not significantly affect the frequency response characteristics.

The above embodiment can receive either digital or analog optical high-frequency signals. Since the analog transmission system is advantageous in terms of facility simplicity and cost, it is often adopted in short-to-medium distance transmission with little noise and signal distortion. A flat group delay characteristic can be obtained in the range. The same applies to the embodiments described below.

FIG. 4 shows a second embodiment of the present invention. This embodiment is basically the same as the first embodiment,
The shapes of the bias supply terminals 11 and 12 of the circuit board 10 and the ground patterns 14 to 18 are different. In particular, M
The difference is that the ground pattern 15 connected to the load resistor 38 of the MIC chip 30 and the bias supply terminal 12 adjacent to the ground pattern 15 extend to the left. As a result, the ground pattern 15 is connected to the other end 11 b of the bias supply terminal 11.
Has an edge 15e extending in parallel with the edge 11e. These linearly extending edges 11e and 15e are close to each other, and the bias supply terminal 12 is elongated in parallel between them. In the second embodiment, since the high-frequency capacitor 40 is connected to the adjacent edges 11e and 15e so as to intersect with the edges 11e and 15e, the length is short.

FIG. 5 shows a third embodiment of the present invention. In this embodiment, the ground electrode 3 of the MMIC chip 30
The third embodiment differs from the first embodiment in that the positions of the bias electrode 35 and the bias electrode 35 are interchanged. That is, the ground electrode 33 is
It is arranged at the lower left corner of the C chip 30 and is adjacent to the signal input electrode 31 without the interposition of the bias electrode 35. Accordingly, the ground pattern 15 to which the load resistor 38 is connected is connected.
Is arranged adjacent to the other end 11b of the bias supply terminal 11 without the bias supply terminal 12 for the amplifier 37. As a result, the high-frequency capacitor 40
It is connected between the ground electrode 15 and the other end 11 b of the bias supply terminal 11 without straddling the bias supply terminal 12. Also in this embodiment, the ground electrode 15 and the bias supply terminal 11 are close to the parallel edges 15e, 11e.
And a high-frequency capacitor 40 is connected so as to intersect these edges 15e and 11e.

FIG. 6 shows a fourth embodiment of the present invention. This embodiment is similar to the third embodiment of FIG. 5, but differs greatly in that two (plural) high-frequency capacitors 40a and 40b are mounted on the circuit board 10. Correspondingly, the MMIC chip 30 incorporates two load resistors 38a and 38b, and
8a, 38b are connected to two ground electrodes 33a,
The circuit board 10 has two ground patterns 15a and 15b connected to the ground electrodes 33a and 33b. In the present embodiment, the other end 11 b of the bias supply terminal 11,
Photodiode 20, ground patterns 15a, 15
b, the left end of the MMIC chip 30 is symmetrical.

The fourth embodiment will be described in detail. FIG.
As shown in the figure, the ground electrodes 33a and 33b
It is arranged at the lower left corner and upper left corner of the C chip 30, and load resistors 38a and 38b are connected between the signal input electrode and the ground electrodes 33a and 33b, respectively. The ground patterns 15a and 15b are connected to the other end 11b of the bias supply terminal 11 for the photodiode 20.
Are arranged vertically so as to sandwich them. A load resistor 38a is connected to one ground pattern 15a via a ground electrode 33a, and the other load resistor 38b is connected to the other ground pattern 15b via a ground electrode 33b.

One electrode of the high-frequency capacitor 40a is connected to the other end 11b of the bias supply terminal 11 in the vicinity of one N-pole (the lower side in the figure) of the photodiode 20. The other electrode is connected to the ground pattern 15a. Similarly, one electrode of the high-frequency capacitor 40b is connected to the other end 11b of the bias supply terminal 11 near the other N-pole (upper side in the figure) of the photodiode 20, and is connected to the other end of the high-frequency capacitor 40b. Are connected to the ground pattern 15b.

FIG. 7 shows an equivalent circuit of the fourth embodiment. In FIG. 7, an amplifier 3 is shown for simplifying the drawing.
The bias circuit and the ground circuit for 7 are omitted. The connection point A of the high-frequency capacitor 40a to the ground pattern 15a and the connection point B of the load resistor 38a to the ground pattern 15a are connected only through a short portion of the ground pattern 15a. The connection points A and B are at the same potential (the same potential as a high-frequency signal) without any parasitic inductance between them as in the conventional structure.

Similarly, since the connection point C of the high-frequency capacitor 40b to the ground pattern 15b and the connection point D of the load resistor 38b to the ground pattern 15b are connected only through a short portion of the ground pattern 15b.
There is no parasitic inductance between the connection points C and D as in the conventional structure, and the connection points C and D have the same potential (the same potential as a high-frequency signal).

As described above, the two high-frequency capacitors 40
When a and 40b are used, the ground patterns 15a and 15b to which they are connected are often separated.
However, if the load resistances 38a and 38b corresponding to the high-frequency capacitors 40a and 40b are provided and connected to the same ground patterns 15a and 15b, the effect of the parasitic inductance is eliminated as described above to improve the frequency response characteristics. You can expect it. The parasitic inductances 105a and 105b are connected to the ground patterns 15a and 15a.
Although this is caused by the through hole 19 of 5b, it is not interposed between the connection points A and B and between C and D, so that the frequency response characteristics are not largely affected.

In the above embodiment, since two (plural) high-frequency capacitors 40a and 40b are used, more excellent frequency characteristics can be obtained. That is, the high-frequency capacitor may not have sufficient bypass characteristics alone due to restrictions on the size, withstand voltage, and individual characteristics, but even in such a case, as described above, the plurality of high-frequency capacitors 40a, 40
0b to secure a plurality of bypass paths,
Bypass characteristics can be improved and frequency characteristics can be improved.

In the above embodiment, the photodiode 20
High frequency capacitors 40a,
Since the terminal 40b is connected, the frequency characteristics can be improved also in this respect.

As in the fourth embodiment, two sets of high-frequency capacitors 40a and 40b and load resistors 38a and 38b are
Ground patterns 15a, 15b different for each set
Can be applied to the case where the high-frequency capacitor straddles the bias supply terminal 12 for the MMIC 30 as in the first and second embodiments described above. Further, in connection with the fourth embodiment, a plurality of high-frequency capacitors and a plurality of load resistors may all be connected to the same ground pattern. Further, a plurality of high frequency capacitors may be connected to the same ground pattern as one load resistor.

FIG. 8 shows a fifth embodiment of the present invention. In this embodiment, the MMIC chip 30 includes the DC cut capacitor 36 and the preamplifier 3 as in the above-described embodiment.
7 (both not shown in FIG. 8), but no load resistance. Instead, MMIC
A load resistor 38 separate from the circuit board 10 is mounted on the circuit board 10. One end of the load resistor 38 is connected to the signal output terminal 1.
3, and the other end is connected to the same ground pattern 15 as the frequency capacitor 40.

The equivalent circuit of the fifth embodiment is the same as the equivalent circuit of the first embodiment shown in FIG. 2 and the effect is the same, so that the detailed description will be omitted. Using the MMIC chip 30 of the fifth embodiment, a plurality of sets of load resistors and high frequency capacitors may be mounted as in the fourth embodiment.

FIG. 9 shows a sixth embodiment of the present invention.
This embodiment is similar to the first embodiment of FIG.
The circuit configuration is simplified without using an MIC chip.
Instead, there is no signal output amplification function. Briefly, the first portion 13a and the second portion 1 of the signal output terminal 13 will be described.
3b, a DC cut capacitor 36 is connected. Also, the first portion 13a and the ground pattern 15
Is connected to a load resistor 38. A high-frequency capacitor 40 is connected between the bias supply terminal 11 and the ground pattern 15. Further, a monitor resistor 55 is mounted on the circuit board 10 and is connected between the separated portions 11a and 11b of the bias supply terminal. In the equivalent circuit corresponding to the sixth embodiment, the preamplifier 37 is omitted from FIG. 2 and the operation thereof can be easily understood from the first embodiment, and therefore, the description is omitted.

FIG. 10 shows a seventh embodiment of the present invention.
This embodiment differs from the sixth embodiment in FIG. 9 only in the following points. That is, the photodiode 20 is mounted on the chip carrier 25 and mounted on the circuit board 10.
By using the chip carrier 25 as in the present embodiment, it is possible to evaluate the photodiode 20 alone,
Furthermore, mounting on the circuit board 10 can be simplified.

FIG. 11 shows an eighth embodiment of the present invention.
This embodiment differs from the sixth embodiment in FIG. 9 only in the following points. That is, the photodiode 20 is connected to the circuit board 10 by the bonding wire 26. By using the bonding wire connection as in the present embodiment, it is possible to mount the photodiode 20 which is difficult to flip-chip mount on the circuit board 10, and further simplify the mounting on the circuit board 10. .

FIG. 12 shows a ninth embodiment of the present invention.
This embodiment is similar to the fourth embodiment of FIG.
The circuit configuration is simplified without using an MIC chip.
Instead, there is no signal output amplification function. Briefly, the first portion 13a and the second portion 1 of the signal output terminal 13 will be described.
3b, a DC cut capacitor 36 is connected. In addition, load resistors 38a and 38b are connected between the first portion 13a and the two ground patterns 15a and 15b. A high-frequency capacitor 4 is provided between the bias supply terminal 11 and the ground patterns 15a and 15b.
0a and 40b are connected. Furthermore, monitor resistance 5
5 is mounted on the circuit board 10 and is connected between the separated portions 11a and 11b of the bias supply terminal. In the equivalent circuit corresponding to the sixth embodiment, the preamplifier 37 is omitted from FIG. 7, and its operation can be easily understood from the fourth embodiment, so that the description is omitted.

FIG. 13 shows a tenth embodiment of the present invention. This embodiment is fundamentally different from all the above embodiments, but will be described in comparison with the nearest sixth embodiment in FIG. The difference from the sixth embodiment is that a high-frequency electric signal is output from the N pole of the photodiode 20. That is, the end 11 of the bias supply terminal 11
The first portion 13a of the signal output terminal 13 is connected to b, whereby the N-pole of the photodiode 20 is connected to the signal output terminal 13 via the bias supply terminal 11. And the high frequency capacitor 4
One electrode 0 is connected to the end 11 b of the bias supply terminal 11, and the other end is connected to the ground pattern 15. The P pole of the photodiode 20 is also connected to the same ground pattern.

FIG. 14 shows an equivalent circuit of the tenth embodiment. It should be noted here that the connection point A ′ of the high-frequency capacitor 40 to the ground pattern 15 and the connection point B ′ of the P-pole of the photodiode 20 to the ground pattern 15.
Are connected via only a short portion of the ground pattern 15, no parasitic inductance is present between the connection points A 'and B' unlike the conventional structure, and these connection points A 'and B' are the same. The point is that the potential (the same potential as a high-frequency signal). As a result, it is possible to prevent the frequency response characteristic from deteriorating due to the parasitic inductance. In addition, the tenth
In the embodiment, a load resistor may be interposed between the P pole of the photodiode 20 and the ground pattern 15.

The present invention is not limited to the above embodiment, and various modes are possible. The photodiode of the above embodiment may be a pin photodiode or an avalanche photodiode. Further, another light receiving element may be used instead of the photodiode. The DC cut capacitor may be provided outside the circuit board.

[0056]

As described above, according to the first aspect of the present invention, by connecting the high-frequency capacitor and the load resistor to the same ground pattern, the parasitic inductance is established between the connection points to these ground patterns. No intervening, and the frequency response characteristics can be greatly improved. According to the second aspect of the present invention, the frequency response characteristic can be further improved by using a plurality of high-frequency capacitors. According to the third aspect of the present invention, good high-frequency response characteristics can be ensured even if the ground pattern to which a plurality of high-frequency capacitors are connected must be separated.

According to the fourth aspect of the present invention, the light receiving element 2
By arranging two high-frequency capacitors close to each bias-side electrode, the frequency response characteristics can be further improved. According to the fifth aspect of the present invention, a high-frequency electric signal can be amplified in the circuit board. According to the sixth aspect of the present invention, since an IC chip having a built-in amplifier and load resistance is used, a high-frequency electric signal can be amplified and the circuit structure can be simplified.

According to the seventh aspect of the present invention, the second, third and third
The combined effect of the sixth aspect can be obtained. According to the eighth aspect of the present invention, an effect obtained by combining the second, third, fourth, and sixth aspects can be obtained. According to the ninth aspect of the present invention, the effects of the present invention can be obtained even if the signal input electrode of the IC chip is separated from the ground electrode. According to the tenth aspect of the present invention, since the signal input electrode and the ground electrode of the IC chip are arranged adjacent to each other, the connection of the high-frequency capacitor becomes easy. According to an eleventh aspect of the present invention,
Since the bias supply terminal for the light receiving element and the ground pattern have parallel edges close to each other, the connection of the high-frequency capacitor is facilitated. According to the twelfth aspect of the present invention, the same effect as in the first aspect can be obtained.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating an optical high-frequency receiving circuit according to a first embodiment of the present invention.

FIG. 2 is an equivalent circuit diagram of the first embodiment.

FIG. 3 is a diagram illustrating a frequency response characteristic of the first embodiment.

FIG. 4 is a diagram illustrating an optical high-frequency receiving circuit according to a second embodiment of the present invention.

FIG. 5 is a diagram illustrating an optical high-frequency receiving circuit according to a third embodiment of the present invention.

FIG. 6 is a diagram illustrating an optical high-frequency receiving circuit according to a fourth embodiment of the present invention.

FIG. 7 is an equivalent circuit diagram of the fourth embodiment.

FIG. 8 is a diagram illustrating an optical high-frequency receiving circuit according to a fifth embodiment of the present invention.

FIG. 9 is a diagram illustrating an optical high-frequency receiving circuit according to a sixth embodiment of the present invention.

FIG. 10 is a diagram illustrating an optical high-frequency receiving circuit according to a seventh embodiment of the present invention.

FIG. 11 is a diagram illustrating an optical high-frequency receiving circuit according to an eighth embodiment of the present invention.

FIG. 12 is a diagram illustrating an optical high-frequency receiving circuit according to a ninth embodiment of the present invention.

FIG. 13 is a diagram showing an optical high-frequency receiving circuit according to a tenth embodiment of the present invention.

FIG. 14 is an equivalent circuit diagram of the tenth embodiment.

FIG. 15 is a diagram illustrating a conventional optical high-frequency receiving circuit.

FIG. 16 is an equivalent circuit diagram of a conventional structure.

FIG. 17 is a diagram showing frequency response characteristics of a conventional structure.

[Explanation of symbols]

 Reference Signs List 10 circuit board 11 bias supply terminal (for light receiving element) 12 bias supply terminal (for IC chip) 13 signal output terminal 13a first part 13b second part 15, 15a, 15b ground pattern 20 photodiode (light receiving element) 30 MMIC chip (IC chip) 37 Preamplifier (amplifier) 38, 38a, 38b Load resistance 40, 40a, 40b High frequency capacitor

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) H04B 10/28 10/26 10/14 10/04 10/06 F term (Reference) 5F038 AC00 AR00 BE07 BE09 CA06 CA10 DF02 EZ20 5F049 NA03 NB01 SE14 TA03 TA05 TA20 UA07 5J092 AA03 AA11 AA56 FA16 HA01 HA25 HA44 SA01 SA13 TA01 TA02 5K002 AA03 BA07 CA03 GA01 GA02

Claims (13)

[Claims] 1. A circuit board having a bias supply terminal and a signal output terminal formed on one surface, a bias side electrode connected to the bias supply terminal, and a ground electrode connected to the signal output terminal. And a light receiving element for converting a high-frequency optical signal into an electric signal in this operating state by receiving a bias voltage through the bias supply terminal, and (c) connecting one of the electrodes to the bias supply terminal. An optical high-frequency receiving circuit comprising: a connected high-frequency capacitor; and (d) a load resistor having one end connected to the signal output terminal. An optical high-frequency receiving circuit, which is connected to the same ground pattern formed on the one surface of the circuit board. 2. The optical high-frequency receiving circuit according to claim 1, wherein the plurality of high-frequency capacitors are connected to a ground pattern to which the other end of the load resistor is connected. 3. A plurality of sets each further including a plurality of load resistors, each including at least one high-frequency capacitor and a load resistor, wherein each set of the high-frequency capacitors and the load resistors are connected to the same ground pattern, and Then
The optical high-frequency receiving circuit according to claim 2, wherein the optical high-frequency receiving circuit is connected to different ground patterns. 4. The light receiving element has two bias side electrodes, these bias side electrodes are arranged apart from the center of the light receiving element, and one ground side electrode is arranged between the bias side electrodes. Two high frequency capacitors and a load resistor are mounted on the bias side electrode, and one electrode of each of the high frequency capacitors is connected to the bias supply terminal near the corresponding bias side electrode, and the high frequency capacitor and the corresponding The same set of load resistances
The optical high frequency receiving circuit according to claim 3, wherein the optical high frequency receiving circuit is connected to the same ground pattern. 5. A signal output terminal having a first portion and a second portion separated from each other, a ground-side electrode of a light receiving element is connected to the first portion, and a first portion and a second portion are provided between the first portion and the second portion. 5. An amplifier is connected to the power supply.
The optical high-frequency receiving circuit according to any one of the above. 6. A signal output terminal having a first portion and a second portion separated from each other, a ground-side electrode of a light receiving element is connected to the first portion, and a signal output terminal is provided between the first portion and the second portion. The IC chip has a built-in amplifier and a load resistor, and is further connected to a signal input electrode connected to a first portion of the signal output terminal and a second portion of the signal output terminal. A signal output electrode, a ground electrode, the amplifier is connected between the signal input electrode and the signal output electrode, and the load resistance is connected between the signal input electrode and the ground electrode. 2. The optical high-frequency receiving circuit according to claim 1, wherein a ground electrode of the IC chip is connected to the same ground pattern as a high-frequency capacitor. 7. An IC having a plurality of high-frequency capacitors mounted thereon,
The chip incorporates a plurality of load resistors each forming a pair with the high-frequency capacitor, and has a plurality of ground electrodes corresponding to the load resistors, and each load resistor is connected to the same group via the corresponding ground electrode. The optical high-frequency receiving circuit according to claim 6, wherein the optical high-frequency receiving circuit is connected to the same ground pattern as that of the high-frequency capacitor, and is connected to different ground patterns in different sets. 8. The light receiving element has two bias side electrodes, these bias side electrodes are arranged apart from the center of the light receiving element, and one ground side electrode is arranged between these bias side electrodes. Two high-frequency capacitors and two load resistors are mounted corresponding to the two bias-side electrodes, and one electrode of each high-frequency capacitor is connected to a bias supply terminal near the corresponding bias-side electrode; 8. The optical high-frequency receiving circuit according to claim 7, wherein the same set of load resistors corresponding thereto are connected to the same ground pattern. 9. A circuit board having another bias supply terminal for supplying a bias voltage to an amplifier of an IC chip, wherein the IC chip has a bias electrode connected to the bias supply terminal. At least one bias electrode of the IC chip is located between a signal input electrode and a ground electrode, and at least one bias supply terminal for the amplifier has a bias supply terminal for a light receiving element and a load resistance. The high-frequency capacitor is arranged between the ground pattern to be connected and the bias supply terminal for the amplifier, one electrode of the high-frequency capacitor is connected to the bias supply terminal for the light receiving element, and the other electrode is 9. The optical high-frequency receiving circuit according to claim 6, wherein the optical high-frequency receiving circuit is connected to the same ground pattern as the load resistance. 10. A circuit board having another bias supply terminal for supplying a bias voltage to an amplifier of an IC chip, wherein the IC chip has a bias electrode connected to the bias supply terminal. The signal input electrode and the ground electrode of the IC chip are adjacent to each other without the bias electrode, and the bias supply terminal for the light receiving element and the ground pattern to which the load resistance is connected are used for the amplifier. And one electrode of the high-frequency capacitor is connected to the bias supply terminal for the light-receiving element, and the other electrode is connected to the same ground pattern as the load resistance. The optical high-frequency receiving circuit according to any one of claims 6 to 8, wherein: 11. An edge of a ground pattern to which a bias supply terminal for a light receiving element and the load resistor are connected is parallel and close to each other, and both electrodes of the high-frequency capacitor intersect these parallel edges. The optical high-frequency receiving circuit according to claim 9 or 10, wherein the optical high-frequency receiving circuit is connected to the vicinity of these edges. 12. A circuit board having a bias supply terminal and a signal output terminal formed on one surface, and a bias side electrode connected to the bias supply terminal and via the bias supply terminal. A light receiving element that is connected to the signal output terminal and receives a bias voltage via the bias supply terminal to be in an operation state, and converts a high-frequency optical signal into an electric signal in this operation state; A high-frequency capacitor connected to a bias supply terminal, wherein the other electrode of the high-frequency capacitor and the ground-side electrode of the light-receiving element are formed on the one surface of the circuit board. An optical high-frequency receiving circuit, which is connected to a ground pattern. 13. A light-receiving element comprising a photodiode, an N-pole serving as said bias-side electrode, and a P-pole serving as said ground-side electrode.
13. The optical high-frequency receiving circuit according to any one of 12.