JP2001119366A - Synchronizing timing signal generator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a synchronizing timing signal generator capable of finding a high-accuracy correlation value by suppressing the influence of a noise component. SOLUTION: A processing block 110 acquires first and second sample data strings existent in the guard period and common part of an inputted OFDM symbol and concerning two pieces of sample data contained in the same sample data string at the adjacent time of arrival, first and second relative data are generated by multiplying the data of the late arrival time by the data of the first arrival time as a complex conjugate. Next, the processing block 110 calculates an absolute value of difference between the first and second relative data, finds an error value ε, which is the total sum of m-power value (m is an integer >=1) of the absolute value, and outputs it to a timing detecting part 112. The timing detecting part 112 makes the error value ε into inverse 1/ε and when that value becomes maximum, a symbol synchronizing timing signal is outputted.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a symbol synchronizer, and more particularly to an orthogonal frequency division multiplexing (OFD).
M) A device for generating a synchronization timing signal in communication.

[0002]

2. Description of the Related Art In recent years, digital modulation systems for transmitting audio signals and video signals have been actively developed. voice/
In transmission of a video signal or the like, a modulation method that realizes high-quality transmission that is hardly affected by disturbance is required. For example,
In mobile communications, multipath due to reflected waves becomes a serious problem with an increase in the amount of information to be transmitted. One of the methods for overcoming this problem is an OFDM (Orthogonal Frequency Division Multiplexing) modulation method. Has been proposed. The multipath is generally called a ghost, and a main signal directly arrives from a transmitting side to a receiving side, and a reflected wave that arrives after being delayed with respect to the direct wave by being reflected by a building or the like. This is interference that occurs when received simultaneously. The OFDM modulation scheme modulates the carrier at a very low rate, so that the modulation symbol rate is low and therefore the symbol period is long. As a result, the OFDM modulation method has a characteristic that the ratio of intersymbol interference to the entire signal is small, so that it is hardly affected by multipath. The OFDM modulation scheme is expected to be a modulation scheme for next-generation digital terrestrial broadcasting utilizing this characteristic. The details of the OFDM modulation method are described in “Mobile Digital Audio Broadcasting Using OFDM” (NHK issued VIE).
W May 1993).

FIG. 13 shows an example of an OFDM symbol pattern. One symbol period includes a guard period and an effective symbol period. The effective symbol period means that, for example, N pieces of data are transmitted from the transmitting side to an N-point IF.
This is data calculated by FT (Inverse Fast Fourier Transform). The guard period is a part of the effective symbol period (e.g.,
This is a part shown as a common part in FIG. Hereafter, the common part is copied and added to the beginning of the effective symbol period. Since the common portion itself is copied in the guard period, interference between the main signal and the multipath does not occur in principle if the delay time of the multipath is within the guard period.

In the guard period, the rear part of the effective symbol (hereinafter, referred to as a common part) is copied. Therefore, on the receiving side, the guard period and the common part are compared to detect the correlation between the two, and the so-called OFDM is performed. By determining the symbol timing, a synchronization signal can be generated. Conventionally, a receiving side delays an input symbol for detecting an OFDM symbol timing by an effective symbol period, and detects a correlation between a guard period of the delayed OFDM symbol and a common part of an undelayed OFDM symbol to detect the validity. The start point of the symbol period was detected. For example,
A conventional synchronizer proposed in Japanese Patent Application Laid-Open No. 7-99486 first converts an input signal into complex digital data, delays an imaginary part and / or a real part thereof by a predetermined time, and delays the imaginary part and / or the real part by a predetermined time. The correlation between the imaginary part and / or the real part of the digital data and the imaginary part and / or the real part that is not delayed has been obtained by performing a predetermined operation. The time during which the synchronizer delays the complex digital data is a time corresponding to an effective symbol period that is grasped based on a reference symbol periodically inserted at a predetermined position by the transmitting side for the purpose of causing the receiving side to recognize the effective symbol period. is there. Therefore, the receiving side can detect the correlation between the guard period of the delayed signal and the common part of the undelayed signal.
In order to detect the above-mentioned correlation, the conventional synchronizer uses a complex vector representing the phase and amplitude value of the sample point, which is present in the delayed OFDM modulated signal and the OFDM modulated signal which is not delayed. A calculation is performed to sequentially calculate a correlation value for each sample point, a sum thereof is obtained, and a synchronization signal is generated when the value indicates a peak value equal to or more than a predetermined value, that is, when a correlation between the guard period and the common part is detected. Was.

FIG. 14 is a complex vector diagram showing an example of the amplitude and phase of a signal at a predetermined sample point. 14, the vertical axis represents the imaginary part, and the horizontal axis represents the real part. The scalar amount of the complex vector indicates the amplitude of the signal, and the angle with respect to the horizontal axis indicates the phase of the signal. With reference to FIG. 14, a method for obtaining a correlation value will be described. Now, assume that complex vectors indicating the amplitude and phase of two predetermined sample points existing in the guard period are complex vectors A and B, and complex vectors indicating the amplitude and phase of two predetermined sample points existing in the common part are complex. The vectors are A 'and B'. Since the guard period is a copy of the common part, the guard period is originally a complex vector A.
And the complex vector A ′, and the complex vector B and the complex vector B ′ should be equal to each other. However,
Since the phase and the amplitude of the complex vector relating to the sample point change due to a noise component generated during transmission, they are not actually equal as shown in FIG.

According to the conventional synchronizer, the correlation value is obtained by the following complex vector operation formula. In addition,
Assume that vectors A ′ ^* and B ′ ^* are complex conjugates of vectors A ′ and B ′. γ = | A × A ′ ^* + B × B ′ ^* | Also, the conventional peak value (maximum correlation value) detection can be expressed by the following equation (1). Note that the following equation (1)
, The signal component of the guard period and the sample point of the common part is S (hereinafter, referred to as signal component S), the noise component related to the signal component S is N (hereinafter, referred to as noise component N), and the number of samples in the guard period is k (referred to as the number k of samples), L (referred to as the number L of samples), the data sample number is denoted as t, a constant of 1 or more is denoted as m, and the detected correlation value is denoted as C (t).

[0007]

(Equation 1)

In the above equation (1), the first term on the right side (term indicated by A) indicates the correlation value γ, and the second to fourth terms (term indicated by B) indicate noise components. . The reason why the complex conjugate is used in the calculation is to reflect both the amplitude information and the phase information of the sample point in the correlation value, as shown in FIG.

[0009]

As described above, the conventional synchronizer has a structure in which a sample point sequence existing in a common part of a received signal and a guard period of a signal obtained by delaying the received signal by an effective symbol period are used. To calculate the correlation with the sample point sequence and its peak value (maximum correlation value)
Was detected. Therefore, when the conventional synchronizer is applied to an OFDM symbol having a sufficiently large number of sample points, the noise component N is averaged and generated based on the detected peak value (maximum correlation value). The effect on the synchronization timing signal does not matter. here,
The averaging of the noise components means that when the amplitude and the phase of the noise components randomly generated for a large number of sample points are totaled, the values tend to converge to zero. Since the number of terms related to the noise component N on the right side of the above equation (1) increases at a rate three times the number k of samples, if the number k of samples is sufficiently large, the noise component N is averaged. To the extent that they are However, as is clear from the above equation (1), when the number k of samples is small, the number of terms related to the noise component N also decreases, and the conventional symbol synchronizer performs sufficient noise component averaging. In some cases, an erroneous peak value (maximum correlation value) is obtained. Therefore, the conventional symbol synchronizer can be extendedly applied to, for example, an OFDM symbol having a short symbol length and a number of sample points of about ten and several points, such as that used in a wireless LAN recently proposed. However, since the influence of the noise component cannot be suppressed, it is difficult to obtain a highly accurate correlation value.

[0010] Therefore, an object of the present invention is to provide a synchronous timing signal generating apparatus capable of obtaining a highly accurate correlation value by suppressing the influence of a noise component even when applied to an OFDM symbol having a small number of sample points. It is.

[0011]

According to a first aspect of the present invention, an OFDM modulation signal composed of a data sequence divided in units of symbols is input and a symbol synchronization timing signal synchronized with a symbol delimiter is generated. A synchronous timing signal generating apparatus for performing
Processing means for performing a correlation detection operation on the modulated signal and outputting the result; and a timing signal generating means for generating and outputting a symbol synchronization timing signal based on the operation result output from the processing means, Processing means for outputting the input OFDM modulated signal as it is as a first sample data sequence, delaying the OFDM modulated signal by a predetermined time width, and outputting it as a second sample data sequence; Means for sequentially inputting each sample data included in the first sample data string output by the means, for the first and second sample data arriving successively in time, with respect to the first sample data received first; , Multiplying the second arriving second sample data by complex conjugate, and sequentially outputting the multiplication result as first relative data First and second relative data generating means, and third and fourth sample data arriving successively in time by sequentially inputting each sample data included in the second sample data string output by the sample means. about,
First relative data generation means for multiplying the first arrived third sample data by a complex conjugate of the fourth arrived fourth sample data and sequentially outputting the multiplication result as second relative data; , The output of the first and second relative data generating means is received, the absolute value of the difference is obtained, and the m-th power of the absolute value (m is an integer of 1 or more) is present in the symbol for which correlation is to be detected Error calculating means for continuously and cumulatively adding a number corresponding to the number of samples to be output as an error value, wherein the timing signal generating means has a predetermined index based on the error value input from the error calculating means. When a peak value is indicated, a symbol synchronization timing signal is generated and output.

As described above, according to the first aspect, the symbol synchronization timing signal generating apparatus includes the first sample data sequence and the second sample data sequence which are included in the first sample data sequence and the second sample data sequence. The correlation with the sample data can be accurately detected by performing a predetermined calculation.

A second invention is a invention according to the first invention, further comprising one or more delay means for delaying an input OFDM modulated signal in units of one symbol length, and the processing means comprises a plurality of processing means. One set is provided for processing the undelayed OFDM modulated signal, and the other set is provided for each of the delay means, each processing the OFDM modulated signal delayed by the corresponding delay means. Calculating a total error value obtained by summing a plurality of error values output from a plurality of sets of processing means according to a predetermined arithmetic expression, and outputting the total error value to the timing signal generating means. The timing signal generating means generates and outputs a symbol synchronization timing signal when the error total value indicates a peak value.

As described above, according to the second aspect, the symbol synchronization timing signal generation device can amplify the error value as a result. Therefore, even when applied to an OFDM symbol having a small number of sample points, an error total value that can be clearly distinguished from a noise component can be calculated.

A third invention is an invention according to the first invention, wherein the processing means sequentially inputs the first and second sample data included in the first and second sample data strings. Then, the first and second sample data arriving at the same time are multiplied by a complex conjugate of the second sample data and the first sample data, and the result is present in a symbol whose correlation is to be detected. A correlation calculating means for calculating an absolute value of a value obtained by continuously and cumulatively adding the number corresponding to the number of samples, obtaining an m-th power of the absolute value (m is an integer of 1 or more), and outputting the obtained value as a correlation value; Including
Dividing means for dividing the correlation value by the error value and outputting the result, wherein the timing signal generating means generates a symbol synchronization timing signal when the calculation result input from the dividing means shows a peak value. It is characterized by outputting.

As described above, according to the third aspect of the invention, the symbol synchronization timing signal generating apparatus performs the operation of dividing the correlation value by the error value, thereby performing the correlation detection independently on the error value or the correlation value. It is possible to detect an accurate peak value in which the noise component is suppressed, rather than performing it.

A fourth invention is a invention according to the first invention, further comprising one or more delay means for delaying the input OFDM modulated signal in units of one symbol length, and the processing means comprises a plurality of processing means. One set is provided for processing the undelayed OFDM modulated signal, and the other set is provided for each delay means, each processing an OFDM modulated signal delayed by the corresponding delay means. Processing means for sequentially inputting the first and second sample data included in the first and second sample data strings, and arriving simultaneously with the first and second sample data strings.
, The first sample data is multiplied by a complex conjugate of the second sample data, and the result is continuously and a number corresponding to the number of samples existing in the symbol for which the correlation is to be detected. And a correlation operation means for obtaining an absolute value of the cumulatively added value, obtaining an m-th power of the absolute value (m is an integer of 1 or more) and outputting the obtained value as a correlation value, and output from a plurality of sets of processing means. Error totaling means for calculating an error total value as a result of summing a plurality of error values according to a predetermined arithmetic expression, and outputting the error total value;
A correlation total value, which is a result of summing a plurality of correlation values output from a plurality of sets of processing means according to a predetermined arithmetic expression, and outputs the correlation total value; Divider means for dividing the integrated correlation value by the error total value given from the error totalization means and outputting the calculated value as a calculated value, wherein the timing signal generating means outputs a symbol synchronization timing signal when the calculated value indicates a peak value. Is generated and output.

As described above, according to the fourth aspect, the symbol synchronization timing signal generator can amplify the correlation value and the error value as a result. Therefore, even when applied to an OFDM symbol with a small number of sample points,
A total correlation value and a total error value that can be clearly distinguished from the noise component can be calculated.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIG. 1 is a block diagram showing a configuration of a synchronization timing signal generating device according to a first embodiment of the present invention. In FIG. 1, the synchronization timing signal generation device 100 includes a processing block 110
And a timing detection unit 112.

FIG. 2 is a block diagram showing details of the processing block 110. In FIG. 2, processing block 110
Are a sample unit 101 and a first relative data generation unit 102
, A second relative data generator 103, and an error calculator 104
And a timing detection unit 105.

FIG. 3 is a diagram showing a form of signal delay performed by the processing block 110 for detecting the correlation between the common part and the guard period for one OFDM symbol for convenience.

The operation of the synchronization timing signal generator 100 will be described below with reference to FIGS. OF
The DM symbol is first input to sample section 101. The input to the sample unit 101 is, for example, as shown in FIG.
The OFDM symbol is an OFDM symbol shown in FIG. 3 and includes a guard period having a time width σ and an effective symbol period having a time interval τ. The guard period is obtained by copying a part including the last part of the effective symbol period (hereinafter, referred to as a common part) and adding it to the beginning of the effective symbol period in order to suppress the influence of multipath on the desired signal. is there. Therefore, when the sample data indicating the phase and the amplitude of the OFDM symbol at each of the sample points included in the guard period and the common part are successively compared, they are ideally equal. However, the fact that they are not completely equal due to noise components mixed during transmission is as described in the description of FIG.

As shown in FIG. 3, the sample unit 101
Represents the input OFDM symbol as an effective symbol period,
That is, the OFDM is delayed by the time interval τ,
A sample for detecting a correlation between a symbol and an OFDM symbol that is not delayed is acquired. That is, sampling section 101 acquires the first sample data sequence from the delayed OFDM symbol, and acquires the second sample data sequence from the non-delayed OFDM symbol. Time interval τ
Is recognized by a reference symbol periodically inserted into a predetermined position of the transmission symbol by the transmission side so that the reception side can recognize the effective symbol period. Sample part 1
01 can perform the above-described delay operation using a shift register or the like (not shown). The sample unit 101 sequentially outputs the first sample data included in the acquired first sample data sequence to the first relative data generation unit 102, and outputs the second sample data included in the second sample data sequence. Are sequentially output to the second relative data generation unit 103. First and second relative data generators 102 and 10
3 is a complex conjugate of the later sample data at the time of arrival of two sample data that are included in the first and second sample data strings and that are adjacent to each other at the time of arrival. Is multiplied by the input sample data (details will be described later). In this way, the first and second relative data generators 102 and 103 respectively store the first relative data and the second relative data.
Is generated and output to the error calculation unit 104. The error calculation unit 104 receives the first and second relative data and calculates an error value ε.

FIG. 4 is a diagram schematically showing calculations performed by the first and second relative data generators 102 and 103 on the obtained first and second sample data. The calculation performed by the error calculation unit 104 to calculate the error value ε will be described with reference to FIG. The first relative data generation unit 102 sets the sample data S (1) that arrives next to the sample data S (1) in the first sample data sequence.
The first relative data R (1) is obtained by multiplying the sample data S (1) by converting (2) into a complex conjugate, and outputs the first relative data R (1) to the error calculator 104. Next, the first relative data generating unit 102 multiplies the sample data S (2) by complexizing the sample data S (3) that has arrived next to the sample data S (2), thereby multiplying the first relative data by the first relative data. Data R
(2) is obtained and output to the error calculation unit 104. As described above, the first relative data generation unit 102 performs an operation of multiplying predetermined sample data by complex conjugate with the sample data arriving next to the sample data, Iterates until it is conjugated and multiplied by the immediately preceding sample data. The second relative data generator 103 performs the same operation as the first relative data generator 102 on the input sample data. First and second relative data generators 102 and 10
3 is output to the error calculation unit 104 each time the first and second relative data are obtained. Each time the first and second relative data are input, the error calculation unit 104 obtains the m-th power of the absolute value of the difference between the first relative data and the second relative data, and performs cumulative addition. The error calculator 104 calculates the m-th power of the absolute value of the difference between the first relative data and the second relative data, and calculates the m-th power of the absolute value as a number corresponding to the number of sample points existing in the guard period. And outputs the obtained cumulative addition value as an error value ε. Accordingly, the error value ε becomes a small value if the first and second sample data have a correlation, and becomes a large value if there is no correlation.

As described above, when detecting a correlation between an OFDM symbol that is not delayed and an OFDM symbol that is delayed, the correlation detection result (error value ε) always fluctuates due to noise or the like generated on the transmission path. Therefore, the reciprocal 1 / ε of the error value ε calculated by the timing detection unit 112 always fluctuates. Although a specific waveform will be described later, the reciprocal 1 / ε of the continuously changing error value ε periodically shows a peak value because OFD
This is when a correlation operation between the common part of the M symbols and the guard period of the delayed OFDM symbol is performed. The timing detection section 112 has a predetermined threshold value, and generates and outputs a symbol synchronization timing signal B when the error value calculated as a result of the above correlation operation exceeds the threshold value. .

The above calculation performed by the error calculation unit 104 can be specifically expressed by the following equation (2). In the following equation (2), S is a required signal component of a sample point existing in the guard period and the common portion, N is a noise component related to the required signal component S, k is the number of samples in the guard period, and k is the number of samples in the common portion. Is L, the data sample number is t, the constant of 1 or more is m, and the detected correlation value is E (t).

[0027]

(Equation 2)

In the above equation (2), the first and second terms related to A ′ shown on the right side of the correlation value E (t) are the error values ε.
It is. The third to eighth terms related to B ′ are noise components. In the above equation, the number of terms indicating the noise component is larger than that in the already-described equation (1) for correlation detection.
Now, assuming that the number of terms indicating the noise component is Nn, the relational expression with the number of samples k can be expressed as Nn = 6 (k-1). Therefore, assuming that correlation detection is performed for the same number of sample points, the detection of the correlation value by the above equation (2) increases the number of terms indicating the noise component as compared with the conventional equation (1). Can be averaged.

(Second Embodiment) FIG. 5 shows a second embodiment of the present invention.
FIG. 3 is a block diagram illustrating a configuration of a synchronization timing signal generation device according to the embodiment. In FIG. 5, the synchronization timing signal generation device 200 includes processing blocks 110a to 110
d, an error synthesis unit 211, delay units 212 to 214,
And a timing detection unit 112. The configuration of the processing blocks 110a to 110d is the same as that of the processing block 110 according to the first embodiment. Therefore, the arithmetic processing performed inside the processing blocks 110a to 110d is the first
This is the same as the processing block 110 in the embodiment.
FIG. 6 is a diagram illustrating the processing performed by the processing blocks 110a to 110d.

Referring to FIGS. 5 and 6, the operation of synchronous timing signal generating apparatus 200 will be described. First,
The OFDM symbol A, which has been down-converted and subjected to quadrature detection in advance, is processed by a processing block 110a and delay units 212 to 2
14 is input. Now, guard period of received signal (1)
Assuming that reception is started from
Generates the delay signal 1 by delaying the reception signal by a time interval τ (the same interval as the effective symbol period) as shown in FIG. 3, and generates the guard period (1) of the delay signal 1 and the reception signal. The comparison with the common part (2) is performed. The time interval τ is grasped in the same manner as in the first embodiment. Delay units 212 and 21
3, 214 delay the input signal by one symbol, two symbols, and three symbols, respectively (delay signals 2, 4,
6). The delay signals 2, 4, and 6 are processed by the processing block 11
0b, 110c, and 110d. The processing blocks 110b, 110c, and 110d delay the input delay signals 2, 4, and 6 by the time interval τ (the guard period (1) and the effective symbol period) similarly to the processing block 110a (the delay signals 3, 5, 7). The processing block 110b compares the common part (2) of the delay signal 2 with the guard period (1) of the delay signal 3. The processing block 110c includes the common part (2) of the delay signal 4 and the delay signal 5
Is compared with the guard period (1). Processing block 110
d compares the common part (2) of the delay signal 6 with the guard period (1) of the delay signal 7. Processing blocks 110a-11
In the case of 0d, the above processing is performed at the same time to obtain and output the error value ε.

The error totaling unit 211 includes a processing block 110
The total error value κ is calculated by multiplying all the error values ε simultaneously inputted from a to 110 d and output to the timing detection unit 112. The timing detection unit 112
It has a threshold value in advance, and the reciprocal of the error total value κ (1
/ Κ) exceeds the threshold, generates and outputs a symbol synchronization timing signal B. As a result, based on the symbol synchronization timing signal B, the synchronization signal generator (not shown) outputs a synchronization signal at the time point P1 shown in FIG. It should be noted that the error integrating unit 211 includes a processing block 110a
Although the error total value κ is obtained by multiplying the error value ε received from １１０110d, the total may be obtained.

As described above, the processing block 110 provided in the synchronization timing signal generation device 200 according to the present embodiment
a to 110d average the noise components by performing the correlation operation shown in the above equation (2) on the sample points. Further, the synchronization timing signal generation device 200 calculates the error value ε calculated by each processing block.
Is multiplied or added by the error integrating unit 211,
As a result, it is amplified. As a result, the synchronization timing signal generation device 200 can perform a highly accurate correlation operation even when applied to an OFDM symbol having only a small number of sample points, and can output an accurate symbol synchronization timing signal. In this embodiment, four processing blocks are used.
It is not limited to this. The system designer or the like may appropriately change the number of processing blocks as needed.

(Third Embodiment) FIG. 7 shows a third embodiment of the present invention.
FIG. 3 is a block diagram illustrating a configuration of a synchronization timing signal generation device according to the embodiment. 7, the synchronization timing signal generation device 300 includes a processing block 310, a division unit 312, and a timing detection unit 112.

FIG. 8 is a block diagram showing details of the processing block 310. In FIG. 8, processing block 310
Are a sample unit 101 and a first relative data generation unit 102
, A second relative data generator 103, and an error calculator 104
And a correlation operation unit 306. Here, the same components as those in the first embodiment are denoted by the same reference numerals, and detailed description is omitted. Processing block 310 corresponds to FIG.
The correlation calculation unit 306 is added to the processing block 110 provided in the synchronization timing signal generation device 100 shown in FIG. Therefore, the error value ε output by the error calculation unit 104 is the same as in the first embodiment, and is calculated by the above-described equation (2). On the other hand, the correlation operation unit 306
Obtains the first and second relative data strings from the sample unit 101 and calculates the correlation value γ. Correlation calculator 30
6 is the same as the calculation for calculating the correlation value in the related art, and is calculated by the above-described equation (1).

The error value ε and the correlation value γ are both
12 is output. The division unit 312 divides the correlation value γ by the error value ε, and outputs the result to the timing detection unit 112. The timing detection unit 112 has a threshold value in advance, and generates and outputs a symbol synchronization timing signal B when the value of the correlation value γ / error value ε exceeds the threshold value.

(Fourth Embodiment) FIG. 9 shows a fourth embodiment of the present invention.
FIG. 3 is a block diagram illustrating a configuration of a synchronization timing signal generation device according to the embodiment. Synchronous timing signal generator 4
00 denotes processing blocks 310a to 310d, an error integrating unit 211, delay units 212 to 214, and a correlation integrating unit 41.
1, a division unit 312, and a timing detection unit 112. The delay operation of the input signal performed by the delay units 212 to 214 is the same as the synchronization timing signal generation device 200 according to the second embodiment shown in FIG. Processing block 3
The configuration of 10a to 310d is the same as the processing block 310 according to the third embodiment. Therefore, processing block 3
The arithmetic processing performed inside 10a to 310d is the same as the processing block 310 in the third embodiment. Further, in the present embodiment, the error value ε and the correlation value γ calculated by the processing block have already been described in the third embodiment. In the synchronization timing signal generation device 400, the same components as those of the synchronization timing signal generation devices 200 and 300 according to the second and third embodiments have the same reference numerals, and a detailed description thereof will be omitted.

Next, the operation of the synchronization timing signal generator 400 will be described with reference to FIG. The processing blocks 310a to 310d output the calculated error value ε to the error integrating unit 211, and output the correlation value γ to the correlation integrating unit 411. The error summation unit 211 multiplies all the input error values ε and outputs an error sum value κ. Also, the correlation synthesis unit 4
11 sums the input correlation values γ and outputs a total correlation value δ. The division unit 312 receives the total correlation value δ and the total error value κ, divides the total correlation value δ by the total error value κ, and outputs an operation value λ (= δ / κ). The timing detection unit 112 generates and outputs the symbol synchronization timing signal B when the value of the operation value λ exceeds a threshold value held in advance. In this embodiment, four processing blocks are used.
It is not limited to this. The system designer may change the number of processing blocks as needed. Further, the error integrating unit 211 may calculate the error total value κ by summing all the error values ε, or the correlation integrating unit 411 may calculate
The correlation total value δ may be calculated by multiplying all the correlation values γ.

FIG. 10 shows a conventional synchronizer (waveform diagram A),
7 shows an example of the form of peak values (waveform diagrams B and C) obtained as a result of performing a correlation operation by the synchronization timing signal generation device 100 or 200 and 300 or 400 according to the present invention. The vertical axes of the waveform diagrams A to C indicate the magnitude of the correlation value, and the horizontal axes indicate the number of sample points.
Here, the correlation value γ and the total correlation value δ, and the error value ε and the total error value κ show similar shapes that differ only in magnitude (amplitude value), as is clear from the relationship. Therefore, although it should be shown strictly separately, here, the calculation for correlation detection performed by the conventional synchronization device and the synchronization timing signal generation devices 100 to 400 suppresses the noise component to what extent and in what form For the sake of convenience, only the same waveform diagram is described because only a guide to whether the peak value is shown is provided.

Consider each of the waveform diagrams A to C. In the waveform diagram A, the peak value also appears at a position that should not originally occur. This indicates that the correlation operation performed by the conventional synchronizer is insufficient in suppressing the noise component. In particular, the conventional synchronizer has the OFDM symbol having few DFT points as described above. , It is considered that an accurate synchronization signal cannot be output. The peak value detected by the synchronization timing signal generation device 100 or 200 shown in the waveform diagram B accurately appears except for a part. This is because the noise component is suppressed in the process in which the synchronization timing signal generation device 100 or 200 obtains the error value ε or the reciprocal of the error total value κ by the above-described correlation operation. The peak value detected by the synchronization timing signal generation device 300 or 400 shown in the waveform diagram C has a pointed shape, and particularly the noise component is suppressed to a high level.

As described above, the synchronous timing signal generators 100 and 2 according to the first and second embodiments
00 uses the error value ε calculated by the above equation (2) to detect the peak value, so that the conventional synchronizer uses the correlation value γ calculated by the above equation (1). A peak value having a shape better than the peak value to be detected can be detected. Further, the synchronization timing signal generation apparatuses 300 and 400 according to the third and fourth embodiments are configured to calculate the error value ε calculated by the above-described equation (2) and the correlation value calculated by the above-described equation (1). By calculating the peak value using γ, it is possible to detect a sharp peak value in which noise components are more suppressed than in the synchronous timing signal generation devices 100 and 200.

Note that the processing shown in FIG. 6, that is, the processing block to which the OFDM modulated signal A is directly input and the OFDM modulated signal A are performed by the synchronization timing signal generators 200 and 400 shown in FIGS. The process of multiplying the calculation results from the processing blocks input by being delayed by one symbol, two symbols, and three symbols by the delay units 212, 213, and 214 results in amplifying the detected peak value. Therefore, even when the correlation value detected by each processing block alone is small due to a small number of sample points existing in the OFDM symbol, a peak value exceeding the threshold value held by the timing detection unit 112 is easily detected. be able to. Further, in the example of the delay processing shown in FIG. 6, since the four OFDM symbols are synchronized at the same time by the synchronization signal generated at the point P1, the receiving apparatus including the synchronization timing signal generation apparatus 200 or 400 Can receive OFDM symbols in bursts.

FIG. 11 shows a case where an OFDM symbol is input in a burst manner,
FIG. 3 is a diagram illustrating an example of an OFDM symbol (hereinafter, referred to as a header part) added to obtain a signal synchronized with the head of a DM symbol. Although the details will be described later, in this case, the synchronization timing signal is the above-mentioned OFD input in a burst manner.
It is output only once at the beginning of the M symbol, that is, at the end of the header. The header portion shown in FIG. 11 includes first short symbols S1 to S4 having a time width σ.
, A long symbol S5, and a second short symbol S6 having a time width σ. The configuration of such a header portion is determined in advance by a predetermined standard. The synchronization timing signal generation device 400 shown in the fourth embodiment can handle such a header section. However, the delay processing performed by the processing blocks 310a to 310d and the delay units 212 to 214 is different from that in the fourth embodiment, and this will be described in detail below. Note that the reference symbols required for the receiving side to grasp the time intervals τ1 to τ4 and the time width σ are inserted in the transmitting side in advance, and the synchronization timing signal generation device 400 generates symbol data based on the reference symbols. Shall be delayed.

When the header shown in FIG. 11 is input to the synchronization timing signal generator 400, the processing block 31
0a is used to make the first short symbol S4 coincide with the sixth short symbol S6 on the time axis.
The input header part is delayed by the time interval τ4. Similarly, the delay units 212, 213, and 214 set τ to match the second, third, and fourth short symbols S3, S2, and S1 with the sixth short symbol on the time axis.
3 and τ4, τ3 and τ2, τ2 and τ
1 is delayed by the time width σ. The error summation unit 211 and the correlation summation unit 411 include a processing block 310a and delay units 212, 213, and 214.
Processing blocks 310b, 310c, 310 provided after
The error value ε and the correlation value γ obtained by the correlation operation of d are summed to calculate and output the error total value κ and the correlation total value δ. The division unit 312 divides the correlation total value δ by the error total value κ to obtain the operation value λ (= δ / κ) as described above. As described above, by appropriately setting the symbol delay amount of the processing block 310a and the symbol delay amount of the delay units 212 to 214, the synchronization timing signal generation device 400 generates the synchronization timing signals for various forms of OFDM symbols. can do.

FIG. 12 shows the correlation value γ obtained by inputting the header part shown in FIG. 11 to the synchronization timing signal generation device 400 and performing the cross-correlation calculation on the symbol data included in the short symbols as described above. An example of a waveform represented by an error value ε, a correlation total value δ which is a sum of correlation values γ, an error total value κ which is a sum of error values ε, and an operation value λ (= δ / κ), respectively. FIG. As apparent from FIG. 12, the division unit 312 outputs a pointed operation value λ in which noise components are suppressed. The timing detection unit 112
When a calculation value λ exceeding the threshold value is input, a synchronization timing signal is generated and output. The synchronizer uses the synchronization timing signal to generate an OFDM signal input in a burst manner.
It is possible to output a synchronization signal synchronized with the head of the symbol.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a synchronization timing signal generation device according to a first embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a processing block included in the synchronization timing signal generation device according to the first embodiment of the present invention.

FIG. 3 is a diagram illustrating an aspect of symbol delay performed by a processing block included in the synchronization timing signal generation device according to the first embodiment of the present invention.

FIG. 4 is a diagram schematically illustrating an operation performed on sample data by a relative data generation unit included in the synchronization timing signal generation device according to the first embodiment of the present invention.

FIG. 5 is a block diagram illustrating a configuration of a synchronization timing signal generation device according to a second embodiment of the present invention.

FIG. 6 is a diagram illustrating an aspect of symbol delay performed by a processing block included in a synchronization timing signal generation device according to a second embodiment of the present invention.

FIG. 7 is a block diagram illustrating a configuration of a synchronization timing signal generation device according to a third embodiment of the present invention.

FIG. 8 is a block diagram illustrating a configuration of a processing block included in a synchronization timing signal generation device according to a third embodiment of the present invention.

FIG. 9 is a block diagram illustrating a configuration of a synchronization timing signal generation device according to a fourth embodiment of the present invention.

FIG. 10 is a diagram showing an example of a correlation value or a total correlation value, an error value or a reciprocal of the total error value, and a waveform obtained as a result of dividing the correlation value by the error value or dividing the total correlation value by the total error value. .

FIG. 11 is a diagram illustrating an example of a header portion added to the head of an OFDM symbol input in a burst.

FIG. 12 is a diagram illustrating a correlation value, an error value, and the like of a header portion calculated by the synchronization timing signal generation device according to the third embodiment of the present invention.
It is a figure showing an example of a peak value which each of a correlation total value, an error total value, and a calculation value shows.

FIG. 13 is a diagram illustrating an example of an OFDM symbol and a range of each part.

FIG. 14 is a diagram illustrating an example of a vector calculation for correlation detection.

[Explanation of symbols]

 110, 310 ... processing block 112 ... timing detection unit 101 ... sampling unit 102 ... first relative data generation unit 103 ... second relative data generation unit 104 ... error calculation unit 211 ... error synthesis unit 306 ... correlation calculation unit 312 ... division unit 411: Correlation synthesis department

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Yasuo Harada 1006 Kazuma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. Terms (reference) 5K022 DD00 DD01 DD13 DD19 DD42 5K047 AA03 AA13 BB01 CC01 EE02 GG11 HH01 HH03 HH15

Claims (4)

[Claims] 1. A synchronization timing signal generation device for receiving an OFDM modulated signal composed of a data sequence divided in symbol units and generating a symbol synchronization timing signal synchronized with a symbol delimiter. Processing means for performing a correlation detection operation on the OFDM modulated signal and outputting the result; and a timing signal generating means for generating and outputting a symbol synchronization timing signal based on the operation result output from the processing means. The processing means outputs the input OFDM modulated signal as a first sample data sequence as it is, and delays the OFDM modulated signal by a predetermined time width and outputs the sampled data as a second sample data sequence. Means, and each sample data included in the first sample data string output by the sample means. Was sequentially input, the first and second sample data arrives sequentially in time, with respect to the first sample data arrival, late-arriving second
Multiplying a complex conjugate of the sample data of (i) and (ii) sequentially output the multiplication result as first relative data
Relative data generating means, and sequentially inputting each sample data included in the second sample data string output by the sample means, and for the third and fourth sample data arriving continuously in time, For the third sample data of the first arrival, the fourth sample of the second arrival
Multiplying a complex conjugate of the sample data of (i) and (ii) sequentially output the multiplication result as second relative data.
Receiving the outputs of the first and second relative data generating means, and calculating the absolute value of the mutual difference, and calculating the m-th power of the absolute value (m is an integer of 1 or more) to obtain a correlation. Error calculating means for continuously and accumulatively adding a number corresponding to the number of samples present in the symbol to be detected as an error value, wherein the timing signal generating means receives an input from the error calculating means. A symbol synchronization timing signal generation device, wherein the symbol synchronization timing signal is generated and output when a predetermined index based on the error value indicates a peak value. 2. The apparatus further comprises one or more delay means for delaying the inputted OFDM modulated signal in units of one symbol length, wherein a plurality of sets of the processing means are prepared, and one of the sets is not delayed. Processing the OFDM modulated signal, and the remaining sets are provided for each of the delay means, each processing the OFDM modulated signal delayed by the corresponding delay means, and further comprising a plurality of sets of the processing means. An error totaling unit that calculates an error total value that is a result obtained by combining a plurality of error values output from the unit according to a predetermined arithmetic expression, and outputs the error total value to the timing signal generating unit; And generating and outputting a symbol synchronization timing signal when the error total value indicates a peak value. Period timing signal generating device. 3. The processing means according to claim 1, wherein said first and second sample data included in said first and second sample data strings are sequentially inputted, and said first and second sample data arrive at the same time. The first sample data is multiplied by a complex conjugate of the second sample data, and the result is successively and cumulatively added by a number corresponding to the number of samples present in the symbol for which correlation is to be detected. The absolute value of the calculated value is obtained, and the m-th power of the absolute value (m is 1)
The correlation signal is obtained by dividing the correlation value by the error value and outputting the result. The timing signal generating means further comprises: 2. The symbol synchronization timing signal generating apparatus according to claim 1, wherein the symbol synchronization timing signal is generated and output when an operation result input from the means indicates a peak value. 4. The apparatus further comprises one or more delay means for delaying the input OFDM modulated signal in units of one symbol length, wherein a plurality of sets of the processing means are prepared, one of which is not delayed OFDM. Processing the modulated signal, and the remaining sets are provided for each of the delay means, each of which processes the OFDM modulated signal delayed by the corresponding delay means, further comprising the first and the second processing means. The first and second sample data included in the second sample data sequence are sequentially input, and the first and second sample data arriving at the same time are compared with the first sample data. Is multiplied by a complex conjugate, and the result is continuously and cumulatively added by a number corresponding to the number of samples present in the symbol for which the correlation is to be detected. A correlation calculating means for calculating an absolute value of the value, calculating an m-th power of the absolute value (m is an integer of 1 or more) and outputting the correlation value, and a plurality of errors output from a plurality of sets of the processing means. Calculating an error total value as a result of summing the values according to a predetermined arithmetic expression, and outputting a corresponding error total value; and calculating a plurality of correlation values output from a plurality of sets of the processing means by a predetermined calculation. Calculating a total correlation value as a result obtained according to the formula, and outputting the total correlation value; and calculating the total error value given from the total error value by the total error value given from the total error value means. Dividing by a value and outputting the calculated value as a calculated value, wherein the timing signal generating means generates and outputs a symbol synchronization timing signal when the calculated value indicates a peak value. Symbol sync timing signal generator according to claim 1.