JP2001112017A - Color matrix converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To configure an inexpensive video device whose circuit scale is reduced and which is made correspondent to color matrix conversion in compliance with a plurality of standards. SOLUTION: Three digital signals consisting of a luminance signal and color difference signals are separated into two system (b, c) and one system (a), the two systems are respectively bit decomposed, the bits is combined in pairs, the pairs are used as select signals, a result of the arithmetic operations corresponding to them is selected. The one-system signal is bit decompose, signals resulting from two bits each segmented from the LSB are used for select signals and an arithmetic result corresponding to the signals is selected (1st stage in Figure), then arithmetic results of matrix coefficients selected respectively are arranged from the lower-orders by matching digits and combined in pairs from the low-order and summed respectively with bit extension (2nd stage). Similarly, they are summed and the low-order bits not reflected on the final arithmetic result are thrown away in each process (3 to 4th stages). Finally offsets are summed and rounding and saturation are conducted (6th stage).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a color matrix conversion process for a luminance / color difference signal and an RGB signal of a digital video signal.

[0002]

2. Description of the Related Art Generally, when transmitting a video signal of a television or the like, a transmitting side uses an R (red) G signal obtained from a camera.
By converting the three primary color signals (green) and B (blue) into luminance color difference signals, the signals are subjected to various processes such as filtering, encoding, and modulation that make use of the characteristics of the human eye, and transmitted. On the receiving side, the luminance and color difference signals obtained by performing various decoding processes of the received signals are converted into RGB signals and displayed on a monitor.

At this time, the color matrix conversion of the luminance / color difference signal and the RGB signal used differs depending on the standard.
For example, according to ITU-R709, a product-sum operation expression with the following matrix coefficient is used. EY = 0.7154EG + 0.0721EB + 0.212
5ER EPb = -0.386EG + 0.500EB-0.500
ER EPr = −0.454−0.046 EB + 0.500 ER where EY is a luminance signal, EPb and EPr are color difference signals,
R, EG, EB are R (red), G (green), B
(Blue) signals, and each signal corresponds to an analog signal.

[0004] These signals are digitized to 8 bits.
When the image data is treated as image data, the scaling and offset of the calculation result in consideration of the overshoot of the analog signal, etc., and in particular, in the case of the color difference signal, an offset for raising the negative level is given. It can be expressed by the following equation by selecting it appropriately. Y = (a * G + b * B + c * R) / P + J Cb = (d * G + e * B + f * R) / P + K Cr = (g * G + h * B + i * R) / P + L

[0005] Here, Y is a luminance signal, Cb and Cr are color difference signals, a to i are matrix coefficients, and J to L are offset coefficients. Further, P is a bit shift coefficient corresponding to the bit precision of the matrix coefficient. For example, if the matrix coefficient has an 8-bit precision, P is 256 and 8
Bit shift is meant. Conversely, the case where RGB signals are obtained from the luminance difference signal can be dealt with by appropriately setting each coefficient in the above equation.

The matrix coefficient is 0.7154 * 256 = 183 (8-bit data) if the analog value is assumed to be 0.7154. Here, in order to actually maintain the accuracy of 0.7154, the matrix coefficient needs to have an accuracy of 14 bits, but the description will be made with an 8-bit accuracy.

Therefore, the matrix conversion circuit can be expressed by a combination of a multiplier and an adder from the above equation, but the multiplier uses R
Look-up table method using OM etc. (Fig. 7) and one-bit data is decomposed into bits and the other is masked.
A method (FIG. 8) of calculating the sum of them can be considered. When the precision of the coefficient is 8 bits, in the look-up table method shown in FIG.
16 bits of data (8 bits), output data is 16 bits
and the ROM needs a capacity of 1 Mbit.
On the other hand, in the scheme based on the bit decomposition shown in FIG.
Assuming that the pipeline processing is performed at the stage of summing in order to process high bit rate data, as shown in FIG. 8, it can be constituted by 128 registers and 7 adders.

When a circuit is constructed, the former (FIG. 7) is simpler, but the latter (FIG. 8) has a larger circuit scale. In any case, three multipliers are used, the result is added and the result is bit-shifted, and then an offset value is added to obtain one luminance or color difference data. As a matrix conversion circuit, These can be configured using three sets.

[0009]

As described above, the configuration using the method of decomposing bits and taking the sum shown in FIG.
Although the circuit scale can be made smaller than that of the configuration using the look-up table method shown in FIG. 7, the number of registers exceeds 1,000 in general. If the coefficients are fixed, the circuit scale can be greatly reduced.However, with the digitization of the broadcasting system, the diversification of video formats has been measured, and the need for video equipment used in ordinary homes to support multiple standards has emerged. Was.

SUMMARY OF THE INVENTION The present invention has been made in view of the above situation, and is intended to be able to configure an inexpensive video device which supports color matrix conversion of a plurality of standards and has a reduced circuit scale. .

[0011]

According to the present invention, there are provided (a) a first stage in which three digital signals of RGB or luminance and chrominance are divided into two systems and one system, and matrix coefficients b and c corresponding to the two systems are divided; Operation of four patterns, that is, (0, b, c,
b + c) and a matrix coefficient a corresponding to one system is operated in four patterns, that is, (0, a, 2a, 3a), and the two systems are bit-separated to form a pair for each bit.
This is used as a select signal to select the operation results corresponding to the above-mentioned ones.
Means for selecting a calculation result corresponding to those described above as a select signal using a signal divided every two bits from B;
(B) means for arranging the calculation results of the matrix coefficients selected in the first stage in the second stage, with the digits aligned from the lower order, forming pairs from the lower order, and performing bit expansion to add each; and (c) 3 Means for performing addition in the same manner as the second stage from the stage to the fifth stage, and cutting off lower bits not reflected in the final operation result each time in the process, and (d) the sixth stage of the final stage It is characterized by comprising means for adding an offset value to perform rounding processing and saturation.

Further, according to the present invention, in the means of (a) to (c) and (d) in the fourth stage, the operation result having no upper pair and the offset value are digit-aligned and added, and Means for passing, and (e) in the fifth stage, add in the same manner as in the second stage,
(F) A means for cutting off lower bits not reflected in the final operation result and (f) means for performing rounding and saturation in the sixth stage.

Further, according to the present invention, data such as format information input from the outside is obtained before the color matrix conversion apparatus, and matrix coefficients and offset values corresponding to these are obtained from a vertical blanking period of an image. And means for setting at a certain point in time, and performing color matrix conversion based on these set values.

Further, the present invention further comprises means for obtaining data such as format information to be output to the outside from the outside at the subsequent stage of the color matrix conversion device, and generating a synchronization signal corresponding to the data. It is characterized by outputting image data including synchronization in response.

Further, the present invention is characterized in that in the color matrix conversion device, the dynamic range of the output can be changed by multiplying the matrix coefficient by an arbitrary coefficient.

Further, the present invention is characterized in that, in the color matrix conversion device, an image is not displayed by setting a matrix coefficient to 0.

Further, the present invention is characterized in that in the color matrix conversion device, an image is faded out by gradually approaching a matrix coefficient to zero.

Further, the present invention is characterized in that in the color matrix conversion device, the image is faded in by gradually approaching a matrix coefficient from 0 to a specified value.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a functional block diagram for explaining a register configuration of a matrix conversion device according to the present invention, wherein a, b and c in the figure are digital signal sequences, respectively. As shown in FIG. 2, these three systems of digital signals a, b, and c are divided into two systems (a set of b and c) and one system (a set of a), and matrix coefficients b and b corresponding to the two systems. Calculation of four patterns of c, that is, (0, b,
c, b + c) and 4 of the matrix coefficient a corresponding to one system
The operation of the pattern, that is, (0, a, 2a, 3a) is performed, and 2
Each of the systems (b, c) is bit-separated to form a pair for each bit, and the pair is used as a select signal to select two operation results corresponding thereto. Then, a pair is formed every two bits from the LSB, and this is used as a select signal to select a corresponding one-system operation result. In the second stage, the operation results of the matrix coefficients selected in the first stage are arranged with the digits aligned from the lower order, pairs are formed from the lower order, and addition is performed while expanding the bits (a portion not reflected in the operation result is rounded down). ). In the third stage, the addition is performed in the same manner as in the second stage. In the process, the lower bits not reflected in the final operation result are discarded, and in the fourth stage, the operation result having no upper pair and the offset value are digit-aligned. And add. In the fifth stage, the addition is performed in the same manner as in the second stage, the lower bits not reflected in the final operation result are discarded, and in the sixth stage, rounding and saturation are performed. (Embodiment 1) FIG. 3 shows an example of the configuration of an embodiment of a color matrix conversion device according to the present invention. In the figure, 1, 2, 3, and 3 denote arithmetic circuits, and these arithmetic circuits comprise a luminance signal Y and a color difference signal. Pb,
Conversion from Pr to RGB signals is performed. As mentioned above, I
According to TU-R709, a product-sum operation expression with the following matrix coefficient is used. EY = 0.7154EG + 0.0721EB + 0.212
5ER EPb = −0.386EG + 0.500EB−0.115
ER EPr = −0.454EG−0.046EB + 0.500
ER

Here, EY is a luminance signal, EPb and EPr are color difference signals, ER, EG and EB are RGB signals, and each signal corresponds to an analog signal.

If the above analog signal is treated as 8-bit image data and the precision of the coefficient is 8 bits, it can be expressed by the following equation. G = (256Y-48Pb-120Pr) / 256 + 8
4B = (256Y + 475Pb) / 256-238 R = (256Y + 403Pr) / 256-202 Here, Y corresponds to a luminance signal, and Pb and Pr correspond to color difference signals.

The matrix conversion device represented by the above equation uses arithmetic circuits 1, 2, and 3 in which the coefficients represented by the above equation are set for the three outputs G, B, and R of the video data. This can be achieved by: Each arithmetic circuit has an image data of 8 bits and a coefficient of 10 bits (code:
It has an input of 1 bit and a matrix coefficient of 9 bits) and an output of 8 bits of image data, and is constituted by a register as shown in FIG.

FIGS. 4A and 4B are register configuration diagrams for explaining an embodiment (Embodiment 1) of the color matrix conversion device according to the present invention. (A): First, in the first stage, three systems of luminance and color difference are provided. As shown in FIG. 5, the digital signal is represented by a set of Y and Pr, P
b is divided into two systems, each bit is decomposed, and for each bit, four patterns of Y are calculated, that is, (0, Y,
2Y, 3Y), and four patterns of calculations, ie, (0, Pb, Pr, Pb + Pr) are also performed on Pr and Pb. The bit-decomposed image data is used as a select signal to select the above-described operation results corresponding to these.

For the luminance signal Y, the 0th bit is 0, 1
Assuming that the bit also has a value of 0, the operation result of the first-stage bit-separated image data is ALL0, the operation result when the 0th bit is 1 and the 1st bit is 0 is Y, and the 0th bit is If the 0th and 1st bits are 1, 2Y is selected, and if both are 1, 3Y is selected. Similarly, the operation is performed by pairing adjacent bits such as the second bit and the third bit. For example, assuming that the calculation result is selected for the 0th bit for the color difference signals Pb and Pr, the color difference signals of the bits are treated as a pair, and the respective image data values are used as select signals in the same processing as the case of the luminance signal. I do.

(B): In the second stage, the operation results of the matrix coefficients selected in the first stage are arranged with the digits corresponding to the bit decomposition aligned, and pairs are formed from the lower order and added while each bit is expanded. (C): From the third stage to the fifth stage, addition is performed in the same manner as in the second stage, and in the process, lower bits not reflected in the final operation result are added to the third and fourth stages. Cut off 1 bit at the eyes and 3 bits at the 5th step.

(D): At the final sixth stage, the offset value is added, and when the most significant bit of the lower bits to be rounded down is 1, the round-up process is performed, and when it is 0, the round-down process is performed (rounding process). Further, since the calculation result may exceed the precision of 8 bits, saturation is performed. Specifically, when the MSB (sign bit) of the sixth stage is 1, the operation result is negative, so that the output data is 0x00 when the 13th or 12th bit is 1, and the output data is 0xFF. Is rounded to 0xFF.

Y, Pb, and Pr are respectively input to 1, 2, and 3 in FIG.
When the corresponding matrix coefficients obtained by the above product-sum operation formula are set for these three operation circuits 1, 2, and 3,
RGB image data is obtained.

(Embodiment 2) FIG. 6 is a diagram for explaining another embodiment (Embodiment 2) of the present invention. An operation having a register configuration similar to that of Embodiment 1 shown in FIG. Since it is a circuit, only different points will be described below. Embodiment 2 shown in FIG.
In the first embodiment, the offset value added in the sixth stage in the first embodiment shown in FIG. 4 is digit-aligned with the operation result of the upper bit having no pair in the fourth stage and added. This calculation result is passed to the fifth stage, and rounding processing and saturation are performed at the sixth stage. By this means, in the first embodiment, 6
Since the processing in which the offset value is added at the stage can be shifted to the fourth stage, the number of stages and the number of registers can be reduced in the pipeline processing.

(Embodiment 3) FIG. 7 is a diagram showing an example of a matrix conversion device including the arithmetic circuit of the embodiment 1 or 2, wherein 1, 2 and 3 are shown in FIG. An arithmetic circuit, 4 is a coefficient setting circuit, and 5 is a synchronization generation and synchronization addition circuit. In the coefficient setting circuit 4, matrix coefficients are set in the arithmetic circuits 1, 2, 3 based on external input / output format information. Here, the matrix coefficient is defined as ITU-
This is a matrix coefficient of the product-sum operation expression obtained by determining the precision of the image data width and the coefficient with respect to the product-sum operation expression of the matrix conversion specified by R. By changing the setting of the matrix coefficient described above, the ITU-R6
01 to RGB signal conversion from the color difference signal specified by
From the color difference signal specified by TU-R709, ITU-R6
01 can be converted to a color difference signal. It is also possible to hide the video by setting the matrix conversion coefficient to 0. Also, the video can be faded out by gradually approaching the matrix coefficient to zero. Also, the video can be faded in by gradually approaching the matrix coefficient from 0 to the specified value.

The synchronization generation / synchronization adding circuit 5 generates a vertical / horizontal synchronization signal corresponding to the output format, and incorporates the matrix-converted video data into a specified video signal area to add a video with synchronization. Output data. The level of the synchronous offset with respect to the video signal is, for example, a luminance signal, RGB
Has the same value as the black level of the video signal, and has the same value as the center value in the color difference signal. Therefore, it is necessary to switch the offset value of the synchronization signal depending on whether the output video signal is a color difference signal or an RGB signal. This switching is also performed when synchronization is added.

As a signal flow, input / output format information and the like are given from the outside, and a corresponding matrix conversion coefficient is set in a matrix operation circuit. Similarly, a synchronization signal is generated according to an output format given from the outside, and a video signal output by incorporating the matrix-converted video signal into the synchronization signal.

[0032]

The matrix conversion device according to the present invention can reduce the circuit scale, improve the processing speed, and reduce the cost as compared with the conventional method.

Further, it is possible to convert various matrices with one circuit. Specifically, when synchronizing image data, synchronizing according to an output format can be added and output. Alternatively, the dynamic range of the output image data can be changed in the matrix conversion device without being changed by an external analog circuit. Alternatively, it is possible to hide a video, fade out a video, or fade a video in by processing in a matrix conversion device without using an external device.

[Brief description of the drawings]

FIG. 1 is a register configuration diagram showing an embodiment of a matrix conversion device according to the present invention.

FIG. 2 is a diagram illustrating an example in which a digital signal of three systems is divided into two systems and one system.

FIG. 3 is a block diagram of a calculation position to which the matrix conversion device according to the present invention is applied.

FIG. 4 is a register configuration diagram showing one embodiment of a matrix conversion device according to the present invention based on luminance and color difference.

FIG. 5 is a diagram showing an example in which three systems of luminance and color difference are divided into two systems and one system.

FIG. 6 is a configuration diagram showing another embodiment of the matrix conversion device according to the present invention.

FIG. 7 is a block diagram showing another embodiment of the matrix conversion device according to the present invention.

FIG. 8 is a diagram illustrating an example of a multiplier using a backup table.

FIG. 9 is an image diagram of a multiplier by bit decomposition.

[Explanation of symbols]

1, 2, 3 ... matrix operation circuit, 4 ... coefficient setting circuit,
5. Synchronization generation and synchronization addition circuit.

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Hisao Kumai 22-22, Nagaikecho, Abeno-ku, Osaka-shi, Osaka F-term (reference) 5C066 AA01 AA02 AA03 BA20 CA01 CA25 DA08 ED06 EE01 EE03 GA01 GA02 GA05 GA12 GB08 HA02 HA06 KE01 KE02 KE03 KE04 KE09 KE24 KF05 KG01

Claims (8)

[Claims] 1. (a) In the first stage, digital signals of three systems of RGB or luminance and color difference are divided into two systems and one system, and calculation of four patterns of matrix coefficients b and c corresponding to the two systems, ie, ( (0, b, c, b + c) and the matrix coefficient a corresponding to one system, that is, calculation of four patterns, ie, (0, b, c, b + c)
a, 2a, 3a), the two systems are bit-separated to form a pair for each bit, and this is used as a select signal to select the operation result corresponding to these. The one system is bit-separated. Means for selecting a result obtained by dividing the LSB every two bits as a select signal and selecting an operation result corresponding to the select signal. (B) In the second stage, the operation result of the matrix coefficient selected in the first stage is calculated from the lower order. Align the digits,
Means for forming pairs from the lower order and performing addition while expanding bits, and (c) performing addition in the third to fifth stages in the same manner as in the second stage, and performing a final operation in the process. A color matrix comprising: means for cutting off lower bits not reflected in the result each time; and (d) means for performing rounding and saturation by adding an offset value at the sixth stage in the final stage. Conversion device. 2. (a) In the first stage, digital signals of three systems of RGB or luminance and chrominance are divided into two systems and one system, and calculation of four patterns of matrix coefficients b and c corresponding to the two systems, ie, ( (0, b, c, b + c) and the matrix coefficient a corresponding to one system, that is, calculation of four patterns, ie, (0, b, c, b + c)
a, 2a, 3a), the two systems are bit-separated to form a pair for each bit, and this is used as a select signal to select the operation result corresponding to these. The one system is bit-separated. Means for selecting a result obtained by dividing the LSB every two bits as a select signal and selecting an operation result corresponding to the select signal. (B) In the second stage, the operation result of the matrix coefficient selected in the first stage is calculated from the lower order. Align the digits,
Means for forming pairs from the lower order and performing addition while expanding bits, and (c) performing addition in the third to fifth stages in the same manner as in the second stage, and performing a final operation in the process. (D) means for discarding the lower bits not reflected in the result each time; (d) means for digitizing and adding the operation result having no upper pair and the offset value in the fourth stage and passing the result to the fifth stage; (e) (5) In the fifth stage, means for adding the same as in the second stage and cutting off lower bits not reflected in the final operation result; and (f) In the sixth stage, means for performing rounding and saturation are provided. Characteristic color matrix conversion device. 3. A method of obtaining color matrix data and offset values corresponding to the externally input data such as format information from an external device at a stage preceding the color matrix converting device according to claim 1 or 2. A color matrix conversion device comprising means for setting at a certain point in time such as a blanking period, and performing color matrix conversion based on these set values. 4. A color matrix conversion device according to claim 1, wherein data such as format information to be output to the outside is obtained from the outside, and a synchronization signal corresponding to the data is generated. Means for outputting image data including synchronization according to an output format. 5. The color matrix conversion device according to claim 1, wherein the dynamic range of the output can be changed by multiplying the matrix coefficient by an arbitrary coefficient. Color matrix conversion device. 6. The color matrix conversion device according to claim 1, wherein a video is not displayed by setting a matrix coefficient to zero. 7. The color matrix conversion device according to claim 1, wherein the video is faded out by gradually approaching a matrix coefficient to zero. 8. A color matrix conversion apparatus according to claim 1, wherein the image is faded in by gradually approaching a matrix coefficient from 0 to a specified value. Matrix conversion device.