JP2001102884A - Automatic gain control circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a simple automatic gain control circuit with a wide band width. SOLUTION: This circuit is composed of a resistor 3 connected between the collector terminal of an emitter-grounded NPN transistor 1 and a bias power source Vcc and a Zener diode 4 connecting the cathode to the collector terminal of the NPN transistor 1 parallel with this resistor 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic gain control circuit in an amplifier using a transistor when it is necessary to increase the dynamic range of input signal amplification.

[0002]

2. Description of the Related Art FIG. 3 shows a typical example of an amplifier including a conventional automatic gain adjustment circuit. As shown in FIG.
Resistors 33 and 34 are connected to the emitter terminals of the transistors 31 and 32, respectively, and an FET transistor 35 is connected to the emitter terminals. Also, NP
A resistor 36, N
The base terminal of the PN transistor 37 is connected,
A resistor 38 is connected to the emitter terminal of the NPN transistor 37.
Is connected. The base terminal of the NPN transistor 31 is an input terminal (INPUT), and the emitter terminal of the NPN transistor 37 is an output terminal (OUT). A portion 39 surrounded by a dotted line is an automatic gain adjuster, which is provided for adjusting the gain of the output terminal (OUT). Further, the resistance values of the resistors 33, 34, 36, and 38 are R _I , R _I , _RL , and R ₀ , respectively.

[0003] The method of incorporating the automatic gain adjustment circuit in this amplifier is based on the emitter coupling of two transistors 31 and 32. FET transistor 35
Since the resistance value in the voltage V _c of the gain adjusting unit 39 is changed, FET transistor 35, NPN transistor 3
It can be considered as a variable resistor inserted between the emitter terminals 1 and 32. The resistance value by the variable resistor in the case of applying the voltage V _c and R _FET (V _c) to the automatic gain control unit 39.

[0004] When the voltage V _I is input to the input terminal, FE
Through T transistor 35 to the resistor 34 of the R _I V _I /
The current of the R _FET (V _c ) flows. Therefore, the resistor 36
Is reduced by V _I / R _FET (V _c ). If the voltage between the base and emitter of the transistor 2 is set to V _BEON, the voltage V ₀ which output terminal is the emitter of the NPN transistor 37 _{is, V 0 = V cc - (} R L × V I / R FET
It becomes _{(V c) + V BEON)} . When V _BEON is considered negligibly small, by changing the variable resistance R _FET of the FET transistor 35 by the input voltage V _I to adjust the voltage V _c of the gain adjustment section 39 be varied, the output voltage V ₀
Can be made constant.

[0005]

The amplifier including the above-mentioned conventional automatic gain adjustment circuit uses an emitter follower, so that the bandwidth of the amplifier is narrow. That is, the input impedance of NPN transistor 31 as viewed from the input terminal, the NPN transistor 31 to the resistance value R _I of the base resistance r of the NPN transistor 31 resistor 36
(R + R _I ) β, which is a value obtained by multiplying the current amplification factor β by (3), so that it is necessary to input an input signal source (not shown in FIG. 3) connected to the input terminal with a low input impedance. When it is received with a high input impedance, it is difficult to follow a change in the signal source. That is, the bandwidth of the amplifier is reduced.

Further, since the input stage of the amplifier is emitter-coupled, two NPN transistors 31, 32 and a FET are connected.
Since the transistor 35 is required, it is complicated and costly.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a simple automatic gain adjusting circuit having a wide bandwidth.

[0008]

An automatic gain adjustment circuit according to the present invention comprises a transistor whose emitter is grounded, a first resistor connected between a collector terminal of the transistor and a bias power supply, and A zener diode having a cathode connected to a collector terminal of the transistor in parallel with the first resistor.

Preferred embodiments of the present invention will be described below.

(1) An amplifier having an input terminal connected to the collector terminal of the transistor, and a second resistor connected to the output terminal of the amplifier and the base terminal of the transistor for feeding back the output voltage of the amplifier. .

(2) In (1), the amplifier is a second transistor having an emitter follower, and a collector terminal of the first transistor is connected to a base terminal of the second transistor.

(3) In (2), the second resistor is
The base terminal of the first transistor is connected to the emitter terminal of the second transistor.

(4) The cathode of the Zener diode is connected to the collector terminal of the transistor.

(Operation) In the present invention, since a resistor and a Zener diode are connected in parallel between the collector terminal of the transistor and the power supply, even if the input signal inputted to the base terminal changes, the collector voltage of the transistor changes. Can be automatically adjusted so that it does not fall below a certain value. Since this transistor receives the signal source not at the emitter follower but at the grounded emitter, the input impedance is small relative to the signal source. Therefore, even when the signal source has a parasitic capacitance, amplification that follows the input signal at high speed becomes possible.

Further, since only one zener diode, which is a non-linear element, needs to be inserted as an automatic gain adjustment circuit, it is advantageous in terms of cost.

[0016]

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) FIG. 1 is a diagram showing an amplifier including an automatic gain adjustment circuit according to a first embodiment of the present invention. As shown in FIG. 1, 1 and 2 are NPN transistors. The base terminal of the NPN transistor 1 is the input terminal of the amplifier, the emitter terminal is grounded, and the collector terminal is connected to the resistor 3, the cathode of the Zener diode 4, and the base terminal of the NPN transistor 2. The emitter terminal of the NPN transistor 2 is N
It is connected to the base terminal of the PN transistor 1 by the resistor 5, and has a configuration for feeding back the emitter voltage of the NPN transistor 2. NPN transistor 2
Is an emitter follower because it is grounded via a resistor 6 to GND. The portion surrounded by the dotted line is the automatic gain adjuster 7. The resistors 3, 5,
R ₁ 6 of the resistance values, respectively, R _f, and R _2.

The emitter of the NPN transistor 2 has the same voltage as the output terminal (OUT). The terminal of the resistor 6 opposite to GND is returned to the base of the NPN transistor 1 via the resistor 5 for voltage feedback.

_Assuming that a Zener voltage V _ZD is a voltage that causes Zener breakdown when the Zener diode 4 of the Zener diode 4 constituting the automatic gain adjustment unit 7 is applied with a reverse bias, the Zener voltage is almost free from a wide range of change in current. In order to maintain a constant voltage V _ZD , the voltage across the resistor 3 can be controlled by being connected in parallel with the resistor 3. Here, assuming that the current input from the input terminal (INPUT) of the amplifier is i _IN , the input current i _IN increases and the voltage R ₁ × h _FE × i _IN across the resistor 3 increases. Is also clipped by the Zener diode 4 so that the voltage between both ends does not exceed V _ZD . Also, the Zener voltage V
_ZD supports the collector voltage of the transistor 1 so as not to be lower than _Vcc - _VZD so that the NPN transistor 1 is not saturated.

The operation of the automatic gain adjustment circuit according to this embodiment will be described.

When a current signal i _IN is input from the input terminal (INPUT) of the amplifier, the current signal i _IN is multiplied by h _FE by the NPN transistor 1 and flows through the collector. Therefore, a current h _FE × i _IN flows through the resistor 3, and R ₁ is applied to both ends of the resistor 3.
A voltage of × h _FE × i _IN is generated. The NPN transistor 2 is an emitter follower, and generates a voltage V _cc −R ₁ × h _FE × i _IN obtained by subtracting the voltage between both ends of the resistor 3 from the power supply voltage V _cc across the resistor 6.

When the input current i _IN increases, the collector current h _FE × i _{IN of} the transistor 1 increases. As the collector current increases, the voltage drop of the resistor 3 also increases. However, since the transistor 1 is connected in parallel, the voltage across the resistor 3 is controlled. That is, the voltage at both ends of the Zener diode 4 increases with an increase in the current flowing through the diode 4, but when the current exceeds a predetermined current value, the constant voltage V _ZD is maintained. Thus, the voltage across the resistor 3 becomes constant. Therefore, the collector voltage of the transistor 1 is also changed to V _cc with the control of the voltage between both ends of the resistor 3.
Control is performed so as not to fall below −V _ZD .

FIG. 2 shows the input current i _IN and the output voltage V of the amplifier.
Indicates a relationship of ₀ . As shown in FIG. 2, when the ON voltage of the transistor 2, that is, the voltage between the base and the emitter of the transistor 2 is V _BEON , the voltage V _{0 at the} output terminal (OUT) equal to the emitter voltage of the transistor 2 is V _cc −
It does not _{drop below} V _ZD -V _BEON . When the input current i _IN is small, the input current i _IN is amplified as a voltage by the product of the resistor 3 and the current amplification factor h _FE of the transistor 1, but the input current i _IN increases and V _ZD / (R ₁ × h _FE )
Function of the automatic gain control of the Zener diode 4 to the output voltage V ₀ plateaued at V _cc -V _ZD -V _BEON acts.

Since the NPN transistor 1 has a common emitter, there is no resistor 33 inserted between the emitter terminal and GND in the case of an emitter follower as shown in FIG. Can be reduced. Therefore, even when the input signal is a current source and the current source has a parasitic capacitance in parallel, the response can be followed with good response, so that the bandwidth can be widened as an amplifier.

When a pulse signal is input as the input current i _IN , the collector voltage of the NPN transistor 1 is prevented from dropping below _Vcc - _VZD by the Zener diode 4 so that the NPN transistor 1 is not saturated. The pulse width of the output waveform of the transistor 1 is not distorted. That is, in the conventional amplifier shown in FIG. 3, if the NPN transistor 1 is saturated, the switching is delayed due to the effect of the accumulation time and the pulse width is distorted. However, in the amplifier of the present embodiment, the saturation of the transistor 1 does not occur. Therefore, the effect of accumulating minority carriers in the base region during the switching operation is small and the accumulation time is short, so that the switching of the output waveform of the transistor 1 is not delayed.

As described above, according to the present embodiment, the resistor 3 connected between the collector terminal of the NPN transistor 1 whose emitter is grounded and the bias power source _Vcc , the resistor 3 in parallel with the resistor 3, and the NPN Since the Zener diode 4 having the cathode connected to the collector terminal of the transistor 1 is provided, even if the input signal of the NPN transistor 1 changes, the automatic gain can be adjusted over a wide bandwidth. Further, the automatic gain can be adjusted only by connecting the Zener diode 4 to the transistor 1, and a complicated circuit configuration is not required. Further, since the transistor 1 is grounded at the emitter, a wide bandwidth can be obtained as an amplifier.

In this embodiment, the case where the gain of the NPN transistor 2 is adjusted has been described. However, the present invention is not limited to the NPN transistor, but may be replaced with various amplifying means such as a PNP transistor and an FET transistor.

[0028]

As described above, according to the automatic gain adjustment circuit according to the present invention, the resistor connected between the collector terminal of the transistor whose emitter is grounded and the bias power source, and the resistor connected in parallel with this resistor. And a Zener diode having a cathode connected to the collector terminal of the transistor, so that the voltage of the resistor is controlled by the Zener diode, so that even if the input current flowing to the base terminal of the transistor changes. The collector voltage of the transistor can be maintained so as not to be lower than a certain value, and the automatic gain can be adjusted in a wide bandwidth.

Further, since the automatic gain can be adjusted only by connecting the zener diode to the transistor, a complicated circuit configuration is not required.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an amplifier including an automatic gain adjustment circuit according to a first embodiment of the present invention.

FIG. 2 is an exemplary view showing the operation of the automatic gain adjustment circuit according to the embodiment.

FIG. 3 is a circuit diagram of an amplifier including a conventional automatic gain adjustment circuit.

[Explanation of symbols]

 1, 2 NPN transistor 3, 5, 6 resistor 4 Zener diode 7 Automatic gain adjustment unit

Claims (2)

[Claims] 1. A transistor having a common emitter, a first resistor connected between a collector terminal of the transistor and a bias power supply, and a collector terminal of the transistor in parallel with the first resistor. And a Zener diode having a cathode connected to the automatic gain adjustment circuit. 2. An amplifier having an input terminal connected to a collector terminal of the transistor, and a second resistor connected to an output terminal of the amplifier and a base terminal of the transistor for feeding back an output voltage of the amplifier. 2. The automatic gain adjustment circuit according to claim 1, wherein the automatic gain adjustment circuit is provided.