JP2001102331A - High flatness back surface matted wafer and its manufacturing method and/or front surface grinding back surface lapping device used for manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a back surface matted wafer, where the front surface is highly flat and the selectivity of back surface glossiness is large, its manufacturing method, and a front surface grinding back surface lapping device used for the manufacturing method. SOLUTION: Slice damage is removed coarsely by low-accuracy etching. The front surface of wafer is subjected to low-damage grinding, and at the same time the back surface of the wafer is subjected to low-damage lapping. The front surface of the wafer has high planarity for reducing the machining damage of the front and rear surface. In a succeeding high-accuracy acid etching, the amount of etching is reduced. An etchant to be used can be appropriately selected, the high planarity is maintained, and at the same time, glossiness of the back surface can be freely selected. A grinding whetstone ranging from #1500 to #4000 is used, the depth of damage is set to approximately 2 μm, and at the same time, grinding is made without damaging the front surface. In back surface lapping, alkaline-family lapping liquid containing an FO abrasive grain ranging from #1500 to #4000 is used. The back surface can be lapped with low damage and at the same time high throughput. Also, the front surface after etching is subjected to mirror polishing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a highly flat backside matte wafer, a method for manufacturing the same, and a surface grinding backside lapping apparatus used for the method, and more particularly, to a matte surface while maintaining high flatness on the wafer surface. The present invention relates to a high flatness backside matt wafer capable of arbitrarily selecting the glossiness of a wafer backside, a method of manufacturing the same, and a surface grinding backside lapping apparatus used in the manufacturing method.

[0002]

2. Description of the Related Art A conventional method of manufacturing a silicon wafer will be described with reference to a flowchart of FIG. First, in a slicing step (S301), a silicon wafer is sliced from an ingot having a diameter of 30 cm. The flatness of the silicon wafer after slicing is determined by GBIR (Global Back-side
The ideal range is about 10 to 30 μm (10 to 20 μm for an 8-inch wafer), and the processing damage is about 15 μm. In the next chamfering step (S302), the outer peripheral portion of the wafer is chamfered. In the subsequent lapping step (S303), lapping is performed on both the front and back surfaces of the silicon wafer using a lapping platen. In addition,
Usually, # 1200 composite artificial emery is used for lapping abrasive grains, and the flatness after wrapping is 1 μm in GBIR.
And the processing damage is about 7 μm (15 μm at maximum). The wrap amount at this time is about 35 to 45 μm on one side and about 70 to 90 μm on both sides.

[0003] In the next etching step (S304), the wrapped wafer is immersed in a high-accuracy acid etching solution (mixed acid or alkali + mixed acid) for acid etching with high accuracy, and distortion in the lapping process and distortion in the chamfering step are performed. And so on. In this case, usually, about 10 to 20 μm is etched on one side and about 20 to 40 μm is etched on both sides. The etched silicon wafer is bonded to a polishing board using wax, and the wafer surface is mirror-polished (S305).
Next, after removing wax and the like attached to the back surface of the silicon wafer, a final finish cleaning step (S306) is performed.

[0004]

However, in the conventional silicon wafer manufacturing method, the lapping step reduces the machining allowance by 70 to 90 .mu.m.
m was positioned as a step of increasing the flatness of the silicon wafer. That is, the wafer after this slicing was lapped by a lapping machine having upper and lower lapping plates while receiving relatively coarse FO # 1200 lapping abrasive grains. By using such coarse lapping abrasive grains as FO # 1200, the processing damage after lapping is 7 μm (maximum 15 μm).
m) was relatively large.

Accordingly, in the subsequent high-accuracy acid etching step, the etching amount is 30 μm on both the front and back surfaces in order to remove the processing damage of 7 μm during lapping without reducing the flatness of 1 μm by GBIR. It was big. Usually, acid etching has a high etching rate,
The reaction between the wafer and the acidic solution is strong, and a large amount of bubbles are generated. Due to the influence thereof, undulation is likely to occur on the front and back surfaces of the wafer, and sag is likely to occur on the outer peripheral portion of the wafer, and the flatness of the wafer tends to decrease. Therefore, there are currently only a few types of acid etchants that can satisfy the strict conditions as described above. As a result, there is a problem that the selectivity of the glossiness on the back surface of the wafer is reduced.

Therefore, the inventor of the present invention has almost completely removed the processing damage during the slicing and chamfering of a semiconductor wafer by rough etching that does not consider flatness so much. By lapping the back surface of the wafer, and then removing the slight processing damage on the front and back surfaces in this surface grinding and back lapping process by etching,
The inventors have found that the flatness of the front surface of the wafer is increased and, at the same time, the selectivity of the glossiness of the back surface of the wafer is also increased, thereby completing the present invention.

[0007]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a high-flatness backside matt wafer capable of increasing the selectivity of the backside gloss while maintaining a high flatness on the front side. It is an object of the present invention to provide a method for manufacturing a wafer having a high flatness on the front surface and a matte surface on the back surface. It is an object of the present invention to provide a surface ground back lapping device used in the method of manufacturing a high flatness back surface matte wafer. An object of the present invention is to provide a method for manufacturing a high flatness backside matt wafer that can be ground at a high throughput without exposing the wafer surface, and a surface grinding backside lapping device used in the manufacturing method. . An object of the present invention is to provide a method of manufacturing a high flatness backside matte wafer that can be wrapped at a high throughput without exposing the wafer backside, and to provide a surface ground backside lapping apparatus used in this manufacturing method. .

[0008]

According to the first aspect of the present invention, a semiconductor wafer obtained by slicing an ingot is chamfered to grind the surface of the semiconductor wafer with low damage, and at the same time, grinds the surface of the semiconductor wafer to a low level. This is a high-flatness, backside-finished wafer in which the surface of a semiconductor wafer is mirror-polished after the lapping of damage is performed, and subsequently, the processing damage in the surface grinding and the backside lap is removed by etching.

[0009] Examples of the semiconductor wafer include a silicon wafer and a gallium arsenide wafer.

The term "etching" as used herein means etching with an acid or an alkali. In order to remove the processing damage of the semiconductor wafer in the surface grinding / backside lapping step,
The etching is performed using an etchant whose etching rate is relatively low, with emphasis on the flatness of the surface of the semiconductor wafer. The type of high-accuracy acid etching or alkali etching is not limited. For example, hydrofluoric acid, nitric acid, acetic acid,
Bromic acid, phosphoric acid or a mixture thereof, KOH, NaOH
Use such as. The etching amount of this high precision etching is 2 to 10 μm on both the front and back surfaces of the wafer. 2 μm
If it is less than 1, there is a disadvantage that grinding streaks remain. Also, 10μ
If it exceeds m, the flatness GBIR deteriorates. The flatness after high-precision etching is 0.2 to 0.5 μg in GBIR.
m.

The grinding wheel to be used includes a resinoid grinding wheel or a vitrified grinding wheel in which a high-quality synthetic resin is used as a binder and diamond abrasive grains are bonded. In low-damage grinding using a resinoid grinding wheel or vitrified grinding wheel, it is preferable to use a grinding wheel capable of grinding the wafer surface after the low-precision etching described below, since the wafer surface is not easily roughened. For example, # 1500
A grinding wheel using # 4000 abrasive grains is preferred. For example, a resinoid grinding wheel manufactured by Disco Corporation, "BM-
01 "can be used. The grinding wheel may be a cup-shaped grinding wheel arranged in an annular shape around the lower surface of the grinding head of the grinding machine. In this case, the grinding damage in the low-damage grinding is, for example, 2 μm or less. If the grinding damage is large, the polishing amount in the subsequent surface polishing step increases. Grinding amount of low damage grinding is 15 μm or less, preferably 10 to
15 μm. If the thickness exceeds 15 μm, unnecessary areas are also ground, and cost merit cannot be obtained. The surface flatness after grinding and lapping with low damage is 0.2 to 0.5 μm in GBIR.

The term "low damage lapping" as used herein means lapping in which the damage on the back surface of the wafer after lapping is reduced while supplying an alkaline lapping liquid containing lapping abrasive grains for low damage. The type of lapping abrasive for low damage is not limited. For example,
Composite artificial emery, plate-like alumina, and the like. However, although plate-like alumina provides high processing efficiency,
The surface roughness (especially Rmax) increases, and the processing damage increases. Therefore, composite artificial emery is preferable. The particle size of the lapping abrasive grains is, for example, in the case of composite artificial emery, # 1500 to # 4000, preferably # 2000 to # 4000.
4000. If it is less than # 1500, it is not possible to remove the damage due to the lapping process even with a predetermined high precision etching. On the other hand, if it exceeds # 4000, stable and continuous lapping becomes impossible.

The lapping amount of the low damage lapping is 10 to 15 μm on the back surface of the wafer. In addition, at the time of low damage lapping, it is important to use a truer to correct the shape of the surface plate on the side opposite to the wafer processing area on the surface plate in order to maintain the shape of the surface plate. Further, by simultaneous processing of grinding and low damage lapping, as a secondary effect, traceability from a completed wafer to a crystal part can be ensured.

According to a second aspect of the present invention, the slice,
Processing damage in chamfering is removed by etching,
2. The high-flatness backside matte wafer according to claim 1, wherein the grinding and lapping are simultaneously performed on the semiconductor wafer after the etching. The term “etching” as used herein means etching performed using a low-accuracy acid etching solution that does not consider the flatness of the surface of a semiconductor wafer so much as to remove distortion in the slicing process, distortion in the chamfering step, and the like. As an etching solution for low-accuracy acid etching, there is an acid such as hydrofluoric acid, nitric acid, acetic acid, bromic acid, phosphoric acid or a mixture thereof. The etching amount of this low-accuracy acid etching is 20 to 40 μm, preferably 24 to 36 μm, on both sides of the wafer. If it is less than 20 μm, slice damage remains. On the other hand, if the thickness exceeds 40 μm, etching is performed to a region where there is no processing distortion in the slice, and the cost advantage is lost. The flatness after low-precision acid etching is 10 to 30 μm in GBIR, preferably GBIR.
Is 10 to 20 μm. If the GBIR exceeds 30 μm, the machining allowance increases, the throughput decreases, and the cost merit deteriorates.

According to a third aspect of the present invention, the step of slicing the semiconductor wafer from the ingot, the step of chamfering the semiconductor wafer, and the step of grinding the semiconductor wafer surface with low damage, A step of performing lapping with low damage on the back surface, a step of removing processing damage of the semiconductor wafer by the surface grinding and the back surface lapping step by etching, and after etching,
Mirror polishing the surface of a semiconductor wafer. The lapping abrasive used for lapping is # 1500 to # 400
0 synthetic artificial emery, for example, "Optical Emery Powder" manufactured by Fujimi Incorporated.

According to a fourth aspect of the present invention, there is provided the method for producing a highly flat backside matted wafer according to the third aspect, further comprising the step of removing the processing damage of the semiconductor wafer in the slicing step and the chamfering step by etching. .

According to a fifth aspect of the present invention, the surface grinding of the semiconductor wafer is performed using a grinding wheel of # 1500 to # 4000. Is the way.

According to a sixth aspect of the present invention, the backside lapping of the semiconductor wafer is performed using lapping abrasive grains of a composite artificial emery of # 1500 to # 4000.
A method for producing a high-flatness backside matted wafer according to any one of claims 1 to 5.

According to a seventh aspect of the present invention, there is provided a lapping plate for lapping the back surface of a semiconductor wafer while supplying a lapping solution containing lapping abrasive grains for low damage, and a semiconductor wafer mounted on the lapping plate. The surface grinding backside lap device includes a grinder for performing low-damage grinding on the surface of the semiconductor wafer by pressing a grinding wheel on the surface. The surface grinding back lap device may be a single-wafer type device that processes semiconductor wafers one by one.
A batch type in which a plurality of sheets are processed at a time may be used. For example, in a device that employs a planetary gear system, a carrier rotates between a sun gear and a ring gear that are rotatably provided.
By freely setting the direction and pressing a grinder in which a cup-shaped grindstone is rotatably mounted on the outer periphery of the lower surface against the semiconductor wafer held by the carrier, the back surface of the wafer is wrapped with a lapping plate (lower platen) In some cases, the wafer surface is ground by a grinder simultaneously with lapping.

The invention according to claim 8 is the surface grinding back lap device according to claim 7, wherein the grinding wheel has abrasive grains of # 1500 to # 4000. Any of a resinoid grinding wheel and a vitrified grinding wheel may be used.

According to a ninth aspect of the present invention, there is provided the backside lapping apparatus according to the seventh or eighth aspect, wherein the lapping abrasive grains are made of a composite artificial emery of # 1500 to # 4000.

[0022]

According to the present invention, first, processing damage caused on a semiconductor wafer during slicing processing is roughly removed in a low-precision etching step performed as required, without much consideration of flatness. Next, the front surface of the semiconductor wafer is ground with low damage using a grinding wheel, and the back surface of the wafer is lapped while supplying a lapping liquid containing lapping abrasive grains for low damage. Thereby, the processing damage on the front and back surfaces of the semiconductor wafer is reduced while the front surface of the semiconductor wafer has a higher flatness than that of the conventional back-surfaced wafer. As a result, in the subsequent high-precision acid etching or alkali etching process,
The amount of etching decreases. As described above, by reducing the etching amount of the semiconductor wafer, it is possible to increase the types of the etching solution used in the high-precision etching process. Therefore, the selectivity of the glossiness of the back surface can be increased while maintaining the high flatness.

Particularly, the grinding of the surface of the semiconductor wafer is performed by using #
It can be performed using a grinding wheel having abrasive grains of 1500 to # 4000. This grinding wheel is capable of grinding a silicon surface which is a non-damaged surface. Therefore, the wafer surface which has been etched and has no damage can be ground with this high-count grinding wheel with little damage (for example, a damage depth of about 2 μm) and without surface damage. In addition, grinding can be performed at a higher throughput as compared with electrolytic dress grinding.

Further, when lapping the back surface of a semiconductor wafer using an alkaline lapping solution containing lapping abrasive grains of composite artificial emery of # 1500 to # 4000, high throughput can be achieved without exposing the back surface of the semiconductor wafer. Can be wrapped.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a flowchart of a method for manufacturing a high-flatness backside matte wafer according to one embodiment of the present invention. FIG. 2 is an explanatory view of a front grinding backside lapping device according to one embodiment of the present invention. FIG. 3 is an enlarged plan view of a main part of the surface grinding backside lapping device according to one embodiment of the present invention. As shown in FIG. 1, in this embodiment, generally, slicing, chamfering, low-precision acid etching (when necessary), surface grinding back lapping, high-precision acid etching or alkali etching, PCR, mirror polishing, Through each step of the finish cleaning, a high-flatness backside matted wafer is manufactured. Hereinafter, each step will be described in detail.

The silicon ingot pulled up by the CZ method is sliced into silicon wafers W in a slicing step (S101). The flatness after slicing is GBI
R is about 10 to 30 μm, and processing damage a is 15
It is about μm. Next, in the chamfering step (S102), the periphery of the sliced wafer is chamfered into a predetermined shape by a chamfering grindstone. As a result, the peripheral portion of the silicon wafer W is formed into a predetermined rounded shape (for example, a MOS type chamfered shape). Next, in order to increase the productivity in the next step, the low-precision acid etching step (S10) is performed on the chamfered silicon wafer W.
In 3), acid etching is performed without considering the flatness much. Specifically, the silicon wafer W is immersed in a low-accuracy acid etching solution (room temperature to 40 ° C.) made of hydrofluoric acid, nitric acid, acetic acid, or the like. Flatness is 10 to 30μ by GBIR
m, no processing damage. Etching amount is 1 on one side
5 μm, 30 μm on both sides.

Thereafter, the surface grinding back surface lapping step (S
104), the surface of the silicon wafer W is ground with low damage using a resinoid grinding wheel of # 2000,
Low damage lapping is performed on the back surface of the silicon wafer W with an alkaline lapping liquid containing fine lapping abrasive grains. This surface grinding and back lapping process is performed by the front grinding back lap device 10 shown in FIGS.
It is performed by Hereinafter, this will be described in detail. As shown in FIG. 1 and FIG.
0 is of the planetary gear type. Its composition is mainly
A sun gear 11 provided rotatably around an axis, a ring gear 12 provided rotatably coaxially with the axis, and a circular plate-shaped carrier that meshes with these gears 11 and 12 to revolve and rotate at the same time. 13, a lapping plate 14 disposed below the carrier 13 and having a lattice-shaped lapping groove (for example, a groove width of 2 mm and a groove depth of 10 mm) 14 a formed on the surface thereof; A slurry nozzle 15 for supplying a lapping liquid;
3, a low-damage grinder 17 having a cup-shaped grindstone 16 which is rotatable horizontally on the outer periphery of the lower surface, and a grinding machine 17 which is vertically movable above a lapping platen 14. And a shape-correcting truer 18 for correcting the surface shape. As wrapping liquid, FO
A mixture of $ 4000 lapping abrasive, dispersant and water is employed.

The cup-type grindstone 16 includes a resinoid grinding grindstone manufactured by Disco Corporation, product name "BM-01".
Has been adopted. This grinding wheel is a special grinding wheel developed for processing a high-count and undamaged surface of # 4000. The average grain size of the abrasive grains is 1-2 μm.
The grain size of the cup-type grindstone 16 is determined by the #
Since it is 4000, the processing damage of the silicon wafer W due to the grinding can be reduced. And #
Up to about 4000, a spontaneous cutting phenomenon that is superior to a seizure phenomenon due to frictional heat generated during grinding can be secured.
The grinder 17 has a built-in rotary motor, and the rotary motor rotates the cup-type grindstone 16. The rotation speed is 1000-4000 rpm.

From the slurry nozzle 15 to the lapping platen 14
The lapping plate 14 is rotated while pouring the lapping liquid onto the surface of the wafer, and at the same time, the cup-type grindstone 16 is pressed against the wafer surface and rotated. By performing the rotation and the rubbing under the pressure, the surface of the silicon wafer W is ground with low damage, and at the same time, the back surface of the wafer W is mechanically wrapped with low damage.
During the grinding, a grinding fluid also serving as cooling water is supplied to the wafer grinding surface by the cup-type grindstone 16 through a grinding fluid supply path provided in the grinding machine 17. During the grinding, the grinding liquid may flow into the lapping surface on the lapping platen 14 from the gap between the carrier 13 and the silicon wafer W. As a result, there is a concern that the grinding liquid is mixed with the lapping liquid, and the lapping liquid is diluted or the components are different. In this embodiment, compression is performed from a jet port (not shown) provided on the inner peripheral surface of the carrier 13 in a gap between the carrier 13 and the silicon wafer W through a compressed air passage formed inside the carrier 13. By blowing air, the grinding fluid is prevented from flowing into the lapping surface.

The flatness of the ground wafer front surface and the wafer back surface is 0.2 to 0.4 μm in GBIR, respectively.
And each processing damage b, c is GBIR
Is about 2 μm. This machining allowance is 5-1 on one side
5 μm, 10-30 μm on both sides. As a result, the flatness of the silicon wafer W increases. As described above, since the grinding is performed with the grinding wheel having a higher number, the silicon wafer W can be ground with less damage and without roughening the surface thereof. Next, the silicon wafer W subjected to the front surface grinding and the back surface lapping
High-precision acid etching or alkali etching (S1
05) is performed. Specifically, hydrofluoric acid, nitric acid, acetic acid,
The silicon wafer W is immersed in a high-precision etching solution (room temperature to 40 ° C.) made of KOH, NaOH or the like. The flatness is about 0.4 μm in GBIR, and there is no processing damage. The etching amount is 2 μm on one side and 4 μm on both sides.
Next, a known PCR process is performed on the outer peripheral portion of the surface-ground silicon wafer W (S106). This allows
The outer peripheral portion (chamfered surface) of the wafer is mirror-finished. Further, the surface of the silicon wafer W after the PCR processing is further mirror-polished (S107). This polishing amount is sufficient to be 2 to 8 μm in order to remove damage in the grinding step of S104.

Thereafter, a finish cleaning step (S108) is performed. RCA cleaning. Through such a manufacturing process, it is possible to manufacture a highly flat backside matte wafer having high selectivity of the backside gloss while maintaining high flatness. In addition, in one embodiment, Disco Corporation's # 4 grinding wheel is used as a grinding wheel for grinding the wafer surface with low damage.
Since 000 resinoid grinding wheels are used, grinding can be performed at high throughput without exposing the wafer surface. In one embodiment, a lapping liquid containing FO # 4000 lapping abrasive grains is used as the lapping liquid for lapping the back surface of the wafer, so that lapping can be performed at a high throughput without exposing the back surface of the wafer.

Here, the results of comparison between the high flatness backside matted wafer of the present invention and a silicon wafer according to the prior art will be described. Here, Example 1 was a wafer of the present invention, Comparative Example 1 was a conventional wafer having mirror-finished front and back surfaces, and Comparative Example 2 was a conventional backside matted wafer. Table 1 shows the comparison items and the results. In Table 1,
The transfer particle means a particle flying from another wafer during the etching, and the detachability means the detachability of the wafer from an electrostatic chuck type transfer robot. Then, the evaluation here is that ○ is good and △
Is normal, and x is inferior in evaluation.

[0033]

[Table 1]

As is clear from Table 1, the wafer of Comparative Example 1 having a mirror-finished back surface has a good evaluation for the reduction in flatness, transfer particles, polishing or etching amount, but has a good removability and visual recognition of the back surface. Sex was poor.
On the other hand, in the conventional backside matte wafer having a small selectivity of the backside glossiness of Comparative Example 2, on the contrary, only the detachability and the backside visibility were good, and the others were inferior in evaluation. On the other hand, the high flatness rear surface-finished wafer of the present invention obtained favorable evaluations in all items except for the transfer particles being ordinary. Note that the transfer particles can also be set to an arbitrary value according to a user's request. Note that the machining allowance at the time of manufacturing the high flatness backside finished wafer of Example 1 is reduced by about 45 μm as compared with the machining allowance at the time of manufacturing the conventional wafer. This is simply calculated, for example, 25
An ingot block long enough to obtain one wafer
26 wafers can be manufactured.
Based on this, the manufacturing cost of the wafer could be reduced.

[0035]

According to the present invention, slice damage is removed by, for example, low-accuracy acid etching, and thereafter, the wafer is subjected to surface grinding and back lap, and slight processing damage at this time is removed by high-precision etching. By doing so, it is possible to increase the selectivity of the glossiness of the back surface while maintaining the high flatness surface.

In particular, since the resinoid grinding wheels # 1500 to # 4000 or the vitrified grinding wheels are used as the low-damage grinding wheels for the wafer surface, the wafer surface can be ground at a high throughput without exposing the wafer surface.

Further, since a lapping liquid containing FO # 1500 to # 4000 lapping abrasive grains is employed as a lapping liquid for lapping the wafer surface, lapping can be performed at a high throughput without exposing the wafer back surface.

[Brief description of the drawings]

FIG. 1 is a flowchart of a method for manufacturing a high-flatness backside matted wafer according to one embodiment of the present invention.

FIG. 2 is an explanatory view of a surface grinding back lap device according to one embodiment of the present invention.

FIG. 3 is an enlarged plan view of a main part of the front grinding back lapping device according to one embodiment of the present invention.

FIG. 4 is a flowchart of a method for manufacturing a highly flat backside matte wafer according to a conventional means.

[Description of Signs] 10 Surface grinding back lap device, 14 Lapping surface plate, 16 Cup type grinding wheel (resinoid grinding wheel), 17 grinding machine, W Silicon wafer (semiconductor wafer).

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (reference) B24B 7/04 B24B 7/04 A 37/00 37/00 Z H01L 21/02 H01L 21/02 B (72) Inventor Osamu Kagaya 1-5-1, Otemachi, Chiyoda-ku, Tokyo F-term in Mitsubishi Materials Silicon Corporation (reference) 3C043 BA09 3C058 AA07 AC04 CB01 DA02 DA17

Claims (9)

[Claims] 1. A semiconductor wafer obtained by slicing an ingot is subjected to chamfering, a surface of the semiconductor wafer is ground with low damage, and simultaneously, a back surface of the semiconductor wafer is subjected to lapping with low damage. A high-flatness matte wafer with a mirror-polished surface after removing the processing damage on the back lap by etching. 2. The high flatness rear surface-finished wafer according to claim 1, wherein the processing damage in the slicing and chamfering is removed by etching, and the semiconductor wafer after the etching is subjected to the grinding and lapping simultaneously. 3. A step of slicing a semiconductor wafer from an ingot, a step of chamfering the semiconductor wafer, and a step of grinding the surface of the semiconductor wafer with low damage while lapping the back surface of the semiconductor wafer with low damage. A method of manufacturing a high-flatness backside matte wafer, comprising: a step of performing etching, a step of removing processing damage of a semiconductor wafer in a surface grinding and a backside lapping step by etching, and a step of mirror-polishing the surface of the semiconductor wafer after etching. . 4. The method according to claim 3, further comprising the step of removing the processing damage of the semiconductor wafer in the slicing step and the chamfering step by etching. 5. The method of claim 1, wherein the surface grinding of the semiconductor wafer is # 1.
The method for producing a high-flatness backside matted wafer according to claim 3 or 4, wherein the method is performed using a grinding wheel of 500 to # 4000. 6. The high-flatness backside matte according to any one of claims 3 to 5, wherein the backside lapping of the semiconductor wafer is performed using lapping abrasive grains of composite artificial emery of # 1500 to # 4000. Wafer manufacturing method. 7. A lapping table for lapping the back surface of a semiconductor wafer while supplying a lapping liquid containing lapping abrasive grains for low damage, and pressing a grinding wheel against the surface of the semiconductor wafer mounted on the lapping table. And a grinder for performing low-damage grinding on the surface of the semiconductor wafer. 8. The grinding wheel according to claim 1, wherein the grinding wheels are # 1500 to # 400.
The surface grinding backside lap device according to claim 7, which has 0 abrasive grains. 9. The method according to claim 8, wherein the lapping abrasive grains are
9. The lapping apparatus according to claim 7, which comprises 4000 composite artificial emery.