JP2001093298A - Ferroelectric memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To dissolve such conventional problems that polarization inversion is caused accompanying read-out and write-in with respect to materials of ferroelectric substance used for a ferroelectric memory, and residual polarization is reduced by increasing the number of times of polarization inversion, and reduction of residual polarization causes reduction of operation margin, a ferroelectric memory including a memory cell having less operation margin from the beginning is selected as a defective product at the time of shipment from a factory, however, measuring operation margin for each memory cell cannot be performed during use after shipment from a factory, also, operation margin is different for each memory cell owing to dispersion of manufacturing and difference of frequencies of access, it is hard to predict the extent of reduction of operation margin from the outside, so that operation margin is reduced unexpectedly, and defective operation of a memory is caused. SOLUTION: This device is provided with a means measuring operation margin of a memory cell during use the device after shipment from a factory and informing deficiency of operation margin to the outside or a means switching a circuit in which a memory cell being deficient in operation margin is detected to a redundant circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ferroelectric memory, and more particularly, to measuring the operating margin of a memory cell during use after shipment from a factory, and detecting the memory cell with an insufficient operating margin to an external system. A notification is made or a circuit in which a memory cell with an insufficient operation margin is detected is switched to a redundant circuit, thereby preventing a malfunction of the memory due to an insufficient operation margin or extending the life of the memory.

In this specification, the term "redundant circuit" refers to a "defective circuit (a circuit including a memory cell having an insufficient operating margin)".
In order to compensate for this, a circuit having the same configuration as the defective circuit. " Switching to a redundant circuit is usually performed in units of bit lines or word lines.

[0003]

2. Description of the Related Art FIG. 6 is a block diagram showing a conventional structure of a ferroelectric memory. This example is a configuration diagram of a one-transistor / one-capacitor type (1T1C) using a reference cell system.

In FIG. 1, reference numeral 71 denotes a memory cell for storing information of "0" or "1", and reference numeral 72 denotes a reference for determining whether the information stored in the memory cell 71 is "0" or "1". A reference cell for generating a voltage; 73, a word line control unit for selecting and activating an arbitrary word line; 74, a plate line control unit for selecting an arbitrary plate line and applying a voltage;
66 is a sense amplifier for amplifying a small voltage difference between the memory cell 71 and the reference cell 72, 67 is a bit line control unit for selecting and activating an arbitrary bit line, and 61 is a margin for measuring an operation margin of the memory cell. A measuring unit, 75, a counter unit for generating address information of a memory cell for performing margin measurement, and 76, which controls start and stop of margin measurement;
The MPU determines the result of the operation margin measured by the margin measuring unit 61.

The reading of the information written in the memory cell 71 is performed by comparing the voltage of the bit line connected to the memory cell 71 with the voltage of the bit line connected to the reference cell 72. Is small, it becomes difficult to read information.

Although the voltage of the bit line is determined by the amount of charge stored in the memory cell 71 and the reference cell 72 (the amount of charge due to residual polarization), the ferroelectric material used in the memory cell 71 and the reference cell 72 It is known that in a ferroelectric material of a capacitor, polarization inversion occurs with reading and writing, and the remanent polarization gradually decreases as the number of times of polarization inversion increases.

FIG. 7 shows a hysteresis characteristic diagram of the ferroelectric. FIG. 7A is a hysteresis characteristic diagram when the number of polarization inversions is small, and FIG. 7B is a hysteresis characteristic diagram when the number of polarization inversions is large. As described above, when the number of times of polarization inversion is large, the residual polarization decreases.

As described above, the decrease in the remanent polarization leads to a decrease in the voltage appearing on the bit line and a decrease in the operation margin. Therefore, even when the ferroelectric memory operates normally in the initial stage of use, polarization inversion is repeatedly performed by reading and writing, and the margin may be reduced, leading to a malfunction of the memory.

Therefore, at the time of shipment from the factory, a ferroelectric memory including a memory cell having a small residual polarization, that is, a memory cell having a small operation margin is selected as a defective product from the beginning.
A margin measuring unit that is built into the ferroelectric memory and measures the operating margin is operated by a microprocessor, etc.
It is determined whether the read margin is appropriate.

[0010]

However, in the prior art shown in FIG. 6, the operating margin of each memory cell cannot be measured during use after shipment from the factory. The operation margin differs for each memory cell, and it is difficult to predict the degree of decrease in the operation margin from the outside. Therefore, there is a problem in that the operation margin is reduced without knowing, and a malfunction of the memory occurs.

In addition, since the operating margin differs for each memory cell due to manufacturing variations and differences in access frequency, there is a problem that the operating margin decreases quickly, that is, the lifetime of the entire device is limited by the short-lived memory cells. .

[0012]

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above problems, and measures the operating margin of a memory cell in a ferroelectric memory during use after shipment from a factory. Means for notifying an external system of the detection of a memory cell with an insufficient margin, or means for switching a circuit in which a memory cell with an insufficient operational margin is detected to a redundant circuit to prevent an operational failure due to an insufficient operational margin, or And extend the life of the memory.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (1) In a ferroelectric memory,
A margin measurement unit for measuring the operation margin of the memory cell, a counter unit for generating address information of the memory cell for performing the margin measurement, a margin measurement control unit for controlling start and stop of the margin measurement, and a margin measurement unit Providing a measurement result output unit for outputting a result to an external system allows the external system to be notified that an operation margin shortage has occurred due to deterioration, thereby preventing a memory malfunction. .

(2) In a ferroelectric memory, a margin measuring section for measuring an operation margin of a memory cell, a counter section for generating address information of a memory cell for performing a margin measurement, and controlling start and stop of the margin measurement. A margin measurement control unit, a measurement result storage unit that stores address information of a memory cell in which the operation margin shortage is detected by the margin measurement unit, a measurement result storage unit that stores a result measured by the margin measurement unit, and an external system. And a measurement result output unit that outputs the contents of the measurement result storage unit to an external system in response to the request of the external system. It is possible to prevent malfunction.

(3) In a ferroelectric memory, a margin measuring section for measuring an operation margin of a memory cell, a counter section for generating address information of a memory cell for performing a margin measurement, and controlling start and stop of the margin measurement. A margin measurement control unit, a switching unit that switches a connection between a circuit in which a memory cell with an insufficient operation margin is detected, and a redundant circuit, and a switching unit that controls when the operation margin is insufficient in the measurement result of the margin measurement unit. And a switching control unit that switches a circuit in which a memory cell with an insufficient operation margin is detected to a redundant circuit, so that a memory cell with an insufficient operation margin due to deterioration can be compensated for by a memory cell in the redundant circuit. Thus, the life of the memory can be extended.

(4) In the ferroelectric memory described in (3), switching between a circuit in which a memory cell having an insufficient operation margin is detected and a redundant circuit is monitored. Is provided to notify an external system that there is no longer a switchable redundant circuit, and it is possible to prevent a malfunction of the memory.

(5) In the ferroelectric memory according to (1), (2), (3) or (4), an external input terminal for controlling start and stop of measurement of an operation margin is provided, so that an external system It becomes possible to measure the operation margin when necessary.

[0018]

1 is a block diagram showing an example of the configuration of the present invention.
This example is a configuration diagram of a 1-transistor / 1-capacitor type (1T1C) using a reference cell method in a ferroelectric memory.

In FIG. 1, reference numeral 11 denotes a memory cell for storing information "0" or "1", and reference numeral 12 denotes a reference for determining whether the information stored in the memory cell 11 is "0" or "1". A reference cell for generating a voltage, 13 a word line controller for selecting and activating an arbitrary word line, 14 a plate line controller for selecting an arbitrary plate line and applying a voltage,
6 is a sense amplifier for amplifying a small voltage difference between the memory cell 11 and the reference cell 12, 7 is for selecting an arbitrary bit line,
A bit line control unit to be activated, 1 a margin measuring unit for measuring an operation margin of a memory cell, 15 a counter unit for generating address information of a memory cell for performing a margin measurement,
Reference numeral 16 denotes a margin measurement control unit that controls start and stop of margin measurement, 17 denotes an external input terminal that externally controls start and stop of measurement of an operation margin, and 2 outputs a result measured by the margin measurement unit 1 to an external system. The measurement result output unit 5 and the measurement result storage unit 5 store the address information of the memory cell in which the operation margin shortage is detected by the margin measurement unit 1, and the redundant circuit 8 and the circuit in which the memory cell in which the operation margin is insufficient are detected. The switching unit 4 switches the connection between the two. When the operation margin shortage is detected in the measurement result of the margin measurement unit 1, the switching unit 4 controls the switching unit 3 to switch the circuit in which the memory cell with the insufficient operation margin is detected to the redundant circuit. The control unit 9 monitors the switching between the circuit in which the memory cell with the insufficient operation margin is detected and the redundant circuit, and there is no redundant circuit that can be switched. When Tsu, redundant failure notification unit to notify an external system.

FIG. 2 shows a configuration block diagram (1) of an embodiment of the present invention. In the figure, 1, 2, 5, 6, 7, 11, 11
7 is the same as 1, 2, 5, 6, 7, 11 to 17 in FIG.

FIG. 3 shows an operation flowchart of one embodiment of the configuration block of FIG. Hereinafter, the operation will be described according to this flow.

Step S301: In order to activate the margin measurement control unit, a signal for starting margin measurement is input from an external input terminal to the margin measurement control unit.

Step S302: Address information of a memory cell to be subjected to margin measurement is set in the counter section. Subsequently, the word lines of the target memory cell and the reference cell for the margin measurement are activated, and a voltage is applied to the plate line.

Step S303: The voltage difference between signals output from each of the memory cell and the reference cell to the bit line is measured by a margin measuring unit, and it is determined whether the voltage difference is equal to or larger than a predetermined value.

Step S304: In the process of step S303, if the voltage difference is equal to or more than the predetermined value, the process proceeds to step S307. If the voltage difference is not equal to or more than the predetermined value, step S305 is performed.
Proceed to.

Step S305: The measurement result of the margin measurement unit, that is, the fact that the operation margin is insufficient is notified to the margin measurement result output unit.

Step S306: The address information of the memory cell having an insufficient operation margin is stored in the measurement result storage unit.

Step S307: It is determined whether or not execution has been performed on all memory cells. If the process has been executed on all the memory cells, the process ends. If the process has not been executed on all the memory cells, the process proceeds to step S308.

Step S308: The address information of the memory cell to be subjected to the next margin measurement is set in the counter section. Then, the process returns to step S303.

According to these processes, the address information of the memory cell having an insufficient operation margin is stored in the measurement result storage unit, so that the external system can store the contents of the measurement result storage unit as needed, for example, during regular maintenance. It is better to take it out and check the operation status of the memory.

Alternatively, the measurement result storage unit may not be provided, and when a memory cell with an insufficient operation margin is detected, the measurement result output unit may immediately notify the external system.

In this example, the margin measurement is started by inputting a signal to the external input terminal. However, the margin measurement may be started when the power to the system or the memory is turned on. Good.

FIG. 4 shows a configuration block diagram (2) of an embodiment of the present invention. In the figure, 1, 3, 4, 6, 7, 8, 9,
11 to 17 are 1, 3, 4, 6, 7, 8, 9, 1 in FIG.
Same as 1 to 17.

FIG. 5 shows an operation flowchart of one embodiment of the configuration block of FIG. Hereinafter, the operation will be described according to this flow.

Step S501: In order to activate the margin measurement control unit, a signal for starting margin measurement is input from an external input terminal to the margin measurement control unit.

Step S502: Address information of a memory cell to be subjected to margin measurement is set in the counter section. Subsequently, the word lines of the target memory cell and the reference cell for the margin measurement are activated, and a voltage is applied to the plate line.

Step S503: The voltage difference between signals output from each of the memory cell and the reference cell to the bit line is measured by the margin measuring unit, and it is determined whether the voltage difference is equal to or more than a predetermined value.

Step S504: If it is determined in step S503 that the voltage difference is equal to or more than the predetermined value, the process proceeds to step S508. If the voltage difference is not equal to or more than the predetermined value, step S505 is performed.
Proceed to.

Step S505: The measurement result of the margin measuring unit, that is, the fact that the operation margin is insufficient is notified to the switching control unit.

Step S506: The switching control unit switches the circuit in which a memory cell with an insufficient operation margin is detected to a redundant circuit.

Step S507: The switching to the redundant circuit is monitored by the redundancy disable notification unit, and when the number of times of switching exceeds a predetermined value, the external system is notified of the redundancy disable notification.

Step S508: It is determined whether the process has been executed for all the memory cells. If the process has been executed for all the memory cells, the process ends. If the process has not been executed for all the memory cells, the process proceeds to step S509.

Step S509: The address information of the memory cell to be subjected to the next margin measurement is set in the counter section. Then, the process returns to step S503.

In this example, the margin measurement is started by inputting a signal to the external input terminal. However, the margin measurement may be started when the power to the system or the memory is turned on.

[0045]

The present invention is embodied in the form described above, and has the following effects.

It is possible to notify a system using a ferroelectric memory that an operation margin shortage has occurred due to deterioration, and it is possible to prevent malfunction of the memory.

Further, by switching a circuit including a memory cell in which an operation margin is insufficient due to deterioration to a redundant circuit, the life of the memory can be extended.

[Brief description of the drawings]

FIG. 1 is a structural block diagram of the present invention.

FIG. 2 is a configuration block diagram (1) of an embodiment of the present invention.

FIG. 3 is an operation flowchart of one embodiment of the configuration block of FIG. 2;

FIG. 4 is a configuration block diagram (2) of an embodiment of the present invention.

FIG. 5 is an operation flowchart of one embodiment of the configuration block of FIG. 4;

FIG. 6 is a block diagram of a conventional configuration.

FIG. 7 is a hysteresis characteristic diagram of a ferroelectric substance.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Margin measurement part 2 Measurement result output part 3 Switching part 4 Switching control part 5 Measurement result storage part 6 Sense amplifier 7 Bit line control part 8 Redundancy circuit 9 Redundancy failure notification part 11 Memory cell 12 Reference cell 13 Word line control part 14 Plate Line control unit 15 Counter unit 16 Margin measurement control unit 17 External input terminal

Continuation of the front page (72) Inventor Masaaki Kawakami 98 Uno-kinu, Unoki-cho, Unoki-cho, Kawakita-gun, Ishikawa Prefecture F-term within F-fu Co., Ltd. 5B024 AA03 AA15 BA02 BA29 CA07 CA17 EA01 EA04 5L106 AA01 AA03 CC11 CC17 CC22 CC32 DD11 DD24 DD25 DD26 DD35 GG07

Claims (5)

[Claims] In a ferroelectric memory, a margin measuring section (1) for measuring an operation margin of a memory cell, a counter section (15) for generating address information of a memory cell for performing a margin measurement, and a start of a margin measurement A ferroelectric memory, comprising: a margin measurement control unit (16) for controlling start and stop; and a measurement result output unit (2) for outputting a result measured by the margin measurement unit to an external system. 2. A ferroelectric memory, comprising: a margin measuring section (1) for measuring an operation margin of a memory cell; a counter section (15) for generating address information of a memory cell for performing a margin measurement; And a margin measurement control unit (16) for controlling the start and stop, and a measurement result storage unit (5) for storing address information of a memory cell in which an insufficient operation margin is detected by the margin measurement unit.
And a measurement result output unit (2) for storing a result measured by the margin measurement unit in the measurement result storage unit and outputting the contents of the measurement result storage unit to the external system in response to a request from the external system. Characteristic ferroelectric memory. 3. A ferroelectric memory, comprising: a margin measuring section (1) for measuring an operation margin of a memory cell; a counter section (15) for generating address information of a memory cell for performing a margin measurement; Measurement control unit (16) for controlling the start and stop, a switching unit (3) for switching the connection between the circuit in which the memory cell with an insufficient operation margin is detected and the redundant circuit, and an insufficient operation margin based on the measurement result of the margin measurement unit. And a switching control unit (4) for controlling a switching unit when a memory cell with an insufficient operation margin is detected and switching to a redundant circuit. 4. The ferroelectric memory according to claim 3, wherein switching between a circuit in which a memory cell with an insufficient operation margin is detected and a redundant circuit is monitored, and when there is no redundant circuit that can be switched, an external system is provided. A ferroelectric memory, comprising: a redundancy disable notification section (9) for performing notification. 5. The ferroelectric memory according to claim 1, further comprising an external input terminal for controlling start and stop of measurement of an operation margin.