JP2001085458A - Semiconductor device and electronic circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device, etc., having bump gaps sealed with a resin so as to facilitate replacing works and an electronic circuit device, where stresses caused by the thermal expansion coefficient difference between a semiconductor chip and a mounting board can be relaxed to improve the connection reliability. SOLUTION: Electronic circuit device comprises electrodes 11, 12 connected to an electronic circuit pattern formed on a semiconductor chip and ball bumps 16 connected with a solder 15 to the electrodes 11, 12, the ball bumps are made of a shape memory alloy having a shape recovery temperature set higher than room temperature, and the maximum temperature is of shape recovery temperature during use of a semiconductor device.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and an electronic circuit device, and more particularly, to a semiconductor device and an electronic circuit device having a compact and high-density package form.

[0002]

2. Description of the Related Art The demand for smaller, thinner, and lighter portable electronic devices, such as digital video cameras, digital mobile phones, and notebook computers, is increasing. While semiconductor devices have been reduced by 70% in three years, research and development have been made as an important issue how to increase the component mounting density on a mounting board.

Conventionally, as a package form of a semiconductor device, a DIP (Dual Inline Package) or PGA (P
Lead insertion type (TH) that inserts lead wires into through holes provided in a printed circuit board such as an in Grid Array
D: Through Hall Mount Device), QFP (Quad F
lat Package) or TCP (Tape Carrier Packag)
e) A surface mount device (SMD) in which lead wires such as those described above are soldered and mounted on the surface of a substrate has been used. To promote further miniaturization, chip size packages (CSP: FBGA, CSPGA) that realize a further miniaturization and higher density by making the package size as close as possible to the size of the semiconductor chip
(Flip-chip mounting), a method of mounting the semiconductor chip with the pad opening side facing the mounting board (flip-chip mounting) has attracted attention due to the package form called (Fine-Pitch BGA). A number of suggestions have been made.

The above-mentioned conventional chip size package (C
The semiconductor device in the (SP) form and its mounting form will be described with reference to the drawings. FIG. 9A is a cross-sectional view of the above semiconductor device. A protective film 13 made of, for example, a silicon nitride film is formed on the surface of the semiconductor chip 10 on which the pad electrode 11 made of aluminum or the like is formed, and an opening for exposing the pad electrode 11 to the protective film 13 is formed. Have been. In this opening, chrome, copper,
BLM (Ball Limiting Met)
al) A not-shown conductive film called a film is formed on the pad electrode 11. Further, a ball bump 16 'made of, for example, a high melting point solder is formed so as to be connected to the conductive film (BLM film). The CSP type semiconductor device 100a is configured as described above.

Next, an electronic circuit device in which the semiconductor device 100a is mounted on a mounting board will be described. FIG.
(B) is a sectional view of the electronic circuit device. The mounting board 2 includes a land (electrode) 21 made of copper or the like formed at a position corresponding to a formation position of the ball bump 16 ′ of the semiconductor device 100 a to be mounted on the upper surface of the board 20 made of, for example, a glass epoxy material; It has a printed wiring portion (not shown) formed on the front surface, the back surface, the inside of the substrate 20 and the like connected to the land 21. The surface of the substrate 20 excluding the lands 21 is covered with a solder resist (not shown).

The CSP type semiconductor device 100a is mounted on the mounting substrate 2 so that the ball bumps 16 'and the lands 21 correspond to each other, and solder for bonding (not shown) is used.
Alternatively, the ball 21 is mechanically and electrically connected to the land 21 by the ball bump 16 'itself. Further, a gap between the CSP-type semiconductor device 100a and the mounting substrate 2 is sealed with a sealing resin 3 made of epoxy resin or the like.

However, in the above-described conventional semiconductor device mounting form, the semiconductor device and the mounting substrate are fixed by a sealing resin, and when a device chip is defective, the entire mounting substrate on which the semiconductor chip is mounted is defective. There is no other method than discarding the entire chip or applying chemical or mechanical external force with knowledge of the damage to the substrate and forcibly peeling off the semiconductor chip, making it difficult to replace (rework) defective parts.

In the above-mentioned semiconductor device, wiring for connecting the pad electrode and the bump is provided, and the gap between the ball bumps is sealed before mounting on the mounting board, and the surface on which the ball bumps are formed is made of resin. The covered CSP type semiconductor device and its mounting form will be described with reference to the drawings. FIG. 10A is a sectional view of the above semiconductor device. Pad electrode 11 made of aluminum or the like of semiconductor chip 10
A wiring layer 12 made of, for example, copper or aluminum
Is formed on the pad electrode 11 and the wiring layer 12 by covering with a protective film 13 made of, for example, a silicon nitride film. In the bump formation region, the protective film 1
3, an opening 13a for exposing the wiring layer 12 is formed. In this opening 13a, a columnar electrode 18 made of a solder ball or the like is formed, and a ball bump 16 'made of, for example, a eutectic solder or the like is formed thereon.
Are formed. Here, the gap between the ball bumps is sealed by the resin film 17 having a thickness enough to bury the columnar electrodes 18. As described above, the CSP type semiconductor device 100b is configured.

Next, an electronic circuit device in which the semiconductor device 100b is mounted on a mounting board will be described. FIG.
(B) is a sectional view of the electronic circuit device. The mounting substrate 2 is the same as the mounting substrate shown in FIG. 9B. For example, on the upper surface of a substrate 20 made of a glass epoxy material, the ball bump 16 ′ of the semiconductor device 100b to be mounted is provided.
Land (electrode) 21 made of copper or the like formed at a position corresponding to the formation position of
0 has a printed wiring portion (not shown) formed on the front surface, the rear surface, the inside of the substrate 20, and the like. The surface of the substrate 20 excluding the lands 21 is covered with a solder resist (not shown).

The CSP type semiconductor device 100b is mounted on the mounting substrate 2 in such a manner that the ball bumps 16 'and the lands 21 correspond to each other, and solder for bonding (not shown).
Alternatively, the ball 21 is mechanically and electrically connected to the land 21 by the ball bump 16 'itself.

In the above-mentioned semiconductor device, the formation position of the ball bump 16 'is formed so as to be shifted from the formation position of the pad electrode 11, for example, in order to avoid contact with an adjacent bump. The wiring layer 12 is patterned by a pattern. Therefore, it is possible to increase the degree of freedom of the formation position of the bump and increase the pitch of the bump, thereby increasing the diameter of the bump and improving the reliability of bonding by the bump to the mounting substrate. .

Further, since the gap between the ball bumps is sealed, it is not necessary to seal the gap between the semiconductor device and the mounting board with a resin when mounted on the mounting board. For this reason,
Even when a defect occurs in a device chip, replacement of a defective semiconductor device can be easily performed.

[0013]

However, in the above-described semiconductor device and the electronic circuit device in which the semiconductor device is mounted on a mounting substrate, the semiconductor chip and the mounting substrate (for the reliability of the bonding portion due to the bump after the flip-chip mounting) are required. Thermal stress becomes a serious problem due to the difference in the thermal expansion coefficient of the printed wiring board. 3.4p thermal expansion coefficient of silicon
pm / ° C., whereas a glass epoxy-based mounting board, which is generally widely used, has a thermal expansion coefficient of about 15 pp.
When thermal stress is repeatedly applied to the bump junction due to a temperature difference caused by turning on / off the chip, the electrode is formed on the electrode 10a of the semiconductor chip 10 and the substrate 20 of the mounting board, as shown in FIG. Crack C may occur at the joint of the ball bump 16 ′ connecting the land 21, which may cause a break failure.

The present invention has been made in view of the above problems, and the present invention relates to a semiconductor device and a mounting board for a semiconductor device or the like in which a gap between bumps is sealed with resin so as to facilitate replacement work. It is an object of the present invention to provide a semiconductor device capable of improving the connection reliability by alleviating a stress caused by a difference in thermal expansion coefficient of the semiconductor device, and an electronic circuit device having the semiconductor device mounted on a mounting board.

[0015]

In order to achieve the above object, a semiconductor device according to the present invention comprises: a semiconductor chip having an electronic circuit pattern formed thereon; an electrode formed to be connected to the electronic circuit pattern; A ball bump made of a shape memory alloy soldered to the electrode.

The semiconductor device according to the present invention is preferably
The shape recovery temperature of the shape memory alloy is set higher than normal temperature. More preferably, the maximum temperature during use of the semiconductor device is about the shape recovery temperature.

The semiconductor device according to the present invention is preferably
At least a gap between the ball bumps is sealed, and the ball bump bonding surface of the semiconductor chip is covered with a resin. More preferably, the side surface of the semiconductor chip is further covered with a resin. Alternatively, more preferably, the entire surface of the semiconductor chip is covered with a resin.

The semiconductor device of the present invention is preferably
A plating layer is formed on the surface of the ball bump.
More preferably, a nickel plating layer is formed on the surface of the ball bump.

The semiconductor device of the present invention is preferably
The solder for joining the ball bumps is lead-free solder. More preferably, the solder for joining the ball bumps is a Sn-Ag solder, a Sn-Zn solder, a Sn-Cu solder, or an Sb-Bi solder.

In the above-described semiconductor device of the present invention, the electrode connected to the electronic circuit pattern on which the semiconductor chip is formed has a shape recovery temperature set higher than normal temperature, and the maximum temperature during use of the semiconductor device is set at the shape recovery temperature. Since ball bumps made of a shape memory alloy that is about the same temperature are soldered, thermal stress is caused by the temperature difference caused by turning on / off the chip in a low temperature region such as normal temperature because the ball bump has a small elastic coefficient. Although the elastic modulus of the ball bump increases as the temperature increases, the difference in the amount of shrinkage from the pitch of the bump joint at the time of mounting due to reflow decreases. It is getting smaller. Therefore, in a semiconductor device or the like in which the gaps between the bumps are sealed with resin so that the replacement operation becomes easy, the stress caused by the difference in the coefficient of thermal expansion between the semiconductor chip and the mounting substrate is reduced, and the connection reliability is improved. be able to.

According to another aspect of the present invention, there is provided an electronic circuit device comprising: a semiconductor chip having an electronic circuit pattern formed thereon; an electrode formed to be connected to the electronic circuit pattern; A semiconductor device having solder-bonded ball bumps made of a shape memory alloy, and a mounting board having at least a wiring portion and a land electrode connected to the wiring portion formed on the surface thereof; Are soldered to the land electrodes of the mounting board.

The above-described electronic circuit device of the present invention is an electronic circuit device in which the above-described semiconductor device of the present invention is mounted on a mounting board, and the gap between the bumps is sealed with a resin so that the replacement operation is easy. In an electronic circuit device or the like on which the stopped semiconductor device is mounted, stress caused by a difference in thermal expansion coefficient between the semiconductor chip and the mounting substrate can be reduced to improve connection reliability.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a semiconductor device according to the present invention and an electronic circuit device in which the semiconductor device is mounted on a mounting board will be described below with reference to the drawings.

First Embodiment FIG. 1A is a sectional view of a semiconductor device according to the present embodiment, and FIG. 1B is an enlarged view of a region A in FIG. 1A. A wiring layer 12 made of, for example, copper or aluminum is formed on a pad electrode 11 made of aluminum or the like of the semiconductor chip 10, and a protective film 1 made of, for example, a silicon nitride film is formed on the pad electrode 11 and the wiring layer 12.
3 is formed by coating. In the bump formation region, an opening 13a for exposing the wiring layer 12 to the protective film 13 is formed. A laminated conductive film 14 such as a nickel film 14a and a gold film 14b is formed on the wiring layer 12 in the opening 13a.
Solder containing n-Pb lead or Sn-Ag
Ni-Ti, Ni-Ti-Cu whose surface is covered with a nickel film by a solder layer 15 such as a lead-free solder such as a system solder, a Sn-Zn solder, a Sn-Cu solder or a Sb-Bi solder. And a ball bump 16 made of a shape memory alloy such as Ni-Ti-Co. The gap between the ball bumps is sealed by a resin film 17 having a thickness enough to bury the solder layer 15. As described above, the CSP type semiconductor device 1
a is constituted.

Next, an electronic circuit device in which the semiconductor device 1a is mounted on a mounting board will be described. FIG. 2 is a sectional view of the electronic circuit device. The mounting board 2 is, for example, on
A land (electrode) 21 made of copper or the like formed at a position corresponding to the formation position of the ball bump 16 of the semiconductor device 1a to be mounted, and connected to the land 21 to be on the front surface, the back surface, and inside the substrate 20 And a printed wiring section (not shown). The surface of the substrate 20 excluding the lands 21 is covered with a solder resist (not shown).

The CSP type semiconductor device 1a is mounted on the mounting substrate 2 in such a manner that the ball bumps 16 and the lands 21 correspond to each other. For example, Sn-Pb-based lead-containing solder or Sn-Ag-based solder The lands 21 are mechanically and electrically connected to each other by a solder layer 22 for bonding such as a lead-free solder such as a Sn-Zn-based solder, a Sn-Cu-based solder, or an Sb-Bi-based solder.

In the above-described semiconductor device, the ball bumps 16 are formed from a shape memory alloy. Here, as shown in FIG. 3, the shape memory alloy has two types of crystal structures, a martensite phase on a low temperature side and an austenite phase on a high temperature side, depending on the temperature, and the boundary temperature region is a two-phase region. In the above shape memory alloy, the elastic modulus (G) changes depending on the temperature, and is small in the martensite phase and large in the austenite phase, and the two-phase region is a region that smoothly changes so as to connect the elastic coefficients of both phases.

In the above shape memory alloy, the martensite phase is deformed when a load is applied, and becomes a deformed martensite phase whose shape does not return to its original shape even after unloading. When this is heated, the crystal structure changes to an austenite phase, at which time it recovers its original shape. When this is cooled, it becomes a martensite phase whose shape has been recovered. Therefore, the boundary temperature between the two-phase region where the temperature is raised to recover the shape and the austenite phase is the shape recovery temperature.

For example, the shape recovery temperature of the shape memory alloy is set higher than the normal temperature, and in particular, the shape recovery temperature is set to about the temperature when the temperature is increased by the heat generated during use of the electronic circuit device. preferable. For example, in a shape memory alloy made of Ni—Ti, the boundary between the martensite phase and the two-phase region can be about 65 ° C., and the boundary between the two-phase region and the austenite phase (shape recovery temperature) can be about 80 ° C.
For example, in the case of Ni—Ti—Cu (45:45:10), the shape recovery temperature can be set to about 100 ° C.,
In the case of Ni-Ti-Hf (35:35:30), the temperature can be set to about 150 ° C.

By using the ball bumps using the shape memory alloy, the thermal stress at the time of mounting the semiconductor device can be reduced. This will be described with reference to FIG. In the figure, the semiconductor chip 1
0, only the mounting substrate 20, the ball bumps 16 made of a shape memory alloy, and the solder layers (15, 22) are shown.
As shown in FIG. 4A, in the step of mounting the semiconductor device on the mounting board, 200 to 2
Heat treatment to about 50 ° C. At this time, the semiconductor chip 1
0 and the thermal expansion coefficient of the mounting substrate 20, the expansion amounts of the two are different.
Since (5, 22) is in a molten state, no thermal stress is applied to the bump joint.

When the electronic circuit device which has been bump-bonded through the reflow process as described above cools down, the temperature of the device becomes normal temperature (about 20 ° C.) when the device is off. At this time, since the mounting substrate 20 has a higher coefficient of thermal expansion than the semiconductor chip 10, the amount of shrinkage due to cooling is larger in the mounting substrate 20 than in the semiconductor chip 10. Therefore,
Although thermal stress is applied to the bump bonding portion fixed by the solder, the ball bump 1 made of a shape memory alloy is used.
No. 6 has a small elastic coefficient in a normal temperature range, so that the above-mentioned thermal stress can be reduced.

When the apparatus is on, the temperature rises to about 100 ° C. due to the heat generated by the apparatus. As the temperature rises, the elastic modulus of the shape memory alloy increases. However, since the mounting substrate 20 has a higher coefficient of thermal expansion than the semiconductor chip 10, the mounting substrate 20 expands more. It is a direction to relieve stress. As mentioned above,
By using a ball bump made of a shape memory alloy, stress due to a difference in thermal expansion coefficient between the semiconductor chip and the mounting substrate can be reduced, and connection reliability can be improved.

Further, in the above-described semiconductor device, the pad electrode 11 is used to avoid contact with an adjacent bump.
The formation position of the ball bump 16 is shifted from the formation position of the wiring layer 12, and the wiring layer 12 is formed in a pattern connecting the two positions. Therefore, it is possible to increase the degree of freedom of the formation position of the bump and increase the pitch of the bump, thereby increasing the diameter of the bump and improving the reliability of bonding by the bump to the mounting substrate. .

Further, since the gap between the ball bumps is sealed, there is no need to seal the gap between the semiconductor device and the mounting board with resin when mounted on the mounting board. Therefore, even when a defect occurs in the device chip, the replacement operation of the defective semiconductor device can be easily performed.

The method of manufacturing the above-described semiconductor device will be described with reference to an enlarged view of a region corresponding to FIG. First, as shown in FIG. 5A, a pad electrode 11 made of an aluminum-copper alloy or the like is formed on a semiconductor wafer 10 on which a circuit pattern of a semiconductor chip is formed by, for example, a sputtering method or etching.

Next, as shown in FIG. 5B, a conductive film is deposited and etched by, for example, a sputtering method.
Alternatively, a pattern is formed by a lift-off method or the like using a conductive film such as copper or aluminum so that the wiring layer 12 connecting the pad electrode 11 and a bump formation region formed in a later step is connected to the pad electrode 11.

Next, as shown in FIG.
A protective film 13 made of a silicon nitride film or a laminated insulating film of a silicon oxide film and a silicon nitride film is formed on the entire surface of the pad electrode 11 and the wiring layer 12 by VD (Chemical Vapor Deposition) or the like. An opening 13a for exposing the wiring layer 12 is formed in the bump forming region 13a of the protective film 13.

Next, as shown in FIG. 6D, the wiring layer 1 exposed in the opening 13a is formed by, for example, plating.
A stacked conductive film 14 such as a nickel film 14a and a gold film 14b is formed on the upper layer 2.

Next, as shown in FIG.
Solder containing n-Pb lead or Sn-Ag
Solder, such as a solder containing no lead, such as a system solder, a Sn-Zn system solder, a Sn-Cu system solder, or a Sb-Bi system solder, is supplied by a screen printing method or the like to form a solder layer 15, and thereafter, For example, a thermosetting resin such as an epoxy resin or a resin such as an ultraviolet curable resin is applied by a spin coating method or the like, a curing process is performed to form a resin film 17, and the surface is polished to expose the surface of the solder layer 15. Let it.

Next, for example, a ball bump 16 made of a shape memory alloy such as Ni-Ti, Ni-Ti-Cu or Ni-Ti-Co whose surface is coated with a nickel film is transferred and supplied. Thus, the semiconductor device shown in FIG. 1 can be manufactured.

Second Embodiment FIG. 7A is a sectional view of a semiconductor device according to the present embodiment, and FIG. 7B is an enlarged view of a region B in FIG. 7A. A wiring layer 12 made of, for example, copper or aluminum is formed on a pad electrode 11 made of aluminum or the like of the semiconductor chip 10, and a protective film 1 made of, for example, a silicon nitride film is formed on the pad electrode 11 and the wiring layer 12.
3 is formed by coating. In the bump formation region, an opening 13a for exposing the wiring layer 12 to the protective film 13 is formed. A columnar electrode 18 made of copper or the like is formed on the wiring layer 12 in the opening 13a, and a stacked conductive film 14 such as a nickel film 14a and a gold film 14b is formed thereon. Sn
The surface is formed by a solder layer 15 such as a lead-free solder such as Pb-based solder, or Sn-Ag-based solder, Sn-Zn-based solder, Sn-Cu-based solder or Sb-Bi-based solder. A ball bump 16 made of a shape memory alloy such as Ni-Ti, Ni-Ti-Cu, or Ni-Ti-Co covered with a nickel film is formed by bonding. The gap between the ball bumps is sealed by a resin film 17 having a thickness enough to bury the solder layer 15. As described above, the CSP type semiconductor device 1b
Is configured.

Next, an electronic circuit device in which the semiconductor device 1b is mounted on a mounting board will be described. FIG. 8 is a sectional view of the electronic circuit device. The mounting board 2 is, for example, on
A land (electrode) 21 made of copper or the like formed at a position corresponding to the formation position of the ball bump 16 of the semiconductor device 1b to be mounted, and connected to the land 21 to be on the front surface, the back surface, and inside the substrate 20 And a printed wiring section (not shown). The surface of the substrate 20 excluding the lands 21 is covered with a solder resist (not shown).

The CSP type semiconductor device 1b is mounted on the mounting substrate 2 so that the ball bumps 16 and the lands 21 correspond to each other. For example, Sn-Pb-based lead-containing solder or Sn-Ag-based solder The lands 21 are mechanically and electrically connected to each other by a solder layer 22 for bonding such as a lead-free solder such as a Sn-Zn-based solder, a Sn-Cu-based solder, or an Sb-Bi-based solder.

In the above-described semiconductor device, the shape recovery temperature of the ball bump 16 is set higher than room temperature, for example, and the shape recovery temperature is about the temperature when the temperature is increased by the heat generated during use of the electronic circuit device. Is formed from a shape memory alloy. Therefore, when the device is off,
Since the shape memory alloy has a small elastic modulus, when the device is on, the mounting board expands more in the direction to reduce the thermal stress, so the stress caused by the difference in thermal expansion coefficient between the semiconductor chip and the mounting board And the connection reliability can be improved.

Further, similarly to the first embodiment, the pitch of the bumps can be increased, whereby the diameter of the bumps can be increased, and the reliability of the bonding to the mounting substrate can be improved. Further, even when a defect occurs in a device chip, a replacement operation of a defective semiconductor device can be easily performed.

As the semiconductor device of the present invention and an electronic circuit device mounting the same, a MOS transistor type semiconductor device,
Bipolar semiconductor device, BiCMOS semiconductor device,
The present invention can be applied to any semiconductor device such as a semiconductor device having a logic and a memory.

The semiconductor device of the present invention is not limited to the above embodiment. For example, as the composition of the shape memory alloy,
Other than those shown above can be used. Further, it is also possible to adopt a configuration in which a ball bump is soldered on a pad electrode. In addition, various changes can be made without departing from the gist of the present invention.

[0048]

As described above, according to the semiconductor device of the present invention and the electronic circuit device on which the semiconductor device is mounted, the semiconductor device and the like in which the gaps between the bumps are sealed with resin so as to facilitate replacement work. In addition, the connection reliability can be improved by reducing the stress caused by the difference in the coefficient of thermal expansion between the semiconductor chip and the mounting substrate.

[Brief description of the drawings]

FIG. 1A is a sectional view of a semiconductor device according to a first embodiment, and FIG. 1B is an enlarged view of a region A in FIG. 1A.

FIG. 2 is a cross-sectional view of the electronic circuit device according to the first embodiment.

FIG. 3 is a graph showing the temperature dependence of the elastic modulus of a shape memory alloy.

FIGS. 4A to 4C are schematic cross-sectional views illustrating a mechanism for reducing thermal stress when a shape memory alloy is used as a ball bump.

FIGS. 5A and 5B are cross-sectional views illustrating a manufacturing process of the method for manufacturing a semiconductor device according to the first embodiment. FIG. 5A illustrates a process up to a pad electrode opening process, FIG.
(C) shows up to the step of forming the protective film.

FIG. 6 shows a step that follows the step shown in FIG. 4; (d) shows a step up to the step of forming a laminated conductive film; and (e) shows a step up to a ball bump transfer step.

FIG. 7A is a sectional view of a semiconductor device according to a second embodiment, and FIG. 7B is an enlarged view of a region A in FIG. 7A.

FIG. 8 is a sectional view of an electronic circuit device according to a second embodiment.

9A is a cross-sectional view of a semiconductor device according to a first conventional example, and FIG. 9B is a cross-sectional view of an electronic circuit device according to the first conventional example.

FIG. 10A is a cross-sectional view of a semiconductor device according to a second conventional example, and FIG. 10B is a cross-sectional view of an electronic circuit device according to the second conventional example.

FIG. 11 is a cross-sectional view showing a state where a crack is formed at a solder bump joint.

[Explanation of symbols]

1a, 1b, 100a, 100b: CSP type semiconductor device, 2: mounting substrate, 3: sealing resin, 10: semiconductor chip, 11: pad electrode, 12: wiring layer, 13: protective film,
13a: opening, 14a: nickel film, 14b: gold film,
14: laminated conductive film, 15, 22: solder layer, 16, 1
6 ': ball bump, 17: resin coating, 18: columnar electrode, 20: substrate, 21: land.

Claims (11)

[Claims] 1. A semiconductor device comprising: a semiconductor chip on which an electronic circuit pattern is formed; an electrode formed to be connected to the electronic circuit pattern; and a ball bump made of a shape memory alloy soldered to the electrode. . 2. The semiconductor device according to claim 1, wherein a shape recovery temperature of said shape memory alloy is set higher than a normal temperature. 3. The semiconductor device according to claim 2, wherein a maximum temperature during use of the semiconductor device is about the shape recovery temperature. 4. The semiconductor device according to claim 1, wherein at least a gap between the ball bumps is sealed, and the ball bump bonding surface of the semiconductor chip is covered with a resin. 5. The semiconductor device according to claim 4, wherein a side surface of said semiconductor chip is further covered with a resin. 6. The semiconductor device according to claim 4, wherein the entire surface of said semiconductor chip is covered with a resin. 7. The semiconductor device according to claim 1, wherein a plating layer is formed on a surface of said ball bump. 8. The semiconductor device according to claim 7, wherein a nickel plating layer is formed on a surface of said ball bump. 9. The semiconductor device according to claim 1, wherein the solder for joining the ball bumps is a solder containing no lead. 10. The solder for joining the ball bumps is S
10. The semiconductor device according to claim 9, wherein the semiconductor device is an n-Ag solder, a Sn-Zn solder, a Sn-Cu solder, or an Sb-Bi solder. 11. A semiconductor device having a semiconductor chip on which an electronic circuit pattern is formed, an electrode formed to be connected to the electronic circuit pattern, and a ball bump made of a shape memory alloy soldered to the electrode. And an electronic circuit having at least a wiring portion and a mounting substrate on which a land electrode connected to the wiring portion is formed, wherein a ball bump of the semiconductor device is soldered to the land electrode of the mounting substrate. apparatus.