JP2001075530A - Plasma display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a plasma display device that optimum luminance display is conducted without deteriorating gradation display even through display load as a whole and at each subframe is fluctuated. SOLUTION: Relating to a frame time division type plasma display device, one frame is constituted of plural subframes SF1 to SF5 and luminance of each subframe is determined by the number of sustain pulses. The device is provided with a frame length computing circuit 12, a subframe condition determining circuit 22, which determines the number of subframes, a luminance ratio and the total number of sustain pulses from a frame length, a load factor computing circuit 11, which computes a load factor from external input signals, a luminance coefficient computing circuit 23, which determines maximum display luminance from electric power consumption and computes luminance coefficients, and a sustain pulse number computing circuit 24 which compensates for the luminance reduction by a load for every subframe from the total number of sustain pulses, the luminance ratio, the luminance coefficients and the load factor and computes the number of sustain pulses for each subframe.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device using a plasma display panel (hereinafter, referred to as a PDP) (hereinafter, a plasma display device (PDP device)).
Called. In particular, the present invention relates to a plasma display device that performs gradation display by weighting and varying the display light emission period for each subframe.

2. Description of the Related Art In recent years, there has been a remarkable demand for thinner displays, diversification of information to be displayed and installation conditions, larger screens and higher definition, and display devices meeting these demands have been demanded. I have. PDP devices are
The display device responds to such a request. In the PDP device, when performing gradation display, generally, one display frame is composed of a plurality of subframes, each subframe period is weighted to be different, and each bit of gradation data is displayed in a corresponding subframe. are doing.

A PDP has a memory effect, sets each cell in a state in accordance with display data, and emits light for display (display light emission) by applying an AC voltage.
The display light emission intensity varies depending on display data, that is, the ratio of cells to be lit, as described later, and there is a problem that the luminance ratio between subframes is shifted. In addition, current consumption and power consumption change in accordance with the ratio of cells to be turned on. The present invention solves a problem that occurs with a change in display.

[0004]

2. Description of the Related Art In a PDP, a two-electrode type in which two electrodes perform a selective discharge (address discharge) and a sustain discharge (a discharge for display light emission), and an address discharge is performed using a third electrode. There is a three-electrode type. For a three-electrode PDP device,
JP-A-7-140928 and JP-A-9-1853
Since it is disclosed in Japanese Patent Publication No. 43 and the like, detailed description is omitted here, and the basic configuration and operation will be briefly described.

FIG. 1 is a diagram showing a basic configuration of a three-electrode PDP device. 1, a plasma display panel (PDP) 1 includes an address driver 2 for outputting a signal to be applied to an address electrode, and a Y scan driver 3 for outputting a signal to be applied to a scanning electrode (Y electrode).
And an X common driver 4 that outputs a signal to be applied to a common sustain discharge electrode (X electrode), and a Y common driver 5 that outputs a sustain discharge signal to be applied to the Y electrode via the Y scan driver 3. I have. The control circuit 6 includes a display data control unit 7 that generates a display data signal to be output to the address driver 2 from display data input from the outside, and a panel driving unit that generates a driving signal related to driving of a panel other than the display data. And a control unit 8. The panel drive control unit 8 includes a scan driver control unit 9 that generates a control signal related to scanning output to the Y scan driver 3 and a common driver control unit 10 that generates a control signal related to sustain discharge.

FIG. 2 is a diagram showing a frame configuration in the case of performing 32-gradation display. Normally, gradation display in a PDP device is performed by associating each bit of display data with a sub-frame period and changing the length of the sub-frame period according to bit weighting. For example, when performing 32-gradation display, display data is represented by 5 bits, one frame display is composed of five subframes SF1 to SF5, and display of each bit data is performed in each subframe period. . Actually, a pause period in which no operation is performed is provided to adjust the timing.

Each of the sub-frames SF1 to SF5 includes a reset period in which all display cells of the panel are kept in a uniform state without wall charges, an address period in which wall charges necessary for starting discharge in lit display cells are stored, A sustain period in which a sustain discharge signal is applied to perform a discharge for display in a display cell in which wall charges are accumulated. As shown,
In each subframe, the reset period and the address period have the same length, and the sustain periods are different. The reset period and the address period of each subframe have the same length. As described above, when performing 32 gradation display,
Generally, the length of the sustain discharge period is 1: 2: 4: 8: 1.
A ratio of 6. By selecting a combination of subframes to be lit in each display cell, a difference in luminance of 32 tones from 0 to 31 can be displayed.

FIG. 3 is a block diagram showing a schematic configuration of a portion of the control circuit 6 related to the present invention. Among the external input signals, the display data is input to the data converter 11,
The vertical synchronization signal (Vsync) is input to the frame counter 12. The display data supplied from the outside generally has a format in which the gradation data of each pixel is continuous, and cannot be changed to a sub-frame format as it is. Therefore, the data converter 11 temporarily stores the display data in the frame memory and converts the display data into a format of address data to be output to the address driver 2. Further, the data converter 11 calculates a load factor described later.

The frame counter 12 detects the length of one frame (frame length) from the vertical synchronization signal. There are various types of signals input from the outside, and a PDP device is generally designed so as to be able to cope with them. The control timing is changed based on the frame length detected by the frame counter 12. ing. Memory (RO
The number of subframes (the number of SFs) and the luminance ratio thereof are stored in the drive table 17 of M) 16 according to the frame length. The arithmetic unit 13 stores an address CAS of the memory 16 in which corresponding information is stored based on the frame length.
E is calculated, CASE is applied to the memory 16 via the scan controller 15, and the number of SFs and the luminance ratio corresponding to the frame length are determined.

The arithmetic unit 13 calculates the sustain discharge period in one frame by subtracting the time required for the reset period and the address period from the number of SFs, and calculates the sustain discharge period in one frame from one sustain pulse period set in advance. Calculate the total sustain pulse. Memory (ROM) 18
In the luminance table 19, the number of sustain pulses of each subframe is stored according to the total sustain pulse and the luminance ratio. The arithmetic unit 13 stores the address MCB of the memory 18 in which the corresponding information is stored from the total sustain pulse.
Is calculated and applied to the memory 18 together with the luminance ratio to determine the number of sustain pulses for each sub-frame. Conventionally, control is performed by determining the number of sustain pulses in each subframe in this way. FIG. 4 shows an example of the luminance table 19.

Next, the load factor and power consumption will be described. The effective display brightness of each sub-frame is determined by the luminance of the sustain discharge and the period of the sustain discharge. The sustain discharge period of each sub-frame is a predetermined ratio (luminance ratio), and if the number of display cells lit in each sub-frame (display load) is the same, the luminance by the sustain discharge is the same, and the display brightness is The predetermined ratio is the same as the ratio of the sustain discharge period. However, the currents supplied to the X electrode and the Y electrode differ according to the number of display cells that are turned on at the same time. If the current values differ, a voltage drop occurs due to wiring resistance, and the light emission intensity (luminance) differs even with the same sustain discharge. Will be. Specifically, when the number of illuminated display cells is large, that is, when the load factor is large, the luminance is low. When the number of illuminated display cells is small, that is, when the load factor is small, the luminance is high. Therefore, if the load ratio is different in each sub-frame, a difference occurs between the actually obtained luminance ratio and the preset luminance ratio, and the gradation displayed by combining the sub-frames is not accurately displayed. Has a problem that the inversion of brightness occurs between gradations.

In order to solve such a problem, in the invention disclosed in the above-mentioned Japanese Patent Application Laid-Open No. 9-185343,
A plurality of sustain pulse numbers of each sub-frame having a predetermined luminance are stored in the memory 18 according to the load ratio, and the number of sustain pulses is determined according to the load ratio of each sub-frame calculated by the data converter 11. As a result, the luminance ratio of each subframe is kept constant regardless of the load factor.

A large part of the power consumption of the PDP device is related to sustain discharge. As described above, the current supplied to the X electrode and the Y electrode in the sustain discharge depends on the number of display cells to be turned on. Therefore, a value obtained by multiplying the load factor of each subframe by the length of the sustain discharge period of the subframe is related to the power consumption. Although the upper limit of power consumption (current) is defined in the PDP device, it is required to display as bright as possible within this range. Therefore, the power consumption is detected, and if the power consumption does not exceed the upper limit, the total number of sustain pulses is increased as much as possible within the range. Thus, for example, in the case of a bright display,
Although the number of display cells to be lit increases, the power consumption falls within a predetermined range because the total number of sustain pulses is reduced. In the case of a dark display, the total number of sustain pulses is increased because the number of illuminated display cells is reduced, so that the actual display is not too dark and the power consumption is not significantly reduced. Even such a display is a display that does not cause a sense of incongruity due to human senses.

The current detection circuit 14 shown in FIG. 3 is a circuit for detecting a current flowing through the device, and calculates a power consumption from the detected current and outputs it to the arithmetic device 13. The arithmetic unit 13 is
The number of sustain pulses of each sub-frame read from the luminance table 19 is corrected according to the power consumption, and the corrected number of sustain pulses of each sub-frame is output to the scan controller 15. The scan controller 15 outputs a signal for controlling the X common driver 4 and the Y common driver 5 so that the sustain discharge is performed the number of times corresponding to the number of corrected sustain pulses during the sustain discharge period of each subframe.

As described above, power consumption depends on the number of display cells to be turned on. Therefore, the value obtained by weighting the load ratio of each subframe and the length of the sustain discharge period of the subframe corresponds to the power consumption. Therefore, instead of directly detecting the current flowing through the device, the power consumption is predicted by calculating a weighted average value of the sustain discharge period of the subframe to the load factor of each subframe, and the power consumption is predicted based on the predicted power consumption. In some cases, the above correction is performed.

[0016]

As shown in FIG. 3, the relationship between the total number of sustain pulses and the number of sustain pulses in each subframe is determined in advance by a luminance table 19 in a memory 18.
, And the number of sustain pulses read from each subframe is corrected according to the power consumption described above. There is a problem that a large-capacity memory (ROM) is required to create a precise table.

The values stored in the luminance table 19 are positive integers as shown in FIG. 4, and values below the decimal point are subjected to processing such as rounding. Therefore, the stored value includes a rounding error. When the above correction is performed on such a sustain pulse number,
There is a problem that the error increases and a predetermined luminance ratio cannot be obtained. Of course, the capacity of the memory 18 is increased,
It is conceivable to make the luminance table 19 more precise, but in this case, a problem arises in that the memory 18 having a larger capacity must be used.

In the conventional PDP device, the load ratio of each sub-frame is calculated for each frame to determine the number of sustain pulses for each corresponding sub-frame, and further, the correction based on power consumption is performed. Sustain discharge was controlled by the number of sustain pulses. For this reason, the number of sustain pulses in each sub-frame changes for each frame, causing a problem that flicker occurs.

FIG. 5 is a diagram showing an example of a change in the load factor in the display. As shown in the drawing, the range surrounded by the dotted line has a small change in the load factor. When changing to a different range, correction of the luminance ratio of the sub-frame and correction according to the power consumption are naturally necessary. However, in the conventional PDP device, the correction is performed even in the range surrounded by the dotted line. , Flicker was occurring.

The present invention solves such a problem, and simplifies the configuration by removing the memory for storing the luminance table, improves the display quality by performing more precise calculations, and improves the display quality. An object of the present invention is to realize a PDP device capable of performing stable display without flicker.

[0021]

In order to achieve the above object, the plasma display device of the present invention uses an arithmetic operation based on the total number of sustain pulses, the luminance ratio, the load factor, and the power consumption instead of using a luminance table. The number of sustain pulses for each subframe is determined. That is, in the plasma display device of the present invention, in a frame time-division type plasma display device in which a display frame of one screen is composed of a plurality of subframes, and the luminance of each subframe is determined by the number of sustain pulses, A frame length calculation circuit that calculates the length of one frame from one cycle length, a subframe condition determination circuit that determines the number of subframes, the luminance ratio of the subframe, and the total number of sustain pulses from the length of one frame; A load factor calculation circuit that calculates a load factor that is a ratio of display cells that are turned on from an input signal, and a maximum display luminance is determined from power consumption.
A brightness coefficient calculation circuit for calculating a brightness coefficient, and, from the total number of sustain pulses, a brightness ratio, a brightness coefficient, and a load factor, calculate a sustain pulse number of each subframe by correcting a brightness reduction due to a load for each subframe. A sustain pulse number calculation circuit.

According to the present invention, the luminance table can be removed and the influence of the rounding error can be reduced. The brightness coefficient calculation circuit includes a power consumption calculation circuit that calculates power consumption predicted from the load factor, and determines a maximum display brightness according to the power consumption to calculate a brightness coefficient. In this case, the load factor calculation circuit calculates a load factor for each subframe.
A weighted average load factor calculation circuit for calculating a weighted average load factor from a load factor and a luminance ratio for each subframe is provided, and the weighted average load factor is defined as the load factor.

The sustain pulse number calculation circuit includes a load ratio memory for storing the load ratio, a load ratio change amount calculation circuit for calculating a difference between the calculated load ratio and the load ratio stored in the load ratio memory, If does not exceed the predetermined threshold, without calculating the number of sustain pulses of each sub-frame, the number of sustain pulses of each sub-frame of the previous frame is output as the number of sustain pulses of each sub-frame of the frame, If the difference exceeds a predetermined threshold, the calculated number of sustain pulses for each subframe is output.

Thus, when the variation in the load factor is small, the number of sustain pulses in each subframe does not change, so that stable display without flicker can be achieved. As described above, without predicting the power consumption from the load factor, the luminance coefficient calculation circuit detects the current consumption of the device, and calculates the power consumption from the detected value, and presets the power consumption. A comparison circuit for comparing the calculated reference power with the reference power, the brightness coefficient may be reduced when the power consumption exceeds the reference power, and the brightness coefficient may be increased when the power consumption does not exceed the reference power. .

Also in this case, when the variation is small as described above, the sustain pulse number of the previous frame may be maintained, and the sustain pulse number may be changed to the corrected number of sustain pulses only when the variation is large.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A PDP apparatus according to an embodiment of the present invention
For example, it has a configuration as shown in FIG. 1, and only a part of the control circuit 6 is different from the conventional example. FIG. 6 is a block diagram showing a schematic configuration of the control circuit 6 according to the embodiment of the present invention, and corresponds to FIG. As is apparent from comparison with FIG. 3, the control circuit 6 of the embodiment eliminates the memory 18 storing the luminance table 19 and calculates the number of sustain pulses of each subframe by the calculation device 21. And different. The arithmetic unit 21 includes a subframe condition determination circuit 2
2, a luminance coefficient operation circuit 23, and a sustain pulse number operation circuit 24. Subframe condition determination circuit 22
Performs almost the same processing as the arithmetic unit 13 of FIG. Each circuit in the arithmetic unit 21 is realized by hardware or software.

FIG. 7 is a flowchart showing the arithmetic processing and correction processing of the number of sustain pulses of each sub-frame by the control circuit 6. The processing by the control circuit 6 will be described with reference to FIG. In step 101, as in the conventional example, the frame counter 12 detects the length (frame length) Tv of one frame from the vertical synchronization signal. Step 1
02, the subframe condition determination circuit 2 of the arithmetic unit 21
2 calculates the address CASE of the memory 16 in which the corresponding information is stored based on the frame length Tv, applies the CASE to the memory 16 via the scan controller 15, and adds the CASE to the frame length Tv stored in the drive table 17. The corresponding number of SFs (SFNUM) and the luminance ratio (WSFi) of each subframe are determined.

In step 103, the subframe condition determination circuit 22 of the arithmetic unit 13 determines the sustain discharge from the time required for driving the PDP, such as SFNUM and a preset reset period (RT) and address period (AT). Time DVT = SF required other than period (luminance display period)
NUM × (RT + AT) is calculated. From the difference between Tv and DVT, the time used in the sustain discharge period ST = Tv−DV
Calculate T. Furthermore, from the set one sustain pulse period SPT, the total number of sustain pulses NSUSma
Calculate x = ST / SPT.

In step 104, the data converter 1
1 reads the load ratio DLi of each subframe calculated. In step 105, the load ratio DL of each subframe
From i and the luminance ratio WSFi, the weighted average load factor MWDL
(T) = Σ (DLi × WSFi / ΣWSFi) is calculated and stored.In step 106, β processing as shown in Fig. 8 is performed.In step 201, the weighted average load factor MWD
The power consumption Pw predicted from L (t) is calculated. The specific calculation method is, for example, a method in which the relationship between the load factor and the power consumption is checked in advance, an equation for calculating the power consumption from the load factor is stored in an arithmetic device, and the calculation is performed according to the calculation formula. The simplest method is to calculate the product of the power per unit load and the weighted average load factor MWDL (t). In step 202, a luminance coefficient β = Pt / Pw, which is a ratio to a preset reference power Pt, is calculated.

In step 107, the weighted average load ratio MW when the number of sustain pulses is set before the number is stored.
From the difference between DL (t-1) and MWDL (t) calculated this time, the load fluctuation value ΔDL = MWDL (t) -MWDL (t
-1) is calculated. In step 108, the absolute value of ΔDL is compared with a preset threshold value ΔDLth.
The comparison between the calculation in step 107 and step 108 is as follows.
This is performed by the load fluctuation determination circuit 25 in the sustain pulse number calculation circuit 24.

If the absolute value of .DELTA.DL is small, the number of sustain pulses CSPi (t-1) of each subframe of the previous frame is set to the number of sustain pulses CSPi (t) of each subframe of this frame in step 109. ΔD
If the absolute value of L is large, a correction coefficient γi = MWDL (t) / DLi is calculated from the weighted average load factor MWDL (t) calculated in step 110 and the load factor DLi.

In step 111, the number of sustain pulses C of each subframe is calculated from the correction coefficient γi, the total number of sustain pulses NSUSmax, the luminance ratio WSFi, and the luminance coefficient β.
SPi (t) = γi × NSUSmax × β × (WSFi
/ ΣWSFi). In step 112, the weighted average load factor MWDL (t
-1) is replaced with the MWDL (t) calculated this time.

In step 113, the number of sustain pulses CSPi of each subframe calculated as described above is calculated.
(T) is output. With the above-described processing, when the load factor changes slowly or slightly, the luminance of the subframe does not change, and flicker can be reduced. For example, when the screen is scrolled in the same scene, since ΔDL <2%, ΔDLth
= 3%, it is possible to suppress a luminance change due to correction in the same scene.

Further, since the luminance table 19 having the conventional configuration shown in FIG. 3 is not used, the memory can be omitted. Also, since the effects of rounding errors can be reduced,
Fluctuations in the luminance ratio are reduced, and display quality is improved. In the β calculation processing of step 106 in the above embodiment, the fluctuation of the load factor is determined using the power consumption Pw predicted from the weighted average load factor MWDL (t).
It is also possible to use the power consumption Pi calculated from the current consumption detected in No. 4. Furthermore, the weighted average load factor MWDL
It is desirable to make further correction using both the power consumption Pw predicted from (t) and the power consumption Pi calculated from the current consumption detected by the current detection circuit 14.

FIG. 9 is a flowchart showing a modification of such a β calculation process. In steps 201 and 202, Pw and β are calculated as in the above embodiment. In step 203, the actual power consumption Pi is calculated from the current consumption detected by the current detection circuit 14 for the display of the previous frame. In step 204, the power consumption Pi of the calculation is compared with a preset reference power Pt. If Pi is larger, the luminance coefficient β is decreased in step 205, and if Pi is smaller, the luminance coefficient β is increased in step 206. If Pi = Pt, β is output as it is.

FIG. 10 is a flowchart showing a modification of yet another β calculation process. Step 201-203
Is the same as FIG. In step 211, the difference Δ between the actual power consumption Pi and the preset reference power Pt
Calculate P = Pi-Pt. In step 212, ΔP
Is compared with a preset threshold value ΔPth, and ΔP
Is larger, the luminance coefficient β is reduced in step 213,
If ΔP is small, step 214 further sets ΔP and −ΔP
Then, if ΔP is small, the luminance coefficient β is increased in step 215, and if ΔP is small, β is maintained as it is. By using the luminance coefficient β obtained in this way, the flicker is reduced because the luminance coefficient β does not change when the power consumption is small.

FIG. 11 is a flow chart showing a modification of still another β calculation process. The power supply of the apparatus is buffered by a capacitor or the like. For example, when the power consumption alternately increases and decreases for each frame, in the process of FIG. Cannot be reduced. In the processing of FIG. 11, such a problem is solved.

Steps 201 to 203 and 211 correspond to FIG.
Same as 0. In step 221, the integrated value is calculated by adding the ΔPS calculated in this frame to the integrated value of the difference ΔPS between Pi and Pt up to the previous frame. Step 22
In 2, the ΔPS and a preset threshold ΔPSth
If ΔPS is large, the luminance coefficient β is reduced in step 223, and if ΔPS is small,
In step 4, ΔPS and −ΔPSth are further compared. If ΔPS is small, the luminance coefficient β is increased in step 225, and ΔP
If S is small, β is maintained as it is. Step 223
After step 225, ΔPS is reset at step 226. By such processing, ΔP is averaged in a plurality of frames, and the luminance coefficient β is changed only when ΔP is large. Thus, flicker does not occur even when the power consumption repeatedly increases and decreases for each frame.

[0039]

As described above, according to the present invention,
A PDP device can be realized in which display of optimum brightness can be performed without deteriorating gradation display regardless of fluctuations in display load as a whole and display loads in each subframe.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a PDP (plasma display panel) device.

FIG. 2 is a diagram showing a configuration of a sub-frame for gradation display in a PDP device.

FIG. 3 is a diagram showing a schematic configuration of a control circuit of a conventional PDP device.

FIG. 4 is a diagram showing an example of a luminance table used in a conventional example.

FIG. 5 is a diagram illustrating an example of a change in a load factor.

FIG. 6 is a diagram illustrating a configuration of a control circuit of the PDP device according to the embodiment of the present invention.

FIG. 7 is a flowchart illustrating a process of calculating the number of sustain pulses of each subframe in the embodiment.

FIG. 8 is a flowchart illustrating a calculation process of a luminance coefficient β.

FIG. 9 is a flowchart illustrating a modification of the calculation process of the luminance coefficient β.

FIG. 10 is a flowchart illustrating a modified example of the calculation processing of the luminance coefficient β.

FIG. 11 is a flowchart illustrating a modification of the calculation process of the luminance coefficient β.

[Description of Signs] 11 Data converter 12 Frame counter 14 Current detection circuit 15 Scan controller 17 Driving table 21 Operation device 25 Load variation determination circuit

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) H04N 5/66 101 H04N 5/66 101C (72) Inventor Hiroyuki Wakayama 3-2-1 Sakado, Takatsu-ku, Kawasaki-shi, Kanagawa Prefecture Fujitsu Hitachi Plasma Display Limited In-house (72) Inventor Hirohito Kuriyama 3-2-1 Sakado, Takatsu-ku, Kawasaki City, Kanagawa Prefecture Fujitsu Hitachi Plasma Display Limited In-house (72) Inventor Katsuhiro Ishida 3-chome Sakado, Takatsu-ku, Kawasaki City, Kanagawa Prefecture No. 2 Fujitsu Hitachi Plasma Display Co., Ltd. In-house (72) Inventor Akira Yamamoto 3-2-1 Sakado, Takatsu-ku, Kawasaki City, Kanagawa Prefecture Fujitsu Hitachi Plasma Display Co., Ltd. F-term (reference) 5C058 AA11 BA02 BA04 BA09 BB01 BB14 5C080 AA05 BB05 DD03 EE29 FF12 HH02 HH04 JJ02 JJ04 JJ07 5C094 AA00 AA05 AA14 AA60 BA31 CA19 HA08

Claims (5)

[Claims] 1. A frame time-division type plasma display device in which a display frame of one screen is composed of a plurality of sub-frames, and the luminance of each sub-frame is determined by the number of sustain pulses. A frame length calculation circuit for calculating a frame length; a subframe condition determination circuit for determining the number of subframes, a subframe luminance ratio, and a total number of sustain pulses based on the length of the one frame; and lighting from an external input signal A load factor calculation circuit that calculates a load ratio that is a ratio of display cells to be determined; a brightness coefficient calculation circuit that determines a maximum display brightness from power consumption and calculates a brightness coefficient; and the total number of sustain pulses, the brightness ratio, From the luminance coefficient and the load ratio, the luminance reduction due to the load is corrected for each subframe, and the sustain of each subframe is corrected. A plasma display apparatus, comprising a sustain pulse number calculating circuit for calculating the pulse number. 2. The plasma display device according to claim 1, wherein the luminance coefficient calculation circuit includes a power consumption calculation circuit that calculates the power consumption predicted from the load factor, and the brightness coefficient calculation circuit calculates the brightness according to the power consumption. A plasma display device that determines the maximum display luminance and calculates the luminance coefficient. 3. The plasma display apparatus according to claim 2, further comprising: a weighted average load factor calculation circuit configured to calculate a weighted average load factor from a load factor for each of the subframes and the luminance ratio. A plasma display device having a load factor as the load factor. 4. The plasma display device according to claim 1, wherein the sustain pulse number calculation circuit stores a load ratio memory storing the load ratio, and calculates the calculated load ratio. A load factor change amount calculating circuit for calculating a difference from the load factor stored in the load factor memory, and calculating the number of sustain pulses of each of the sub-frames when the difference does not exceed a predetermined threshold. Is performed, and the number of sustain pulses of each sub-frame of the previous frame is output as the number of sustain pulses of each sub-frame of that frame. If the difference exceeds a predetermined threshold value, the calculated sustain pulse of each sub-frame is output. A plasma display device that outputs the number of pulses. 5. The plasma display device according to claim 1, wherein the brightness coefficient calculation circuit detects a current consumption of the device, and calculates the power consumption from the detected value. A comparison circuit for comparing the power consumption with a preset reference power, wherein when the power consumption does not exceed the reference power, the luminance coefficient is increased, and when the power consumption exceeds the reference power, Is a plasma display device for reducing the luminance coefficient.