JP2001068943A - Temperature compensation circuit, temperature compensated logarithmic conversion circuit and optical receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a temperature compensation circuit and an optical receiver with high reliability at a low cost by compensating a signal with a characteristic such as a gain inversely proportional to the absolute temperature. SOLUTION: This temperature compensation circuit has a 1st circuit network 1 between an inverting input terminal of an operational amplifier 13 and an output terminal of the operational amplifier 13, has a 2nd circuit network 2 between the inverting input terminal of the operational amplifier 13 and a reference potential. At least either of the 1st circuit network 1 and the 2nd circuit network 2 is configured to be a circuit network where a plurality of thermister-resistor pairs each consisting of parallel connection of a thermister and a resistor are connected in series. As a result, the temperature compensation circuit compensates a signal received by a noninverting input terminal of the operational amplifier 13 that depends on the temperature, and outputs a compensated signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a logarithmic conversion circuit and the like for detecting and monitoring the intensity of light reception input from the current of a photodiode in an optical communication circuit light reception circuit, and more particularly to a temperature compensation circuit for the same.

[0002]

2. Description of the Related Art As is well known, in order to perform logarithmic conversion, it is common to flow a current to be measured and a reference current through two bipolar elements to extract a difference between a base-emitter voltage. However, since the bipolar element contains a coefficient proportional to the absolute temperature as an essential characteristic, the temperature compensation circuit is inversely proportional to the absolute temperature in order to obtain the logarithm of the ratio of the measured current and the reference current regardless of the temperature. We need to give a gain.

A temperature compensation circuit in a conventional logarithmic conversion circuit includes:
Document 1 (Hideo Tsunoda, practical operational amplifier circuit, pp. 40)
-41 Tokyo Denki University Press (1983.7.20))
And Reference 2 (translated by Yasuo Kato, Operational Amplifier pp.29
8-305 McGraw-Hill Book Co., Ltd. (1983.
6.30)), it was configured as shown in FIG. 11 is a temperature-sensitive resistor, 12 is a resistor, 13 is an operational amplifier, 14 is an input terminal, and 15 is an output terminal. This operation is a well-known positive-phase amplifier. The voltage gain from the input terminal 14 to the output terminal 15 is determined by the temperature-sensitive resistor 11 and the resistor 12 of the feedback circuit connected to the inverting input terminal of the operational amplifier 13.
(R ₁₁ + R ₁₂ ) / R ₁₁ (where R
₁₁ the resistance value of the temperature-sensitive resistor _{11, R 12} is the resistance value of the resistor 12). Since the temperature-sensitive resistor 11 has a temperature coefficient of about 0.39% / ° C., a gain inversely proportional to the absolute temperature can be obtained. Metal such as platinum was used as a resistor for the temperature-sensitive resistor 11.

[0004]

In recent years, in an optical communication system, by monitoring the optical reception input intensity, an abnormality in an optical transmitter or a transmission line on the transmission side is detected, and an alarm is issued or the system is alerted. Switching is required.

However, if the current from the photodiode is simply monitored, for example, the ITU-T (Inter
national Telecommunication
nUnion-Telecommunication
n Standardization Section
According to the recommendation of n), -28 to -8 dB for STM-4
m, -28 to -9 dBm in STM-16, about 1
It is necessary to express a light receiving input intensity range of 00 times. For this reason, a logarithmic conversion circuit for converting to a log scale is required.

[0006] Furthermore, avalanche photodiodes (hereinafter referred to as APDs) have been developed in the trend of longer distance optical communication systems.
Is abbreviated).
Since it is common to use such that the current multiplication factor specific to the APD decreases at a high optical reception input level,
For monitoring, it is desirable that the logarithmic conversion circuit be provided with a function of correcting a change in current multiplication factor in addition to performing temperature compensation.

Further, the conventional temperature compensation circuit has a drawback that the price is not reduced because expensive platinum resistors are used.

An object of the present invention is to provide a highly accurate and inexpensive optical reception monitor circuit, an optical receiver, and an optical communication system having no temperature dependency, using a logarithmic conversion circuit having a built-in temperature compensation circuit. That is.

[0009]

SUMMARY OF THE INVENTION A first network is provided between an inverting input terminal and an output terminal of an operational amplifier, and a second network is provided between the inverting input terminal and ground. , First
At least one of the two networks, the first network and the second network, has a configuration in which a plurality of thermistor-resistor pairs in which a thermistor and a resistor are connected in parallel are connected in series, and input to the positive-phase input terminal of the operational amplifier. It is characterized by compensating and outputting the temperature-dependent signal.

As a modification, a first network is provided between the inverting input terminal and the output terminal of the operational amplifier, and a second network is provided between the inverting input terminal and the signal input terminal. Further, the positive-phase input terminal of the operational amplifier is connected to the ground, and at least one of the first and second networks is connected to a thermistor and a resistor in parallel. A plurality of pairs are connected in series, and a signal dependent on temperature input to a signal input terminal is compensated and output.

[0011] Further, it is characterized in that a logarithmic conversion circuit is provided, and an output terminal of the logarithmic conversion circuit is connected to the input of the temperature compensation circuit.

In addition, a third network is provided between the output terminal of the temperature compensation logarithmic conversion circuit and the positive-phase input terminal of the second operational amplifier, wherein the second operational amplifier output terminal and the positive-phase input terminal are provided. A fourth thermistor and at least one of the third network and the fourth network, a thermistor-resistance pair in which a thermistor and a resistor are connected in parallel. A plurality of amplifiers are connected in series, and the gain from the inverting input terminal of the second operational amplifier to the output of the second operational amplifier is (1+
G), the gain from the positive-phase input terminal of the previous-stage operational amplifier to the output of the previous-stage operational amplifier is approximately (1+ (1/1)
G)).

The voltage at one output of the logarithmic conversion circuit is used as a first input, the voltage at the other output of the logarithmic conversion circuit is used as a second input, and the output is p times as large as the first input (p> p). 0) and a sum of (1−p) times the second input voltage;
A bipolar element having the output of the adder circuit applied to the emitter, a resistor having one end connected to the base of the bipolar element, one end of the resistor connected to the input section, and the output section connected to the first voltage; A voltage follower circuit is provided, and the potential difference between the output of the second operational amplifier and the other end of the resistor is output.

In the temperature compensation logarithmic conversion circuit, the second input of the adder circuit is a voltage of a second output terminal of the logarithmic conversion circuit.

The adder circuit includes a resistor divider and a second voltage follower for inputting a potential at an intermediate point of the resistor divider. Both ends of the resistor divider are input terminals of the adder circuit. The output terminal of the voltage follower is an output terminal of the adder circuit.

A light-receiving element for receiving an optical signal; a first amplifier for amplifying the signal optical-electrically converted by the light-receiving element; a second amplifier for further amplifying the output of the first amplifier; A discriminating regenerator that discriminates and regenerates the second amplifier output and outputs a signal; a timing extractor that extracts a clock component from the second amplifier output and outputs a clock; It is characterized in that an optical reception input intensity monitor is output using a temperature compensation logarithmic conversion circuit for conversion.

[0017]

FIG. 1 is a circuit diagram of a first embodiment of the present invention. Hereinafter, FIG. 1 will be described.

1 is a resistor, 2 is a resistor network having a negative temperature coefficient, 3 to 5 are thermistors, and 6 to 9 are resistors.
NTC type can be recommended for the thermistor. This operation is a simple positive-phase amplifier, and the voltage gain from the input terminal 14 to the output terminal 15 is determined by the resistor 1 and the resistor network 2 of the feedback circuit connected to the inverting input terminal of the operational amplifier 13.
(R ₁ + R ₂ ) / R ₁ (where R ₁ is the resistance of the resistor 1 and R ₂ is the resistance of the resistor network 2). The resistor network 2 includes thermistors 3 to 5 and a resistor 9 connected in series, and a resistor 6 connected to the thermistors 3 to 5 in parallel.
~ 8. To obtain a gain which is inversely proportional to the absolute temperature, R ₂ is designed to have a suitable negative temperature coefficient. The resistor 9 may be considered to be connected in parallel with a thermistor having an infinite resistance value.

First, the characteristics of the resistance network 2 will be described qualitatively. At this time, it is assumed that the resistance value of each resistor and the resistance value / B constant of each thermistor are appropriately selected. At a sufficiently low temperature, the thermistors 3 to 5 have a sufficiently high resistance value.
₂ is the total value of the resistance values of the resistors 6 to 9. As the temperature increases, the resistance of the thermistor 3 first decreases, so that R
₂ approaches the total value of the resistance values of the resistors 7 to 9. Furthermore R ₂ for raising the temperature also decreases the resistance value of the thermistor 4 approaches the sum of the resistance values of the resistors 8-9. At a sufficiently high temperature, the resistance of the thermistor 5 also decreases, so that R ₂ approaches the resistance of the resistor 9.

FIG. 3 is a graph for visually supplementarily explaining the temperature characteristics of R ₁ + R ₂ of the circuit of FIG. The X axis represents the absolute temperature and the Y axis represents the resistance. Curve A represents an ideal value in which the resistance is inversely proportional to the absolute temperature. The lower limit temperature _{T L,} if the temperature upper limit and _{T U,} the required temperature range _T L through T _U, it is assumed that R 1 + _{R 2} to obtain a characteristic close to the curve A. In the following description, R _{3 to} R ₅ are the resistance values of the thermistors 3 to 5, R _{6 to} R ₉ are the resistance values of the resistors 6 to 9, and T _{1 to} T ₃ are the resistances of the corresponding thermistors and resistors, respectively. It indicates the temperature at which the values match, and in this case, it is referred to as isoresistance temperature. For example, focusing on the resistor 6 and the thermistor 3 alone, the parallel combined resistance becomes dominant only at the low temperature at the resistance value of the resistor 6, while at high temperature, the resistance value of the thermistor 3 approaches zero. The resistance also approaches zero. At this time, a temperature at which the resistance value of the resistor 6 and the resistance value of the thermistor 3 become the same value in the process of changing the temperature is defined as an equal resistance temperature.

In FIG. 3, the area B is R ₁ + R ₉ and is a constant value regardless of the temperature. Region C is a parallel resistance of R ₅ and R _8, at low temperatures close to R _8, close to zero at high temperatures, changes in the vicinity of an equal resistance temperature T _3. Similarly, area D has a parallel resistance of R ₄ and R _7, which varies around equal resistance temperature T _2. Region E is the parallel resistance of R ₃ and R ₆ , which changes near the isoresistance temperature T ₁ . Therefore, R ₁ + R ₂
Is represented by the curve F as the sum of the areas B to E, and the temperature range T
The approximate curve of the curve A in _L ~T _U.

Next, the resistance values R _{3 to} R 3 of the thermistors 3 to 5
A method for determining ₅ and the B constant and the resistance values R _{6 to} R 9 of the resistors _{6 to 9} will be described. The resistance value of a commercially available thermistor (2
The value at a reference temperature such as 5 ° C.) and the B constant cannot be freely selected, and must be selected from a series of numerical values determined as standard values. Therefore, the final constant determination method is somewhat complicated as described later. become. However, at first, the resistance value and the B constant of the thermistor are described as being freely selectable. In addition, for the sake of simplicity, the description will be made starting from a place where the B constant is sufficiently large and sequentially approaching a practical value.

FIG. 4 is a diagram for explaining a design method when the B constant of the thermistor is close to infinity, and is a starting point when the B constant is a practical value. The X axis is the absolute temperature, the Y axis is the resistance value / the required resistance value, and 1 on the Y axis means 0 error. Here, the error is represented not by a resistance value but by a ratio. On the X-axis, the number of thermistors used n
(Hereinafter, n = 3 as the description proceeds.), And the like required temperature range for _T L through T _U geometric manner n + 1 minute to an equal resistance temperature _T 1 through T _3. The ratio r at this time is (T _U /
T _L ) ^{1 / (n + 1)} . Using the similar triangle in FIG. 4, an error d ₀ = (r−1) / (r + 1) is calculated on the Y axis, and 1 + d ₀ and 1−d ₀ are taken. And H. Temperature _{T 1, T 2, T 3} , T
_A straight line I passing through the origin at each of _U
By pulling the ~L, each temperature _{T L, T 1, T 2} , T 3
Intersects the straight line H at The straight line L corresponds to R ₁ + R ₉ , the difference between the straight lines K and L corresponds to the parallel resistance of R ₅ and R ₈ , and the difference between the straight lines J and K corresponds to the parallel resistance of R ₄ and R _7. , the difference between the straight line I and the straight line J corresponds to the parallel resistance of _{R 3} and _{R 6.} Therefore, R ₁ + R ₂ becomes like a broken line M shown by a thick line. The resistance of R ₆ to R ₈ is changed at a rate of 2d ₀ for the required resistance value _{R i} of an equal resistance temperature _T 1 through T ₃ corresponding respectively, inversely proportional to the value to equal resistance temperature _T 1 through T ₃ Take.

On the other hand, when expressed in a formula of all sizes of B constant, the resistance value of the thermistor at absolute temperature _{T a} and _{T b R a}
A relation of _{R b} is _{R a / R b = exp [} B (T a -1 -T
_b ^{- 1)]} (provided that, B is B constant) it becomes possible, and to obtain with the (Formula 1) using the corresponding thermistor and the resistor with constant resistance temperature T ₁ through T ₃ are the same resistance value .

[0025]

(Equation 1)

Here, B _{1 to} B ₃ are B constants of the thermistors 3 to 5, and C is a constant.

The value of the constant C is R ₁ + R ₂ at 25 ° C. (298 ° C.).
When K) is set to 10 kΩ, C = 2.98 × 10
⁶ [ΩK], which is a temporary value in design and can be replaced with a convenient value when determining a practical circuit constant as described later.

As shown in FIG. 4, when the B constant is close to infinity, the corresponding thermistor behaves like a switch at each point of the isoresistance temperature, and a short circuit occurs above the isoresistance temperature, and a lower portion occurs. Since the side is open, the error is relatively large. However, when the B constant becomes smaller, the slope from the crest of the broken line to the valley on the right becomes gentler, so that the error is expected to be smaller.

FIG. 5 is a graph for explaining a problem when the B constant approaches 3000 to 5000 K. In order to fix a part of many parameters and narrow the degree of freedom, B ₁ / T assuming _{1 = B 2 / T 2 =} B 3 / T 3, ( practically, about 15) this ratio in outline 270-22 is obtained down to. As in FIG. 4, the X axis is the absolute temperature, and the Y axis is the resistance value / the required resistance value. The curve group corresponds to the equal resistance temperature and the resistance value described in FIG. 4, and is obtained by changing only the B constant. B ₁ / T ₁ = B ₂ / T ₂ = B ₃ / T ₃ is 270 or 12 from the larger ripple.
0, 68, 47, 33, 22. It is expected that the ripple becomes smaller as B ₁ / T ₁ etc. goes down, but when it goes down to 33, the shift in the positive direction near the center of the required temperature range, the left shoulder drop, and the right shoulder rise It stands out. To prevent these deviations lowers the T _1, raising the T _3, by increasing the R ₆ to R _8, it is necessary to set a new constant, such as by reducing the R _9.

[0030] The new constant, Y direction 2d graph frame as shown in FIG. 5 (d is an error, less than d ₀ in FIG. 4) ripple in a rectangle shortened to is widened to full frame (when the B2 / T2, square enclosed by straight lines and T _L and T _U by connecting the troughs between lines and ripple defined by connecting peaks between ripple) form is intended to realize, ripple (Equation 1) values in the mountains three locations and T _U is 1 + d, and the value of the valley 3 points and T _L ripples 1-d, ripple peaks and valleys 6
It should be obtained by solving a system of equations in which the differential coefficient at each location is 0. However, it is not easy to solve,
Hereinafter, description will be made using an approximate solution obtained by repeated calculation. Even if an exact solution is obtained by mathematically solving the simultaneous equations, it is necessary to finally obtain an approximate solution in order to use actual components as described later.

FIG. 6 shows T _L = 228 K (−45 ° C.) and T _U
= 363 K (90 ° C.), B ₁ / T ₁ = B ₂ / T ₂ = B ₃
Under the conditions of / _{T 3} changing the _{B 2} in several steps, equal resistance temperature _T 1 through T ₃ in each step, the resistance value _R 6 to R _8, and the resistance value _(R 1 + R ₉₎ on a computing while adjusting a graph of approximate solution obtained "value in the mountains three locations and T _U ripples 1 + d, and the value of the valley 3 points and T _L of ripple such that the 1-d". The X axis is temperature, and the Y axis is error (%). Method of obtaining an approximate solution, first, set the largest to the desired value B _2, select the resistance value and equal resistance temperature described in Figure 4 to an initial value, "in the mountains three locations and T _U ripple Value is 1
+ D, and the value at three ripple valleys and _TL is 1−
The resistance value and the iso-resistance temperature are gradually moved so as to be d. Once the solution is obtained, the second largest B ₂
And adjust again using the previous approximate solution as a starting point. The graph of FIG. 6 is obtained by sequentially decreasing the ratio such as B ₂ / T ₂ .

Table 1 is a constant table corresponding to FIG. Table 1
In rows B ₂ is infinite is a constant corresponding to the description of FIG. Also, the rows for infinity, 3900K, and 3300K are omitted in FIG. 6 for clarity. From FIG. 6 and Table 1, the existence of a new constant can be confirmed.

[0033]

[Table 1]

FIG. 7 is a graph of the characteristic of the error versus the B constant obtained by the approximate solution, wherein the X axis is the B constant and the Y axis is the error (%). And a thermistor Number and temperature range parameters, in the case of two thermistors _B 1 _/ T 1 = _{B 2}
/ T ₂ , B ₁ / T ₁ = B ₂ / T ₂ = B ₃ /
It is calculated under the conditions of T _3. In FIG. 7, 100 deg of the temperature range is −25 to 75 ° C., and 135 deg is −
45 to 90 ° C and 180 deg are calculated as -55 to 125 ° C. FIG. 7 shows that 3
It can be seen that a practically sufficient error (for example, within 0.1%) can be achieved by selecting the number of thermistors in accordance with the required temperature range at a B constant of about 000 to 5000K.

In the description so far, the resistance value and the B constant of the thermistor are actually limited numerical values (for example, the resistance value is an E-6 sequence, the B constant is 3250K for a nominal resistance of 22 to 150Ω, and the nominal resistance is 365 for each digit up
0, 4100, 4550, 4750K), and B ₁ / T ₁ = B ₂ /
Although the assumption of T ₂ = B ₃ / T ₃ was made, the problem that the assumption does not hold because the B constant cannot be freely selected in practice has been ignored. Next, a method for dealing with these problems will be described. Starting from one curve in FIG. 6 that uses a realistic value for B ₃ , the resistance value R ₅ of the thermistor 5 at the equal resistance temperature T _3.
The decide to become a value close to R _8. Further, paying attention to the fact that the absolute value of the resistance does not contribute to the characteristics because of the coefficient circuit, the resistance value R ₅ of the thermistor 5 at the equal resistance temperature T ₃ is considered.
Change the value of R ₁ + R ₂ so that is equal to R ₈ . Subsequently, the resistance values at the equal resistance temperatures T ₁ and T ₂ are R _6, respectively.
And select a thermistor close to _{R 7.} Next, fine adjustment is again performed to minimize the error. In this case, it is important to first remove the thermistor from the adjustment target, and secondly, to adjust the height of the peaks or valleys of the ripple. This is not necessarily the case, so it is necessary to compromise appropriately. Also,
The resistance values other than the thermistor calculated as a result of the fine adjustment are realized by the combined resistance of the plurality of resistors.

The above description has shown that the first embodiment of the present invention shown in FIG. 1 can realize desired characteristics using realistic components. In the above description, the case where the number of thermistors is n = 3 is described, but n = 2 or 4
It goes without saying that the same applies to the above cases.

In the above description, the positive-phase amplifier has been described. However, it goes without saying that the same applies to the case of the inverting amplifier (where R ₁ + R ₂ is a feedback-side resistor and the input-side resistance value is arbitrary).

In the above description, the case where the gain of the present circuit is inversely proportional to the absolute temperature has been described.
The method of calculating the constants described later is applicable. For example, when the required resistance R _i = C / T ^m (where m> 0), those corresponding to the straight lines I to L in FIG. 4 are a group of curves passing through the origin obtained by multiplying T ^m by a coefficient. Although constant is error d ₀ is m> 1 if larger m <1 if less that a major difference from the case of FIG. 4 when nearly infinite, like resistance temperature T ₁ through T ₃ at the starting point There it is the same as in FIG. 4 T _L, with T _U form a geometric progression. Further, R _i
= C / T ^m , or a function that is difficult to express mathematically, choose a relatively close one in the form of R _i = C / T ^m to find the starting point constant In the process of adjustment, the original characteristics can be driven.

In the above description, the case where the gain of the circuit has a negative temperature coefficient has been described. However, the present invention can be applied to a case where a positive temperature coefficient is realized. In this case, it is necessary to make a connection in which the resistor 1 and the resistor network 2 are replaced in FIG.

FIG. 8 is a circuit diagram of a second embodiment of the present invention. Hereinafter, FIG. 8 will be described.

In addition to the temperature compensating circuit 21 similar to that shown in FIG. 1, a current mirror 16, a current amplifying circuit 17, a pair transistor 18 for logarithmic conversion, a reference current generating circuit 19, and a second temperature compensating (gain compensating) circuit 20 and is a logarithmic conversion circuit as a whole.

The outline of this operation is as follows. The current supplied to the photodiode is copied by the current mirror 16 and
After being amplified by 7, the voltage is injected into one emitter of the pair transistor 18, and at the same time, the potential of this emitter is used as the positive-phase input of the temperature compensation circuit 21 (inverting input for the operational amplifier IC 104 -C 1 because it is a transistor at a subsequent stage). The reference current generated by the reference current generation circuit 19 is injected into the other emitter of the pair transistor 18 and the potential of this emitter is simultaneously passed through a voltage follower in the reference current generation circuit 19 to a second temperature compensation (gain compensation) circuit. Give to 20,
After the gain is compensated, it is applied to the inverting input terminal of the temperature compensation circuit 21. As is well known, the emitter potential of the pair transistor 18 is proportional to the logarithm of the respective injection current, and the potential difference between the emitters is proportional to the logarithm of the ratio of the injection currents and the absolute temperature.

The gain compensation performed by the second temperature compensation (gain compensation) circuit 20 is provided to handle the differential input signal by the temperature compensation circuit 21.
8 is provided to extract a voltage output proportional to the potential difference between the two emitters from the temperature compensation circuit 21. When the gain for the non-inverting input of the temperature compensation circuit 21 is expressed as 1 + G, the gain for the inverting input is −G. Therefore, if the gain of the temperature compensation circuit 20 is 1 + G− ¹ , the pair transistor 1
The gain from both emitters 8 to the output of the temperature compensation circuit 21 is 1 + G and-(1 + G). Therefore, the output of the temperature compensation circuit 21 is (1 + G) times the potential difference between the two emitters of the pair transistor 18.

Incidentally, the gain of the temperature compensation circuit 21 is 1 + G
1 is inversely proportional to the absolute temperature by a network composed of a resistor and a thermistor, as in the circuit of FIG. 1, so that the gain 1 + G- ^{1 of} the temperature compensation (gain compensation) circuit 20 needs to correspond to the temperature change. Therefore, the network composed of the resistor and the thermistor of the temperature compensation (gain compensation) circuit 20 may be formed by replacing the resistor 1 and the resistor network 2 of FIG. However, actually, while the output amplitude of the temperature compensating circuit 21 is 3 V, the voltage to be erased by the operation of the temperature compensating (gain compensating) circuit 20 is the emitter-base voltage of the transistor which is smaller by about one order of magnitude. The temperature compensation (gain compensation) circuit 20 has two thermistors to reduce the cost because it is less noticeable. In addition, this logarithmic conversion circuit originally has an error (individual difference, variation) as a comprehensive characteristic of a large number of parts, and the part before logarithmic conversion (using temperature as a parameter and output voltage vs. input current as a logarithmic graph) In the case of expressing the characteristic, the characteristic is parallel-translated depending on the temperature: the figure is omitted) is about 0.4 dB in terms of the light input of the photodiode in the temperature range of -40 to 85 ° C. (the direction in which the output decreases at low temperature). The error of the parallel movement is eliminated by incorporating the offset when the temperature compensation (gain compensation) circuit 20 is adjusted. Note that the error after the logarithmic conversion (when the output voltage versus the input current is represented by a logarithmic graph with temperature as a parameter and the slope fluctuates depending on the temperature: not shown), the error in the adjustment of the temperature compensation circuit 21 Although it is possible to incorporate the offset, it is not included in this embodiment because it is about ± 0.1 dB.

Here, the contents of the temperature compensation circuit 21 will be supplementarily described. The operation of the operational amplifier of FIG. 1 is performed by a three-way combination of an operational amplifier (IC104-1), a transistor with a resistor (IC107) as an inverter, and a pair transistor (IC103) as a current source. In order to solve the problem that the output voltage does not drop to 0 V when the operational amplifier (IC104-1) is operated by a single power supply, a transistor with a resistor (IC107) is provided, and the power supply voltage is 3.3.
A pair transistor (IC103) is provided in order to save current consumption when the output voltage is extracted to 3V with V. In addition, since the inverter (IC107) is connected to the operational amplifier (IC104-1), the polarity of the input terminal of the operational amplifier as a composite has the polarity of the operational amplifier (I
This is the reverse of C104-1). The resistor network of the feedback circuit is designed to obtain a gain that is inversely proportional to absolute temperature in the temperature range -45 to 90C.

As described above, according to the second embodiment of the present invention, since the differential input signal can be handled by adding the temperature compensation (gain compensation) circuit 20, the logarithmic conversion circuit can be constituted by a single power supply. There is an advantage that the cost can be reduced. Furthermore, since the error of the parallel movement of the graph of the output voltage versus the logarithm of the input current can be canceled, there is an advantage that high performance can be obtained when used in a logarithmic conversion circuit.

In the above description, the case where the gain of the temperature compensation circuit has a positive or negative temperature coefficient has been described. However, a positive temperature coefficient is required in some temperature ranges, and a negative temperature coefficient is required in other temperature ranges. In this case, the present invention can of course be applied by including a resistor network having a plurality of thermistors, such as the resistor network 2, in the two branches connected to the inverting input terminal of the operational amplifier.

FIG. 9 is a circuit diagram of a third embodiment of the present invention. Hereinafter, FIG. 9 will be described. This circuit is APD
It is characterized by having a function of correcting a characteristic change in the current multiplication factor.

When the light receiving element is a normal photodiode, the output voltage of this circuit has a relationship with the light input (dBm) as shown by a straight line A in FIG. On the other hand, when the light receiving element is an avalanche photodiode, as is well known, there is a current multiplication factor determined by the breakdown voltage and the bias voltage, and generally used in a bias circuit in which this current multiplication factor decreases with an increase in light input. Therefore, the output voltage in the case where no correction is performed has a slightly saturated characteristic as shown by a curve B in FIG. The circuit shown in FIG.
The device has been devised to get closer to.

The structure is the same as that of FIG. 8 and includes additional parts, 101 is a transistor, 102, 106 and 1
8 is a pair transistor, 103 to 104 and 107 are resistors, 105 and 108 are voltage followers, 114 is an input terminal, 115 is an output terminal, 16 is a current mirror, 119 is a reference current generation circuit, and 120 and 121 are temperature dependent. Is a coefficient circuit.

In this operation, as in the case of FIG. 8, the current supplied from the input terminal 114 to the light receiving element is copied by the current mirror 16, and the transistor 101 and the paired transistor 10 are copied.
After the voltage is shifted by 2, the potential is applied to one emitter of the bipolar pair transistor 18 at the same time as the positive-phase input of the coefficient circuit 121, and the reference current generated by the reference current generating circuit 191 is used as the pair transistor 18.
And at the same time, the potential of this emitter is applied to the coefficient circuit 120 to correct the gain, and then applied to the inverting input terminal of the coefficient circuit 121.

Up to this point, the parts are the same as those in FIG. 8, but differences in circuits due to differences in design conditions will be supplementarily described.

Since the voltage supplied from the current mirror 16 to the avalanche photodiode is as high as 50 to 70 V, the voltage between both collectors of the current mirror 16 is reduced by utilizing the voltage shift by the transistor 101 and the paired transistor 102. Stabilization of the input / output current ratio. Transistor 101 operates as an emitter follower to determine both emitter potentials of paired transistor 102, and the voltage between both collectors of current mirror 16 is substantially equal to the base-emitter voltage of transistor 101. Further, since the avalanche photodiode multiplies the current, the current amplifying circuit used in FIG. 8 becomes unnecessary. The fact that the reference current generating circuit 191 does not include the voltage follower used in FIG. 8 is a simple rationalization for cost reduction. Since the power supply of the operational amplifier of the coefficient circuit 121 is ± 5 V, the output voltage range of −0.25 to 1.85 V can be output only by the operational amplifier, and the inverting amplifier used in FIG. 8 and the pair transistor as the current source can be omitted. Has become.

The operation of the additional portion is determined by the resistors 103 to
An intermediate potential between the two emitters of the pair transistor 18 is taken out by a voltage divider 104 and reduced in impedance by a voltage follower 105, and then applied to a transistor on one side of the bipolar pair transistor 106 and a resistor 107 so as to pass a common current. . The potential at the connection point between the pair transistor 106 and the resistor 107 is read by a voltage follower 108, and the impedance is reduced and applied to the cold side of the pair transistor 18. As a result, the base terminals of the pair transistors 18 and 106 have the same potential, and the current I ₃ of the pair transistor 106 becomes the current I _{1 of} the pair transistor 18 and the current I _{1 of} the pair transistor 18 from the general characteristics of the bipolar element, as described later.
The ^{_{I 1 p I 2 (1-}} p) as a function of I _2. Here, p is a function of the resistance values R ₃ and R ₄ of the resistors 103 to 104, and p = R ₄ / (R ₃ + R ₄ ). Since the output of the voltage follower 108 is the reference potential of the pair transistors 18 and 106 and the coefficient circuits 120 to 121, the voltage drop of the resistor 107 has the effect of raising the potential of the entire circuit. That is, the output voltage V _ex of the coefficient circuit 121 based on the earth's ground is a voltage V _out obtained by logarithmically converting the input current.
And the voltage drop of the resistor 107.

The additional portion will be described in more detail.
The resistors 103 to 104 are selected to have large resistance values so that the current flowing through the resistors 103 to 104 is sufficiently smaller than the currents I ₁ and I ₂ due to the potential difference between the two emitters of the pair transistor 18. Further, since the potential of the positive-phase input terminal of the voltage follower 105 shifts due to the high resistance of the resistors 103 to 104 and the bias current, a resistor is added to the inverting input terminal so as to cause the same shift. As a result, the divided output of the resistors 103 to 104 is
From the base voltage V _{d1 of} the emitter to which the current I ₁ is applied, the voltage V _{d2 of} the emitter to which the current I ₂ is applied, and the resistance values R ₃ and R ₄ of the resistors 103 to 104, The voltage becomes _{Vd3 of the} following ( _Equation 2) and is applied between the emitter and the base on one side of the pair transistor 106.

[0056]

(Equation 2)

[0057] current _{I 3} flowing through the transistor pair 106 by _{V d3} Since transistor pair 106 in order to align the characteristics of the transistor using the same kind as the pair transistors 18, known relationship _{I 1} ≒ _I s exp (qV
_{d1 / kT), I 2 ≒} I s exp (qV d2 / kT)
(However, _{I s:} saturation current, q: electron charge 1.6x1
0 ^-19 (C), k: Boltzmann's constant 1.38x10
^-23 (J / K), T: Absolute temperature (K). ) Is expressed as follows assuming that the saturation currents are equal.

[0058]

(Equation 3)

That is, the current I of the pair transistor 106
₃ is proportional to the squared p of the above as a current I _1. Current I ₃
As shown in the curve group of FIG. 11, when p is small, it bends slowly (the radius of curvature is large), and as p becomes large, it bends rapidly (the radius of curvature is small). Can be realized and can be approximated to the straight line A by combining with the curve B in FIG. 10 at an appropriate ratio (however, in FIG. 11, -10 dBm is used for the purpose of comparing the shapes of the curves.
Are adjusted to have the same value, and the Y-axis scale is an example. ).

As shown in (Equation 3), the current I ₃ is equal to the current I ₂
, Which is an important characteristic when used in a wide temperature range. As you can follow the equation (3) from behind, free of p in the formula of the current I ₃ from the sum of the exponent of the exponential and I ₂ of I ₁ is 1, I _s and T related to temperature I Since it has the same shape as ₁ etc., (Equation 3) holds regardless of the temperature.

In the above description, the input of the adder including the resistors 103 to 104 and the voltage follower 105 is V _d1.
And was the V _d2, it is needless to say that the same effect can be obtained by using a voltage drop obtained through constant current to another bipolar device instead of V _d2. The use of _Vd2 simplifies the circuit and is advantageous for downsizing and cost reduction. On the other hand, when the output voltage is shifted in parallel to the negative side of 300 mV, not only the resistance value of the reference current generation circuit but also The constant of the resistor 107 also needs to be changed, which is complicated. In other words, for a 100 mV / dB monitor circuit,
Although translated 300mV negative side can be realized by doubling the _{I 2,} the resistance value of the resistor 107 for the result _{I 3} is 1.414 times in the case of p = 0.5 0.7
It is necessary to change it to 07 times. The method of using the voltage drop obtained by passing a constant current through another bipolar element has the effect of reducing the complexity of these changes.

In the above description, the voltage divider composed of the resistors 103 to 104 is directly connected to the pair transistor 18.
It goes without saying that the same operation can be performed even if the connection is made via a voltage follower.

As described above, according to the present embodiment, it is possible to select a curve suitable for the current-to-light input characteristic of the avalanche photodiode that is slightly saturated and correct the addition, so that the linear output voltage-to-light input characteristic can be corrected. Can be provided.

FIG. 12 shows an example of an optical receiver incorporating a temperature-compensated logarithmic converter. A front end section 33 including a light receiving element 31 such as an avalanche photodiode (APD); a preamplifier 32 for amplifying a weak signal photoelectrically converted by the light receiving element 31;
A post-amplifier 34 for amplifying the preamplifier output signal of
A discriminator / reproducer 35 which receives a post-amplifier output and discriminates and reproduces a signal;
6, an optical input signal disconnection detector 37 that issues an alarm when the optical input reception strength is degraded, and a temperature-compensated logarithmic converter 3 of the present invention.
8. The bias circuit 39 is a high-voltage generation circuit for APD. When a photodiode (PD) is used as the light receiving element 31, a normal bias may be used.

With this configuration, an optical signal received and input from a transmission line such as an optical fiber can be output as an electrical signal as data and a clock. Also, conventionally, “1” and “0” are determined by the output of the optical input signal disconnection detector.
By adopting this method, the deterioration information of the transmission path can be obtained in advance from the optical input reception intensity, so that a more reliable optical signal can be received.

The configuration shown in FIG. 12 is general, and the light receiving element 31 may be a PD other than the APD as described above.
The post-amplifier 34 may be omitted as long as the discriminating regenerator 35 can have a large gain. For the timing extraction, a circuit employing a filter such as a PLL or SAW can be considered. If the discrimination reproduction / timing extraction function is unnecessary, the discrimination reproduction unit 35 and the timing extraction unit 36
May be omitted. The optical input signal disconnection detector 37 may be determined based on the amplitude of the clock component, or may be configured using the temperature-compensated logarithmic converter 38 of the present invention. Further, by attaching an optical transmitter to the optical receiver of the present invention, an integrated optical transceiver can be configured.

On the other hand, it is also effective to mount this circuit on the optical transmitter. The output of the light emitting element is received by the monitoring light receiving element, and the same method as described above can be employed.

Further, the above-described optical transmitter and optical receiver, or an integrated optical transceiver can be mounted on an optical communication device to configure an optical communication system. Normally, in such a system, it is required to switch to the second communication system when the first communication system fails, in order to improve reliability. Conventionally, the communication system is switched mainly using the optical input signal disconnection detection output. However, in the optical input signal disconnection detection, the detection signal is not output until a complete failure state occurs. In contrast, in the present technology, since the detection level of the logarithmically converted monitor signal can be freely set using a comparator or the like, a failure is detected in advance, and this information is transmitted to the control unit of the optical communication device.
Thereafter, the control unit can transmit information for switching the communication system having the problem to the inside of the device and to the optical communication device facing the device.

In the case of a so-called WDM optical communication system in which optical signals of a plurality of wavelengths are multiplexed and transmitted, an optical receiver on the receiving side is equipped with an optical receiver for each demultiplexed wavelength. By employing the optical input signal detection function of the present technology in the optical receiver, it is possible to ascertain the failure status for each wavelength, which is a great advantage.

There is no problem if the air conditioning is completely air-conditioned, but particularly in an optical communication system, the distance between the devices is very large, and the environment where the optical communication device is placed differs depending on the place. In some cases, there are many possibilities for outdoor environments, such as on bad poles or on poles. Therefore, the optical receiver incorporating the temperature-compensated logarithmic conversion circuit is very effective because it has the same design and can be applied to any environment.

[0071]

As described above, according to the present invention,
By using a logarithmic conversion circuit having a built-in temperature compensation circuit, a highly accurate and inexpensive optical reception monitor circuit, optical receiver, and optical communication system having no temperature dependency can be provided.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention.

FIG. 2 shows a temperature compensation circuit in a conventional logarithmic conversion circuit.

FIG. 3 is a graph for visually supplementarily explaining the temperature characteristics of R ₁ + R ₂ .

FIG. 4 is a diagram illustrating a design method when the B constant of the thermistor is close to infinity.

FIG. 5 is a graph for explaining a problem when the B constant approaches 3000 to 5000K.

FIG. 6 is a graph of an approximate solution obtained by changing B ₂ in several steps under the condition of B ₁ / T ₁ = B ₂ / T ₂ = B ₃ / T ₃ .

FIG. 7 is a graph of a characteristic of an error versus a B constant obtained by an approximate solution.

FIG. 8 is a circuit diagram of a second embodiment of the present invention.

FIG. 9 is a circuit diagram of a third embodiment of the present invention.

FIG. 10 is a graph of monitor input / output characteristics.

FIG. 11 is a graph illustrating the shape of a curve to be added;

FIG. 12 is a diagram illustrating an example of an optical receiver including a temperature-compensated logarithmic converter.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 resistor, 2 resistor network, 3 to 5 thermistor, 6
-9: resistor, 10: resistor network, 11: temperature-sensitive resistor,
12: resistor, 13: operational amplifier, 14: input terminal, 1
5 output terminal, 20 temperature compensation circuit, 31 light receiving element,
32: Preamplifier, 33: Front-end unit, 34: Post-amplifier, 35: Identification regenerator, 36: Timing extraction unit, 37: Optical input signal disconnection detection, 38: Temperature compensation type logarithmic converter, 39: Bias circuit , 101 ... transistor, 1
02, 106, 18 ... Pair transistors, 103 to 10
4, 107: resistor, 105, 108: voltage follower,
Reference numeral 114 denotes an input terminal, 115 denotes an output terminal, 16 denotes a current mirror, 119 denotes a reference current generating circuit, 120 and 121 denotes a temperature-dependent coefficient circuit.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H04B 10/04 10/06 (72) Inventor Akihiro Hayami 216 Totsukacho, Totsuka-ku, Yokohama-shi, Kanagawa Pref. Hitachi, Ltd.Communications Division (72) Inventor Minoru Hata 216, Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Co., Ltd. (72) Inventor Tadaaki Fujii 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside Hitachi Image Information Systems Co., Ltd. (72) Takayuki Nakao 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture (72) Inventor Tomoaki Shimotsu 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Pref. Hitachi, Ltd. (72) Inventor Toshiaki Murai 292, Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside Hitachi Image Information System (72) Inventor Toru Oyama 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Hitachi, Ltd. (72) Inventor Hidehiro Ikeuchi 180 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside the Hitachi Communication Systems Co., Ltd. In company

Claims (5)

[Claims] A first network between an inverting input terminal of the operational amplifier and an output terminal of the operational amplifier; a second circuit between the inverting input terminal of the operational amplifier and a reference potential;
A configuration in which at least one of the first and second networks is connected in series with a thermistor and a resistor pair in which a thermistor and a resistor are connected in parallel. And a temperature compensation circuit for compensating and outputting a temperature-dependent signal input to a positive-phase input terminal of the operational amplifier. 2. An operational amplifier comprising a first network between an inverting input terminal of the operational amplifier and an output terminal of the operational amplifier, and a second circuit connected between the inverting input terminal and the signal input terminal of the operational amplifier. A positive-phase input terminal of the operational amplifier is connected to a reference potential, and at least one of the first network and the second network is connected in parallel with a thermistor and a resistor. A temperature compensating circuit comprising a plurality of connected thermistor-resistance pairs connected in series, and compensating and outputting a temperature-dependent signal input to the signal input terminal of the operational amplifier. 3. A temperature compensation logarithmic conversion circuit having a logarithmic conversion circuit, wherein an output terminal of the logarithmic conversion circuit is connected to an input of the temperature compensation circuit according to claim 1. 4. A logarithmic conversion circuit that logarithmically converts an input signal and outputs a differential output, and a first network between an inverting input section of the first operational amplifier and an output section of the first operational amplifier. And a second network between the inverting input of the first operational amplifier and a first voltage, wherein two networks of the first network and the second network are provided. At least one is configured to include a plurality of thermistor-resistor pairs in which a thermistor and a resistor are connected in parallel, and one of the differential outputs of the logarithmic conversion circuit is input to a positive-phase input section of the first operational amplifier. A first temperature compensating circuit for compensating and outputting a temperature-dependent signal; and a third network between an inverting input of the second operational amplifier and an output of the second operational amplifier. And a fourth circuit between the inverting input of the second operational amplifier and the output of the first temperature compensation circuit. Wherein at least one of the third network and the fourth network includes a plurality of thermistor-resistor pairs in which a thermistor and a resistor are connected in parallel; A second temperature compensating circuit for inputting the other of the differential outputs of the logarithmic conversion circuit to a positive-phase input section of a second operational amplifier and compensating and outputting a temperature-dependent signal; Assuming that the gain from the positive phase input of the temperature compensation circuit to the output of the first temperature compensation circuit is (1 + G), the gain from the input of the second temperature compensation circuit to the output of the second temperature compensation circuit is A temperature-compensated logarithmic conversion circuit, which is approximately (1+ (1 / G)). 5. The voltage of one output of the logarithmic conversion circuit is used as a first input, the voltage of the other output of the logarithmic conversion circuit is used as a second input, and the output is p times as large as the first input. p> 0) and a sum of (1−p) times the second input voltage, a bipolar element to which an output of the addition circuit is applied to an emitter, and one end connected to a base of the bipolar element. And a voltage follower circuit having one end connected to the input part and the output part connected to the first voltage. The output part of the second operational amplifier and the resistor 5. The temperature compensation logarithmic conversion circuit according to claim 4, wherein a potential difference from the other end is output.