JP2001053376A - Calibration method for optical signal transmission system and optical signal transmission system using the method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize high speed transmission of an optical signal transmission system by calibrating a signal to be transmitted through the optical signal transmission system, as required, especially by reducing skew of a plurality of signals to be transmitted through the optical signal transmission system and sustaining duty ratio of the signal easily. SOLUTION: This optical signal transmission system 1 comprises a preprocessing circuit 2, an optical fiber 3, and a post-processing circuit 4. The preprocessing circuit 2 comprises a circuit 13 for controlling the drive current of a light-emitting circuit 11. The current control circuit 13 adjusts the drive current, such that the current of a regeneration electrical signal 65 obtained from the photoelectric conversion circuit 61 in the post-processing circuit 4 matches a prescribed reference current 63. The drive current is adjusted, depending on '0' and '1' of a signal to be transmitted.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for calibrating an optical signal transmission system and an optical signal transmission system using the method.
In particular, the present invention relates to a method for calibrating an optical signal transmission system including photoelectric conversion and an optical signal transmission system using the method.

[0002]

2. Description of the Related Art Optical signal transmission systems are generally excellent in reliability and transmission speed, and their fields of use as means for transmitting various signals are rapidly expanding. In a semiconductor device test apparatus, an optical signal transmission system using an optical fiber may be used for signal transmission between a main unit and a test head on which a semiconductor device is mounted. This is because, with the recent dramatic improvement in the performance of semiconductor devices, an extremely high-speed and highly-reliable operation is also required of an apparatus for testing such devices.

[0003]

One of the basic operating principles of an optical signal transmission system is to convert an electric signal into an optical signal,
This optical signal is applied to the input end of the optical fiber, and the optical signal appearing at the output end of the optical fiber is converted back to an electric signal by photoelectric conversion. The light emitting function on the input side of the optical fiber is often realized by a current-driven laser diode. The problem here is that there is a variation in the relationship between the current for driving the laser diode and the brightness of the light of the laser diode.

FIG. 1 is a diagram showing the correlation between the driving current of a laser diode and brightness. Here, three ambient temperatures T =
For T0, T1, and T2, the characteristics of the laser diode are drawn. As shown in the figure, the laser diode does not oscillate when the current is below a certain value, and its brightness increases almost linearly when the current exceeds a certain value. The value is called a threshold current. The threshold current increases as the ambient temperature increases, and the threshold current varies between individual laser diodes. Due to these effects, for example, when a high-speed clock is transmitted, the threshold value of the intended signal is shifted between the light emitting side and the light receiving side, and the duty ratio of the clock is lost. Causes skew. Such phenomena hinder high-speed transmission, and it is particularly difficult for a semiconductor device test apparatus requiring a wide range of operation from DC to high frequency to cope with both high-speed operation and stable operation at each frequency.

The present invention has been made in view of such problems, and has as its object to provide a series of techniques for realizing signal transmission in an optical signal transmission system in a more preferable form, and in particular, to transmit signals in an optical signal transmission system. It is an object of the present invention to provide a calibration technique capable of adding a desired adjustment to a signal to be provided and an optical signal transmission system using the technique.

[0006]

According to one aspect of the present invention, an optical signal generated by a luminous action is applied to an input end of an optical fiber and appears at an output end of the optical fiber. A method of calibrating an optical signal transmission system that converts an optical signal into an electrical signal by photoelectric conversion, the method including a step of inputting the optical signal into the optical fiber to generate the electrical signal, and a method related to the light emitting operation. Adjusting at least one of the current to be performed and the current related to the photoelectric conversion in accordance with the current of the electric signal.

In another aspect of the invention, the adjusting step comprises:
Adjusting the magnitude of the current that evokes the light emitting action so that the magnitude of the current of the electric signal and the magnitude of the predetermined reference current are opposed to each other.

In another aspect of the present invention, in the adjusting step, the reference current is successively set to two values of large and small, and the two types of currents that evoke the light emitting action according to the two values of large and small are set. Adjusting each of the values and individually retaining the adjusted two values.

In still another embodiment of the present invention, the smaller one of the two values is determined on the assumption that the optical signal has a weak non-zero intensity.

[0010] In still another embodiment of the present invention, the method further includes a step of determining whether or not the magnitude of the current for stimulating the light emission effect adjusted in the adjusting step is within a predetermined allowable range.

In another aspect of the present invention, the adjusting step includes the step of: determining a magnitude of a current of the electric signal generated in the transmitting step and a reference current used to grasp the magnitude of the current of the electric signal. Adjusting the magnitude of the reference current in a circuit related to the photoelectric conversion so that the magnitudes of the reference currents are opposed to each other.

In still another embodiment of the present invention, the adjusting step includes sequentially generating two values to be represented by the optical signal to adjust two values of the reference current, and adjusting the two values of the reference current. And individually holding the values of

[0013] In still another aspect of the invention, the adjusting further includes generating an intermediate value of the adjusted two values, and determining whether the optical signal indicates a binary value. Determining based on a comparison between the value and the magnitude of the current of the electrical signal.

In still another embodiment of the present invention, the adjusting includes adjusting one of the two values to be represented by the optical signal to adjust the value of the reference current, and holding the adjusted value. Including.

In still another embodiment of the present invention, the adjusting step further includes, based on the adjusted value, determining a current of the electric signal to determine whether the optical signal is binary. Setting the value of the current to be compared with the magnitude.

In still another embodiment of the present invention, the method further includes a step of determining whether the value adjusted in the adjusting step is within a predetermined allowable range.

According to still another aspect of the present invention, there is provided a pre-processing circuit including a light emitting circuit for processing a signal to be input to an optical fiber, and a post-processing including a photoelectric conversion circuit for returning a signal output from the optical fiber to an electric signal. And a current control circuit for adjusting a current in the pre-processing circuit or the post-processing circuit according to a current of the electric signal.

In still another embodiment of the present invention, the current control circuit adjusts a current that causes a light emitting operation in the light emitting circuit according to the current of the electric signal.

In still another embodiment of the present invention, the current control circuit holds the magnitude of the electric signal when the magnitude of the electric signal is opposite to the magnitude of a predetermined reference current. A storage circuit;

According to still another aspect of the present invention, the storage circuit has a circuit for individually holding two types of magnitudes of the electric signal corresponding to two magnitudes of the reference current. .

In still another embodiment of the present invention, the post-processing circuit has a comparison circuit for comparing the magnitude of the electric signal current with the magnitude of the reference current, and the current control circuit includes the light emitting function. A circuit that monotonously increases or decreases the magnitude of the current that evokes the magnitude of the current that evokes the light-emitting action when the relationship between the magnitude of the current of the electric signal and the magnitude of the reference current is reversed. Fixing circuit.

In still another embodiment of the present invention, the circuit for monotonously changing the magnitude of the current includes a counter circuit for performing an increment operation or a decrement operation, and the circuit for fixing the magnitude of the current includes: Includes a mask circuit that stops the increment or decrement operation of the circuit.

Still another embodiment of the present invention further includes a circuit for determining whether or not the magnitude of the current for stimulating the light emission adjusted by the current control circuit is within a predetermined allowable range.

In another embodiment of the present invention, the current control circuit includes a measuring circuit for measuring a magnitude of the electric signal, and a measuring circuit for measuring the magnitude of the measured electric signal. A reference value generation circuit for setting a reference current for binarizing the electric signal.

Still another embodiment of the present invention further comprises an output circuit for binarizing the electric signal based on the reference current.

In still another embodiment of the present invention, the measuring circuit individually measures the magnitude of the electric current of the electric signal for each of two values to be represented by the electric signal, and the reference value generating circuit As the reference current, a reference current whose magnitude is an intermediate value of the magnitudes of the individually measured electric signals is generated.

In still another embodiment of the present invention, the measuring circuit measures the magnitude of the electric current of the electric signal with respect to one of two values which the electric signal should take, and the reference value generating circuit measures the magnitude of the electric current. Based on the magnitude of the current of the electric signal, a current value to be compared with the magnitude of the electric signal is set to determine which of the two values the electric signal indicates.

In still another embodiment of the present invention, the apparatus further includes a circuit for determining whether or not the magnitude of the electric signal current measured by the measuring circuit is within a predetermined allowable range.

It should be noted that the above summary of the present invention does not enumerate all of the features required for the present invention, and that sub-combinations of these features may also constitute the present invention.

[0030]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described with reference to the drawings, but the following embodiments should not be construed as limiting the claimed invention, and Not all combinations of the features described as the embodiments are necessarily essential to the solution of the invention.

FIG. 2 shows two signals to be transmitted in the optical signal transmission system according to the embodiment (hereinafter referred to as "target signals") based on the correlation between the drive current of the laser diode and the brightness. Shows how to convert to a value. The figure shows the temperature T
= T1 and the threshold current is indicated by Ith. In this embodiment, it is assumed that the target signal takes a binary value of “0” and “1”. The current to be passed to the laser diode on the light emitting side because the target signal is finally determined to be "0" on the light receiving side is a low drive current (I _{LDL in the} figure), and the laser diode to be determined to be "1". The current to be passed is called a high drive current (I _{LDH in the} figure), and the difference between the two currents, that is, a current that generates a high drive current when added to the low drive current, is called an additional drive current (I _{LDA in the} figure). To In this embodiment, in order to set the driving current to an optimum value, the brightness of the light of the target signal is observed on the light receiving side, and the low driving current and the high driving current are emitted on the light emitting side based on the observation result. And as a result,
Calibrate the transmission characteristics of the entire system. The reason why the low drive current is set to a weak current that is not zero, that is, a value that exceeds the threshold current in this case is to increase the reactivity of the brightness of the laser diode to a change in the drive current.

FIG. 3 is a configuration diagram of the optical signal transmission system 1 according to the embodiment. First, the overall configuration will be described, and its operation will be described later. Optical signal transmission system 1 as shown in FIG.
Is mainly a pre-processing circuit 2 for processing a signal to be input to the optical fiber 3 on the light emitting side, a post-processing circuit 4 for processing a signal output from the optical fiber 3 on the light receiving side, A determination circuit 5 for checking whether or not an abnormality has occurred in transmission is included. However, the optical signal transmission system 1 may include only one of the pre-processing circuit 2 and the post-processing circuit 4, and the optical fiber 3 and the determination circuit 5 are not essential. This is the same in the following.

The preprocessing circuit 2 mainly includes a light emitting circuit 11 composed of a laser diode 10 and the light emitting circuit 11
A current control circuit 13 for controlling the drive current 12 of the power supply, and a power supply current compensation circuit 14 described later.

The current control circuit 13 has a low drive current source 16 for supplying a low drive current and an additional drive current source 17 for supplying an additional current. When these two current sources are both turned on, a high drive current flows as the drive current 12. In order to ensure the above-described reactivity, a configuration in which a low drive current always flows is adopted. As a result, the laser diode 1
0 is a state where it is slightly lit even when it is the darkest.

The additional drive current source 17 is turned on only when the target signal (X in the figure) to be processed by the preprocessing circuit 2 is "1". More specifically, a transistor 25 is inserted between the light emitting circuit 11 and the additional drive current source 17, and a target signal that has passed through the buffer 26 is input to the base of the transistor 25. When the target signal is “1”, the buffer 26
Becomes high, the transistor 25 turns on, and an additional drive current flows. On the other hand, when the target signal is “0”, a compensation current corresponding to the additional drive current flows to the compensation circuit 14 side. This is a consideration for keeping the characteristics of the entire system constant by keeping the power supply current constant irrespective of the state of the target signal, and may be necessary for high-speed and multi-bit transmission. Specifically, the transistor 27 is connected to the additional driving current source 17 via a load resistor 28 connected to a power supply.
And the negative logic output of the buffer 26 is connected to the transistor 2
7 base. Therefore, when the target signal is “0”, the negative logic output becomes high, and a compensation current flows through the load resistor 28.

The current control circuit 13 further includes a first counter 20 for holding a current value to be passed by the low drive current source 16 as a digital value, and a first D for converting the digital value held in the first counter 20 into an analog value. / A converter 21;
Similarly, a second counter 22 for holding a current value to be passed by the additional drive current source 17 as a digital value, and a second counter 22
2D that converts the digital value held in the memory into an analog value
/ A converter 23. The first counter 20 and the second
The counter 22 forms a storage circuit 30, and the result of the calibration is stored in the storage circuit 30. First D / A converter 2
1 and the output 46 of the second D / A converter 23 are connected to the low drive current source 16 and the additional drive current source 17, respectively, and control the current flowing therethrough.

First counter 20 and second counter 22
Is an element of a type that counts edges of an input pulse. Here, the first counter 2 is set during the calibration operation of the system.
0, a clock signal 32 for incrementing the second counter 22, a select signal 33 for selecting which counter is to be incremented, and a count permission signal 35 for deciding whether to allow the increment operation are involved in the control. The clock signal 32 is valid only during the calibration operation, and is fixed to low or high otherwise. This is to prevent the increment operation from being erroneously performed during the normal operation. The clock signal 32 is input to a first AND gate 36 and a second AND gate 37 each having three inputs. As described later, the first AND gate 36 and the second AND 37 gate 3
7 functions as a mask circuit for permitting and stopping the increment operation of the first counter 20 and the second counter 22, respectively.

The select signal 33 is input to the buffer 40, and the positive logic output 41 of the buffer 40 is input to the second AND gate 37, and the negative logic output 42 is input to the first AND gate 36. The count permission signal 35 is input to both the first AND gate 36 and the second AND gate 37.
The output of the first AND gate 36 is input to the first counter 20 as a trigger signal for counting, while the output of the second AND gate 37 is input to the second counter 22. In this configuration, assuming that the count permission signal 35 is “1”, while the select signal 33 is “0”, the first counter 20 is incremented by the clock signal 32 and the second counter 22 does not change. Select signal 33
During the period “1”, the second counter 22 is incremented by the clock signal 32, and the first counter 20 does not change. When the count permission signal 35 becomes “0”,
Neither counter changes. As will be described later, the change of the count permission signal 35 from “1” to “0” corresponds to the end of the calibration operation.

The determination circuit 5 is provided mainly for detecting a transmission loss in the optical fiber 3 or its end. The optical fiber 3 is generally connected to the pre-processing circuit 2 and the post-processing circuit 4 by a connector or the like. However, if there is adhesion or dirt on the connection portion, transmission loss increases. This problem is an important concern in system maintenance and requires a lot of man-hours. here,
If the drive current set as a result of the later-described calibration is too large, it is determined that an abnormal state in which too large transmission loss has occurred. Specifically, the determination circuit 5 includes a comparator 50 that compares an output 45 of the first D / A converter 21 with a predetermined determination level 48, and a flip-flop 51 that receives the output of the comparator 50 as a data input. The flip-flop 51 is of a negative edge trigger type, and receives the count permission signal 35 as its trigger. Therefore, when the count permission signal 35 changes from high to low, that is, when the calibration operation ends, the first D / A
If the output 45 of the converter 21 is higher than the judgment level 48, the abnormality detection signal 53 becomes high, and an abnormality is reported. The configuration of the preprocessing circuit 2 and the determination circuit 5 has been described above.

The post-processing circuit 4 includes a photoelectric conversion circuit 61 including a photodiode 60, a reference current source 64 for generating a reference current 63 used for calibration, and an electric signal (hereinafter, referred to as a signal) obtained by the photoelectric conversion circuit 61. , A current input differential comparator 66 (hereinafter, the “current input differential comparator” is simply referred to as a “current comparator”) that compares the current of the reproduced electric signal 65 with the reference current 63, and a buffer amplifier 6
8 inclusive. The reference current source 64 and the current comparator 66 form a comparison circuit 70. The output of the current comparator 66 has the same value as the final output signal Y, and the negative logic output of the buffer amplifier 68 becomes the count permission signal 35.

The basic principle of the calibration according to this configuration is that the reference current 63 is sequentially set to two values, large and small, and a count permission signal is set so that the current of the reproduced electric signal 65 matches the reference current 63 for each of those values. 35 is to control the current control circuit 13 of the preprocessing circuit 2. The larger value of the two values (hereinafter, referred to as a high reference current value) is a value determined assuming that the target signal is “1”, and the smaller value (hereinafter, referred to as a low reference current value). Is a value determined on the assumption that it is also “0”. When calibration is performed so that the current of the reproduced electric signal 65 matches the high reference current, the current control circuit 13 of the preprocessing circuit 2
Then, a high drive current is determined. Similarly, when calibration is performed so that the current of the reproduced electric signal 65 matches the low reference current, the current control circuit 13 determines a low drive current. When there are a plurality of signals to be transmitted now, the optical signal transmission system 1 of FIG. 3 is provided for each of the plurality of signals.
Therefore, a plurality of post-processing circuits 4 are also present. In this case, by setting the high reference current value and the low reference current value to the same value in each of the plurality of post-processing circuits 4, the light-emitting circuit 11 It is possible to collectively calibrate all variations that may cause a problem, such as variations in the characteristics of the laser diode 10, variations in the transmission loss, and variations in the characteristics of the photodiode 60 of the photoelectric conversion circuit 61. As a result, skew between signals can be reduced.

FIG. 4 is a flowchart showing an outline of the calibration method according to the embodiment. As shown in the figure, first, a target signal is transmitted for calibration (S1). Based on a comparison result between the current of the reproduced electric signal 65 obtained by the photoelectric conversion circuit 61 of the post-processing circuit 4 and the reference current 63, the target signal is transmitted. Next, the current related to the light emitting action on the light emitting side or the current related to the photoelectric conversion on the light receiving side is adjusted (S2). In the configuration of FIG. 3, the drive current on the light emitting side is adjusted. The adjustment of the current on the light receiving side will be described later with another example.

FIG. 5 is a flowchart showing the procedure of FIG. 4 in more detail. As shown in the figure, first, an initial state for calibration regarding a low drive current is set (S10). Here, the first counter 20 and the second counter 2 of the preprocessing circuit 2
2 are both cleared to zero, and the select signal 33 is set to "0". Also, the target signal X is set to “0” to turn off the transistor 25, and the path between the light emitting circuit 11 and the additional driving current source 17 where no current should flow when the low driving current source 16 is adjusted is cut off. .

In this state, in order to determine a low drive current in the pre-processing circuit 2, a predetermined low reference current value is set in the reference current source 64 of the post-processing circuit 4 (S11). The low reference current value is obtained in advance by an experiment or the like so that the low drive current value (the value of _ILDL in FIG. 2) slightly exceeds the threshold current value (the value of Ith in FIG. 2).

In the processing so far, the first counter 2
0, the output of both the second counter 22 is zero, and neither the low drive current source 16 nor the additional drive current source 17 flows current. Therefore, the laser diode 10 does not emit light at all, and no light propagates through the optical fiber 3. Therefore, the current of the reproduced electric signal 65 obtained by the photoelectric conversion circuit 61 is smaller than the low reference current, the positive logic output of the comparison circuit 70 is low, the negative logic output is high, and the negative logic output of the buffer amplifier 68 is. The count permission signal 35 becomes high.

On the other hand, since the select signal 33 is now low, the negative logic output 42 of the buffer 40 goes high and the positive logic output 41 goes low. Therefore, the first AND gate 36 passes the clock signal 32, and the first counter 20 is incremented each time the edge of the clock signal 32 arrives. On the other hand, since the output of the second AND gate 37 is always low, the output of the second counter 22 is fixed to zero.

By the increment operation of the first counter 20, the value of the output 45 of the first D / A converter 21 gradually increases, the low drive current source 16 is controlled, and the low drive current gradually increases. Then, the light emitting circuit 11 starts emitting light, and the light reaches the post-processing circuit 4 through the optical fiber 3. Therefore, the current of the reproduced electric signal 65 gradually increases, and at a certain point in time, the current becomes larger than the low reference current. At that moment, the comparison circuit 70 and the buffer amplifier 68
Is inverted, and the count permission signal 35 changes from high to low. With this change, the output of the first AND gate 36 becomes low, and the increment operation of the first counter 20 is prohibited. As a result, a desired low drive current is determined (S12).

FIG. 6 is a timing chart showing the operation of the decision circuit 5. In the determination circuit 5, the comparator 50 constantly compares the output 45 of the first D / A converter 21 with the determination level 48, and when the count permission signal 35 changes from high to low (when t = t0 in the figure). ) Is recorded in the flip-flop 51. At this time, the abnormality detection signal 53, which is the output of the flip-flop 51, becomes active if the lower driving current is set so as to exceed the judgment level 48, that is, becomes "1". No (S13).

Subsequently, an initial state for calibration relating to a high drive current is set (S14). Here, the select signal 33 is set to “1”, the target signal X is set to “1”, the transistor 25 is turned on, and the path between the light emitting circuit 11 and the additional drive current source 17 is connected.

In this state, the reference current source 64 of the post-processing circuit 4
In step S15, a predetermined high reference current value is set. The high reference current value is determined so that the high drive current value (the value of _ILDH in FIG. 2) is sufficiently large to correspond to the target signal X indicating “1”.

Since the select signal 33 is now high,
Negative logic output 42 of buffer 40 goes low and positive logic output 41 goes high. Therefore, the second AND gate 3
7 passes the clock signal 32 and the second counter 22 is incremented each time an edge of the clock signal 32 arrives. On the other hand, the count value of the first AND gate 36 does not change.

By the increment operation of the second counter 22, the value of the output 46 of the second D / A converter 23 gradually increases, the additional drive current source 17 is controlled, and the additional drive current gradually increases. At this time, since the low drive current is also constantly flowing, the sum of the additional drive current and the low drive current flows to the light emitting circuit 11 as the high drive current. The light generated in the light emitting circuit 11 reaches the post-processing circuit 4 through the optical fiber 3. The current of the regeneration electric signal 65 gradually increases,
At some point it will be greater than the high reference current. At that moment, the outputs of the comparison circuit 70 and the buffer amplifier 68 are inverted,
The count enable signal changes from high to low. With this change, the output of the second AND gate 37 becomes low, and the increment operation of the second counter 22 is prohibited. As a result, the additional drive current is determined, the value is held in the second counter 22, and the high drive current, which is the sum of the low drive current and the additional drive current, is determined (S16).

Thus, all the calibrations are completed. In the subsequent normal operation, first, the control of the reference current source 64 is fixed so that the reference current 63 of the post-processing circuit 4 becomes an intermediate value between the low reference current and the high reference current, for example, a median value. When the target signal X is "0", the current of the reproduced electric signal 65 should be equal to the low reference current, and can be reliably treated as "0" by comparison with the intermediate value. On the other hand, when the target signal X is “1”, the current of the reproduced electric signal 65 should be equal to the high reference current, and can be reliably treated as “1” by comparison with the intermediate value. According to this embodiment, not only the skew between a plurality of signals to be transmitted is reduced, but also by properly setting the intermediate value, even when a high-speed clock signal is transmitted, the duty ratio can be maintained fairly accurately. can do. These features are advantageous for speeding up the entire optical signal transmission system 1. Note that the calibration operation may be appropriately performed, and it is desirable to perform the operation when the ambient temperature of the optical signal transmission system 1 changes to some extent, for example, in consideration of the characteristics of the laser diode 10.

FIG. 7 is a configuration diagram of an optical signal transmission system 100 according to another embodiment. The optical signal transmission system 100 is an example in which a current related to photoelectric conversion on the light receiving side is adjusted in S2 of FIG. In this embodiment,
The low drive current and the high drive current in the pre-processing circuit 101 are assumed to be fixed values, respectively, and the low reference current and the high reference current are respectively adjusted in the post-processing circuit 102 so as to match them. The effect is obtained. Here, it is assumed that the low drive current exceeds the threshold current. 7, the same components as those in FIG. 3 are denoted by the same reference numerals, and the description thereof will be appropriately omitted.

Also in this embodiment, the optical signal transmission system 100 mainly includes the preprocessing circuit 101, the optical fiber 3,
It includes a post-processing circuit 102 and a determination circuit 5. However,
The determination circuit 5 is provided in the post-processing circuit 102, and its input logic is opposite to that in FIG. The post-processing circuit 102 includes a photoelectric conversion circuit 61, a current control circuit 110 for adjusting the reference current 63, a measurement circuit 111 for measuring the current value of the reproduced electric signal 65 in preparation for the adjustment, a low reference current and a high reference It has a reference value generation circuit 112 for generating an intermediate value of the current, and a buffer amplifier 114.

The current control circuit 110 first includes a third counter 120 for holding the value of the low reference current and a third counter 12
A third D / A converter 121 for converting an output of 0 to an analog value, and a fourth counter 12 for holding a high reference current value
2 and a fourth D / A converter 123 for converting the output of the fourth counter 122 into an analog value. Low reference current source 1
Reference numeral 30 denotes a first current source which is controlled by the output 125 of the third D / A converter 121 and has two current sources having the same characteristics.
The additional reference current source 133 and the second additional reference current source 134
Both are controlled by the output 126 of the fourth D / A converter 123. All three current sources are connected to the negative input of the current comparator 140 as generating a reference current, but are used to cut off their path between the second additional reference current source 134 and the negative input. Switch 142
Is provided. These three current sources and the switch 142 form the reference value generation circuit 112. The positive and negative outputs of the current comparator 140 are buffer amplifier 1
14 positive and negative inputs.

The current control circuit 110 further includes a three-input third AND gate 15 for controlling the increment operation of the third counter 120 and the fourth counter 122, respectively.
0 and a fourth AND gate 151. Clock signal 1
52 denotes a third AND gate 150 and a fourth AND gate 15
1, a select signal 155 for selecting a counter to be incremented is input to the buffer 156, and the positive logic output 158 of the buffer 156 is the fourth AND.
The negative logic output 159 is input to the third AND gate 150, respectively. Third AND gate 150
The fourth AND gate 151 further receives a count permission signal 162 output from the buffer amplifier 114. Note that the output of the buffer amplifier 114 has the same value as the final output signal Y of the optical signal transmission system 100.

In the above configuration relating to the post-processing circuit 102, the portion other than the photoelectric conversion circuit 61 and the buffer amplifier 114 corresponds to the entire current control circuit 110, and the portion obtained by removing the current comparator 140 from the current control circuit 110 is the measurement circuit. 111. However, which circuit element is included in which functional block naturally has a considerable degree of freedom, and a limited interpretation should not be given for each functional block.

The structure of the decision circuit 5 is the same as that of FIG. 3, but the comparator 50 compares the decision level 48 with the output 126 of the fourth D / A converter 123.
It is. The judgment level 48 is connected to the positive input of the comparator 50, and the output 126 of the fourth D / A converter 123 is also connected to the negative input. The count permission signal 162 is used as a trigger for the flip-flop 51. However, as will be described later, the degree of freedom in designing this part is large.

FIG. 8 is a flowchart showing a calibration operation according to the above configuration. As shown in the figure, first, an initial state for calibration regarding a low reference current is set (S20).
Here, the third counter 120 and the fourth counter 122 are both cleared to zero, and the select signal 155 is set to “0”. The switch 142 is turned on.

Subsequently, the target signal X is set to "1" (S21). The transistor 25 is turned off, and only the low drive current caused by the low drive current source 16 flows to the light emitting circuit 11. The light generated by the light emitting circuit 11 enters the photoelectric conversion circuit 61 via the optical fiber 3, and the current of the reproduced electric signal 65 is given to the positive input of the current comparator 140. In the initial state, the low reference current source 130 and the first additional reference current source 13
3. Since the second additional reference current source 134 does not supply current, the reference current 63 given to the negative input of the current comparator 140 is zero. Therefore, the positive logic output of the current comparator 140 is high, the negative logic output is low, and the count permission signal 162 output from the buffer amplifier 114 is high.

Since the select signal 155 is now low, the negative logic output 159 of the buffer 156 goes high,
Positive logic output 158 goes low. Therefore, the third AN
D gate 150 passes clock signal 152 and
The counter 120 is incremented each time the edge of the clock signal 152 arrives. On the other hand, since the output of the fourth AND gate 151 is always low, the fourth counter 12
The output of 2 is fixed to zero.

By the increment operation of the third counter 120, the value of the output 125 of the third D / A converter 121 gradually increases, the low reference current source 130 is controlled, and the low reference current gradually increases. At the moment when the low reference current exceeds the current of the reproduction electric signal 65, the outputs of the current comparator 140 and the buffer amplifier 114 are inverted, and the count permission signal 162 changes from high to low. With this change, the output of the third AND gate 150 becomes low, and the increment operation of the third counter 120 is prohibited. As a result, a desired low reference current is determined (S2
2).

Subsequently, an initial state for calibration relating to the high reference current is set (S23). Here, the select signal 155 is set to “1”. Further, the target signal X is set to "0" (S24), the transistor 25 is turned on, and the path between the light emitting circuit 11 and the additional drive current source 17 is connected. As a result, a high drive current, which is the sum of the low drive current and the additional drive current, flows through the light emitting circuit 11. The light generated by the light emitting circuit 11 enters the photoelectric conversion circuit 61 via the optical fiber 3, and the current of the reproduced electric signal 65 is changed by the current comparator 140.
To the positive input of At this time, only the low reference current from the low reference current source 130 is still the current comparator 14.
0, the current comparator 1
The positive logic output 40 is high, the negative logic output is low, and the count enable signal 16
2 goes high.

Since the select signal 155 is now high, the negative logic output 159 of the buffer 156 goes low,
Positive logic output 158 goes high. Therefore, the fourth AN
The D gate 151 allows the clock signal 152 to pass,
Counter 122 is incremented each time the edge of clock signal 152 arrives. On the other hand, since the output of the third AND gate 150 becomes low, the count value of the third counter 120 does not change.

By the increment operation of the fourth counter 122, the value of the output 126 of the fourth D / A converter 123 gradually increases, and the first additional reference current source 133 and the second additional reference current source 134 receive the same control. , The additional reference current gradually increases. At the moment when the high reference current, which is the sum of the additional reference current and the low reference current, exceeds the current of the reproduction electric signal 65, the outputs of the current comparator 140 and the buffer amplifier 114 are inverted, and the count permission signal 162 changes from high to low. . With this change, the fourth AND
The output of the gate 151 goes low and the fourth counter 122
Is inhibited from being incremented. As a result, a desired high reference current is determined (S25).

When the count permission signal 162 changes from high to low, a determination is made in the determination circuit 5. When the transmission loss is large, the determined high reference current becomes small. Therefore, this high reference current is equal to the predetermined judgment level 48.
When the value is below the threshold, the abnormality detection signal 53, which is the output of the flip-flop 51, becomes high, and the presence of the abnormality is reported (S26).

Subsequently, an intermediate value between the low reference current and the high reference current, preferably a value close to the average value is generated (S27).
In conclusion, the operation for this is sufficient if the switch 142 is turned off. If the low reference current is denoted by IrefL, the additional reference current is denoted by IrefA, and the high reference current is denoted by IrefH, first,

IrefH = IrefL + IrefA (Equation 1) holds. Since the first additional reference current source 133 and the second additional reference current source 134 flow the current IrefA / 2 having the same value, the switch 142 is turned off to turn off the reference current 63.
(Iref)

Iref = IrefL + IrefA / 2 (Equation 2) On the other hand, the average value IrefA of the low reference current and the high reference current
VE is

IrefAVE = (IrefH + IrefL) / 2 (Equation 3) By comparing Equations 1 to 3, it can be found that the reference current 63 matches the average value, that is, Iref = IrefAVE. If the calibration operation is completed while the switch 142 is turned off, in the subsequent normal operation, the target signal X is set to “1”.
"0" can be correctly identified. Also in this embodiment, since the calibration considering both the pre-processing circuit 101 and the post-processing circuit 102 is realized, the same effect as the configuration of FIG. 3 can be obtained.

Here, in the judgment circuit 5, the fourth D
Although the output 126 of the / A converter 123 was examined, this may be the output 125 of the third D / A converter 121 or a value obtained by adding the output 125 and the output 126 to analog. In that case, the judgment level 48 is naturally set to a lower value. Although the transmission loss is considered as an abnormality of the system as it is, if the failure mode in which useless light is mixed into the optical fiber 3 is considered, the output 125 of the third D / A converter 121 or the fourth D / A converter 12 is considered.
3 is connected to the negative input of comparator 50,
It is also possible to give a judgment level indicating the upper limit of the allowable range to the positive input. Of course, a configuration may be used in which two comparators are used to output their outputs and input to the flip-flop 51 in order to check both the upper and lower limits of the allowable range.

FIG. 9 is a block diagram of another embodiment relating to the post-processing circuit 102 of FIG. This post-processing circuit 200
Is a circuit in which a circuit related to a low reference current is substantially deleted from the post-processing circuit 102 in FIG. 7, and its basic idea is to determine only a high reference current, and later to determine a reference current corresponding to an intermediate value from that value. It is to make 63. Here, the same reference numerals are given to the components already described, and the description will be omitted as appropriate.

Current control circuit 20 in this embodiment
1 has a current comparator 140 and a measurement circuit 202. The measurement circuit 202 includes a reference value generation circuit 203, a counter 206, a D / A converter 207, and a clock signal 2
09 and a 2-input AND gate 212 for inputting a count permission signal 210 output from the buffer amplifier 114
With. The output of the AND gate 212 is a trigger signal for the increment operation of the counter 206. The reference value generation circuit 203 includes a first reference current source 2 which is two reference current sources.
16 and a second reference current source 217, which generate a reference current as the current comparator 140
Connected to the negative input of However, a switch 220 is provided between the second reference current source and the negative input.
When the same control is applied to these two current sources, it is assumed that the second reference current source 217 flows a current k times as large as the first reference current source 216, and the two currents are denoted by Iref1 and Iref2, respectively.

The operation according to the above configuration is as follows. First, the counter 206 is cleared to zero and the switch 2
20 is turned on. At this time, the first reference current source 2
16, neither the second reference current source 217 nor a current flows.
When the target signal X is set to “1”, the positive logic output of the current comparator 140 becomes high, and the buffer amplifier 1
The count enable signal 210, which is the output of 14, goes high. As a result, the clock signal 209 is output from the AND gate 21.
2 and the counter 206 starts incrementing. The first reference current source 216 and the second reference current source 217 gradually start flowing current, and the reference current 63 exceeds the current of the reproduction electric signal 65 at a certain moment. Count permission signal 210
Changes from high to low, and the increment operation of the counter 206 is prohibited. Since the target signal X was “1”, the reference current 63 is set to the high reference current at this time,
Its value is

IrefH = Iref1 + Iref2 (Equation 4) Subsequently, the switch 220 is turned off. Second
The reference current source 217 is disconnected, and the reference current 63

Iref = Iref1 (Equation 5) Assuming that Iref2 = k · Iref1, Equation 4,
Compared to 5,

Iref = IrefH / (1 + k) (Equation 6) Here, if k = 1, the reference current 63 becomes exactly に な る of the high reference current. Given that the low reference current is not zero, in Equation 6, for example,

A method of determining the value of k so that Iref = 0.6 · IrefH can be considered. As described above, according to the post-processing circuit 200 of this embodiment, an effect similar to that of the post-processing circuit 200 of FIG. 7 can be obtained with a relatively simple configuration.

FIG. 10 is a configuration diagram of a post-processing circuit 300 according to still another embodiment. The post-processing circuit 300 includes a photoelectric conversion circuit 61 and a current control circuit 301. The current control circuit 301 outputs a potential 352 (hereinafter referred to as a reproduction electric signal
) And the reference voltage 354.
6 and a measurement circuit 302 that receives the output and measures the current of the reproduced electric signal 352. First, the measuring circuit 302
A differential error amplifier 315 receives the positive and negative outputs of the comparator 306 at the positive and negative inputs, respectively. Comparator 3
A first switch 310 is interposed in a path connecting the positive output of the comparator 06 and the positive input of the differential error amplifier 315, and the comparator 3
A second switch 311 is interposed in a path connecting the negative output of 06 and the negative input of the differential error amplifier 315. The measurement circuit 302 further includes an A / D converter 320 that receives the output 335 of the differential error amplifier 315, a memory 322 that holds the output data of the A / D converter 320, and a data stored in the memory 322. In addition, an intermediate value calculation unit 323 that derives an intermediate value between the low reference voltage and the high reference voltage
And a D / A converter 326 for converting the intermediate value into an analog value. The memory 322 and the intermediate value calculation unit 323 form the reference value generation circuit 304. Third switch 340
Is the output of the D / A converter 326 and the differential error amplifier 3
One of the fifteen outputs 335 is connected to the negative input of comparator 306.

The calibration operation with the above configuration will be described. First, as an initial state for calibration, the first switch 310 and the second switch 311 are turned on, and the third switch 340 is set to A
/ D converter 320 is set. At this time, a feedback loop is formed from the comparator 306 via the differential error amplifier 315 to return to the comparator 306 again. Due to an imaginary short between the positive input and the negative input of the comparator 306, the output 335 of the differential error amplifier 315 is formed.
Becomes the same potential as the positive input of the comparator 306. This potential is converted to a digital value by the A / D converter 320,
Output to the memory 322.

In this state, first, the target signal X is set to "0". The current of the reproduced electric signal 352 matches the reference voltage 354, and the value of the reference voltage 354 becomes a low reference voltage value. The low reference voltage value, or more correctly, the voltage of the output 335 of the differential error amplifier 315 is stored in the memory 322 via the A / D converter 320.

Subsequently, the target signal is set to "1".
As a result, the high reference voltage value, or more correctly, the voltage of the output 335 of the differential error amplifier 315 is stored in the memory 322 via the A / D converter 320. Thus, the information necessary for calibration has been obtained.

Next, the intermediate value calculation section 323
An intermediate value between the low reference voltage and the high reference voltage held at 22, for example, a median value is calculated. The calculated intermediate value is converted to an analog value via the D / A converter 326. D / A
The calibration is complete when the situation occurs where converter 326 outputs its analog value.

After that, the first switch 310 and the second switch 311 are both turned off, and the third switch 340 is set to the D / A
By setting the value on the side of the converter 326, the intermediate value is input to the negative input of the comparator 306 as the reference voltage 354, and the intended purpose is achieved.

Although several embodiments have been described above, modified examples will be given below.

First, in the preprocessing circuit 2 shown in FIG. 3, the first counter 20 and the second counter 22 perform the increment operation, but they may perform the decrement operation. In this case, the current of the reproduced electric signal 65 becomes maximum immediately after the start of the calibration, so that the logic of the count permission signal 35 is reversed from that of the increment operation. Therefore, a positive logic output may be used as the count permission signal 35 instead of a negative logic output of the buffer amplifier 68. A similar change is made in the third counter 12 of the post-processing circuit 102 in FIG.
0 and the second counter 122 are also possible. In this case, too, the logic of the count permission signal 162 is reversed. Therefore, a negative logic output is provided to the buffer amplifier 114, and this is used as the count permission signal 162.

As another modification, the clock signal 32 is masked in the pre-processing circuit 2 of FIG. 3 in order to inhibit the counter operation of the first counter 20 and the second counter 22. The signal 35 may be used as a count enable signal for those counters. In this case, it is not necessary to stop the clock signal 32 even during a period other than during the calibration operation. A similar change is possible for the third counter 120 and the second counter 122 of the post-processing circuit 102 in FIG.

Although the embodiments of the present invention and some modified examples have been described above, the technical scope of the present invention is not limited to the scope described above. It is understood by those skilled in the art that still other changes or improvements are possible. It is apparent from the description of the claims that embodiments with such changes or improvements can be included in the technical scope of the present invention.

[0090]

According to the present invention, it is possible to add desired calibration to a signal to be transmitted in an optical signal transmission system. In particular, it becomes easy to reduce the skew of a plurality of signals to be transmitted in the optical signal transmission system and to maintain the signal duty ratio. These features contribute to speeding up transmission by the optical signal transmission system.

[Brief description of the drawings]

FIG. 1 is a correlation diagram between drive current and brightness of a laser diode.

FIG. 2 is a diagram illustrating a method of binarizing a target signal based on a correlation between a drive current of a laser diode and brightness.

FIG. 3 is a configuration diagram of an optical signal transmission system according to one embodiment.

FIG. 4 is a flowchart illustrating an outline of a calibration method of the optical signal transmission system according to the embodiment.

FIG. 5 is a flowchart showing the procedure of FIG. 4 in more detail;

FIG. 6 is a timing chart related to the operation of the determination circuit.

FIG. 7 is a configuration diagram of an optical signal transmission system according to another embodiment.

FIG. 8 is a flowchart showing a calibration operation in the optical signal transmission system of FIG. 7;

9 is a configuration diagram of another embodiment relating to the post-processing circuit of FIG. 7;

FIG. 10 is a configuration diagram of a post-processing circuit according to still another embodiment.

[Explanation of symbols]

 1,100 Optical signal transmission system 2,101 Preprocessing circuit 3 Optical fiber 4,102,200,300 Postprocessing circuit 5 Judgment circuit 10 Laser diode 11 Light emitting circuit 12 Drive current 13,110,201,301 Current control circuit 14 Compensation Circuit 16 Low drive current source 17 Additional drive current source 20 First counter 21 First D / A converter 22 Second counter 23 Second D / A converter 25, 27 Transistor 26 Buffer 28 Load resistance 30 Storage circuit 32, 152, 209 Clock signal 33, 155 Select signal 35, 162, 210 Count enable signal 36 First AND gate 37 Second AND gate 40, 156 Buffer 41 Positive logic output of buffer 40 45 Output of first D / A converter 21 46 Output of second D / A converter 23 48 Judgment level 50 Comparator 51 Flip-flop 53 Abnormality detection signal 60 Photodiode 61 Photoelectric conversion circuit 63 Reference current 64 Reference current source 65,352 Reproduction electric signal 66,140,306 Current comparator 68,114 Buffer amplifier 70 Comparison circuit 110,201 Current Control circuit 111, 202, 302 Measurement circuit 112, 203, 304 Reference value generation circuit 120 Third counter 121 Third D / A converter 122 Fourth counter 123 Fourth D / A converter 125 Output of third D / A converter 121 126 Fourth D / A converter 123 output 130 Low reference current source 133 First additional reference current source 134 Second additional reference current source 142,220 Switch 150 Third AND gate 151 Fourth AND gate 158 Buffer 156 Positive logic output 206 Counter 207 D / A converter 212 AND gate 216 First reference current source 217 Second reference current source 310 First switch 311 Second switch 315 Differential error amplifier 320 A / D converter 322 Memory 323 Intermediate value calculation unit 326 D / A converter 340 Third switch 350 Resistor 352 Voltage generated by resistor 350 354 Reference voltage

Claims (23)

[Claims] 1. A method for calibrating an optical signal transmission system, wherein an optical signal generated by a light emitting action is applied to an input end of an optical fiber, and an optical signal appearing at an output end of the optical fiber is returned to an electric signal by photoelectric conversion. Transmitting the optical signal to the optical fiber to generate the electrical signal,
An adjustment step of adjusting at least one of the current related to the light emitting action or the current related to the photoelectric conversion according to the current of the electric signal. 2. The method of claim 1, wherein the adjusting includes adjusting a magnitude of a current that evokes the light emitting action so that a magnitude of the current of the electric signal and a magnitude of a predetermined reference current are opposed to each other. A method for calibrating an optical signal transmission system according to claim 1. 3. The method according to claim 1, wherein the adjusting step sequentially sets the reference current to two values, large and small, and adjusts two values of the current that evoke the light emitting action according to the two values of large and small, respectively, 3. The method according to claim 2, further comprising the step of individually holding the adjusted two kinds of current values. 4. The light according to claim 3, wherein the smaller one of the two values is determined on the assumption that the optical signal has a weak intensity other than zero. Calibration method for signal transmission system. 5. The method according to claim 2, further comprising the step of determining whether or not the magnitude of the current for stimulating the light emission effect adjusted in the adjusting step is within a predetermined allowable range.
5. The method for calibrating an optical signal transmission system according to any one of items 1 to 4. 6. The adjusting step is such that a magnitude of a current of the electric signal generated in the transmitting step and a magnitude of a reference current used to determine the magnitude of the current of the electric signal are opposed to each other. 2. The method according to claim 1, further comprising adjusting a magnitude of the reference current in a circuit related to the photoelectric conversion. 7. The adjusting step includes adjusting the two values of the reference current by sequentially generating two values to be represented by the optical signal, and individually holding the adjusted two values. The method for calibrating an optical signal transmission system according to claim 6, comprising a step. 8. The adjusting step further includes: generating an intermediate value between the adjusted two values; and determining whether the optical signal indicates a binary value by determining the current value of the intermediate value and the electric signal. The method for calibrating an optical signal transmission system according to claim 7, further comprising: judging based on a comparison of the magnitudes of the two. 9. The method of claim 1, wherein the adjusting includes adjusting one of the two values to be represented by the optical signal to adjust the value of the reference current, and maintaining the adjusted value. Item 7. A method for calibrating an optical signal transmission system according to Item 6. 10. The method according to claim 1, wherein the adjusting step further comprises: determining, based on the adjusted value, a magnitude of the current of the electric signal with a magnitude of the current of the electric signal to determine whether the optical signal indicates a binary value. The method for calibrating an optical signal transmission system according to claim 9, further comprising setting a value. 11. The optical signal transmission according to claim 6, further comprising a step of determining whether or not the value adjusted in the adjusting step is within a predetermined allowable range. How to calibrate the system. 12. An optical signal transmission comprising: a preprocessing circuit including a light emitting circuit for processing a signal to be input to an optical fiber; and a postprocessing circuit including a photoelectric conversion circuit for converting a signal output from the optical fiber into an electric signal. An optical signal transmission system, comprising: a current control circuit that adjusts a current in the pre-processing circuit or the post-processing circuit according to a current of the electric signal. 13. The optical signal transmission system according to claim 12, wherein the current control circuit adjusts a current that evokes a light emitting action in the light emitting circuit according to a current of the electric signal. 14. The current control circuit according to claim 1, further comprising: a storage circuit for holding the magnitude of the electric signal when the magnitude of the electric signal is opposite to the magnitude of a predetermined reference current. The optical signal transmission system according to claim 13, wherein: 15. The memory circuit according to claim 1, further comprising a circuit for individually holding two kinds of magnitudes of the electric signal corresponding to two magnitudes of the reference current. 15. The optical signal transmission system according to 14. 16. The post-processing circuit has a comparison circuit for comparing the magnitude of the current of the electric signal with the magnitude of the reference current, and the current control circuit includes a magnitude of a current that evokes the light emitting action. A circuit that monotonously changes the magnitude of the electric signal, and a circuit that fixes the magnitude of the current that evokes the light-emitting action when the relationship between the magnitude of the current of the electric signal and the magnitude of the predetermined reference current is reversed. The optical signal transmission system according to claim 13, wherein: 17. The circuit for monotonously changing the magnitude of the current includes a counter circuit for performing an increment operation or a decrement operation, and the circuit for fixing the magnitude of the current includes an increment operation or a decrement operation of the counter circuit. The optical signal transmission system according to claim 16, further comprising a mask circuit for stopping the operation. 18. The apparatus according to claim 13, further comprising a circuit that determines whether or not the magnitude of the current that evokes the light emitting action adjusted by the current control circuit is within a predetermined allowable range. 18. The optical signal transmission system according to any one of 17. 19. The current control circuit, comprising: a measurement circuit for measuring the magnitude of the electric signal; and binarizing the electric signal based on the measured magnitude of the electric signal. The optical signal transmission system according to claim 12, further comprising: a reference value generation circuit that sets a reference current for the reference signal. 20. The optical signal transmission system according to claim 19, further comprising an output circuit for binarizing the electric signal based on the reference current. 21. The measurement circuit individually measures the magnitude of the current of the electric signal for each of two values to be represented by the electric signal, and the reference value generation circuit determines the magnitude of the current as the reference current. 21. The optical signal transmission system according to claim 19, wherein a signal having an intermediate value of a magnitude of a current of the electric signal measured individually is generated. 22. The measurement circuit measures a magnitude of a current of the electric signal with respect to one of two values that the electric signal should take, and the reference value generation circuit calculates a magnitude of a current of the measured electric signal. 20. The method according to claim 19, wherein a value of a current to be compared with a magnitude of a current of the electric signal is set to determine which of the two values the electric signal indicates based on the magnitude. 21. The optical signal transmission system according to any one of 20. 23. The apparatus according to claim 1, further comprising a circuit for determining whether or not the magnitude of the current of the electric signal measured by the measuring circuit is within a predetermined allowable range.
23. The optical signal transmission system according to any one of 9 to 22.