JP2001045320A - Horizontal deflection circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a horizontal deflection circuit having a horizontal linearity correcting circuit in which it is not necessary to provide a feedback circuit for offsetting an influence due to mutual inductance in a control circuit, and heat generation is reduced. SOLUTION: In a horizontal deflection circuit having a horizontal linearity correcting circuit 1, the part in which horizontal deflection currents of the horizontal linearity correcting circuit are running is branched, and one part is connected with a primary side coil 13a of an orthogonal transformer 13, and the other is connected with a circuit in which plural saturable reactors 11 and 12 whose characteristics are different are combined, and parabolic wave currents in a vertical cycle are impressed to a secondary side coil 13b of the orthogonal transformer 13 so that horizontal linearity can be corrected.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a horizontal deflection circuit used for a television receiver or a cathode ray tube display for a computer. Horizontal deflection circuit that corrects horizontal linearity by connecting the other to a circuit combining multiple saturable reactors with different characteristics and applying a vertical period parabola wave current to the secondary winding of the quadrature transformer It is about.

[0002]

2. Description of the Related Art When an electron beam of a cathode ray tube (CRT) scans in a horizontal direction, as shown in FIG.
Since the fluorescent surface radius R of T is larger than the radius Rb from the electron beam deflection center point O to the fluorescent surface, the electron beam movement amount is larger in the peripheral portion than in the central portion of the tube surface for the same deflection amount θ. This phenomenon occurs in both the vertical and horizontal deflection circuits, but in a standard television system with an aspect ratio of 4: 3,
In the horizontal direction of the deflection angle, the deflection difference around the electron beam is larger. In order to correct this distortion, as shown in FIG. 15 (b), a deflection current for reducing the deflection amount around the tube surface is passed. Since this current waveform has an S-shape, it is called S-shape correction.

Here, if the distance from the center of deflection is equal between the upper and lower ends and the center of the screen in the vertical direction, the amount of S-curve correction may be constant, but generally the distance from the center of deflection is the center of the screen. Nearer, farther to the top and bottom of the screen. For this reason, if the S-curve correction amount is constant, as shown in FIG. 16, when the left and right pin distortions are corrected to be zero at the left and right ends in the horizontal direction of the screen, the right and left pin distortions are reversed at the middle part. (Intermediate pin distortion) occurs.

Therefore, there is a saturable reactor system as shown in FIG. 17 as a circuit for correcting left and right pin distortion without leaving intermediate pin distortion. The correction voltage generation circuit 31 converts a voltage waveform necessary for distortion correction of the intermediate portion into a first voltage / current conversion circuit 32.
And a second voltage / current conversion circuit 33. The currents output from the first voltage / current conversion circuit 32 and the second voltage / current conversion circuit 33 are respectively the primary winding of the first saturable reactor transformer 42 and the primary winding of the second saturable reactor transformer 43. Flow through the windings. The modulation circuit 35 superimposes a parabolic wave for correcting pincushion distortion on the power supply voltage of the power supply VA, and outputs the superimposed output to the flyback transformer 3.
6 is input.

The base of the horizontal output transistor 37 has
The output of the horizontal oscillation circuit is input, and the damper diode 38 and the resonance capacitor 39 are connected in parallel between the collector and the emitter of the horizontal output transistor 37. One terminal of the horizontal deflection coil 40 is connected to the collector of the horizontal output transistor 37, and the other terminal is connected to the secondary winding of the first saturable reactor transformer 42. The horizontal deflection coil 40, the secondary winding of the first saturable reactor transformer 42, the secondary winding of the second saturable reactor transformer 43, and the S-correction capacitor 44 are connected in series, and the deflection current I flows.

As described above, since the left and right pincushion distortion correction circuit of the saturable reactor system is inserted into the horizontal output circuit at the portion where the horizontal deflection current flows, the distortion ratio is small at both ends of the x-axis and the distortion ratio increases at the middle portion. Such raster distortion is corrected on the entire screen.

Further, there is a method of correcting intermediate pin distortion with a single transformer as shown in FIG. In the horizontal deflection circuit shown in FIG. 18, a series circuit of a variable DC voltage source 52 and a choke coil 53 is connected in parallel to a horizontal output transistor 51, and a parabolic wave-shaped voltage having a vertical cycle is supplied from the variable DC voltage source 52 to the choke coil 53. The signal is supplied to the horizontal output transistor 51 via the right and left pins to correct left and right pin distortion. The damper diode 54 and the resonance capacitor 55 are connected in parallel between the collector and the emitter of the horizontal output transistor 51. A series circuit of a horizontal deflection coil 56, an S-shaped correction capacitor 57, a correction coil 58, and a primary winding 59a of a modulation transformer 59 is connected in parallel to the horizontal output transistor 51,
A vertical parabolic wave current is supplied from the modulation source 60 to the secondary winding 59b of the modulation transformer 59 to eliminate intermediate pin distortion.

[0008]

By the way, in the saturable reactor system as described above, the mutual inductance of the primary winding and the secondary winding of the saturable reactor is such that the influence of the primary side on the control circuit is negated. There is a problem that a feedback circuit is required and the circuit configuration becomes complicated.

Further, in the method using a single transformer, the horizontal linearity correction is performed by the DC superimposition characteristic on the primary side of the transformer, and therefore, a hysteresis loss occurs in the horizontal cycle due to its nature. Therefore, in a computer display or the like having a high horizontal frequency exceeding 100 kHz, there is a problem that power loss, that is, hysteresis loss is large, and heat generation is large.

Accordingly, the present invention is to provide a horizontal deflection circuit having a horizontal linearity correction circuit, which does not require a feedback circuit for canceling the influence of mutual inductance in a control circuit, and which generates less heat. It is the purpose.

[0011]

A horizontal deflection circuit according to the present invention is a horizontal deflection circuit having a horizontal linearity correction circuit, wherein a portion of the horizontal linearity correction circuit through which a horizontal deflection current flows is branched, and one of the horizontal deflection circuit is provided with a quadrature transformer. By connecting the primary winding to the circuit combining a plurality of saturable reactors with different characteristics and applying a vertical period parabolic wave current to the secondary winding of the quadrature transformer, the horizontal linearity Is corrected.

In the horizontal deflection circuit according to the present invention, when a vertical period parabolic wave current is applied to the secondary winding of the orthogonal transformer of the horizontal linearity correction circuit, the horizontal deflection current is combined with a plurality of saturable reactors and the orthogonal transformer. It changes depending on the inductance, and can correct the horizontal linearity.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a horizontal deflection circuit according to the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a horizontal deflection circuit according to the present invention. The left and right pincushion distortion correction circuit 2 of the horizontal deflection circuit 1 superimposes a parabolic wave for right and left pincushion distortion correction on the power supply voltage of the power supply VA, and the superimposed output is input to one terminal of the horizontal output transformer 3. The output of a horizontal oscillation circuit (not shown) is input to the base of the horizontal output transistor 5, the emitter is grounded, and the collector is connected to the other terminal of the horizontal output transformer 3. Damper diode 6
The resonance capacitor 7 is connected in parallel between the collector and the emitter of the horizontal output transistor 5.

One terminal of the horizontal deflection coil 9 is connected to the collector of the horizontal output transistor 5 and the other terminal is connected to one terminal of the horizontal linearity coil 10. A branch is formed between the other terminal of the horizontal linearity coil 10 and one terminal of the S-shaped correction capacitor 15, one is connected to the primary coil 13a of the orthogonal transformer 13, and the other is connected in series with different characteristics. The first saturable reactor 11 and the second saturable reactor 12 are connected to each other. The other terminal of the S-shaped correction capacitor 15 is grounded. Secondary coil 13b of quadrature transformer 13
Is supplied with a control current synchronized with the vertical frequency from the secondary side current control circuit 16. In the orthogonal transformer 13, since the mutual inductance of the primary coil 13a and the secondary coil 13b is zero, the primary current is not affected by the mutual inductance.

According to the present invention, in a horizontal deflection circuit having a horizontal linearity correction circuit, a path of a horizontal deflection current of the horizontal linearity correction circuit is branched, one of which is connected to a primary coil of a quadrature transformer, and the other is two or more. By applying a vertical period parabolic wave current to the secondary coil of the quadrature transformer by connecting it to a circuit that combines the saturable reactors of Is what you do.

Next, the operation of the horizontal deflection circuit shown in FIG. 1 will be described. The horizontal deflection current depends on the combined inductance of the first and second saturable reactors 11 and 12 and the orthogonal transformer 13. FIG. 2 is a diagram showing measured values of the DC superposition characteristics of the saturable reactor. In FIG. 2, a dashed line indicates a DC superimposition characteristic of the first saturable reactor 11, and a dotted line indicates a DC superposition characteristic of the second saturable reactor 12. First
Saturable reactor 11 and second saturable reactor 1
As the DC superimposition characteristics of Nos. 2 and 3, the values of the inductance L greatly differ depending on the direction of the deflection current (superimposed current) I, similarly to the linearity coils used in the normal horizontal deflection circuit. Further, the DC superimposition characteristics determined by the direction of the deflection current (superimposed current) I between the first saturable reactor 11 and the second saturable reactor 12 are set in opposite directions. In FIG. 2, a solid line indicates a combined value of inductance obtained by connecting the first saturable reactor 11 and the second saturable reactor 12 in series.

FIG. 3 shows the secondary coil 1 of the quadrature transformer 13.
It is a figure which shows the relationship between the current value applied to 3b, and the DC superposition characteristic of the inductance which appears on the primary side. Here, as the specifications of the quadrature transformer 13, actual measured values are shown, for example, when the primary coil is 5 T, the secondary coil is 200 T, and the gap is 75 μm. When the current value on the secondary side is sufficiently small, a large inductance component appears on the primary side. Conversely, as the current value on the secondary side increases, the inductance on the primary side approaches saturation, and eventually saturates.
This shows that the inductance is minimized.

Since the horizontal deflection current depends on the combined inductance of the first and second saturable reactors 11 and 12 and the orthogonal transformer 13, the combined inductance is shown in FIG. FIG. 4 is a diagram showing measured values of the DC superposition characteristics of the combined inductance of the first and second saturable reactors and the quadrature transformer by changing the secondary-side control current of the quadrature transformer. While the DC superposition characteristics of the first and second saturable reactors are fixed, the DC superposition characteristics of the quadrature transformer are variable by the current on the secondary side. Therefore, the smaller the control current value on the secondary side of the quadrature transformer 13 and the more the quadrature transformer is in an unsaturated state,
And the DC superimposition characteristics of the second saturable reactors 11 and 12 appear. This is also consistent with the result of the measured value of the combined inductance in FIG. In FIG. 4, conversely, the control current value on the secondary side of the orthogonal transformer 13 is large,
This shows that when the quadrature transformer 13 is saturated, the DC superposition characteristics of the first and second saturable reactors 11 and 12 hardly appear.

Therefore, when a parabolic current waveform having a vertical period as shown in FIG. 5 is applied to the secondary coil 13b of the orthogonal transformer 13, a high current value i appears at the upper and lower portions of the screen.
Therefore, the quadrature transformer 13 is saturated at the upper and lower parts of the screen, while the low current value i is at the center part of the screen.
2, the orthogonal transformer 13 is in an unsaturated state.
Therefore, the DC superposition characteristics of the first and second saturable reactors 11 and 12 hardly appear at the upper and lower portions of the screen,
The linearity correction in the horizontal direction is weakened, and the DC superposition characteristics of the first and second saturable reactors 11 and 12 appear strongly in the center of the screen, and the linearity correction in the horizontal direction is strongly applied. As a result, as shown in FIG. In addition, the intermediate pin distortion can be satisfactorily removed.

Therefore, by applying a parabolic wave current having a vertical period to the secondary winding of the quadrature transformer, the intensity of horizontal linearity correction can be controlled in the vertical direction and can be controlled well.

Further, since the strength of the horizontal linearity correction is controlled by the current value applied to the secondary coil of the quadrature transformer, the current value of the quadrature transformer can be small, and the power loss, that is, the power loss, Hysteresis loss is small, and heat generation can be reduced.

Since the mutual inductance of the primary coil and the secondary coil is zero because of the orthogonal transformer, the primary current is not affected, and the control circuit does not require a feedback circuit for canceling the mutual inductance. The circuit configuration can be simplified.

Next, a horizontal deflection circuit according to a second embodiment will be described. FIG. 7 is a block diagram showing a horizontal deflection circuit according to the second embodiment. In the horizontal deflection circuit 20, a branch is formed between the other terminal of the horizontal linearity coil 10 and one terminal of the S-shaped correction capacitor 15,
One is connected to the primary side coil 13a of the quadrature transformer 13, the other is connected to the first saturable reactor 21 and the second saturable reactor 22 having different characteristics and connected in parallel, and the other is connected to the first saturable reactor 22 described above. The configuration is the same as that of the horizontal deflection circuit 1 of the embodiment.

In the configuration shown in FIG. 7, the first saturable reactor 21 and the second saturable reactor 2 as shown in FIG.
2 is the combined inductance. Therefore, when a parabolic current waveform having a vertical period opposite to that of FIG. 5 as shown in FIG. 9 is applied to the secondary coil 13b of the orthogonal transformer 13, the current is low at the upper and lower portions of the screen. Reference numeral 13 denotes an unsaturated state in the upper and lower parts of the screen, while the current is high in the central part of the screen, so that the orthogonal transformer 13 becomes saturated. Therefore, the DC superposition characteristics of the first and second saturable reactors 21 and 22 appear strongly at the upper and lower portions of the screen, and the linearity correction in the horizontal direction is strongly applied, and shrinkage occurs.
In addition, the DC superimposition characteristics of the second saturable reactors 21 and 22 hardly appear, and the linearity correction in the horizontal direction is weakened. As a result, as shown in FIG. 10, the intermediate pin distortion can be satisfactorily removed.

Next, a horizontal deflection circuit according to a third embodiment will be described. FIG. 11 is a conceptual diagram of the horizontal linearity correction circuit corresponding to multi-scan. As the secondary side current of the quadrature transformer, it is not a parabolic waveform.
When a constant current is applied as shown in (a), since the current is a constant current, the inductance of the orthogonal transformer becomes constant, and the effect of the saturable reactor is uniformly applied in the vertical direction of the screen. As shown in FIG. 11B, when the constant current on the secondary side of the quadrature transformer is increased, the effect of the saturable reactor is diminished, and the left and right ends of the screen are extended and the constant current is reduced. When this is done, the effect of the saturable reactor becomes stronger, so that image contraction occurs at the left and right ends of the screen. By utilizing this property, switching of horizontal linearity correction according to each input frequency of the multi-scan display, which was conventionally supported by switching of the S-shaped correction capacitor,
This can be realized only by increasing or decreasing the secondary current value of the quadrature transformer.

Next, a horizontal deflection circuit according to a fourth embodiment will be described. FIG. 12 is a block diagram showing a horizontal deflection circuit according to the fourth embodiment. In the horizontal deflection circuit 23,
The horizontal linearity coil 10 is not connected to the horizontal deflection coil 9, and the other configuration is the same as that of the horizontal deflection circuit 1 of the above-described first embodiment.

FIG. 13 is a diagram showing the combined inductance of the saturable reactor when operating as horizontal linearity correction. In FIG. 13, the chain line indicates the DC superimposition characteristic of the first saturable reactor 24, and the dotted line indicates the DC superimposition characteristic of the second saturable reactor 25. The DC superimposition characteristics of the first saturable reactor 24 and the second saturable reactor 25 are similar to those of the linearity coil used in the normal horizontal deflection circuit, respectively, and the deflection current (superimposed current)
The value of the inductance L greatly differs depending on the direction of I. Also, the first saturable reactor 24
The DC superimposition characteristic determined by the direction of the deflection current (superimposed current) I between the DC current and the second saturable reactor 25 is set in the opposite direction. First and second saturable reactor 2
The DC superimposition characteristics of Nos. 4 and 25 are not bilaterally symmetric but are DC superposition characteristics according to the strength of left and right distortions. In FIG. 13, a solid line indicates a combined value of inductance obtained by connecting the first saturable reactor 24 and the second saturable reactor 25 in series.

Conventionally, in horizontal linearity correction, the strength of left and right distortions is determined independently by correcting only the left side of the screen.
This was performed using a saturable reactor called a horizontal linearity coil 10 shown in FIG. In the horizontal deflection circuit 23 shown in FIG. 12, the first saturable reactor 24 and the second saturable reactor 25 to be combined are appropriately changed so as to have different characteristics according to the strength of left and right distortions as shown in FIG. By selecting this, as shown in FIG. 14B, the strength of the correction can be varied between the left and right sides of the screen. FIG. 14B shows that the amount of change due to the correction on the left side of the screen is large and the amount of change due to the correction on the right side of the screen is small. FIG. 14A shows the secondary side current of the quadrature transformer.
This shows that a constant current is applied instead of a parabolic waveform.Since it is a constant current, the inductance of the quadrature transformer becomes constant, and the effect of the saturable reactor is applied uniformly in the vertical direction of the screen. Become.

Therefore, the function of correcting the horizontal linearity, which has been required conventionally, can be taken in, and a dedicated linearity coil is not required, so that a horizontal deflection circuit can be formed at low cost.

Next, the partial horizontal linearity correction will be described. (1) By combining a plurality of saturable reactors, a circuit for reducing only the left end or the right end of the screen can be formed. (2) By adjusting the secondary current flowing through the orthogonal transformer, correction can be applied only to the upper end or the lower end of the screen. (3) By combining the above (1) and (2), it is possible to realize a circuit for reducing only the upper right.

[0031]

As described above, according to the present invention,
By applying a parabolic wave current with a vertical period to the secondary winding of the orthogonal transformer of the horizontal linearity correction circuit, the intensity of horizontal linearity correction can be controlled in the vertical direction, and horizontal linearity can be corrected well. Can be.

The strength of the horizontal linearity correction is controlled by the current value applied to the secondary winding of the orthogonal transformer, so that the current value of the orthogonal transformer can be small.
Accordingly, power loss, that is, hysteresis loss is small, and heat generation can be reduced. Because it is a quadrature transformer, there is no mutual inductance between the primary and secondary windings.Therefore, the primary current is not affected, and there is no need for a feedback circuit in the control circuit to cancel the effect of the mutual inductance. The configuration can be simplified.

When a plurality of saturable reactors having different characteristics have the same DC superposition characteristics as the linearity coil, the function of correcting the horizontal linearity, which has been required conventionally, can be taken in. Becomes unnecessary, and a horizontal deflection circuit can be configured at low cost.

[Brief description of the drawings]

FIG. 1 is a block diagram of a horizontal deflection circuit according to the present invention.

FIG. 2 is a diagram showing measured values of DC superposition characteristics of a saturable reactor.

FIG. 3 is a diagram showing a relationship between a current value applied to a secondary coil of a quadrature transformer and a DC superposition characteristic of an inductance appearing on a primary side.

FIG. 4 is a diagram showing measured values of the DC superposition characteristics of the combined inductance of the first and second saturable reactors and the quadrature transformer by changing the secondary-side control current of the quadrature transformer.

FIG. 5 is a diagram showing a parabolic current waveform of a vertical cycle applied to a secondary coil of a quadrature transformer.

FIG. 6 is a conceptual diagram of intermediate pin distortion correction.

FIG. 7 is a block diagram of a horizontal deflection circuit according to a second embodiment.

FIG. 8 is a diagram showing a combined inductance of a first saturable reactor and a second saturable reactor.

FIG. 9 is a diagram showing a parabolic current waveform of the vertical cycle applied to the secondary coil of the orthogonal transformer, which is the reverse of FIG. 5;

FIG. 10 is a conceptual diagram of intermediate pin distortion correction.

FIG. 11 shows the third embodiment, and is a conceptual diagram of a horizontal linearity correction circuit corresponding to multi-scan.

FIG. 12 is a block diagram of a horizontal deflection circuit according to a fourth embodiment.

FIG. 13 is a diagram showing a combined inductance of a saturable reactor when operated as horizontal linearity correction.

14A is a diagram illustrating a constant current applied to a secondary coil of a quadrature transformer, and FIG. 14B is a diagram illustrating a screen example in which the strength of correction is changed between left and right.

FIG. 15 is a diagram illustrating the principle of S-shaped correction.

FIG. 16 is a diagram illustrating an intermediate pin distortion that appears after the right and left pin distortion correction.

FIG. 17 is a block diagram showing a horizontal deflection circuit of a system for correcting intermediate pin distortion with a conventional saturable reactor.

FIG. 18 is a block diagram showing a conventional horizontal deflection circuit that corrects intermediate pin distortion with a single transformer.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Horizontal deflection circuit, 2 ... Left and right pincushion distortion correction circuit, 3 ... Horizontal output transformer, 5 ... Horizontal output transistor, 6 ... Damper diode, 7 ... Resonant capacitor, 9 ..Horizontal deflection coil, 10 ... horizontal linearity coil, 11 ... first saturable reactor, 12 ... second saturable reactor, 13 ... quadrature transformer, 13a ... primary side coil , 13b ...
Secondary coil, 15 ... S-shaped correction capacitor, 16
... Secondary side current control circuit, 20 ... Horizontal deflection circuit,
21 ... first saturable reactor, 22 ... second saturable reactor, 23 ... horizontal deflection circuit, 24 ...
.First saturable reactor, 25 ... second saturable reactor

Claims (4)

[Claims] 1. A horizontal deflection circuit having a horizontal linearity correction circuit, wherein a portion of the horizontal linearity correction circuit through which a horizontal deflection current flows is branched, one is connected to a primary winding of a quadrature transformer, and the other is different in characteristics. By connecting to a circuit combining a plurality of saturable reactors, and applying a parabolic wave current having a vertical period to the secondary winding of the quadrature transformer,
A horizontal deflection circuit for correcting horizontal linearity. 2. The horizontal deflection circuit according to claim 1, wherein the circuit combining the plurality of saturable reactors having different characteristics connects the plurality of saturable reactors in series. 3. The horizontal deflection circuit according to claim 1, wherein a circuit combining the plurality of saturable reactors having different characteristics connects the plurality of saturable reactors in parallel. 4. The horizontal deflection circuit according to claim 1, wherein the plurality of saturable reactors have the same DC superposition characteristics as a linearity coil.