JP2001036496A - Ofdm demodulator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an OFDM(orthogonal frequency multiplex time division) demodulator that can discriminate a transmission mode of a modulation signal in a short time in spite of a small circuit scale. SOLUTION: A microprocessor 8 outputs a mode counter initial value MI corresponding to a transmission mode of a channel to a valid symbol delay device 2 and a symbol filer 5 when the transmission mode is known, and the valid symbol delay device 2 and the symbol filter 5 first conduct processing corresponding to the known transmission mode according to the mode counter initial value MI.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an OFDM demodulator for receiving and demodulating digital terrestrial broadcasting.

[0002]

2. Description of the Related Art In recent years, terrestrial broadcasting has been digitized mainly in Europe and the like.
(Orthogonal frequency division multiplexing) transmission schemes are receiving attention. FIG. 13 is a block diagram showing a basic configuration of a conventional OFDM modulator.

The OFDM modulator shown in FIG. 13 includes a serial / parallel converter 101, a mapping circuit 102, a mixer 103, an IFFT (Inverse Fast Fourier Transformer).
m) Calculator 104 and guard interval adder 10
5 is provided.

[0004] The serial-parallel converter 101 is
The serial data that is digital data of 0 ”and“ 1 ”is converted into n-bit parallel data.The mapping circuit 102 converts the converted parallel data into, for example, n-bit parallel data.
Mapping is performed by a constellation as shown in FIGS. 14A to 14C, and the mapping is performed on a carrier. Here, FIG.
(A) of QPSK (Quadrature Phase Shift Keyin)
(g) is a diagram showing the constellation, (b) is a diagram
It is a figure which shows the constellation of 16QAM (Quadrature Amplitude Modulation), (c) is 64QA.
FIG. 4 is a diagram showing a constellation of M.

[0005] The mixer 103 adds the mapped data to the ISDB-T of Japanese terrestrial digital broadcasting system.
(Integrated Service Digital Broadcasting Terrestr
ial), SP (Scattered Pilot) signal, CP
(Continual Pilot) signal, TMCC (Transmission a)
nd Multiplexing Configuration Control), AC1
(Auxiliary Channel 1) and AC2 (Auxiliary Ch.
annel 2), and the European DVB-T (Digital Video Broadcasting Terrestria) that has already started broadcasting
l), the SP signal, the CP signal and the TPS (Trans
mission Parameter Signaling). IFF
The T calculator 104 includes an SP signal, a CP signal, a TMCC, and an A signal.
The signal obtained by mixing C1 and AC2 is subjected to inverse Fourier transform. The guard interval adder 105 adds a guard interval to the signal subjected to the inverse Fourier transform.

Next, the operation of the OFDM modulator shown in FIG. 13 will be described in detail. The serial data of “0” and “1” is converted into n-bit parallel data by a serial / parallel converter 101, and the mapping circuit 102
Is mapped by The mapped data is
For example, in the case of ISDB-T mode 1 (2k mode), 1248 data become data for one symbol, and the 1248 data are put on each carrier on the frequency axis. 1248 carriers are placed in the mixer 10
The carrier carrying the SP signal, the CP signal, and the data of the TMCC is inserted by 3 to make 1405 carriers. Data of “0” is added before and after the 1405 carriers, resulting in 2048 carriers. This 204
Eight carriers are subjected to inverse Fourier transform by the IFFT calculator 104. Actually, there is no carrier in the data portion of "0".

The data subjected to the inverse Fourier transform is 2048 pieces of data continuous in the time axis direction. For example, when the guard interval is １ ／, when the guard interval is ４８, the rear part of the 2048 pieces of data is used. The same data as the 512 (= 2048 × ４) data (the horizontal stripe portion S1 in FIG. 13) is added before the 2048 data (the vertical stripe portion S2 in FIG. 13). In the above case, the effective symbol period indicates the time width of 2048 data, the guard interval period indicates the time width of the added 512 data, and the symbol period is 2560 (= 2048 + 512) data. And the guard interval is added to the effective symbol period.

[0008] The effective symbol period has a different time width depending on each transmission mode.
In the case of (2k mode), it is the time width of 2048 data, in the case of mode 2 (4k mode), it is the time width of 4096 data, and in the case of mode 3 (8k mode), it is 8192 data Is the time width of the data. Also, for each transmission mode, 1/4, 1/8, 1/16 and 1
There are four types of guard intervals, / 32.

In DVB-T, there are two types of transmission modes, 2k mode and 8k mode. For each transmission mode, 1/4, 1/8, 1/16
And 1/32 guard intervals.
In the case of the 2k mode, the SP signal, the CP signal, the TPS
Although the number of carriers after data insertion is 1705,
The same FFT calculator and guard interval adder as described above can be used.

[0010]

As described above, in the conventional OFDM modulator, modulation is performed according to a combination of one of a plurality of transmission modes and one of a plurality of guard intervals. ing. Therefore, in the conventional OFDM demodulator, for example, in the case of ISDB-T, discrimination processing is performed for all 12 combinations of three types of transmission modes and four types of guard intervals, and the determined transmission mode and Demodulation processing was performed according to the guard interval. As the determination method, there are the following two methods.

First, a first method uses a discriminator corresponding to one kind of transmission mode and one kind of guard interval, and uses 12 kinds of combinations composed of three kinds of transmission modes and four kinds of guard intervals. Are sequentially determined, and the transmission mode of the modulated signal and the guard interval are determined. In this method, in the worst case, the determination of the transmission mode and the guard interval is performed for all 12 combinations, and it takes a long time to determine the transmission mode and the guard interval.

Next, a second method is to connect twelve discriminating sections corresponding to one type of transmission mode and one type of guard interval in parallel, and to construct three types of transmission modes and four types of guard intervals. This is a method in which the twelve combinations are determined at a time, and the transmission mode of the modulated signal and the guard interval are determined. In this method, the time required to determine the transmission mode and the guard interval is reduced, but the required circuit scale is increased by a factor of 12, and the circuit scale is too large.

An object of the present invention is to provide an OFD capable of discriminating a transmission mode of a modulated signal in a short time with a small circuit scale.
An M demodulator is provided.

Another object of the present invention is to provide an OFDM demodulator capable of discriminating a transmission mode and a guard interval of a modulated signal in a short time with a small circuit scale.

[0015]

Means for Solving the Problems (1) First invention An OFDM demodulator according to a first invention converts a modulated signal subjected to orthogonal frequency multiplex modulation according to a predetermined transmission mode from among a plurality of transmission modes. An OFDM demodulator for demodulating a signal, comprising: a quadrature detector for quadrature detecting a modulated signal to output complex data; and a complex data output from the quadrature detector for delaying by an effective symbol period determined for each transmission mode. Effective symbol delay means for outputting delayed complex data, and determining means for determining a transmission mode of a modulated signal using complex data output from the quadrature detection means and delayed complex data output from the effective symbol delay means, Control means for controlling the effective symbol delay means so as to delay the complex data by the effective symbol period according to the instruction.

In the OFDM demodulator according to the present invention, the control means controls the effective symbol delay means, and the effective symbol delay means delays the complex data output from the quadrature detection means by an effective symbol period according to the instruction of the control means. Then, the determination means determines the transmission mode of the modulated signal using the complex data output from the quadrature detection means and the delayed complex data output from the effective symbol delay means. Therefore, since the transmission mode can be determined using the effective symbol period corresponding to an arbitrary transmission mode among the plurality of transmission modes, it is determined from the effective symbol period of the transmission mode that is likely to be the modulation signal transmission mode. Can be performed, and the transmission mode of the modulation signal can be determined in a short time, and instead of simultaneously determining a plurality of transmission modes,
Since the determination is sequentially performed using the effective symbol periods according to the instruction, the circuit scale can be reduced.

(2) Second invention The OFDM demodulator according to the second invention is the OFDM demodulator according to the first invention, in which the transmission mode determined by the determination means is changed by the channel through which the modulated signal is transmitted. Storage means for storing the transmission mode corresponding to the channel through which the modulated signal is transmitted from the storage means, and delaying the complex data by an effective symbol period corresponding to the read transmission mode. Thus, the effective symbol delay means is controlled.

In this case, since the determination is made again using the effective symbol period corresponding to the already determined transmission mode,
The determination can be made from the effective symbol period of the transmission mode which is very likely as the transmission mode of the modulated signal.

(3) Third invention The OFDM demodulator according to the third invention is the OFDM demodulator according to the first invention, wherein the control means first sets the most effective symbol period among a plurality of transmission modes. The effective symbol delay means is controlled so as to delay complex data by an effective symbol period corresponding to the short transmission mode.

In this case, since the discrimination is first performed using the shortest effective symbol period, the time required for discrimination for this transmission mode becomes particularly short, and the time required for discriminating the transmission mode of the modulated signal comprehensively is reduced. Can be shortened.

(4) Fourth Invention The OFDM demodulation device according to the fourth invention is the OFDM demodulation device according to any one of the first to third inventions,
The effective symbol delay means sequentially delays the complex data by an effective symbol period corresponding to each transmission mode in accordance with a predetermined order that is circulated, and the control means causes the transmission mode corresponding to the first effective symbol period to be delayed by the effective symbol period. The effective symbol delay means is controlled by instructing the delay means.

In this case, the effective symbol delay means can be controlled by a single instruction, the load on the control means is reduced, and all the transmission modes are determined until the transmission mode of the modulated signal is finally determined. This is performed automatically, and the transmission mode of the modulated signal can be reliably determined.

(5) Fifth Invention The OFDM demodulation device according to the fifth invention is the OFDM demodulation device according to any one of the first to fourth inventions,
The modulation signal is a modulation signal in which a signal at the rear of the effective symbol period is added to the front of the effective symbol period in accordance with a predetermined guard interval from among a plurality of guard intervals, and Using a time window, further includes integrating means for integrating correlation data created from complex data output from the quadrature detection means and delayed complex data output from the effective symbol delay means. The transmission mode and guard interval of the modulated signal are determined from the integration result, and the control means controls the integration means so as to perform integration using a time window corresponding to the guard interval according to the instruction.

In this case, the control means controls the integration means,
The integrating means integrates correlation data created from the complex data output from the quadrature detection means and the delayed complex data output from the effective symbol delay means using a time window corresponding to a guard interval according to the instruction, and discriminates. The means determines the transmission mode and guard interval of the modulated signal from the integration result of the integrating means. Therefore, since the transmission mode and the guard interval can be determined using the time window corresponding to an arbitrary guard interval among the plurality of guard intervals, the determination is performed from the guard interval that is highly likely to be the guard interval of the modulated signal. It is possible to determine the transmission mode and the guard interval of the modulated signal in a short time, instead of simultaneously determining a plurality of guard intervals,
Since the determination is sequentially performed using the time window corresponding to the guard interval according to the instruction, the circuit scale can be reduced.

(6) Sixth invention An OFDM demodulator according to a sixth invention is the OFDM demodulator according to the second invention, wherein the modulated signal is transmitted to a predetermined guard interval from a plurality of guard intervals. Accordingly, the signal at the rear of the effective symbol period is a modulation signal added to the front of the effective symbol period, and the determination unit uses complex time data output from the quadrature detection unit using a time window corresponding to the guard interval. And integrating means for integrating the correlation data generated from the delayed complex data output from the effective symbol delay means. The determining means determines a transmission mode and a guard interval of the modulated signal from an integration result of the integrating means, and stores the result. Means for storing the guard interval determined by the determining means in association with the channel through which the modulated signal is transmitted, and The stage reads the guard interval corresponding to the channel through which the modulated signal is transmitted from the storage unit, and controls the integration unit to perform integration using a time window corresponding to the read guard interval.

In this case, since the discrimination is performed again using the time window corresponding to the already determined guard interval, the discrimination is performed from the time window corresponding to the guard interval which is highly likely to be the guard interval of the modulated signal. Can be.

(7) Seventh Invention The OFDM demodulation device according to the seventh invention provides a fifth or sixth OFDM demodulator.
In the configuration of the OFDM demodulator according to the invention, the integrating means sequentially performs integration using a time window corresponding to each guard interval in accordance with a predetermined order circulating,
The control means controls the integration means by instructing the integration means of a guard interval corresponding to a time window used first.

In this case, the integration means can be controlled by a single instruction, the load on the control means is reduced, and all guard intervals are automatically determined until the guard interval of the modulation signal is finally determined. The guard interval of the modulated signal can be determined reliably.

(8) Eighth Invention The OFDM demodulation device according to the eighth invention is the OFDM demodulation device according to any one of the fifth to seventh inventions,
The discrimination means corresponds to the guard interval by filtering the correlation data created from the complex data output from the quadrature detection means and the delayed complex data output from the effective symbol delay means according to the effective symbol period and the guard interval. Filtering means for outputting correlation data emphasizing a part to be processed, the integrating means integrating the correlation data outputted from the filtering means, and the control means filtering the effective symbol period corresponding to the instruction and the filtering according to the guard interval. To control the filtering means.

In this case, the control means controls the filtering means, and the filtering means responds to the instruction with the correlation data created from the complex data output from the quadrature detection means and the delayed complex data output from the effective symbol delay means. The portion corresponding to the guard interval is emphasized by performing filtering according to the effective symbol period and the guard interval to be performed, the integrating means integrates the correlation data output from the filtering means, and the determining means modulates from the integration result of the integrating means. Determine the signal transmission mode and guard interval.

Therefore, it is possible to perform filtering in accordance with an effective symbol period corresponding to an arbitrary transmission mode among a plurality of transmission modes and an arbitrary guard interval among a plurality of guard intervals. Filtering can be performed from the transmission mode and the guard interval that are likely to be intervals, and the filtering time required to determine the transmission mode and the guard interval of the modulated signal can be reduced. Further, since the filtering according to the transmission mode and the guard interval corresponding to the instruction is sequentially performed instead of simultaneously performing the filtering according to the plurality of transmission modes and the guard interval, the circuit scale of the filtering unit can be reduced. it can. Further, since the transmission mode and the guard interval of the modulated signal are determined using the correlation data in which a portion corresponding to the guard interval is emphasized by the filtering means, the transmission mode and the guard interval of the modulated signal can be more accurately determined. it can.

(9) Ninth Invention The OFDM demodulation device according to a ninth invention is the OFDM demodulation device according to the sixth invention, wherein the discriminating means comprises: complex data output from the quadrature detection means; Filtering means for outputting correlation data emphasizing a portion corresponding to the guard interval by filtering the correlation data created from the delayed complex data output from the delay means according to the effective symbol period and the guard interval, The integrating means integrates the correlation data output from the filtering means, the control means reads a transmission mode and a guard interval corresponding to the channel through which the modulated signal is transmitted from the storage means, and reads an effective symbol corresponding to the read transmission mode. Fill according to period and guard interval The filtering means is controlled so as to perform the tapping.

In this case, since filtering is performed in accordance with the transmission mode and the guard interval already determined, filtering is performed in accordance with the transmission mode and the guard interval which are highly likely to be used as the transmission mode and the guard interval of the modulated signal. be able to.

(10) Tenth invention An OFDM demodulation device according to a tenth invention is the OFDM demodulation device according to any one of the first to seventh inventions, wherein the discriminating means is output from the quadrature detection means. Filtering means for filtering correlation data created from complex data and delayed complex data output from the effective symbol delay means in accordance with the effective symbol period, thereby outputting correlation data emphasizing a portion corresponding to the guard interval. Further, the control means controls the filtering means so as to first perform filtering according to an effective symbol period corresponding to a transmission mode having the shortest effective symbol period among the plurality of transmission modes.

In this case, since the filtering according to the shortest effective symbol period is performed, the time required for filtering in this transmission mode is shortened, and the time until finally determining the transmission mode of the modulated signal is shortened. be able to.

(11) Eleventh Invention The OFDM demodulator according to the eleventh invention has the eighth to tenth aspects.
In the configuration of the OFDM demodulation apparatus according to any one of the inventions, the filtering means performs filtering according to an effective symbol period corresponding to each transmission mode in accordance with a predetermined order circulating, and the control means performs the first effective The filtering unit is controlled by instructing the filtering unit on the transmission mode corresponding to the symbol period.

In this case, the filtering means can be controlled by a single instruction, the load on the control means is reduced, and the filtering for all the transmission modes is automatically performed until the transmission mode of the modulated signal is finally determined. The transmission mode of the modulated signal can be reliably determined.

(12) Twelfth Invention The OFDM demodulation device according to the twelfth invention has the first to eleventh
In the configuration of the OFDM demodulator according to any one of the above aspects, the discriminating means is an imaginary part inverting means for inverting the sign of an imaginary part of the delayed complex data output from the effective symbol delaying means, and is output from the quadrature detecting means. Multiplication means for multiplying the complex data by the delayed complex data in which the sign of the imaginary part is inverted by the imaginary part inversion means and outputting correlation data.

In this case, the correlation data in which the correlation state is emphasized can be created, and the discrimination can be performed more accurately.

[0040]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) Hereinafter, an OFDM demodulator according to a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a main part of an OFDM demodulator according to a first embodiment of the present invention. The OFDM demodulator shown in FIG. 1 includes a Fourier transform calculator, a demapping circuit, a parallel-serial converter, and the like used for demodulation in addition to the quadrature detector shown below. The illustration of the part is omitted, and the part related to the transmission mode determination processing related to the present invention will be described in detail in the following description. In the following description, mode 1 (2k mode),
Mode 2 (4k mode) and Mode 3 (8k mode)
The case where the present invention is applied to an ISDB-T having a 2k mode and an 8k mode will be described.
Even in the case of BT, the present invention can be similarly applied, and the same effect can be obtained.

The OFDM demodulator shown in FIG. 1 comprises a quadrature detector 1, an effective symbol delay 2, a Q-axis inverter 3, a complex multiplier 4, a symbol filter 5, a guard interval moving integrator 6, a discriminator 7, A processor 8 is provided.

The quadrature detector 1 is a tuner (not shown).
Performs orthogonal detection on the OFDM signal OF converted to the intermediate frequency, and outputs complex data I + jQ. The microprocessor 8 outputs a mode counter initial value MI corresponding to the effective symbol of the transmission mode determined first to the effective symbol delay unit 2 and the symbol filter 5.

The effective symbol delay unit 2 is configured so that the amount of delay can be varied according to the effective symbol period of each transmission mode, and the complex data I + j output from the quadrature detector 1
Q is delayed by the effective symbol period of each transmission mode in accordance with the mode counter initial value MI output from the microprocessor 8, and delay complex data I '+ jQ' is output.
The Q-axis inverter 3 inverts the sign of the imaginary part of the delayed complex data I ′ + jQ ′ and outputs inverted complex data I′−jQ ′. The complex multiplier 4 performs a complex multiplication of the complex data I + jQ output from the quadrature detector 1 and the inverted complex data I′−jQ ′ output from the Q-axis inverter 3 to form a real part I ·
I ′ + Q · Q ′ is output as correlation data corresponding to the guard interval.

The symbol filter 5 filters the real part I · I ′ + Q · Q ′ output from the complex multiplier 4 in the symbol direction according to the mode counter initial value MI output from the microprocessor 8. As a result, when the original effective symbol period of the OFDM signal OF matches the delay amount of the effective symbol delay unit 2, the symbol filter 5 generates a portion corresponding to the guard interval of the correlation data output from the complex multiplier 4. Is output.

The guard interval moving integrator 6 is configured so that the time window can be changed to a time window corresponding to each guard interval, changes the time window according to the card interval, and moves the time window while moving the time window. The correlation data SF output from the symbol filter 5 within the time window is integrated, and an integrated data ID is output.

The discriminator 7 discriminates the transmission mode of the OFDM signal OF and the guard interval based on the output result of the guard interval moving integrator 6, ie, mode 1,
Whether the transmission mode is mode 2 or mode 3 is determined, and the guard interval of the determined transmission mode is 1/32, 1/16, 1/8 or 1/32.
4 is determined. When the transmission mode of the received OFDM signal OF is determined, the determination unit 7 outputs a mode determination signal MF indicating that the determination of the transmission mode is completed and the transmission mode is determined, to the effective symbol delay unit 2 and the symbol filter. 5, a guard interval determination signal GF for notifying that the guard interval has been determined and the guard interval has been determined is output to the symbol filter 5 and the guard interval moving integrator 6, and the determination result is fed back.

Next, the effective symbol delay unit 2 shown in FIG. 1 will be described in more detail. FIG. 2 is a block diagram showing a configuration of the effective symbol delay unit 2 shown in FIG.

The effective symbol delay unit 2 shown in FIG. 2 includes a counter 21, a switching unit 22, and delay units D21 to D24.
including. The delay unit D21 delays the complex data I + jQ output from the quadrature detector 1 for a period of 2048 data periods, and outputs a 2048 data delay signal DS21 delayed by an effective symbol period of mode 1. The delay unit D22 outputs the 2048 data delay signal DS2 output from the delay unit D21.
1 is further delayed by 2048 data periods, and a 4096 data delay signal DS22 delayed by the effective symbol period of mode 2 is output. The delay unit D23 further delays the 4096 data delay signal DS22 output from the delay unit D22 by 2048 data periods, and the delay unit D24 further delays this delay signal by 2048 data periods, and
And outputs an 8192 data delay signal DS24 delayed by the effective symbol period.

The counter 21 outputs “0”, “1”, “2”
While the mode counter initial value MI is circulated in this order.
These values are output in accordance with the above. When the transmission mode determination is completed by the mode determination signal MF output from the discriminator 7 and it is found that the transmission mode has been determined, the operation is stopped. The microprocessor 8 outputs a mode counter initial value MI of “0” when the transmission mode to be determined first is mode 1, and outputs a mode counter initial value of “1” when the transmission mode to be determined first is mode 2. If the transmission mode to be first determined is mode 3, the mode counter initial value MI of "2" is output. The counter 21
When the mode counter initial value MI is “0”, “0”, “
1 ”and“ 2 ”in this order, and the mode counter initial value MI
Is "1", outputs "1", "2", and "0" in this order. If the mode counter initial value MI is "2", "1" is output.
2 ”,“ 0 ”, and“ 1 ”are output in this order.

The switch 22 selects the 2048 data delay output DS21 when the output of the counter 21 is "0", and selects the 4096 data delay output DS22 when the output of the counter 21 is "1". Is "2", the 8192 data delay output DS24 is selected. Accordingly, when the mode counter initial value MI is "0", the output of the switch 22 is 2048 data delay outputs DS21, 4096 data delay outputs DS22, 8
Switching is performed in the order of the 192 data delay outputs DS24, and when the mode counter initial value MI is “1”, 4096 data delay outputs DS22, 8192 data delay outputs DS24,
Switching is performed in the order of the 2048 data delay output DS21, and when the mode counter initial value MI is “2”, 8192 data delay output DS24 and 2048 data delay output DS2
1, the switch is made in the order of 4096 data delay outputs DS23.

By the above operation, the effective symbol delay unit 2
Is the complex data I + jQ output from the quadrature detector 1
If the mode counter initial value MI is “0”, the mode counter initial value MI is delayed by the effective symbol period of each transmission mode in the order of mode 1, mode 2, and mode 3.
When the mode counter initial value MI is "2", the transmission is delayed in the order of mode 3, mode 1, mode 2 when the mode counter initial value MI is "2". Delayed by the effective symbol period of the mode, and output as delayed complex data I ′ + jQ ′.

Next, the symbol filter 5 shown in FIG. 1 will be described in more detail. FIG. 3 is a block diagram showing a configuration of the symbol filter 5 shown in FIG.

The symbol filter 5 shown in FIG. 3 includes amplifiers 51 and 52, an adder 53, and an 8-symbol delay unit 54. The amplifier 51 amplifies the real part I · I ′ + Q · Q ′ output from the complex multiplier 4 and outputs the result to the adder 53. The 8-symbol delay unit 54 has a mode counter initial value M
The output of the adder 53 is delayed by eight symbols according to I,
When the determination of the transmission mode and the guard interval is completed by the mode determination signal MF and the guard interval determination signal GF output from the discriminator 7 and it is found that the transmission mode and the guard interval have been determined, the operation is stopped. Amplifier 52 amplifies the delayed output and outputs it to adder 53. The adder 53 adds the outputs of the amplifiers 51 and 52 and outputs the result to the guard interval moving integrator 6 as correlation data SF.

Next, the 8-symbol delay unit 54 shown in FIG. 3 will be described in more detail. FIG. 4 is a block diagram showing a configuration of the 8-symbol delay unit 54 shown in FIG. FIG.
The 8-symbol delay unit 54 shown in FIG.
Switching devices 56 and 58 and delay devices D50 to D59 are included.

The delay unit D50 outputs the output of the adder 53 to 16
16384 data delay signal DS50 delayed by 384 data periods and delayed by 8 effective symbol periods of mode 1
Is output. The delay unit D51 further converts the 16384 data delay signal DS50 output from the delay unit 50 into 1638
A 32768 data delay signal DS51 delayed by 4 data periods and delayed by 8 effective symbol periods of mode 2 is output. The delay device D52 outputs the signal 3 output from the delay device 51.
The 2768 data delay signal DS51 is further delayed by 16384 data periods, and the delay unit D53 further delays this delay signal by 16384 data periods to output a 65536 data delay signal DS53 which is delayed by 8 effective symbol periods of mode 3.

The counter 55 has "0", "1", "2"
Are circulated in this order, and the respective values are switched by switches 56, 5
8, when the mode counter initial value MI output from the microprocessor 8 is "0", that is, when the first transmission mode to be determined is mode 1, "0", "0"
1 ”and“ 2 ”in this order, and the mode counter initial value MI
Is "1", that is, when the first transmission mode to be determined is mode 2, "1", "2", and "0" are output in this order. When the mode counter initial value MI is "2", that is, If the transmission mode to be determined is mode 3,
2 "," 0 ", and" 1 ". When the mode determination signal MF output from the discriminator 7 indicates that the transmission mode has been determined and the transmission mode has been determined, the counter 55 outputs the signal. Stop operation.

The switch 56 selects the 16384 data delay output DS50 when the output of the counter 55 is "0", and 3276 when the output of the counter 55 is "1".
When the eight data delay output DS51 is selected and the output of the counter 55 is "2", the 65536 data delay output DS53
Select Therefore, when the mode counter initial value MI is "0", the output of the switch 55 is 16384 data delay outputs DS50, 32768 data delay outputs DS.
Switching is performed in the order of 51, 65536 data delay output DS53, and when the mode counter initial value MI is “1”, 32
768 data delay outputs DS51, 65536 data delay outputs DS53, and 16384 data delay outputs DS50 are switched in this order, and when the mode counter initial value MI is "2", 65536 data delay outputs DS53, 16384 data delay outputs DS50, 32768 data delay outputs DS
The signals are switched in the order of 51 and input to the delay unit D54.

The delay unit D 54 outputs the output S of the switching unit 56.
56 is delayed for 512 data periods, and a 512 data delay signal DS54 delayed by 8 guard interval periods when the guard interval is 1/32 in mode 1 is output. The delay unit D55 outputs the signal 5 output from the delay unit D54.
The 1024 data delay signal DS55 is output by further delaying the 12 data delay signal DS54 by 512 data periods, and delaying by 8 guard interval periods when the guard interval is 1/16 in mode 1 or 1/32 in mode 2. I do. The delay unit D56 has a 1024 data delay signal DS5 output from the delay unit D55.
5 is further delayed by 1024 data periods, and is delayed by 8 guard interval periods when the guard interval is 1/8 in mode 1, the guard interval is 1/16 in mode 2, or the guard interval is 1/32 in mode 3. The data delay signal DS56 is output. The delay unit D57 further delays the 2048 data delay signal output from the delay unit D56 for a period of 2048 data periods, so that the guard interval is 1/4 in mode 1, the guard interval is 1/8 in mode 2, or the guard interval is 3 in mode 3. A 4096 data delay signal DS57 delayed by 8 guard interval periods in the case of 1/16 is output. The delay unit D58 outputs the signal 40 output from the delay unit D57.
The 96 data delay signal DS57 is further delayed by 4096 data periods, and the guard interval is 1/4 in mode 2 or 8 when the guard interval is 1/8 in mode 3.
An 8192 data delay signal DS58 delayed by the guard interval period is output. The delay unit D59 further delays the 8192 data delay signal output from the delay unit D58 by 8192 data periods, and converts the 16384 data delay signal DS59 obtained by delaying by 8 guard interval periods when the guard interval is 1/4 in mode 3 Output.

The counter 57 outputs "0", "1", "
2 ”and“ 3 ”are output to the switch 58 in this order, and the guard interval determination signal GF output from the discriminator 7 is output.
When it is determined that the guard interval is determined and the guard interval is determined, the operation is stopped. Here, the output "0" of the counter 57 corresponds to the guard interval 1/32, "1" corresponds to the guard interval 1/16, and "2" is the guard interval 1/8.
And "0" corresponds to the guard interval 1/4.

When the output of the counter 55 is "0", when the output of the counter 57 is "0", the switch 58 outputs the 512 data delay output DS54 corresponding to the case where the guard interval is 1/32 in mode 1. Select and counter 5
When the output of the counter 57 is "1", the 1024 data delay output DS55 corresponding to the case where the guard interval is 1/16 in the mode 1 is selected. When the output of the counter 57 is "2", the guard interval in the mode 1 is selected. The 2048 data delay output DS56 corresponding to the case of 1/8 is selected, and when the output of the counter 57 is "3", the 4096 data delay output DS57 corresponding to the case where the guard interval is 1/4 in mode 1 is selected. .

When the output of the counter 55 is "1", when the output of the counter 57 is "0", the switch 58 outputs the 1024 data delay output DS55 corresponding to the case where the guard interval is 1/32 in mode 2. When the output of the counter 57 is "1", the 2048 data delay output DS56 corresponding to the case where the guard interval is 1/16 in mode 2 is selected, and when the output of the counter 57 is "2", the mode 2 is selected. Selects the 4096 data delay output DS57 corresponding to the case where the guard interval is 1/8, and when the output of the counter 57 is "3", the 8192 data delay output corresponding to the case where the guard interval is 1/4 in the mode 2. Select DS58.

When the output of the counter 55 is "2", when the output of the counter 57 is "0", the switch 58 outputs the 2048 data delay output DS56 corresponding to the case where the guard interval is 1/32 in mode 3. When the output of the counter 57 is “1”, the 4096 data delay output DS57 corresponding to the case where the guard interval is 1/16 in mode 3 is selected, and when the output of the counter 57 is “2”, the mode 3 is selected. Selects the 8192 data delay output DS58 corresponding to the case where the guard interval is 1/8, and when the output of the counter 57 is "3", the 16384 data delay output corresponding to the case where the guard interval is 1/4 in mode 3. Select DS58.

As described above, the counter 55 has the mode counter initial value MI output from the microprocessor 8.
Are sequentially counted up as initial values, and the counter 57
Counts up sequentially with a predetermined initial value, for example, “0” corresponding to a guard interval of 1/32. Therefore, the switch 56 and the switch 58 are switched by the counter 55 and the counter 57 so as to delay the input data by 8 symbol periods (8 effective symbol periods + 8 guard interval periods) corresponding to each transmission mode and each guard interval. .

As a result, when the mode counter initial value MI is "0", the 8-symbol delay unit 54 guards the output of the adder 53 in the order of mode 1, mode 2, mode 3 and for each transmission mode. Interval is 1/32, 1/1
In the order of 6, 1/8, 1/4, the transmission mode and each guard interval are delayed by 8 symbol periods, and when the mode counter initial value MI is "1", the mode 2, the mode 3,
The delay of each transmission mode and each guard interval is 8 symbol periods in the order of mode 1 and in the order of 1/32, 1/16, 1/8, and 1/4 guard interval for each transmission mode. When the MI is "2", the guard intervals are 1/32, 1/1 in the order of mode 3, mode 1, mode 2 and for each transmission mode.
It is delayed by eight symbol periods of each transmission mode and each guard interval in the order of 6, 1/8, 1/4.

By the above operation, the symbol filter 5
Corresponds to the complex multiplier 4 according to the mode counter initial value MI.
Is filtered in the symbol direction corresponding to each transmission mode and each guard interval, and the original effective symbol period of the OFDM signal OF and the amount of delay by the effective symbol delay unit 2 When they match, the correlation data SF in which the portion corresponding to the guard interval is emphasized is output.

Next, the guard interval moving integrator 6 shown in FIG. 1 will be described in more detail. FIG.
3 is a block diagram showing a configuration of a guard interval moving integrator 6 shown in FIG.

The guard interval moving integrator 6 shown in FIG. 5 includes a counter 61, a switch controller 62, and a delay unit D6.
1 to D66, switches SW1 to SW3 and adder 63
-68.

The delay unit D61 delays the correlation data SF output from the symbol filter 5 for a period of 2048 data. The switch SW1 receives the output of the delay unit D61,
It turns on or off according to the control signal C1 output from the switch controller 62. The adder 63 calculates the correlation data SF
And the output of the switch SW1.

The delay unit D62 outputs the output of the adder 63 by 10
Delay for 24 data periods. The switch SW2 receives the output of the delay unit D62 and turns on or off according to the control signal C2 output from the switch controller 62. Adder 6
4 adds the output of the adder 63 and the output of the switch SW2.

The delay unit D63 outputs the output of the adder 64 to 51
Delay for two data periods. The switch SW3 is a delay device D
It receives the output of 63 and turns on or off in accordance with the control signal C3 output from the switch controller 62. Adder 65
Adds the output of the adder 64 and the output of the switch SW3.

The counter 61 has "0", "1", "
2 ”and“ 3 ”are output to the switch controller 62 in this order. When the guard interval determination signal GF output from the discriminator 7 indicates that the guard interval determination has been completed and the guard interval has been determined, the guard interval is determined. Here, the operation is stopped, wherein the output “0” of the counter 61 corresponds to the guard interval 1/32, “1” corresponds to the guard interval 1/16, and “2” corresponds to the guard interval 1/8. , “3” correspond to the guard interval １ ／.

When the output of the counter 61 is "0", the switch controller 62 outputs control signals C1 to C3 for turning off all the switches SW1 to SW3 to the switches SW1 to SW3.
SW3, and when the output of the counter 61 is "1",
Control signals C1 to C3 for turning off the switches SW1 and SW2 and turning on the switch SW3 are transmitted to the switches SW1 to SW
W3, and when the output of the counter 61 is "2", the control signals C1 to C3 for turning off the switch SW1 and turning on the switches SW2 and SW3 are transmitted to the switches SW1 to SW3.
3 and the output of the counter 61 is "3", the control signal C for turning on all the switches SW1 to SW3.
1 to C3 are output to the switches SW1 to SW3.

The delay unit D64 outputs the output of the adder 65 to 25
Delay for 6 data periods. The adder 66 adds the output of the adder 65 and the output of the delay unit D64. Delay device D65
Delays the output of adder 66 for 128 data periods.
The adder 67 adds the output of the adder 66 and the output of the delay unit D65. The delay unit D66 outputs the output of the adder 68 to 6
Delay for 4 data periods. The adder 68 adds the output of the adder 67 and the output of the delay unit D66 to obtain an integrated data ID.
Is output to the discriminator 7.

By the above operation, in the guard interval moving integrator 6, the counter 61 counts up by setting a predetermined initial value, for example, "0" corresponding to a guard interval of 1/32 as an initial value, and thereby the guard interval is increased. Interval is 1/32, 1/16, 1/8, 1 /
The correlation data SF of the symbol filter 5 within the time window is integrated while the time window (filter configuration) changes and the time window moves in the order of 4 in accordance with each guard interval.

In the present embodiment, the quadrature detector 1 corresponds to quadrature detection means, the effective symbol delay unit 2 corresponds to effective symbol delay means, and the Q-axis inverter 3, complex multiplier 4, symbol filter 5, The guard interval moving integrator 6 and the discriminator 7 correspond to the discriminating means, and the microprocessor 8
Corresponds to the control means. The symbol filter 5 corresponds to filtering means, the Q-axis inverter 3 corresponds to imaginary part inverting means, and the complex multiplier 4 corresponds to multiplying means.

Next, the discriminating operation of the OFDM demodulator configured as described above will be described. FIG. 6 is a diagram showing an example of an output waveform of each unit for describing a determination operation of the OFDM demodulation device shown in FIG. In addition, FIG.
(E) shows the output waveform of each unit when the original effective symbol period of the OFDM signal OF matches the delay amount of the effective symbol delay unit 2.

The transmission mode and guard interval of an OFDM signal OF transmitted on a channel used for broadcasting in a certain area are often fixed. For example, when a terrestrial digital broadcasting service is actually started, In the UK, the transmission mode is fixed at 2k mode, and the guard interval is fixed at 1/32. in this way,
If the transmission mode and the guard interval are fixed once, it is expected that the possibility of being changed halfway is low.

From the above viewpoint, the microprocessor 8
When the transmission mode of a certain channel is known, first outputs a mode counter initial value MI corresponding to this transmission mode to the effective symbol delay unit 2 and the symbol filter 5, and the discriminating operation is performed as follows. . In addition,
Information on the known transmission mode may be externally input to the microprocessor 8 as necessary, or may be stored in a memory as in the third embodiment described below.

First, as shown in FIG. 6A, the quadrature detector 1 outputs complex data I + jQ output from the input OFDM signal OF. At this time, the complex data I
In + jQ, the data at the end of the effective symbol period is added to the front of the effective symbol period. For example, the rear part GP of the effective symbol 1 (the portion indicated by oblique lines in the figure) is added to the front of the effective symbol 1 as a guard interval 1. Has been added.

At this time, when the transmission mode of the input OFDM signal OF is known, the microprocessor 8
The mode counter initial value MI corresponding to the transmission mode is output to the effective symbol delay unit 2. The effective symbol delay unit 2 delays the complex data I + jQ by an effective symbol period corresponding to the mode counter initial value MI output from the microprocessor 8, and the Q axis inverter 3 outputs the imaginary part of the delayed complex data I ′ + jQ ′. And the inverted complex data I′-jQ ′ shown in FIG. 6B is output. Here, the inverted complex data I′-jQ ′ is delayed by the effective symbol period, and the rear part GP shown in FIG.
Guard interval 1 is located at the position (the same data as guard interval 1).

Next, the complex multiplier 4 multiplies the complex data I + jQ shown in FIG. 6A by the inverted complex data I'-jQ 'shown in FIG. It becomes the real part I ² + Q ^{2 and} is output as correlation data as shown in FIG.

The microprocessor 8 outputs a mode counter initial value MI corresponding to the known transmission mode to the symbol filter 5. Symbol filter 5
6C filters the correlation data shown in FIG. 6C in the symbol direction according to the mode counter initial value MI output from the microprocessor 8 to emphasize the guard interval portion, and shows as shown in FIG. 6D. The correlation data SF thus emphasized is output.

Next, the guard interval moving integrator 6
Is a waveform having a peak point at the center of the guard interval as shown in FIG. 6E as an output ID of the guard interval moving integrator 6 by integrating the correlation data SF shown in FIG. Is obtained. That is, if the delay amount of the effective symbol delay unit 2 matches the original effective symbol period of the OFDM signal OF and the time window of the guard interval moving integrator 6 corresponds to the original guard interval of the OFDM signal OF, As the output ID of the interval moving integrator 6, a waveform having a peak point at the center of the guard interval is obtained for each symbol period.

On the other hand, when the delay amount of the effective symbol delay
Although it matches the original effective symbol period of the FDM signal OF, the time window of the guard interval integrator 6 is OFDM.
If the signal OF does not correspond to the original guard interval, the output ID of the guard interval moving integrator 6 is:
As shown in FIG. 6F, the guard interval portion has a trapezoidal waveform.

If the original effective symbol period of the OFDM signal OF does not match the delay amount of the effective symbol delay unit 2, the output ID of the guard interval moving integrator 6
Is a waveform having a constant value without a peak point.

By the above operation, when the discriminator 7 detects a waveform having a peak point as shown in FIG. 6E as the waveform of the output ID of the moving integrator 6, the transmission mode and guard at that time are detected. The interval is set as a transmission mode and a guard interval of the input OFDM signal OF, and OF is selected from 12 combinations of three types of transmission modes and four types of guard intervals.
The transmission mode and guard interval of the DM signal OF are determined.

As described above, in this embodiment, when the transmission mode of a certain channel is known, the microprocessor 8 sets the mode counter initial value MI corresponding to this transmission mode to the effective symbol delay unit 2 and the symbol filter. 5, the effective symbol delay unit 2 and the symbol filter 5 first perform processing corresponding to a known transmission mode, and at this point, there is a high possibility that the transmission mode is determined. As a result, in the present embodiment, it is possible to determine the transmission mode in a short time without increasing the circuit scale.

Even if the mode counter initial value MI output first from the microprocessor 8 does not correspond to the original transmission mode of the OFDM signal, the discriminating process is automatically performed sequentially by the combination of the other transmission modes and the guard interval. Operation does not cause any problem in operation.

(Second Embodiment) Next, a second embodiment of the present invention will be described.
An OFDM demodulator according to the embodiment will be described. The configuration of the OFDM demodulator according to the second embodiment is similar to the configuration of the first embodiment shown in FIG.
This will be described below with reference to FIG.

In the second embodiment, the microprocessor 8 has a mode counter corresponding to a transmission mode having the shortest effective symbol period, for example, mode 1 in the case of ISDB-T (2k mode in the case of DVB-T). Initial value MI
Is output to the effective symbol delay unit 2 and the symbol filter 5 first. The effective symbol delay 2 and the symbol filter 5 first perform processing using the shortest effective symbol period according to the mode counter initial value MI output from the microprocessor 8. Other processes are the same as those of the first embodiment shown in FIG.

Next, the effect of shortening the determination processing time when the determination processing for the transmission mode having the shortest effective symbol period is performed first as described above will be described.

When the transmission mode is mode 1 and the guard interval is 1/32, the processing time of the effective symbol delay unit 2 is 252 μsec, and the processing time of the complex multiplier 4 is 252 μsec.
sec, the processing time of the symbol filter 5 is 2079 (=
8 × 252 × 33/32) μsec, and the processing time of the guard interval moving integrator 6 is 252 μsec. Therefore, the judgment required after the quadrature detection by the quadrature detector 1 to the integration by the guard interval moving integrator 6 The processing time is 2835 μsec. Similarly, when the transmission mode is mode 1 and the guard interval is 1/16, the determination processing time is 2898 μsec. When the transmission mode is mode 1 and the guard interval is 1/8, the determination processing time is 3024 μsec and the transmission mode is When the guard interval is 1/4 in mode 1, the determination processing time is 3276 μsec.

Therefore, when the transmission mode is mode 1, the maximum judgment processing time required to search all guard intervals is about 12 (= 2.835 + 2.8).
98 + 3.024 + 3.276) msec is required. Similarly, when the transmission mode is mode 2, the maximum determination processing time required to search all guard intervals is about 24 msec, and the transmission mode is mode 3
In this case, the maximum determination processing time required to search all guard intervals is about 48 msec. As a result, the maximum determination processing time for determining all transmission modes and guard intervals is about 84 msec.
become.

Here, when the transmission mode of the OFDM signal OF is mode 1, if the transmission mode is first set to mode 1 having the shortest effective symbol period and the processing of the effective symbol delay unit 2 and the symbol filter 5 is performed, The determination processing time is about 12 msec. On the other hand, when the transmission mode is first set to mode 3 having the longest effective symbol period and the processing of the effective symbol delay unit 2 and the symbol filter 5 is performed, the determination processing time is about 84 msec.

When the transmission mode of the OFDM signal OF is mode 3, the transmission mode determined first is set to mode 1 having the shortest effective symbol period, and the processing of the effective symbol delay unit 2 and the symbol filter 5 is performed. And the determination processing time is about 84 msec. On the other hand, when the transmission mode determined first is set to the mode 3 having the longest effective symbol period and the processing of the effective symbol delay unit 2 and the symbol filter 5 is performed, the determination processing time is about 48 msec.
c.

As described above, the judgment processing time is equal to the OFDM time.
When the transmission mode of the signal OF is mode 1, it is approximately 62 msec to set the transmission mode having the shortest effective symbol period.
c, the transmission mode of the OFDM signal OF is mode 3
In the case of, the transmission mode in which the effective symbol period is longest is shortened by about 36 msec. Therefore,
The time to be shortened is shorter by about 26 msec when the transmission mode with the shortest effective symbol period is set. Therefore, considering all the transmission modes, the judgment processing time is shorter with the transmission mode with the shortest effective symbol period set. Can be shortened.

As described above, in the present embodiment, the microprocessor 8 outputs the mode counter initial value MI corresponding to the transmission mode having the shortest effective symbol period to the effective symbol delay unit 2 and the symbol filter 5 first. ,
The effective symbol delay unit 2 and the symbol filter 5 perform processing according to the mode counter initial value MI. Therefore, the determination processing time of mode 1 (or 2k mode) having the shortest effective symbol period is particularly shortened, and the time required to comprehensively determine the transmission mode of the OFDM signal OF is reduced without increasing the circuit scale. be able to.

(Third Embodiment) Next, a third embodiment of the present invention will be described.
An OFDM demodulator according to the embodiment will be described with reference to the drawings. FIG. 7 is a block diagram showing a configuration of the OFDM demodulator according to the third embodiment of the present invention.

The difference between the OFDM demodulator shown in FIG. 7 and the OFDM demodulator shown in FIG.
Is fed back from the discriminator 7a to the microprocessor 8a, and a memory 9 connected to the microprocessor 8a is added. The other point is that the OF shown in FIG.
Since the configuration is the same as that of the DM demodulator, the same portions are denoted by the same reference numerals, and only different points will be described in detail below.

In the OFDM demodulator shown in FIG. 7, when a certain channel is first selected, the discriminator 7a discriminates the transmission mode of the OFDM signal OF transmitted by that channel and sets the discriminated transmission mode to the mode. Discrimination signal M
D is output to the microprocessor 8a. The microprocessor 8a records the transmission mode notified by the input mode determination signal MD in the memory 9 in association with the selected channel.

Thereafter, when the channel selected once is selected again, the microprocessor 8a sets the memory 9
Read the transmission mode of that channel recorded in
The mode counter initial value MI corresponding to the read transmission mode is set to the effective symbol delay unit 2 and the symbol filter 5.
Output to Other processes are the same as those of the first embodiment shown in FIG.

The determination of the transmission mode of the channel and the recording thereof may be performed each time a channel is selected, or may be collectively performed at the time of a channel search for determining which channel can be received. May be performed. When the transmission mode of the channel in the middle is changed, the new transmission mode determined by the determination processing is recorded in the memory 9.

In the present embodiment, the Q axis inverter 3, the complex multiplier 4, the symbol filter 5, the guard interval moving integrator 6, and the discriminator 7a correspond to discriminating means, and the microprocessor 8a corresponds to controlling means. . The memory 9 corresponds to a storage unit, and the other points are the same as those of the first embodiment.

As described above, in the present embodiment, the memory 9 records the transmission mode of the already selected channel,
The microprocessor 8a outputs the mode counter initial value MI corresponding to the transmission mode stored in the memory 9 to the effective symbol delay unit 2 and the symbol filter 5 when the channel is received next, and outputs the effective symbol delay. The device 2 and the symbol filter 5 perform processing according to the mode counter initial value MI. Therefore, O
The transmission mode of the FDM signal OF can be determined from the transmission mode that is very likely to be the transmission mode, and the time required to determine the transmission mode of the OFDM signal OF can be reduced without increasing the circuit scale.

Note that even if the transmission mode of a channel in the middle is changed and the mode counter initial value MI output first from the microprocessor 8a does not correspond to the original transmission mode of the OFDM signal, the transmission mode is not changed to the other transmission mode. Since the discriminating process is automatically performed sequentially in combination with the guard interval, no operational problem occurs.

(Fourth Embodiment) Next, a fourth embodiment of the present invention will be described.
An OFDM demodulator according to the embodiment will be described with reference to the drawings. FIG. 8 is a block diagram illustrating a configuration of an OFDM demodulator according to a fourth embodiment of the present invention.

The difference between the OFDM demodulator shown in FIG. 8 and the OFDM demodulator shown in FIG. 1 is that the microprocessor 8b further includes a guard interval counter initial value G
I is output to the symbol filter 5a and the guard interval moving integrator 6a, and the other points are the same as those of the OFDM demodulator shown in FIG. Will be described.

In the OFDM demodulator shown in FIG. 8, the microprocessor 8b outputs the mode counter initial value MI to the effective symbol delay unit 2 and the symbol filter 5a, and also outputs the guard interval counter initial value corresponding to the guard interval determined first. The value GI is converted to a symbol filter 5a and a guard interval moving integrator 6a.
Output to

Next, the symbol filter 5a shown in FIG. 8 will be described in more detail. FIG. 9 is a block diagram showing a configuration of the symbol filter 5a shown in FIG. FIG.
3 is different from the symbol filter 5 shown in FIG. 3 in that the 8-symbol delay unit 54a operates according to the guard interval counter initial value GI, and the other points are the symbol filters shown in FIG. Filter 5
Therefore, the same reference numerals are given to the same parts, and only different points will be described in detail below.

As shown in FIG. 8, an 8-symbol delay unit 54
a indicates that the output of the adder 53 is 8 in accordance with the mode counter initial value MI and the guard interval counter initial value GI.
The signal is delayed by the symbol and output to the amplifier 52. The 8-symbol delay unit 54a determines that the transmission mode and the guard interval have been determined and the transmission mode and the guard interval have been determined based on the mode determination signal MF and the guard interval determination signal GF output from the discriminator 7, and Stop operation.

Next, the 8-symbol delay unit 54a shown in FIG.
Will be described in more detail. FIG. 10 is a block diagram showing a configuration of the 8-symbol delay unit 54a shown in FIG. The difference between the 8-symbol delay unit 54a shown in FIG. 10 and the 8-symbol delay unit 54 shown in FIG. 4 is that the counter 57 is changed to a counter 57a to which a guard interval counter initial value GI is also input. The point is Fig. 4
Are the same as those of the 8-symbol delay unit 54 shown in FIG.

The counter 57a outputs "0", "1", "
While circulating 2 "and" 3 "in this order, each value is output to the switch 58. When the guard interval counter initial value GI output from the microprocessor 8 is" 0 ", that is, the guard interval determined first. Is 1 /
In the case of 32, "0", "1", "2", "3" are output in this order, and the guard interval counter initial value GI is "1".
In other words, if the guard interval to be determined first is 1/16, the data is output in the order of "1", "2", "3", "0", and the guard interval counter initial value GI is "1".
2 ", that is, when the guard interval to be determined first is 1/8, the guard interval counter initial value GI is output in the order of" 2 "," 3 "," 0 "," 1 ".
Is "3", that is, when the guard interval to be determined first is 1/4, "3", "0", "1", "
2 ". When the guard interval determination signal GF output from the discriminator 7 indicates that the guard interval determination is completed and the guard interval is determined, the counter 57a stops its operation.

The counter 55 includes a microprocessor 8b
And the counter 57a sequentially counts up using the guard interval counter initial value GI output from the microprocessor 8b as an initial value. Therefore, the switch 56 and the switch 58
Is switched by the counter 55 and the counter 57a so that the input data is delayed by 8 symbol periods (8 effective symbol periods + 8 guard interval periods) corresponding to each transmission mode and each guard interval.

For example, if it is known that the transmission mode of the selected channel is mode 1 and the guard interval is 1/32, the microprocessor 8b first sets the mode counter initial value MI to "0". The guard interval counter initial value GI is set to "0", the switch 56 outputs a 16384 data delay output DS50, and the switch 58 outputs a 512 data delay output DS54.
Is output.

Next, the guard interval moving integrator 6a shown in FIG. 8 will be described in more detail. FIG.
FIG. 9 is a block diagram showing a configuration of a guard interval moving integrator 6a shown in FIG. The difference between the guard interval moving integrator 6a shown in FIG. 11 and the guard interval moving integrator 6 shown in FIG. 5 is that the counter 61 has a counter 61a to which the guard interval counter initial value GI is also input.
Since the other points are the same as those of the guard interval moving integrator 6 shown in FIG. 5, the same parts are denoted by the same reference numerals, and only different points will be described in detail below.

The counter 61a has "0", "1", "
While circulating 2 "and" 3 "in this order, each value is outputted to the switch controller 62, and the guard interval counter initial value GI outputted from the microprocessor 8b becomes" 1 ".
In the case of "0", that is, when the guard interval to be determined first is 1/32, "0", "1", "2", "3"
, And the guard interval counter initial value GI
Is "1", that is, when the guard interval to be determined first is 1/16, "1", "2", "3", "
0 ", and when the guard interval counter initial value GI is" 2 ", that is, when the guard interval to be determined first is 1/8," 2 "," 3 ",""
0 "and" 1 "are output in this order, and when the guard interval counter initial value GI is" 3 ", that is, when the guard interval to be determined first is 1/4," 3 "," 3 "
When the guard interval determination signal GF output from the discriminator 7 indicates that the guard interval has been determined and the guard interval has been determined, the counter 61a outputs the counter 61a. Stop the operation.

By the above operation, in the guard interval moving integrator 6a, the counter 61a counts up using the guard interval counter initial value GI as an initial value, and sequentially sets the guard interval corresponding to the guard interval counter initial value GI to each guard interval. While the time window changes accordingly and the time window moves, the correlation data SF of the symbol filter 5a within the time window is integrated.

In this embodiment, the Q-axis inverter 3, the complex multiplier 4, the symbol filter 5a, the guard interval moving integrator 6a and the discriminator 7 correspond to discriminating means, and the microprocessor 8b corresponds to control means. . Further, the symbol filter 5a corresponds to a filtering unit, and the other points are the same as in the first embodiment.

Next, the microprocessor 8b shown in FIG.
Will be described in detail. As mentioned above,
The transmission mode and guard interval of an OFDM signal OF transmitted by a channel used for broadcasting in a certain area are often fixed, and if the transmission mode and the guard interval are fixed once, they change in the middle. It is expected that this is unlikely.

In view of the above, the microprocessor 8b
Outputs the mode counter initial value MI corresponding to this transmission mode to the effective symbol delay unit 2 and the symbol filter 5a when the transmission mode and guard interval of a certain channel are known, and outputs the guard interval counter corresponding to this guard interval. The initial value GI is output to the symbol filter 5a and the guard interval moving integrator 6a. Effective symbol delay 2, symbol filter 5a and guard interval moving integrator 6a
Performs processing corresponding to the known transmission mode and guard interval first, and at this point, it is highly possible that the determination of the transmission mode and guard interval ends. As a result, in the present embodiment, it is possible to determine the transmission mode and the guard interval in a short time without increasing the circuit scale.

Even when the mode counter initial value MI and the guard interval counter initial value GI first output from the microprocessor 8b do not correspond to the original transmission mode and guard interval of the OFDM signal, the other transmission modes and guard interval are not used. Since the discriminating process is automatically performed sequentially in combination with the interval, no operational problem occurs.

(Fifth Embodiment) Next, a fifth embodiment of the present invention will be described.
An OFDM demodulator according to the embodiment will be described with reference to the drawings. FIG. 12 is a block diagram illustrating a configuration of an OFDM demodulator according to a fifth embodiment of the present invention.

The difference between the OFDM demodulator shown in FIG. 12 and the OFDM demodulator shown in FIG.
D and the guard interval discrimination signal GD are supplied to the discriminator 7b.
And a memory 9 connected to the microprocessor 8c is added. The other points are the same as those of the OFDM demodulator shown in FIG. Hereinafter, only different points will be described in detail.

In the OFDM demodulator shown in FIG. 12, when a certain channel is first selected, the discriminator 7b discriminates the transmission mode and guard interval of the OFDM signal OF transmitted by that channel, and determines the discriminated transmission. The mode and guard interval are determined by the mode discrimination signal M.
D and a guard interval determination signal GD are output to the microprocessor 8c. Microprocessor 8c
Records the transmission mode and the guard interval notified by the input mode discrimination signal MD and guard interval discrimination signal GD in the memory 9 in association with the selected channel.

Thereafter, when the channel selected once is selected again, the microprocessor 8c sets the memory 9
, The transmission mode and guard interval of the channel recorded in the effective symbol delay unit 2 are read from the mode counter initial value MI corresponding to the read transmission mode.
And outputs the guard interval counter initial value GI corresponding to the read guard interval to the symbol filter 5a and the guard interval moving integrator 6a. Other processes are the same as those of the fourth embodiment shown in FIG.

The determination of the transmission mode and guard interval of the channel and the recording thereof may be performed each time a channel is selected, or the channel search for determining which channel can be received is performed. It may be performed collectively at times. When the transmission mode and the guard interval of the channel in the middle are changed, the new transmission mode and the guard interval determined by the determination processing are recorded in the memory 9.

In the present embodiment, the Q axis inverter 3, the complex multiplier 4, the symbol filter 5a, the guard interval moving integrator 6a and the discriminator 7b correspond to discriminating means, and the microprocessor 8c corresponds to control means. . The memory 9 corresponds to a storage unit, and the other points are the same as those of the fourth embodiment.

As described above, in the present embodiment, the memory 9 records the transmission mode and the guard interval of the already selected channel, and the microprocessor 8c
Next, when the channel is received, the mode counter initial value MI corresponding to the transmission mode and the guard interval counter initial value GI corresponding to the guard interval stored in the memory 9 are stored in the effective symbol delay unit 2,
Output to the symbol filter 5a and the guard interval moving integrator 6a, the effective symbol delay unit 2, the symbol filter 5a and the guard interval moving integrator 6a
Performs a process according to the mode counter initial value MI and the guard interval counter initial value GI. Therefore, it is possible to determine the transmission mode and the guard interval of the OFDM signal OF which are very likely as the transmission mode and the guard interval, and to determine the transmission mode and the guard interval of the OFDM signal OF without increasing the circuit scale. It is possible to shorten the time required to perform.

The transmission mode and guard interval of the channel in the middle are changed, and the mode counter initial value M output first from the microprocessor 8c is changed.
I and the guard interval counter initial value GI are OF
Even in the case where the DM signal does not correspond to the original transmission mode and the guard interval, the discrimination processing is automatically performed sequentially according to the combination of the other transmission modes and the guard interval, so that there is no operational problem.

[0130]

According to the OFDM demodulator according to the present invention, since the control means controls the amount of delay of the effective symbol delay means, the effective symbol period of the transmission mode which is highly possible as the transmission mode of the modulated signal is reduced. This makes it possible to determine the transmission mode of the modulated signal in a short time, and not to determine a plurality of transmission modes at the same time, but to sequentially determine using an effective symbol period according to an instruction. Therefore, the circuit scale can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an OFDM demodulator according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of an effective symbol delay unit shown in FIG. 1;

FIG. 3 is a block diagram showing a configuration of a symbol filter shown in FIG. 1;

FIG. 4 is a block diagram showing a configuration of an 8-symbol delay unit shown in FIG. 3;

FIG. 5 is a block diagram showing a configuration of a guard interval moving integrator shown in FIG. 1;

FIG. 6 is a diagram showing an example of output waveforms of each unit for explaining a determination operation of the OFDM demodulation device shown in FIG.

FIG. 7 is a block diagram showing a configuration of an OFDM demodulator according to a third embodiment of the present invention.

FIG. 8 is a block diagram showing a configuration of an OFDM demodulator according to a fourth embodiment of the present invention.

FIG. 9 is a block diagram showing a configuration of a symbol filter shown in FIG. 8;

FIG. 10 is a block diagram showing a configuration of an 8-symbol delay unit shown in FIG. 9;

11 is a block diagram showing a configuration of a guard interval moving integrator shown in FIG.

FIG. 12 is a block diagram showing a configuration of an OFDM demodulator according to a fifth embodiment of the present invention.

FIG. 13 is a block diagram showing a basic configuration of a conventional OFDM modulator.

FIG. 14 is a diagram showing a mapping example used in the conventional OFDM modulator shown in FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Quadrature detector 2 Effective symbol delay device 3 Q axis inverter 4 Complex multiplier 5, 5a Symbol filter 6, 6a Guard interval moving integrator 7, 7a, 7b Discriminator 8, 8a, 8b, 8c Microprocessor 9 Memory D21 To D24, D50 to D59, D61 to D66 Delay device 21, 55, 57, 57a, 61, 61a Counter 22, 56, 58 Switching device 54, 54a 8 symbol delay device 51, 52 Amplifier 53, 63 to 68 Adder 62 Switch controller SW1 to SW3 switch

Claims (12)

[Claims] 1. An OFDM demodulator for demodulating a modulation signal that has been subjected to orthogonal frequency multiplex modulation according to a predetermined transmission mode from among a plurality of transmission modes, and outputs complex data by performing quadrature detection on the modulation signal. Quadrature detection means, effective symbol delay means for delaying complex data output from the quadrature detection means by an effective symbol period determined for each transmission mode to output delayed complex data, and output from the quadrature detection means Discriminating means for discriminating the transmission mode of the modulated signal using complex data output from the effective symbol delay means and the delayed complex data output from the effective symbol delay means; and Control means for controlling an effective symbol delay means. 2. The apparatus according to claim 1, further comprising a storage unit configured to store the transmission mode determined by the determination unit in association with a channel through which the modulated signal is transmitted, wherein the control unit corresponds to a channel through which the modulated signal is transmitted. 2. The OFDM according to claim 1, wherein the effective symbol delay means is read so as to delay the complex data by an effective symbol period corresponding to the read transmission mode.
Demodulator. 3. The control means controls the effective symbol delay means such that the complex data is first delayed by an effective symbol period corresponding to a transmission mode having the shortest effective symbol period among the plurality of transmission modes. The OFDM demodulator according to claim 1, wherein: 4. The effective symbol delay means sequentially delays the complex data by an effective symbol period corresponding to each transmission mode in accordance with a predetermined cyclic order, and the control means comprises: an effective symbol period to be delayed first. The OFD according to any one of claims 1 to 3, wherein the effective symbol delay means is controlled by instructing the effective symbol delay means of a transmission mode corresponding to the following.
M demodulator. 5. The modulation signal according to claim 1, wherein the modulation signal is a modulation signal in which a signal at a rear part of an effective symbol period is added to a front part of an effective symbol period according to a predetermined guard interval from a plurality of guard intervals. Further comprises integrating means for integrating correlation data created from the complex data output from the quadrature detection means and the delayed complex data output from the effective symbol delay means using a time window corresponding to a guard interval. The determination unit determines a transmission mode and a guard interval of the modulated signal from an integration result of the integration unit, and the control unit performs integration using a time window corresponding to the guard interval according to the instruction. The OFDM demodulator according to any one of claims 1 to 4, wherein the integrating means is controlled. 6. The discrimination means according to claim 6, wherein the modulated signal is a modulated signal in which a signal at the rear of an effective symbol period is added to a front of an effective symbol period according to a predetermined guard interval from a plurality of guard intervals. Further comprises integrating means for integrating correlation data created from the complex data output from the quadrature detection means and the delayed complex data output from the effective symbol delay means using a time window corresponding to a guard interval. The discrimination means discriminates a transmission mode and a guard interval of the modulation signal from an integration result of the integration means, and the storage means determines a guard interval determined by the discrimination means for a channel through which the modulation signal is transmitted. The control means is configured to control a channel corresponding to a channel through which the modulated signal is transmitted. It reads the de interval from the storage unit, OFDM demodulation apparatus according to claim 2, wherein the controller controls the integration means so as to perform integration by using a time window corresponding to the read guard interval. 7. The integration means sequentially performs integration using a time window corresponding to each guard interval in accordance with a predetermined order that circulates, and the control means performs a guard interval corresponding to a time window used first. 7. The OFDM demodulator according to claim 5, wherein the integration means is controlled by instructing the integration means. 8. The discriminating means according to an effective symbol period and a guard interval, generates correlation data created from complex data output from the quadrature detection means and delayed complex data output from the effective symbol delay means. A filtering unit that outputs correlation data in which a portion corresponding to a guard interval is emphasized by filtering; the integration unit integrates the correlation data output from the filtering unit; and the control unit responds to an instruction. The OFDM demodulator according to any one of claims 5 to 7, wherein the filtering unit is controlled so as to perform filtering according to an effective symbol period and a guard interval to be performed. 9. The discriminating means according to an effective symbol period and a guard interval, generates correlation data created from complex data output from the quadrature detection means and delayed complex data output from the effective symbol delay means. A filtering unit that outputs correlation data in which a portion corresponding to a guard interval is enhanced by filtering; the integration unit integrates the correlation data output from the filtering unit; and the control unit outputs the modulation signal. Reading out a transmission mode and a guard interval corresponding to a channel in which is transmitted from the storage unit, and controlling the filtering unit so as to perform filtering according to an effective symbol period and a guard interval corresponding to the read transmission mode. Toss OFDM demodulation apparatus according to claim 6. 10. The discrimination means filters correlation data generated from complex data output from the quadrature detection means and delayed complex data output from the effective symbol delay means according to an effective symbol period. Further comprising a filtering unit that outputs correlation data in which a portion corresponding to the guard interval is emphasized, wherein the control unit first sets an effective symbol period corresponding to a shortest effective symbol period among the plurality of transmission modes to an effective symbol period. 2. The apparatus according to claim 1, wherein the filtering unit controls the filtering so as to perform the filtering in accordance with the condition.
8. The OFDM demodulator according to any one of claims 1 to 7. 11. The filtering unit performs filtering according to an effective symbol period corresponding to each transmission mode in accordance with a predetermined order that circulates, and the control unit performs a filtering according to an effective symbol period used first. The OFDM demodulator according to any one of claims 8 to 10, wherein the filtering means is controlled by instructing the filtering means. 12. The imaginary part inverting means for inverting the sign of the imaginary part of the delayed complex data output from the effective symbol delaying means, the complex data output from the quadrature detection means and the imaginary part. 12. The OFDM demodulator according to claim 1, further comprising: multiplication means for multiplying the complex data with the sign of the imaginary part inverted by the inversion means and outputting correlation data.