JP2001028733A - Recording and reproducing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate disturbance of a reproduced video image when a reproduction mode in a VAUX(video AUX) data is changed. SOLUTION: In the case of reproduction, a reproduction circuit 9 applies waveform equalization to input reproduction data and recovers a data clock, a channel decoder 10 conduct recording demodulation processing and an error correction circuit 11 conducts error correction processing. A demultiplexer 12 extracts VAUX data from reproduced data and sends the data to a signal processing microcomputer 8. The VAUX data are left being added to the reproduction data. A de-framing circuit 13 disassembles the reproduction data into frames, a data compression decoding circuit 14 applies processing such as decoding, inverse quantization and inverse DCT for a variable length code and the result is deshuffled and outputted by using a shuffling memory 2. A VAUX data extract/mode control circuit 15 controls the reproduction mode of the data compression decoding circuit 14. A signal processing microcomputer 8 processes the extracted VAUX data and a mode processing microcomputer 7 controls the reproduction mode of the entire circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal apparatus for recording / reproducing a digital video signal, and to a mode control apparatus for detecting a mode change of a reproduced signal when reproducing a digital signal. It is.

[0002]

2. Description of the Related Art In recent years, with the development of digital signal processing technology, devices for recording and reproducing digital data obtained by encoding video signals and the like with high efficiency have become widespread. In this recording / reproducing apparatus, in order to improve the usability of digital data, video AUX data (hereinafter, referred to as "VAUX data") such as a broadcasting system, a recording mode, a recording date, a recording time, minute, second and the like are added at the time of recording. ing. JP-A-9-186968
Japanese Patent Application Laid-Open Publication No. H11-15064 proposes a method in which the VAUX data is added to video digital data at the time of recording, and at the time of reproduction, the VAUX data is detected from the reproduction data to perform reproduction mode control.

FIG. 5 is a block diagram showing the configuration of the recording / reproducing apparatus described in the above publication. In the figure, 1 is a data compression encoding circuit, 2 is a shuffling memory, 3 is a framing circuit, 4 is a multiplexer (MUX), 5
Is an error correction code adding circuit, 6 is a channel encoder, 7
Is a mode processing microcomputer, 8 is a signal processing microcomputer, 9 is a reproduction circuit, 10 is a channel decoder, 11 is an error correction circuit, 12 is a demultiplexer (DMUX), 13 is a deframing circuit, and 14 is a data compression / decoding circuit. .

[0004] The operation of the conventional recording / reproducing apparatus will be described below. First, during recording, the input digital video signal is
The data compression encoding circuit 1 performs shuffling by using the shuffling memory 2, and performs DCT (discrete cosine transform),
Data compression encoding processing such as quantization and variable length encoding is performed, and the framing circuit 3 forms a frame. The mode processing microcomputer 7 generates an information signal such as a TV channel of a video signal and a recording date and time based on a user operation or the like, and generates VAUX data created by the signal processing microcomputer 8,
The framed data is combined by the multiplexer 4, the error correction code is added by the error correction code adding circuit 5, recording modulation processing is performed by the channel encoder 6, and output to the recording amplifier.

Next, at the time of reproduction, the input reproduction data is subjected to waveform equalization and data clock reproduction by the reproduction circuit 9, recording and demodulation processing by the channel decoder 10, and the error correction circuit 1.
In step 1, error correction is performed. And demultiplexer 1
In step 2, VAUX data is extracted from the reproduced data and sent to the signal processing microcomputer 8. The reproduced data is decomposed into frames by a deframing circuit 13, subjected to processing such as decoding of a variable-length code, inverse quantization, and inverse DCT by a data compression / decoding circuit 14, and deshuffling using a shuffling memory 2. Is output. The extracted VAUX data is processed by the signal processing microcomputer 8 and the mode processing microcomputer 7 controls the reproduction mode. In this way, at the time of recording, VAUX data is added to the video digital data, and at the time of reproduction, the VAUX data extracted from the reproduced data is processed by the microcomputer, and mode control can be performed.

[0006]

However, at the time of reproduction, since the reproduction mode of the data compression / decoding circuit 14 is processed by the microcomputer in response to the change of the reproduction mode added to the reproduction data, the mode change is determined. A time lag occurs. FIG. 6 is a diagram showing the transition of the reproduction mode change in the conventional recording / reproduction device shown in FIG.

As shown in the figure, the VAUX data extracted from the reproduced data is determined by the signal processing microcomputer 8 in the next frame, so that it is delayed by one frame from the mode change of the reproduced data. Then, the next frame is transferred from the signal processing microcomputer 8 and the mode is determined by the mode processing microcomputer 7, and it is further delayed by one frame. Then, the mode output from the mode processing microcomputer 7 becomes valid in the data compression / decoding circuit 14 for the next frame. Therefore, the data compression / decoding is performed three frames later than the mode change of the reproduction data in total. The mode of the circuit 14 changes.

However, the deshuffling process performed by the data compression / decoding circuit 14 is performed in such a manner that the reproduced data is once written in the shuffling memory 2 and the reproduced data is read out in a different order from the writing. Data is delayed by one frame. Therefore, the time lag between the mode change of the reproduction data and the mode change of the data compression / decoding circuit is three frames before and after the deshuffling (when writing to the shuffling memory 2) and after deshuffling (when reading from the shuffling memory 2). The playback data has two frames. During this time lag, the playback mode of the playback data and the playback mode of the data compression / decoding circuit 14 are different, and the playback video is disturbed. An example is shown below.

FIG. 7 is a diagram showing a field configuration on an interlaced screen. The video data is usually displayed in the position shown in the figure on the screen in the frame reproduction mode in the order of the first field and the second field to form one screen (frame). As described above, in the frame reproduction mode, data of each field is alternately read from the shuffling memory 2 as follows. 1st → 2n
d → 1st → 2nd → 1st → 2nd

However, when a normally recorded moving image is played back in slow motion, the same image data is displayed in a plurality of frames. However, since there is a movement between the images in the first field and the second field, the video is not played back during the playback. The blur will occur. In order to avoid this, at the time of slow reproduction, a field reproduction mode is used in which the data of the first field or the second field is read twice from the shuffling memory 2 and displayed at both positions of the first field and the second field on the screen. How to do
A method of averaging the data of the first field and the second field is performed.

In the case of using the field reproduction mode, when transitioning from the normal reproduction to the slow reproduction, the reproduction mode changes from the frame reproduction mode to the first field reproduction mode or from the frame reproduction mode to the second field reproduction mode. In this case, writing of data to the shuffling memory 2 is the same in the frame reproduction mode and the field reproduction mode,
The reading of the data of each field from is as follows. 1st → 2nd → 1st → 1st → 1st → 1st 1st → 2nd → 2nd → 2nd → 2nd → 2nd

Here, when a normally recorded moving picture image is slow-played by a user operation, as shown in FIG. 6, slow playback by a user operation is processed by the mode processing microcomputer 7 to determine the mode. Since the slow reproduction video data is transmitted according to the mode, the video data and the reproduction mode (frame reproduction / field reproduction) of the data compression / decoding circuit can be easily matched.

However, there is a case where the mode changes to slow reproduction on the reproduction data side instead of the user operation. As an example, there is a case where reproduction data is transmitted by IEEE 1394 communication. In this case, when the moving picture video normally recorded by the recording / reproducing apparatus on the transmission side is played back in slow motion, the data of the slow playback is written in VAUX data so that the slow playback can be distinguished and sent to the recording / playback apparatus on the receiving side. come. However, in the conventional recording / reproducing apparatus, even if the reproduction data changes to slow reproduction, the video is disturbed (blurred) due to the time lag until the switching from the frame reproduction mode to the field reproduction mode. As described above, since the writing of data to the shuffling memory 2 is the same between the frame reproduction mode and the field reproduction mode, the reproduction mode at the time of reading from the shuffling memory 2 affects the time lag. , Two frames, and the video is disturbed for two frames.

Therefore, it is necessary to eliminate the time lag in order to eliminate the disturbance of the reproduced image when the reproduction mode in the VAUX data changes.

[0015]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a VAUX immediately before a data compression / decoding circuit.
Means for extracting data, means for determining a reproduction mode from the extracted VAUX data, and means for directly controlling the reproduction mode of the data compression / decoding circuit directly without using a mode processing microcomputer, and performing data compression / decoding with the extracted VAUX data The present invention realizes a recording / reproducing apparatus in which a decoding circuit is directly controlled to reduce a time lag between a change in a reproduction mode of reproduction data and a change in a reproduction mode of a data compression / decoding circuit.

According to a first aspect of the present invention, in a recording / reproducing apparatus for recording / reproducing a video digital signal, a detecting means for extracting VAUX data from the reproduced video digital signal;
Determining means for determining a reproduction mode from the extracted VAUX data; data compression / decoding means for compressing and decoding the reproduced video digital signal while deshuffling using a shuffling memory; and controlling the reproduction mode of the data compression / decoding means. Control means, wherein when the detection means detects a change in the reproduction mode, the determination means determines the reproduction mode, and the control means directly controls the reproduction mode of the data compression / decoding means, thereby providing the reproduced data. The time lag between the mode change and the mode change of the data compression / decoding means is reduced, and the disturbance of the reproduced video when the reproduction mode is changed is suppressed.

According to a second aspect of the present invention, there is provided the recording / reproducing apparatus according to the first aspect, wherein the shuffling memory for reproducing data is used during the deshuffling before and after the detection means detects a change in the reproduction mode. If the writing format to the memory is the same and the reading format from the shuffling memory is different, the reproduction data written to the shuffling memory in the reproduction mode before the change is read out from the shuffling memory in the reproduction mode after the change. By doing so, the time lag between the mode change of the playback data and the mode change of the data compression / decoding means is eliminated, and the disturbance of the playback video when the playback mode changes is suppressed.

[0018]

FIG. 1 is a block diagram showing an embodiment of a recording / reproducing apparatus according to the present invention. In FIG.
Is a VAUX data extraction / mode control circuit. The other configuration is the same as that of the conventional recording / reproducing apparatus shown in FIG. 5, and the same components are denoted by the same reference numerals.

The operation of this embodiment will be described below. First, at the time of recording, an input digital video signal is shuffled by a data compression encoding circuit 1 using a shuffling memory 2, and data compression encoding such as DCT (discrete cosine transform), quantization, and variable length encoding is performed. Processing is performed, and a frame is formed by the framing circuit 3. The mode processing microcomputer 7 generates an information signal such as a TV channel of a video signal and a recording date and time based on a user operation or the like. The VAUX data created by the signal processing microcomputer 8 and the framed data described above are combined. The signal is synthesized by the multiplexer 4, the error correction code is added by the error correction code adding circuit 5, the recording modulation is performed by the channel encoder 6, and the result is output to the recording amplifier.

Next, at the time of reproduction, the input reproduction data is subjected to waveform equalization and data clock reproduction by the reproduction circuit 9, recording and demodulation processing by the channel decoder 10, and the error correction circuit 1.
In step 1, error correction is performed. And demultiplexer 1
In step 2, VAUX data is extracted from the reproduced data and sent to the signal processing microcomputer 8. Here, the playback data includes VAUX
Leave the data attached. The reproduced data is decomposed into frames by a deframing circuit 13, subjected to processing such as decoding of a variable-length code, inverse quantization, and inverse DCT by a data compression / decoding circuit 14, and deshuffled using a shuffling memory 2 and output. Is done. At this time, the reproduction mode of the data compression / decoding circuit 14 is controlled by the VAUX data extraction / mode control circuit 15. The extracted VAUX data is processed by the signal processing microcomputer 8, and the mode processing microcomputer 7 controls the reproduction mode of the entire circuit. The above is the outline of the operation of the embodiment of the present invention in which the data compression / decoding circuit is directly controlled by the extracted VAUX data. The operation of the VAUX data extraction / mode control circuit 15 which is a feature of the present invention will be further described. explain in detail.

FIG. 2 is a configuration diagram of one track of video data to which an error correction code and VAUX data are added. In the figure, 21 is a sink, 22 is an ID, 2
3 is video data, 24 is VAUX data, 25 is VAU
The remainder of the X data, 26 is a pack header, 27 is pack data, 28 is inner parity, and 29 is outer parity.

As shown in the figure, the VAUX data 24 is
One track is divided into three sinks 21. 5 packs are separated from the beginning, and 15 packs are secured per sink 21. The remaining 25 bytes of VAUX data are not used. Therefore, the VAUX data 24 is composed of 45 packs per track. VAUX data 2
The first byte of the 5 bytes of 4 is the pack header 26
And each pack has a unique value. And
Various pack data 27 are stored in the remaining four bytes. The VAUX data 24 has six packs as a main area. However, in an even-numbered track including 0 in one video frame, 39 to 44 (VAUX data 24
Middle), but in the next odd-numbered track, 0-5 (VAU
X data 24) is the main area. In this main area, a source pack in which information such as a television broadcasting system and a television channel is recorded, a source control pack in which information such as a copyright bit and a recording mode are recorded, a recording date pack, and a recording time A second pack etc. are stored. The contents of the main area are basically the same within one video frame.

As described above, as an embodiment of a method of extracting VAUX data, in an even-numbered track, 3
It can be easily performed from the sync including the packs 9 to 44 and, in the odd-numbered tracks, from the sync including the packs 0 to 5 by detecting the pack header of the pack in which the target data is recorded. Here, examples of the VAUX data related to the reproduction mode include a source pack including information on a broadcast system and a recording system, and a source control pack including information on a trick mode and the like. The information regarding the change in the frame reproduction / field reproduction mode when the mode is changed to the slow reproduction on the reproduction data side exemplified in the description is included in the source control pack. Therefore, the VAUX data is extracted using the pack header 61h of the source control pack as a guide.

FIG. 3 shows a data structure diagram of the source control pack. In the figure, 26 is a pack header,
27 is pack data. The details of the pack data 27 of this pack are shown below. PC1 CGMS: Copy generation management system COPY INPUT: Input source recording method COPY GEN: Copy generation SS: Source and recording status PC2 REC ST: Recording start point REC MODE: Recording mode (original / insert etc.) DISP: Display selection PC3 FF FF: Frame / field reproduction flag FS: 1st / 2nd field flag FC: Frame change flag IL: Interlace flag ST: Still image flag SC: Still camera image flag BCSYS: Broadcasting system PC4 GENRE CATEGORY: Genre classification

Among them, when the mode changes from the normal reproduction to the slow reproduction on the reproduction data side, the FF indicates the change from the frame reproduction mode to the field reproduction mode. Therefore, the data of the FF is extracted to control the frame / field reproduction mode of the data compression / decoding circuit. Here, in order to faithfully follow the reproduction data side, it is necessary to see also the 1st / 2nd field flag indicated by FS. However, in order to eliminate the disturbance of the reproduction video, it is only necessary to control the frame / field reproduction mode with the FF at least. .

As an embodiment of the method of determining the reproduction mode, the contents of the main area are basically the same in one video frame, but the reading may not be possible due to errors such as scratches on the tape. The method uses the last data in one video frame detected in the above, or the method of selecting data by majority decision from the data of each track.

FIG. 4 is a diagram showing the transition of the reproduction mode change in the recording / reproduction device according to the present invention. As shown in this figure, VAUX data extracted from the reproduction data is VUX data.
The AUX data extraction / mode control circuit 15 determines during the same frame. Since the mode output from the VAUX data extraction / mode control circuit 15 becomes valid in the data compression / decoding circuit 14 for the next frame, the data compression / decoding is delayed by one frame from the mode change of the reproduction data. The mode of the circuit 14 changes.

However, since the reproduced data is delayed by one frame due to the deshuffling process, the time lag between the change in the mode of the reproduced data and the mode change of the data compression / decoding circuit 14 is such that the reproduced data before the deshuffling (when writing to the shuffling memory 2) is The reproduced data of one frame after deshuffling (when reading from the shuffling memory 2) has no time lag.

As described above, in the frame reproduction mode and the field reproduction mode, since the data writing to the shuffling memory 2 is the same, the reproduction mode at the time of reading from the shuffling memory 2 is affected. In this case, there is no time lag. Therefore, in the conventional recording / reproducing apparatus, when there is a change in the reproducing mode from the frame reproducing mode to the field reproducing mode, the disturbance of the video generated during the time lag of two frames is caused by the recording / reproducing of the embodiment of the present invention. In the device, there is no time lag, so no disturbance occurs.

As described above, when there is a change in the reproduction mode during the reproduction, the mode is quickly changed to suppress the disturbance of the reproduced image.

[0031]

According to the present invention, since the change of the reproduction mode is detected and the mode control of the data compression / decoding circuit is promptly performed, the disturbance of the reproduced video at the time of the change of the reproduction mode can be suppressed. It is possible to realize a recording / reproducing apparatus with improved image quality when the reproducing mode is changed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of a recording / reproducing apparatus of the present invention.

FIG. 2 is a diagram showing a configuration of video data.

FIG. 3 is a diagram showing a data configuration of a source control pack.

FIG. 4 is a diagram showing a change in a reproduction mode change in the recording / reproduction device of the present invention.

FIG. 5 is a block diagram showing a conventional recording / reproducing apparatus.

FIG. 6 is a diagram showing a transition of a reproduction mode change in a conventional recording / reproduction device.

FIG. 7 is a diagram showing a field configuration on a screen.

[Explanation of symbols]

1. Data compression encoding circuit 2. Shuffling memory
3 framing circuit, 4 multiplexor (MU)
X), 5: error correction code adding circuit, 6: channel encoder, 7: mode processing microcomputer, 8: signal processing microcomputer, 9: reproduction circuit, 10: channel decoder, 11: error correction circuit, 12: demultiplexer (DMUX) ), 1
3 a deframing circuit, 14 a data compression / decoding circuit, 15 a VAUX data extraction / mode control circuit,
21 ... sync, 22 ... ID, 23 ... video data, 24 ...
VAUX data, 25 ... Remainder of VAUX data, 26 ...
Pack header, 27: pack data, 28: inner parity, 29: outer parity.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5C053 FA07 FA21 FA22 GA18 GB01 GB06 GB15 GB18 GB21 GB22 GB26 GB32 HA23 HA33 HA40 JA21 JA22 JA30 KA01 KA08 KA24 LA06 5C059 KK01 LA04 MA23 ME01 PP01 PP04 PP14 RC00 RC02 RC33 RC35 RF05 RF09 RF21 SS16 UA02 UA05 UA36

Claims (2)

[Claims] 1. A recording / reproducing apparatus for recording / reproducing a video digital signal, comprising:
Detecting means for extracting data, determining means for determining a reproduction mode from the extracted VAUX data, data compression / decoding means for compressing and decoding the reproduced video digital signal while deshuffling using a shuffling memory, and data compression / decoding And control means for controlling the reproduction mode of the means. When the detection means detects a change in the reproduction mode from the extracted VAUX data, the determination means determines the reproduction mode, and the control means directly controls the reproduction mode. By controlling the playback mode of the data compression / decoding means, the time lag between the mode change of the playback data and the mode change of the data compression / decoding means is reduced, and the disturbance of the playback video at the time of the playback mode change is suppressed. Recording and playback device. 2. The recording / reproducing apparatus according to claim 1, wherein before and after the change of the reproduction mode is detected by the detection means, the format of writing the reproduction data to the shuffling memory is the same during the deshuffling. When the read format from the shuffling memory is different, the reproduction data written in the shuffling memory in the reproduction mode before the change is read out from the shuffling memory in the reproduction mode after the change. A recording / reproducing apparatus, which eliminates a time lag between a data mode change and a mode change of a data compression / decoding means, and suppresses disturbance of a reproduced video when a reproduction mode changes.