JP2001024096A - Manufacture of multi-pin bga semiconductor substrate package - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce an electrode pitch of a semiconductor by applying an insulation layer to a copper foil, shaping an opening of a small diameter in an insulation layer and thereafter applying silver paste, stacking prepreg and a copper foil with resin and heating and pressurizing it. SOLUTION: In a first process, insulating resin 2 is applied on a copper foil 1. In a second process, the insulating resin 2 in a required part alone is removed by laser. In a third process, conductive paste 3 is applied selectively to a part wherein the insulating resin 2 is removed by a print method. In a fourth process, a copper foil with conductive paste 3 and prepreg 4 and the copper foil 1 with resin are stacked and a silver paste bump is made to pass through the prepreg 4 by using a pressurizing device and is brought into contact with an opposing copper foil. In a fifth process, heating and pressurizing are carried out. In a sixth process, etching is carried out. As a result, the pitch of a semiconductor electrode can be made 250 μm and the number of electrode pins of a 10 mm-semiconductor chip can be made up to 1600 pins.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

2. Description of the Related Art In the semiconductor industry, in recent years, the number of multi-pin semiconductors used in computer image processing, workstations, supercomputers, and the like has been rapidly increasing. Such a 1000-pin class semiconductor electrode structure is different from a conventional 700-pin or less semiconductor electrode structure. In a conventional semiconductor electrode structure, electrodes are arranged in a peripheral portion (this structure is called a peripheral), and in most cases, the electrical connection between the semiconductor and the semiconductor substrate is a wire bonding method. However, 1
The electrode structure of a multi-pin semiconductor having 000 pins or more is changing to an area array system. For example, if it is desired to arrange 1000-pin electrodes on a 15 mm square semiconductor, and if the electrode structure is a peripheral, the electrode pitch is 6
The pitch becomes 0 μm, which is close to the limit of wire bonding. On the other hand, in the case of an area array, the pitch of the electrodes of the area array is 300 microns, which is a flip-chip type. The present invention relates to a method for manufacturing a BGA substrate used for a multi-pin semiconductor package having an area array structure.

[0002]

2. Description of the Related Art Conventionally, a method of manufacturing such a multi-pin package having a class of 1000 pins or more will be described. The first conventional method is a build-up method. First, a double-sided copper foil laminate impregnated with a normal epoxy resin is used as the core material of the substrate. After performing circuit processing on the laminate, a photosensitive insulating layer is applied, and the laminate is irradiated with ultraviolet rays to leave necessary portions. After that, plating is performed and circuit processing is performed. In the case of a multi-pin structure, the insulating layer cannot be routed by a single layer, so that the insulating layer needs to be multilayered. Therefore, the steps from the application of the photosensitive resin layer to the circuit processing are repeatedly performed. In this scheme, the advantage is that the multi-layer method is very simple in terms of applying the insulating layer. Further, there is an advantage that it is not necessary to make a hole for each hole, and the hole can be formed by not irradiating ultraviolet rays only to a portion where the hole is to be made. However, it is said that the problem is that the adhesion strength between the copper plating and the insulating layer is low. Also, the second
As a method, there is a method in which a prepreg is multilayered for each layer.

[0003] Circuit processing is performed on the core material, prepregs are laminated and pressed. After pressing, holes are drilled and plated by laser. After that, circuit processing is performed. A BGA semiconductor substrate can be manufactured by repeating the steps of multilayering and circuit processing as in the build-up method. When this method is used, the problem relating to the reliability of plating, which has been a problem in the build-up method, is also eliminated. However,
The disadvantage is that the high-temperature press is required in the multilayer and the use of a laser for drilling complicates the construction method.

A third method is disclosed in Japanese Patent Laid-Open No. 5-9017.
7, JP-A-5-152006 and JP-A-5-131
No. 726. This is an invention in which a prepreg is made to penetrate with silver paste and is electrically connected in the same manner as in the present invention.However, when a multi-pin semiconductor substrate is manufactured, the pitch of the electrodes becomes narrower. The method cannot efficiently manufacture a substrate. As described above, in the related art, at present, a method of manufacturing a multi-pin semiconductor substrate with a simple method and high reliability has not been found.

[0005]

SUMMARY OF THE INVENTION An object of the present invention is to propose a method of manufacturing a multi-pin semiconductor package which has a simple method and high reliability.
In particular, it is an improvement of the third method of the conventional method. The problem of the third method will be described in detail.

In the case of the conventional method in which the first step and the second step of the present invention do not exist, the minimum diameter of the silver paste is 200 microns. For this reason, the minimum land diameter of the copper foil is required to be 200 microns + 50 microns = 250 microns in consideration of the positional deviation tolerance. When the bump pitch is 300 microns, the distance between the land diameters of the copper foil is 50 microns. Further, when the bump pitch becomes narrower, the lands come into contact. The pitch between bumps in this method is
min 300 microns. In contrast, in the method of the present invention, when the opening diameter of the insulating resin layer is 100 microns,
The copper foil land diameter is 150 microns. When the bump pitch is 300 microns, the distance between the lands is 150 microns, which is sufficient. In this case, the minimum pitch is 20
0 microns is possible. As described above, by arranging one insulating layer between the insulating layer and the copper foil, 300
It is possible to manufacture an area array type semiconductor substrate having a pitch of less than a micron.

[0007]

Means for Solving the Problems The present inventors have made intensive studies on the above problems and as a result have completed the present invention.
FIG. 1 shows a schematic diagram of the manufacturing process. The first step in FIG. 1 shows a step of applying an insulating resin 2 on the copper foil 1. Among them, the copper foil 1 may be either an electrolytic copper foil or a rolled copper foil, and the thickness may be any of 12 μm, 18 μm, and 35 μm. Since the wiring has a fine pattern due to the large number of pins, the thinner is better.
Since it is necessary to remove unnecessary resin in the third step, the insulating resin 2 is preferably an ultraviolet-sensitive epoxy resin. Further, it is also possible to remove with a laser or the like after applying the thermosetting resin. The material of the resin is not particularly limited, such as an epoxy resin, a polyimide resin, and a modified epoxy resin, but it is necessary that the resin be at least an insulating resin and have a glass transition temperature of 130 ° C. or higher.

Next, a second step of partially removing the insulating resin 2 will be described. In the case of a photosensitive resin, a portion where the resin needs to be left is irradiated with ultraviolet rays, and an unnecessary portion is not irradiated with ultraviolet rays. By developing this substrate, it is possible to manufacture a substrate from which only a necessary portion has been removed of the insulating resin. If it is not a photosensitive resin, there is a method of printing only a predetermined portion by screen printing, but it is difficult to apply it to a multi-pin package requiring extremely fine processing.
In this case, it is optimal to apply the resin to the entire surface and then remove the insulating resin by a laser only at a necessary portion. Next, a third step of printing the conductive paste 3 on the copper foil with the insulating layer will be described. A silver paste is selectively applied to a portion where the insulating resin has been removed in the second step by a printing method. The kind of the silver paste is not limited, such as epoxy resin and polyimide resin. A thermosetting resin is more preferable. In the printing method, the silver paste preferably has a diameter of about 150 to 200 microns and a height of about 150 microns. . Printing is repeated several times and is repeated until a predetermined thickness is achieved.

Next, the copper foil with the conductive paste 3, the prepreg 4 and the copper foil with the resin prepared in the second step are stacked as shown in the fourth step in FIG. 1, and the silver paste bump is formed using a pressing device. It penetrates through the prepreg and contacts the opposing copper foil.

Next, the structure manufactured in the fourth step is integrated by heating and pressing. Next, a circuit is formed on the copper foil surface of the integrated substrate to form a BGA substrate. In the present invention, as described in the section to be solved by the invention, there is POINT in which an insulating layer is applied to a copper foil and the insulating layer is opened with a small diameter. If no insulating layer is provided, the difference between the diameter of the silver paste and the size of the copper foil land needs to be 50 microns, so the diameter of the copper foil land is 250 microns. The minimum electrode pitch of the semiconductor is 300 microns. In contrast, when an insulating layer is provided and an opening is provided,
The copper foil land diameter can be 150 microns, and the electrode pitch of the semiconductor can be 250 microns. The thickness of the insulating layer is preferably 25 to 100 microns. In addition, when the thickness of the insulating layer is set to 25 μm or more, the insulating layer has an insulation resistance of 500 V or more.

[0011]

EXAMPLES Examples 1, 2 and 3 Photosensitive SOLDER RESIST (PSR-4000AUS made by Taiyo Ink) on a matte surface of copper foil (electrolytic copper foil, 12 microns, manufactured by Furukawa Electric)
5) is applied to the entire surface by 25 microns. 80 ° C after application 30
Temporarily dry for minutes. After that, by irradiating with ultraviolet light, the portion where the insulating layer is to be removed is blocked from ultraviolet light, and the other portions are irradiated with ultraviolet light. Then, it is removed by development. Main drying (150 ° C. * 1 hour) and UV irradiation are performed to completely cure the insulating layer.

Thereafter, a silver paste bump is formed on the portion where the insulating layer has been removed. The diameter of the silver paste is 20 at the bottom
A bump is formed by a printing method so as to be 0 micron, top 100 micron, and height 150 micron. A single print can produce a height of 50 microns. Therefore, coating and drying are repeated a total of three times. The copper foil with bumps formed in this way, a prepreg (Matsushita Electric Works epoxy resin), and an insulating resin applied to the copper foil and the opened copper foil are stacked,
Penetrate the bump. Pressing at 80 ° C. is performed to penetrate the bumps. Then, high temperature 180 ° C, 40k
A laminate is formed by pressing at a pressure of g / cm2. Thereafter, three types of substrates having a bump pitch of 250 microns (Example 1), 300 microns (Example 2), and 350 microns (Example 3) were manufactured. Table 1 shows the yield and the insulation resistance value in this case.

[0013]

[Table 1]

Comparative Example 1 A bump of a silver paste is formed on a mat surface of a copper foil (electrolytic copper foil, 12 microns, manufactured by Furukawa Electric). The bumps are formed by a printing method so that the diameter of the silver paste is 200 microns at the bottom, 100 microns at the top, and 150 microns in height. A single print can produce a height of 50 microns.
Therefore, coating and drying are repeated a total of three times. The bumped copper foil, prepreg (Epoxy resin manufactured by Matsushita Electric Works), and copper foil with an opening formed by applying an insulating resin to the copper foil thus formed are overlapped to penetrate the bump. 8 for bump penetration
It is carried out by pressurizing at 0 ° C. Then, high temperature 18
A laminate is formed by pressing at 0 ° C. and a pressure of 40 kg / cm 2. Thereafter, three types of substrates having a bump pitch of 250 microns, 300 microns, and 350 microns were manufactured.

[0015]

Conventionally, in the case of bump penetration by silver paste using a prepreg, the diameter of the bump is about 200 μm, and it is technically very difficult to make it smaller. For this reason, when manufacturing a multi-pin semiconductor substrate having a very narrow pitch, there has been a problem that the yield and the like become extremely poor. Therefore, the pitch can be reduced to 250 microns by applying an insulating resin to the copper foil to reduce the opening diameter. From the above, the number of electrode pins of the semiconductor chip of 10 mm was about 1000 at the maximum in the conventional method, whereas the method of the present invention became possible to 1600 pins.

[Brief description of the drawings]

FIG. 1 is a schematic view of the manufacturing process of the present invention. 1 Copper foil 2 Insulating resin 3 Conductive paste 4 Prepreg 5 Copper foil with resin

FIG. 2 is an enlarged view of a through hole.

Claims (1)

[Claims] In a manufacturing process of a semiconductor substrate, a first step of applying an electrically insulating resin to a copper foil, a second step of removing only a predetermined portion of the resin, and a silver for penetrating a prepreg through the removed portion. The third step of applying the paste, the fourth step of overlaying the prepreg on the side with the silver paste projections, embedding the silver paste in the prepreg and connecting to the opposing copper foil, the fifth step of pressing the substrate at high temperature And a method of manufacturing a multi-pin BGA semiconductor package, which is enabled by going through a sixth step of etching both copper foil surfaces