JP2001016780A - Series capacitor for controlling thyristor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a series capacitor for controlling thyristors, which is provided with such a means for stably controlling thyristors in accordance with commands, even when unbalances exist between impedances of different phases due to non-transposition of AC transmission lines or fluctuation of a load, and at the same time, suppresses the unbalances and fluctuations between the phases. SOLUTION: In a series capacitor for controlling thyristor, serial circuits composed of reactors L and thyristors Rh, which are connected in antiparallel with the reactors L for variably controlling the capacitances of series capacitors C connected in series with transmission lines for compensating the impedances of the transmission line, are connected in parallel with the capacitors C. The series capacitor is provided with a controller, incorporating different phases of control means AZR which control and compute parameters to be controlled for different phases, synchronizing signal generating means SYN and PLL which collectively find three-phase reference pulses Ss for igniting the thristors Th from the AC signals of the transmission lines, and a pulse phase shifting means APS which shifts the phase of the reference pulse Ss, according to controlled and computed results of each phase and generates and outputs an igniting pulse for controlling the thyristor Th of each phase.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thyristor controlled series capacitor for an AC power system, and more particularly to a thyristor controlled series capacitor control device suitable for phase control of each phase.

[0002]

2. Description of the Related Art As a series compensator effective for improving the steady state stability and the transient stability, a series capacitor is mainly used in Northern Europe, North America and South America where long-distance power transmission is common.

However, in order to increase the effect of compensation,
When the amount of compensation is increased, the electric resonance frequency by LC approaches 50 Hz, and the shaft twist (SSR) of the generator becomes a problem.

As a countermeasure, a thyristor controlled series capacitor (TCSC) that changes the capacity of the series capacitor by controlling the phase of the thyristor is provided by an EPRI (Electric Power Rese).
archInstitute), and field trials have been conducted.

[0005] If the operation results abroad are accumulated through demonstration tests and the like, the thyristor control series can be used to improve the voltage stability and system stability even in the Japanese power system where voltage stability is a problem due to heavy load. The possibility that a capacitor is used is great.

[0006]

As a control method of a thyristor control series capacitor, a control method in which three phases are integrated has been studied. This control method is a method of controlling a series capacitor using an average value or an effective value of a voltage or a current in which three phases are combined.

However, in a three-phase AC transmission line, there is an imbalance in the impedance between the phases due to non-twisting and variations in load. Therefore, in the control of all three phases,
If the three phases are unbalanced, satisfactory control cannot be performed as instructed, and the unbalance or variation in each phase cannot be suppressed.

The thyristor control series capacitor is
Since it is inserted in series with the transmission line, if not properly controlled,
Conversely, each phase control for suppressing the imbalance may cause disturbance in the system and promote the imbalance.

An object of the present invention is to stably control according to a command even if there is an imbalance in the impedance between the phases due to non-twisting of the transmission line and variations in the load, and to reduce the imbalance and the variations in each phase. The object is to provide a thyristor controlled series capacitor provided with a suppression means.

[0010]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a reactor and an anti-parallel system for variably controlling the capacity of a series capacitor inserted in series with an AC transmission line and compensating the AC transmission line in series. In a thyristor control series capacitor configured by connecting a series circuit of connected thyristors in parallel with the series capacitor, each phase control means for controlling and calculating a parameter to be controlled for each phase, and a thyristor from an AC signal of a transmission line. Synchronizing signal generation means for obtaining a reference pulse for firing three phases at a time, and a phase shift for generating and outputting a firing pulse for each phase by shifting the phase of the reference pulse based on the result of the control operation A thyristor controlled series capacitor with a control device including means.

The output of the result of the control operation from each phase control means to the pulse phase shift means is phase-sequentially provided between each phase control means and the pulse phase shift means in accordance with the output pulse of the pulse phase shift means. Switching means for switching is provided.

Instead of providing the switching means externally, the pulse phase shifting means includes pulse phase shifters arranged in parallel for the number of phases, and generates a firing pulse for each phase in phase sequence according to the reference pulse. Output means.

In any thyristor controlled series capacitor, the parameter to be controlled is, specifically,
It is any of impedance, current, voltage, and power.

In the present invention, in order to variably control the capacity of a series capacitor inserted in series with the AC transmission line and compensating for the impedance of the AC transmission line, a series circuit of a thyristor connected in reverse and in parallel with the reactor is connected to the series capacitor. In a thyristor control series capacitor that is connected in parallel, each phase control means that controls and calculates parameters to be controlled for each phase, and a three-phase batch of reference pulses for firing the thyristor from an AC signal on the transmission line And a control unit including a pulse phase shifter for generating and outputting a firing pulse for each phase by shifting a reference pulse based on the result of the control operation. The phase shift of a reference pulse of, for example, π / 6 period obtained by collectively obtaining three phases according to the control calculation result for each phase is performed, and the thyristor control serial Since the ignition pulse for controlling the thyristor of the denser is generated and output, even if there is an imbalance in the impedance between the phases due to non-twisting of the transmission line or variations in the load, control is performed stably for each phase as instructed. In addition, it is possible to suppress imbalance and variation in each phase.

[0015]

FIG. 1 is a diagram showing an example of the configuration of an AC system including a thyristor-controlled series capacitor according to the present invention. The AC system 1 and the AC system 2 are mutually connected by a transmission line having an impedance 3 to be compensated by a thyristor controlled series capacitor. Impedance 3
Is represented here as a reactor.

The thyristor control series capacitor is configured by connecting a series circuit of the thyristors Th1 and Th2 and the reactor L connected in anti-parallel to the series capacitor C in parallel. The series capacitor C is inserted in series with the transmission line to cancel and compensate for the impedance 3 of the transmission line.

The thyristor control series capacitor control device 200 takes in the impedance command value Zp, the AC voltage of the transmission line detected by the AC voltage detector 201, and the current of the transmission line detected by the AC current detector 202, and The phase of the current flowing through the reactor L is controlled via the thyristors Th1 and Th2 connected in parallel.

FIG. 2 is a diagram showing an example of the impedance characteristics of a thyristor-controlled series capacitor. The horizontal axis represents the control angle of the thyristor, and the vertical axis represents the impedance of the thyristor controlled series capacitor. The positive region is the capacitive impedance and the negative region is the inductive impedance.

The voltage phase across the series capacitor C is 18
When expressed by an angle β taken in a direction from 0 degree to 0 degree, β = 0
In this case, no current flows through the reactor L, so that the impedance of the thyristor controlled series capacitor is equal to the impedance of the series capacitor, Zco = 1 / ωC (ω =
2πf, f: commercial frequency). When the firing phase β of the thyristor is increased, the current flowing through the reactor increases, and is capacitive up to the firing phase angle of βlim,
The impedance increases. βlim is the firing phase angle at which C and L resonate at the commercial frequency. This βlim
When the ignition phase angle exceeds, the current flowing through the reactor becomes larger than the current flowing through the series capacitor, and the impedance of the thyristor controlled series capacitor becomes an inductive impedance. As the firing phase angle β is further increased, the inductive impedance decreases, and β = 90
Each time, the thyristor becomes fully conductive. The impedance at this time is a parallel impedance value of L and C, and becomes inductive Zlo. As is clear from FIG. 2, by controlling the firing phase angle β, the impedance can be changed in the range from the capacitive region to the inductive region.

The impedance for the firing phase angle β is
Kato et al. “Examination of control method of thyristor controlled series capacitor and development of reduced model”, IEICE Transactions B
As shown in Vol. 117, No. 7 (1997.7), it is given by the following equation from the values of the fundamental wave voltage and the fundamental wave current of the transmission line.

Xtcsc = πωL / (πω2LC-2β + sin2β) As a control method of the thyristor-controlled series capacitor, a method of controlling three phases collectively has been studied as described in the above-mentioned reference.

However, the transmission line has an imbalance in impedance between the phases due to non-twisting and variations in load.
Therefore, in order to execute effective control for the AC system as instructed, it is necessary to control each phase individually.

FIG. 3 is a system diagram showing a connection state between each phase of a thyristor control series capacitor according to the present invention and a control device. In order to individually control the impedance, current, and voltage of each phase, the voltage and current of each phase are detected by a voltage detector 201 and a current detector 202 installed on each transmission line.

<< First Embodiment of Thyristor-Controlled Series Capacitor Control Device >> FIG. 4 is a block diagram showing a configuration of a first embodiment of a thyristor-controlled series capacitor control device 200 according to the present invention. In the first embodiment, the control target parameter of the thyristor control series capacitor is impedance.

Impedance detection circuits DZuC, DZv
C and DZwC take in the detection voltage of the voltage detector 201 and the detection current of the current detector 202 installed in each phase,
The impedance is detected for each phase. The impedance control circuits AZuR, AZvR, AZwR take in the impedance command value Zp and the detected impedance values Zu, Zv, Zw detected for each phase, and control the impedance of each phase so as to match the command value Zp. .
The switching circuit SW outputs an impedance control circuit AZu according to an output pulse of a pulse phase shift circuit APS described later.
The output of R, AZvR, AZwR is switched.

The synchronizing signal detecting circuit SYN detects a synchronizing point which is a zero point of the current from an output signal of the current detector 202 provided for each phase, and outputs a synchronizing pulse Sn. The synchronizing signal generation circuit PLL obtains a reference pulse Ss representing a reference point at which the thyristor is to be fired, and outputs the same in three phases. The pulse phase shift circuit APS shifts the phase of the reference pulse Ss generated by the synchronization signal generation circuit PLL and representing the reference point of each phase according to the outputs of the impedance control circuits AZuR, AZvR, AZwR.

FIG. 5 is a block diagram showing an example of the configuration of the synchronization signal generating circuit PLL of the control device 200 for the thyristor control series capacitor. The phase difference detection circuit DET includes a synchronization pulse Sn of each phase of the synchronization signal detection circuit SYN and a reference pulse S which is an output pulse of a frequency dividing circuit DEC described later.
s is detected. The operational amplifier circuit CAL is
The phase difference Δθ, which is the output of the phase difference detection circuit DET, is controlled, computed, and amplified. The voltage controlled oscillation circuit OSC transmits and outputs a signal having a frequency proportional to the magnitude of the signal Ec subjected to the control operation and amplification. The frequency dividing circuit DEC has a voltage-controlled oscillation circuit O
The high frequency signal from the SC is frequency-divided to six times the commercial frequency. The signal pulse frequency-divided to six times is output to the phase difference detection circuit DET and the pulse phase shift circuit APS as the reference pulse Ss.

FIG. 6 is a time chart showing an example of the operation of the synchronization signal generating circuit PLL of FIG. The synchronization signal detection circuit SYN detects the synchronization pulse Sn at the zero point of the detection current of each phase.
Is output. When the three phases are combined, a synchronization pulse Sn six times the commercial frequency is obtained. FIG. 6 shows the U-phase current I with respect to the detection current and the voltage across the series capacitor C.
u and the waveform of the voltage Vu are represented as a representative, a synchronization pulse Sn, a reference pulse Ss, a phase difference Δθ, and an operational amplifier circuit C
The output voltage Ec of AL is shown for three phases.

The voltage Vu across the series capacitor C is a capacitive impedance, and is about 90 degrees behind the detection current Iu when controlling the thyristor series capacitor. The phase difference Δθ between the synchronization pulse Sn and the reference pulse Ss detected by the phase difference detection circuit DET is determined by the operational amplifier circuit CA
The control operation is performed by L and amplified. In the case where the control operation is the first-order advance / delay control, the output voltage Ec of the operational amplifier circuit CAL is used.
Are as shown at the bottom of FIG. The voltage controlled oscillation circuit OSC outputs a pulse having an oscillation frequency corresponding to the average voltage of the output voltage Ec. The frequency divider DEC frequency-divides the output pulse of the voltage controlled oscillator OSC into a reference pulse Ss having a frequency six times the commercial frequency.

If, for some reason, the frequency of the AC system rises and the zero point of the detection current advances, the synchronization pulse Sn
Progresses, the phase difference Δθ, which is the output of the phase difference detection circuit, increases, and the output Ec of the operational amplifier circuit CAL also increases. For this reason, the oscillation frequency increases, and the frequency divider DEC
The phase of the reference pulse Ss, which is the output of, is advanced. In this way, it follows the frequency of the system.

On the other hand, when the frequency of the system decreases, the synchronization pulse Sn is delayed, so that the phase difference Δθ, which is the output of the phase difference detection circuit, decreases, and the output Ec of the operational amplifier circuit also decreases. For this reason, the oscillation frequency becomes low, and the phase of the output pulse Ss of the frequency dividing circuit is delayed. In this way, it follows the frequency of the system. As described above, the reference pulse Ss, which is the output pulse of the frequency dividing circuit DEC, always follows the zero point of the current of the AC system with a certain phase difference.

Although not shown here, if a bias signal is applied to Ec, the steady-state phase difference can be set arbitrarily. Therefore, when the bias value is changed, the reference pulse Ss for firing the thyristor is applied to both ends of the series capacitor. Voltage phase 0
The reference pulse Ss can be generated to coincide with the degree point or the 180 degree point.

The pulse phase shift circuit APS shifts the phase of the reference pulse Ss in accordance with the control signal to generate a firing pulse for each phase of the thyristor control series capacitor. Reference pulse S
Even if the phase of s is determined collectively for three phases, since the impedance control circuits AZuR, AZvR, AZwR are individual circuits for each phase, the firing pulse of the thyristor is a different appropriate firing pulse for each phase. .

FIG. 7 is a time chart showing the output timing of the firing pulse by each phase control device. The firing pulse of the thyristor is π in the order of U → Z → V → X → W → Y
/ 6 behind each other. In the case of the U phase, the Su point corresponds to the reference pulse generated by the synchronization signal generation circuit PLL, that is, 0 degree (α = 0 degree) of the voltage across the U-phase series capacitor, and the command value of the control circuit AZuR is αu. Reference pulse Ssu
(See FIG. 6 for the relationship with the voltage across the DC capacitor.) A pulse shifted by αu is output from the pulse phase shifter APS.

In response to this pulse, the switching circuit SW changes the output of the control circuit to the next AZw, as shown in FIG.
Switch to R output. The pulse phase shift circuit APS is π /
The pulse is switched to the next reference pulse Ssz which is delayed by 6 and a pulse obtained by shifting Sz by the command value αz of the control circuit is output.
In response to this pulse, the switching circuit SW switches the output of the control circuit to the output of AZvR. Pulse phase shift circuit A
The PS switches to the next reference pulse Ssv delayed by π / 6, and outputs a pulse obtained by shifting Ssv by the command value αv of the control circuit. This operation is sequentially repeated to generate a firing pulse for each phase. The command value of the firing angle of the control circuit is controlled by impedance control circuits AZuR, AZv provided for each phase.
Since the reference pulse Ss is phase-shifted by the pulse phase shift circuit APS based on the command value of the firing angle, a different firing pulse is generated for each phase. Can be controlled.

Here, the reason why the reference pulse Ss is generated from the three-phase collective synchronization signal and the reference pulse Ss is taken into the pulse phase shift circuit APS will be described. Conventionally, for each phase, the reference point of the firing phase angle of the thyristor is determined based on the voltage between both ends of the series capacitor, and from this point the firing pulse is shifted by the control angle command value obtained for all three phases. The thyristor controlled thyristor of the series capacitor was fired.

When this method is adopted, when the impedance of the transmission line is different and an unbalanced current flows, the voltage phases across the series capacitor C become three-phase unbalanced, and the firing phase of the thyristor is set to a desired firing angle. Not only is it impossible, but the thyristor must have been fired in order to stabilize the system, but the igniting phase will be wrong, and the system may become unstable on the contrary. In addition, when a system failure occurs, a DC component flows through the series capacitor C, and it may not be possible to find a phase reference point from the voltage across the series capacitor C.

On the other hand, as shown in FIGS. 4 and 5, this problem can be solved by finding the reference points in three phases at once. This is because the voltage-controlled oscillator OSC can always keep the voltage-controlled oscillator OSC in an oscillating state and always obtain the three-phase collective reference pulse Ss regardless of a system fault.

<< Second Embodiment of Thyristor-Controlled Series Capacitor Control Device >> FIG. 8 is a block diagram showing the configuration of a second embodiment of a thyristor-controlled series capacitor control device 200 according to the present invention. The second embodiment differs from the first embodiment in FIG. 4 in that the switching circuit SW for the control circuit output of each phase is not provided outside, and the impedance control circuits AZuR, AZvR, A
The point is that pulse phase shifters for the number of phases are arranged in the pulse phase shift circuit BPS in correspondence with ZwR. As can be easily understood from the operation description of FIG. 7, the pulse phase shift circuit BPS sequentially switches and outputs the outputs of the pulse phase shifters arranged in parallel for the number of phases.

Since it is relatively easy to arrange the pulse phase shifters for the number of phases in the pulse phase shift circuit BPS by using the LSI technology, the external switching circuit SW shown in FIG. The system configuration and the control operation are simpler than the system in which the pulse phase shift circuit APS and the pulse phase shift circuit APS are operated in cooperation.

In the above description, the case where the control circuit 200 controls the impedance has been described as an example. However, in the control of current, voltage, power, etc., only the control command value and the detection value serving as the feedback signal are replaced. In the basic part of the present invention, that is, a control circuit is provided for each phase, and based on the firing angle command value generated here, a reference pulse generated from a three-phase signal is shifted and obtained. The thyristor of the thyristor control series capacitor is still controlled by the generated firing pulse. Therefore, the present invention can be applied not only to impedance control but also to control of current, voltage, power, and the like.

[0042]

According to the present invention, in order to variably control the capacity of a series capacitor inserted in series with an AC transmission line and compensating for the impedance of the AC transmission line, a series circuit of a reactor and a thyristor connected in anti-parallel is provided. In a thyristor control series capacitor configured in parallel with the series capacitor, each phase control means for controlling and calculating a parameter to be controlled for each phase, and a reference pulse for firing the thyristor from an AC signal of a transmission line. A synchronous signal generating means for obtaining three phases collectively, and a pulse phase shifting means for generating and outputting a firing pulse for each phase by shifting the reference pulse based on the result of the control operation, The phase shifting means shifts the phase of the reference pulse obtained for all three phases in accordance with the result of the control operation for each phase, and changes the size of the thyristor control series capacitor. Since outputs make firing pulses for controlling the static, the non-Yoka and load variation in the power transmission line,
Even when there is an imbalance in the impedance between the phases, the control is performed stably for each phase as instructed, and the imbalance and variation in each phase can be suppressed.

[Brief description of the drawings]

FIG. 1 is a diagram showing an example of the configuration of an AC system including a thyristor-controlled series capacitor according to the present invention.

FIG. 2 is a diagram illustrating an example of an impedance characteristic of a thyristor controlled series capacitor.

FIG. 3 is a system diagram showing a connection state between each phase of a thyristor control series capacitor and a control device.

FIG. 4 is a block diagram showing a configuration of a control device for a thyristor control series capacitor according to a first embodiment of the present invention;

FIG. 5 is a synchronizing signal generation circuit PLL of the control device according to the first embodiment;
FIG. 3 is a block diagram showing an example of the configuration.

FIG. 6 is a time chart illustrating an example of the operation of the synchronization signal generation circuit PLL of FIG. 5;

FIG. 7 is a time chart showing an output timing of a firing pulse by each phase control device.

FIG. 8 is a block diagram showing a configuration of a control device for a thyristor control series capacitor according to a second embodiment of the present invention;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 AC system 2 AC system 3 Transmission line impedance C Series capacitor L Reactor Th1 Thyristor Th2 Thyristor 200 Thyristor control series capacitor control device 201 AC voltage detector 202 AC current detector DZC impedance detection circuit AZR impedance control circuit SW switching circuit SYN Synchronous signal detection circuit PLL Synchronous signal generation circuit APS Pulse phase shift circuit BPS Pulse phase shift circuit DET Phase difference detection circuit CAL Operational amplification circuit OSC Voltage controlled oscillation circuit DEC frequency divider circuit

 ──────────────────────────────────────────────────の Continuing on the front page (72) Kenichi Kawada 3-2-2, Nakanoshima, Kita-ku, Osaka City, Osaka Prefecture Inside Kansai Electric Power Co., Inc. (72) Yasuo Morioka 3--3, Nakanoshima, Kita-ku, Osaka, Osaka 22 Kansai Electric Power Co., Inc. F-term (reference) 5G066 DA04 FA01 FB08 FC01 FC11 GC01

Claims (4)

[Claims] 1. A series circuit of a thyristor connected in anti-parallel with a reactor in order to variably control the capacity of a series capacitor inserted in series with an AC transmission line and compensating the AC transmission line in series, is connected in parallel to the series capacitor. Thyristor control series capacitor configured in each phase control means for controlling and calculating a parameter to be controlled for each phase, and a three-phase collective determination of a reference pulse for firing the thyristor from the AC signal of the transmission line. A control device including: a synchronization signal generating unit; and a pulse phase shifting unit that generates and outputs a firing pulse for each phase by shifting the phase of the reference pulse based on a result of the control operation. Thyristor controlled series capacitor. 2. The thyristor controlled series capacitor according to claim 1, wherein said phase control means is connected between said phase control means and said pulse phase shift means in accordance with an output pulse of said pulse phase shift means. A thyristor-controlled series capacitor, further comprising switching means for switching the output of the result of the control operation to the pulse phase shifting means in a phase-sequential manner. 3. The thyristor-controlled series capacitor according to claim 1, wherein said pulse phase shift means includes pulse phase shifters arranged in parallel for the number of phases, and a firing pulse for each phase according to said reference pulse. Thyristor-controlled series capacitors characterized in that they are means for generating and outputting phase-sequentially. 4. The thyristor controlled series capacitor according to claim 1, wherein the parameter to be controlled is impedance, current,
A thyristor controlled series capacitor characterized by being either voltage or power.