JP2001013947A - Number-of-pixel converting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a number-of-pixels converting device in which a higher frequency than a frequency of input data is not required and small circuit scale can be realized independently of relation of the number of pixels before and after conversion of the number of pixels. SOLUTION: This device for enlargement-converting and reduction-converting the number of pixels by interpolation operation is provided with 1/n averaging means 2, 4 to which digitized pixel data are inputted and which calculate average values of input pixel data of (n) pieces (n: arbitrary natural number) in the horizontal direction and the vertical direction and output them, interpolation processing means 3, 5 for performing interpolation processing of output data from the 1/n averaging means 2, 4 in the horizontal direction and the vertical direction, and a storage means 6 for storing temporarily output data from the interpolation processing means 3, 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pixel number conversion device in an image signal processing device using a matrix type display device such as a liquid crystal panel and a plasma display panel (PDP), and more particularly to a digital image data pixel number conversion device. The present invention relates to a device capable of converting the number of pixels without requiring a high frequency equal to or higher than the preceding and following image signal frequencies and without increasing the circuit scale.

[0002]

2. Description of the Related Art FIG. 20 is a block diagram showing a basic configuration of a conventional pixel number conversion device. Pixel data input (image data) consists of digitized luminance signal Y and color difference signals (U, V), in FIG, 1 _Y,
1 _U and 1 _V are the digitized luminance signals Y,
The input terminals of the pixel data of the color difference signal U and the color difference signal V are shown. Reference numeral 55 denotes switch means (also referred to as an interpolation filter) used for performing 0 interpolation, 56 denotes a low-pass filter (LPF), 57 denotes a D flip-flop used for downsampling, and 6 denotes a processing result of the D flip-flop 57 Is temporarily stored. As shown in FIG. 20, a circuit block including the switch means 55, the low-pass filter 56, the D flip-flop 57, and the memory 6 has one set corresponding to each of the luminance signal Y, the color difference signal U, and the color difference signal V. Is provided. Also, _7Y , _7U ,
7 _V is an output terminal of the luminance signal Y, the color difference signal U, and the color difference signal V whose pixel numbers have been converted, respectively.

FIG. 21 is a diagram for explaining a general concept of pixel number conversion. FIG. 21A shows a case where data is inserted at a position 位置 of the original data (sampling frequency fi), and FIG. 21B shows a case where data is inserted at a position ５ of the original data (sampling frequency fi). Is inserted. Converting the number of pixels means
For example, as shown in FIG. 21 (a) or FIG. 21 (b), the number of original data (indicated by a triangle) input during a certain period T (sec) is converted, and This is to output numerical data (indicated by a circle).

That is, interpolation processing is performed on a data string, and the sampling frequency of input pixel data is changed from fi to f.
It is nothing but frequency conversion to o. In the processing, zero data is inserted into each of the input luminance signal Y, color difference signal U, and color difference signal V at a position to be interpolated by the switch means 55, and the entire obtained data is passed through a low-pass filter 56. This is done by: Note that the crosses in the figure indicate the positions of the pixel data after conversion with respect to the original data. By this processing, the zero-interpolated point has a sample value.

For example, as shown in FIG. 21A, when data is inserted at a half of the original data (sampling frequency fi), the switching means 55 shown in FIG.
, The zero data is interpolated at half the position of the original data, so that the original data and the interpolated data maintain an equal interval relationship, and a sampling frequency fo twice the sampling frequency fi of the original data is obtained. . However, FIG.
, The original data (sampling frequency fi)
When data is to be inserted at the position of 5/4 of the data, the point of zero interpolation is 0, 1/4, 2 with respect to the position of the original data.
.., 3/4, 0,...

Since the intervals between the samples after interpolation become non-uniform, that is, the frequency of the data including the interpolation points becomes inconsistent, the low-pass filter does not operate at a constant frequency, and a complicated configuration is required. Become. Therefore,
Interpolation is performed at all the positions of 1/4, 2/4, and 3/4, the frequency band is limited by the low-pass filter 56, and then down-sampling is performed by the D flip-flop 57.
The position where the zero insertion is performed is determined by the relationship between the number of pixels before and after the conversion.

FIG. 22 shows the flow of data processing when data is to be inserted at a position の of the original data (sampling frequency fi) as shown in FIG. The left side of FIG. 22 shows a state of data conversion in the time domain, and the right side shows a state of data conversion in the frequency domain. In FIG. 22A, the interval between input pixel data (original data) is Ti (sec), and the frequency is fi (H).
z). Next, in FIG. 22B, zero data is inserted by the switch means 55 at a position corresponding to a quarter of the data before conversion. No change in the frequency domain is observed at that time, but the apparent frequency is α = 4fo (H
z). FIG. 22C shows the state of the data after passing through the low-pass filter 56 thereafter.

By passing through a low-pass filter, a point initially interpolated as a value 0 by the switch means 55 in the time domain has a value under the influence of the values of the preceding and following data and has a desired value in the frequency domain. It can be understood that the band is limited at the frequency corresponding to the number of pixels. FIG. 22D is a rewritten version of FIG. FIG. 22E shows a state where data at a desired position (ie, a data position at a To interval) is extracted by down-sampling the band-limited data. This completes the conversion of the number of pixels.

A specific description will be given of which circuit in FIG. 20 performs the above-described data processing. In FIG. 20, each pixel data before pixel number conversion (that is, digitized luminance signal Y, color difference signal U, and color difference signal V input to input terminals 1 _Y , 1 _U , and 1 _V , respectively).
Is Ti, and its frequency is fi. When each of these data is subjected to pixel number conversion, zero interpolation must be performed. This interpolation processing is performed by the switch means 55 (that is, it serves as an interpolation filter). Next, a low-pass filter (LP) is applied to each signal subjected to zero interpolation by the switch unit 55.
F) Use 56 to perform a low-pass filtering process that passes a frequency band in which a desired number of pixels are arranged within a desired period.

Thereafter, the D flip-flop 57 is used to set the interval between the converted pixel data to the desired T value.
o, down-sampling is performed so that the frequency becomes fo (corresponding to the processing in FIG. 22E), and the processing result is stored in the memory 6 for display. For example,
As described on pages 93 to 94 of "MUSE-Hi-Vision transmission system (Yuichi Ninomiya / published by the Institute of Electronics, Information and Communication Engineers)", the sampling frequency conversion is the same operation as the interpolation. Zero interpolation is performed so as to be the sampling frequency and the least common multiple of the converted frequency, and all samples of the common multiple are obtained by passing through a low pass filter.

Next, this is sampled and lowered to a desired (desired) sampling frequency. At this time, if the aliasing distortion does not overlap the baseband component, it means that the sampling conversion has been completed. As can be seen from the above description, the conversion of the sampling frequency may be simple if the relationship between the values of the preceding and succeeding sampling frequencies is simple (for example, 1: 2), but complicated when the least common multiple of both becomes a large number. What will be. For example, if the relationship is 11:12, the least common multiple is 132, and it is necessary to use a ridiculously high intermediate sampling frequency.

[0012]

When converting the number of pixels of a digital image data, the characteristics of an interpolation filter for converting the number of pixels are determined by the relationship between the number of pixels before and after the conversion. In the conventional converter, different filters are required corresponding to the respective conversion ratios, so that a large-scale circuit is required to support various conversion ratios. In addition, complicated control was required according to the relationship between the number of pixels before and after the conversion. In addition, depending on the relationship between the number of pixels before and after the conversion, the intermediate frequency during the conversion may become extremely high, and therefore a high-frequency clock is required. Furthermore, when a simple filter is used to avoid a high frequency and reduce the circuit scale, there is a problem that image quality is deteriorated due to aliasing distortion.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problem, and does not require a frequency higher than the frequency of input / output data regardless of the number of pixels before and after pixel number conversion. It is an object of the present invention to obtain a pixel number conversion device that can be realized with a small circuit scale.

[0014]

SUMMARY OF THE INVENTION A pixel number conversion device according to the present invention is a pixel number conversion device for enlarging or reducing the number of pixels of digital image data by an interpolation operation. And entered n
1 / n to calculate and output an average value of input pixel data (n is an arbitrary natural number) in the horizontal and vertical directions
Averaging means, interpolation processing means for performing interpolation processing on output data from the 1 / n averaging means in horizontal and vertical directions, and storage means for temporarily storing output data from the interpolation processing means. It is provided.

Further, the pixel number conversion device according to the present invention is
This is a pixel number conversion device for enlarging and reducing the number of pixels of digital image data by an interpolation operation, wherein a digitized luminance signal Y, a color difference signal U, and a color difference signal V are respectively inputted, and the inputted n (n Is any natural number)
First, second, and third horizontal 1 / n averaging means for performing 1 / n averaging in the horizontal direction, respectively, and the first, second, and third horizontal 1 / n averaging means First, second, and third horizontal interpolation means for performing interpolation processing on the output data from the means in the horizontal direction, respectively, and output data from the first, second, and third horizontal interpolation filters. First, second, and third vertical 1 / n averaging means for performing 1 / n averaging in the vertical direction, respectively, and the first, second, and third vertical 1 / n averaging means. Output data from the first, second and third vertical interpolation means for performing interpolation processing on the output data from the vertical direction, and output data from the first, second and third vertical interpolation means respectively. Storage means for temporarily storing.

Further, the first, second and third horizontal interpolation means of the pixel number conversion device according to the present invention are each constituted by a horizontal linear interpolation filter.
And the third vertical interpolation means are each composed of a vertical linear interpolation filter.

Further, the second and third horizontal interpolation means of the pixel number conversion device according to the present invention are each provided with a horizontal direction D.
The second and third vertical interpolation means are each constituted by a vertical DDA filter.

Further, the first, second and third horizontal interpolation means of the pixel number converter according to the present invention are each constituted by a horizontal DDA filter, and the first, second and third vertical interpolation means are provided. The interpolation means are each constituted by a vertical DDA filter.

Further, the pixel number conversion device according to the present invention comprises:
Switching means for switching the connection order of the horizontal direction interpolation means, the vertical direction 1 / n averaging means, and the vertical direction interpolation means in a predetermined order according to the conversion ratio is further provided.

Further, the pixel number conversion device according to the present invention comprises:
This is a pixel number conversion device for enlarging and reducing the number of pixels of digital image data by an interpolation operation, wherein a digitized luminance signal Y, a color difference signal U, and a color difference signal V are respectively inputted, and the inputted n (n Is any natural number)
First, second, and third horizontal 1 / n averaging means for performing 1 / n averaging in the horizontal direction, respectively, and the first, second, and third horizontal 1 / n averaging means. The output data from the averaging means is divided by 1 /
First, second and third vertical 1 / n for n averaging
Averaging means and the first, second and third vertical directions 1
/ N first and second storage means for temporarily storing data output from the / n averaging means, respectively,
First, second and third horizontal interpolation means for horizontally interpolating data read from the second and third storage means, respectively, and the first, second and third horizontal interpolation means And first, second and third vertical interpolation means for vertically interpolating the output data from.

Further, the pixel number conversion device according to the present invention comprises:
3. The first, second, and third field memories for temporarily storing output data from the first, second, and third vertical 1 / n averaging means for one field, respectively, First, second and third vertical direction 1
/ N image data of the first, second, and third current screens, which are output data from the averaging means, and the first, second, and third field memories stored in the first, second, and third field memories. First, second and third motion detecting means for comparing the image data of the first, second and third previous screens respectively corresponding to the image data of the third current screen and detecting the motion of the image; The image data of the first, second and third current screens based on the detection results of the first, second and third motion detecting means, and the first, second and third previous screens And a switching means for switching the image data of each of the above and outputting the data to the first, second and third vertical interpolation means.

[0022]

Embodiment 1 An embodiment of the present invention will be described with reference to the drawings. still,
The same reference numerals as those in the related art indicate the same or equivalent parts as in the related art. FIG. 1 is a block diagram showing a configuration of a pixel number conversion device according to Embodiment 1 of the present invention. In the figure,
1 _Y , 1 _U , and 1 _V are input terminals of the digitized luminance signal Y, color difference signal U, and color difference signal V, respectively.
2 is a horizontal 1 / n averaging filter (horizontal 1 / n averaging means) for averaging 1 / n in the horizontal direction;
Reference numeral 3 denotes a horizontal linear interpolation filter (horizontal interpolation means) for performing interpolation processing in the horizontal direction.
The averaging filter 2 and the horizontal linear interpolation filter 3 constitute a horizontal filter.

Reference numeral 4 denotes a vertical 1 / n averaging filter for performing 1 / n averaging in the vertical direction (vertical 1 / n averaging means), and 5 denotes a vertical filter for performing interpolation processing on data in the vertical direction. This is a direction linear interpolation filter (vertical direction interpolation means), and the vertical direction 1 / n averaging filter 4 and the vertical direction linear interpolation filter 5 constitute a vertical direction filter.
Reference numeral 6 denotes a memory (storage unit) for temporarily storing the processed signal, for example, for display. Also, 7
_Y, 7 _U, 7 _V is the output terminal of the luminance signal Y, the color difference signals U and the color difference signal V that is converted number of pixels, respectively.

As shown in the figure, in the pixel number converter according to the present embodiment, the 1 / n averaging filter 2 in the horizontal direction corresponds to the luminance signal Y, the color difference signal U, and the color difference signal V, respectively. A horizontal filter composed of a horizontal linear interpolation filter 3 and a vertical 1 / n averaging filter 4
And a vertical filter composed of a vertical linear interpolation filter 5 and a memory 6 are sequentially connected. That is, the first horizontal direction 1
1 / n averaging filter 2 in the horizontal direction as / n averaging means
A first horizontal filter comprising a horizontal linear interpolation filter 3 as a first horizontal interpolation means, and a vertical 1 / n averaging filter 4 as a first vertical 1 / n averaging means. A first vertical filter comprising a vertical linear interpolation filter 5 which is a first vertical interpolation means;
The configuration is such that the memory 6 as the first storage means is sequentially connected.

Similarly, for the color difference signals U and V,
Second and third horizontal / linear averaging filters 2 which are second and third horizontal 1 / n averaging means and horizontal linear interpolation filters 3 which are second and third horizontal interpolation means. A third horizontal filter, a vertical 1 / n averaging filter 4 as second and third vertical 1 / n averaging means, and a vertical linear interpolation as second and third vertical interpolation means. Second and third vertical filters composed of a filter 5 and a memory 6 as second and third storage means are sequentially connected.

Next, FIG. 2 is a diagram showing a specific internal configuration of the horizontal filter according to the first embodiment. In FIG. 1, reference numeral 1 denotes an input terminal of one of the digitized luminance signal Y, color difference signal U, and color difference signal V (that is, 1).
Represents a representative one of the input terminals 1 _Y , 1 _U and 1 _V in FIG. ), 8 is a D flip-flop for latching pixel data from the input terminal 1, 9 is an adder, 10 is a D flip-flop for sequentially integrating input data, and resetting every n data, and 11 is an integrated. 1 / n dividers for averaging the results. These form a horizontal 1 / n averaging filter 2. Further, 12 is a D flip-flop for latching data, 13 is a D flip-flop used for linear interpolation, 14 and 15 are coefficient variable multipliers capable of arbitrarily setting a filter coefficient, and 16 is a sum of values multiplied by coefficients. , And these constitute a horizontal linear interpolation filter 3.

Next, the operation will be described. 1 and 2, an input terminal 1 (ie, one input terminal 1 _Y , 1 _U ,
1 _V ) are digitized luminance signal Y, color difference signal U, and color difference signal V. First, the input signals are averaged by the 1 / n averaging filter 2 in the horizontal direction, and down-sampling is performed. By passing through the 1 / n averaging filter 2 in the horizontal direction, band limitation for reducing aliasing distortion at the time of subsequent downsampling is performed.

Here, the general 1
FIG. 3 shows an example of a specific structure of the / n averaging filter.
In FIG. 3, reference numeral 17 denotes an input terminal of a digital signal, 8 denotes a D flip-flop for latching data from the input terminal 17, and 19, 20,.
D flip-flops. The data delayed by one clock by the n D flip-flops is added by an adder 22 and then averaged by dividing the data by a 1 / n divider 11. Is output to the horizontal linear interpolation filter 3. If the processing according to the circuit shown in FIG. 3 is performed, the number of taps of the 1 / n averaging filter becomes n. When n is changed according to the pixel number conversion ratio, the number of taps also needs to be changed accordingly. FIG. 4 shows the difference between the data processing concept of the horizontal 1 / n averaging filter 2 shown in FIG. 2 and the general 1 / n averaging filter shown in FIG. 3 in the case of n = 3. It is what was explained for.

As can be seen from FIG. 4, 1 /
When the signal is processed by the n-averaging filter circuit, it is necessary to determine the number of D flip-flops according to the value of n of the 1 / n averaging filter, and a multiplier for the number of taps is necessary. The larger the value of n, the larger the circuit scale. However, since it is known that the signal processed by the 1 / n averaging filter is now down-sampled, in this embodiment, by resetting the D flip-flop 10 every n data, one adder (ie, With the adder 9) and one D flip-flop (ie, D flip-flop 10),
Since a function equivalent to the 1 / n averaging filter shown in FIG. 3 is realized, the processing speed is high and the circuit scale can be reduced.

Now, it is assumed that input pixel data having a pixel number K (K is an arbitrary integer) is converted into pixel data having a pixel number L (L is an arbitrary integer).
Is a natural number that satisfies, for example, L / K × n ≒ 1. Even when the conversion ratio of the number of pixels (that is, L / K) is changed, when the horizontal direction linear interpolation is performed by always setting the value of n to a value that satisfies this condition, the reading of data into the horizontal direction linear interpolation filter is performed. Complex control can be avoided.
This will be described with reference to FIGS.

FIG. 5 is a schematic diagram of linear interpolation when 1 / n averaging filter processing is not performed as preprocessing.
The concept of linear interpolation processing is shown for a case where the conversion ratio is 3/11 and a case where the conversion ratio is 2/9. Dx in the figure
(X = 0, 1, 2, 3...) Are input data Y, U, V that have not been subjected to 1 / n averaging filter processing. FIG. 5A shows the case where L / K = 3/11, and FIG.
The case where K = 2/9 is shown. As shown in FIG. 5A, when the conversion ratio L / K = 3/11, within the time shown in FIG. 5A, D ₀ , D ₃ , D ₄ , D ₇ , D ₈ , D
_It is necessary to read the six data of ₁₁ into the horizontal linear interpolation filter and calculate the output (indicated by x in FIG. 5), and as shown in FIG. 5B, the conversion ratio L / K
In the case of = _2/9 , the six data D ₀ , D ₄ , D ₅ , D ₉ , D ₁₃ and D ₁₄ are read into the horizontal linear interpolation filter within the time shown in FIG. It is necessary to calculate the output (indicated by X in FIG. 5). As described above, if the processing of the 1 / n averaging filter is not performed as the pre-processing, every time the conversion ratio changes, the data used for the linear interpolation calculation is not read irregularly according to the change of the ratio. must not.

FIG. 6 is a schematic diagram of linear interpolation in the case where 1 / n averaging filter processing is performed as preprocessing.
The concept of linear interpolation processing is shown for a case where the conversion ratio is 3/11 and a case where the conversion ratio is 2/9. As shown in FIG. 6, in the linear interpolation in the case of performing 1 / n averaging filter processing as preprocessing, for example, n is set to a value satisfying a condition of L / K × n ≒ 1, and 1 / n is set. If the processing of the n averaging filter is performed, the data (D ′ ₀ , D ′ ₄ , D ′ ₈ , D ′ ₁₂ ) after the processing of the 1 / n averaging filter arranged at equal intervals are sequentially read, and the linear Interpolation processing only needs to be performed (the x mark in the figure is obtained), control of the timing of interpolation calculation is simplified, and complicated reading control is not required.
In FIG. 6, D'x (x = 0, 1, 2, 3,...)
.) Is the calculation result of the 1 / n averaging filter, so 1
A dash (') is added to distinguish from Dx in FIG. 5 when the / n averaging filter processing is not performed. By the way, although detailed description is omitted, the value of n is L /
The reason for setting the value to satisfy the condition of K × n ≒ 1 is 1 /
This is because the value of the processing result by the n-averaging filter can be used almost without waste and the processing efficiency is good, and the value of n is not particularly limited to the above condition.

Next, the same processing as in the horizontal direction is performed on each of the luminance signal Y and the color difference signals U and V processed in each horizontal direction filter in the vertical direction. FIG.
FIG. 2 is a diagram illustrating a specific configuration of a vertical filter illustrated in FIG. 1. In the figure, reference numeral 25 denotes a D flip-flop for latching data from the horizontal linear interpolation filter 3, and reference numeral 26 denotes an adder for successively accumulating data (that is, data sequentially latched by the D flip-flop 25). , 27 store data for one line in the horizontal direction,
A line memory 28 for use in the integration calculation is a 1 / n divider for averaging the integrated results, and these constitute a vertical 1 / n averaging filter 4.

29 is a vertical linear interpolation filter 4
D flip-flop for latching data from
Numeral 30 denotes a horizontal direction 1 for performing a linear interpolation calculation in a vertical direction.
Line memories 31 and 32 for storing data for lines
Is a filter coefficient variable multiplier for variable coefficients, and 33 is an adder for adding the calculation results, and these constitute the vertical linear interpolation filter 5. Reference numeral 34 denotes an output terminal of an interpolation calculation result in the vertical linear interpolation filter 5. In the vertical direction, the line memory 30 is reset every n lines in consideration of downsampling performed later in the case of linear interpolation, and only the data that should be downsampled in advance is calculated. Can be reduced to one line instead of n lines.

As described above, the pixel number conversion device according to the present embodiment employs such a structure to provide a high intermediate frequency exceeding the frequency of the input / output signal regardless of the number of pixels before and after the conversion. The conversion of the number of pixels that does not require a frequency and is less affected by aliasing distortion can be realized with a small-scale circuit.

Embodiment 2 In the horizontal filter of the pixel number converter according to Embodiment 1, the luminance signal Y and the color difference signals U and V from the horizontal 1 / n averaging filter 2 (ie, the luminance signal and the color difference signal) are used. Both are interpolated using the horizontal linear interpolation filter 3. However, the present embodiment utilizes the fact that the sensitivity of the human eye to the color difference signals U and V is worse than that to the luminance signal Y. hand,
For the color difference signals U and V, a horizontal linear interpolation filter 3
Instead of DDA (DIGITAL DIFFERENTIAL ANALYSIS)
It is characterized by using a filter.

FIG. 8 is a diagram for explaining the processing concept of the DDA filter. In FIG. 8, Da, Db, and Dc indicated by black circles (●) are output data of the 1 / n averaging filter, and D′ a,
D'b and D'c are values of data to be obtained by calculation. In the DDA filter, data that is closer in position to the position of the data to be obtained between the two data is adopted as an approximate value. For example, in FIG.
Instead of calculating and outputting the value of D'a, the value of Da is output.

FIG. 9 is a diagram showing a configuration of a horizontal filter portion of the pixel number conversion device according to the second embodiment. still,
The order in which the horizontal direction filter processing and the vertical direction filter processing are performed is the same as that in the first embodiment. In FIG. 9, 1 _Y is an input terminal of a digitized luminance signal Y,
1 _U is an input terminal of the color difference signal U, and 1 _V is an input terminal of the color difference signal V. 8 is a D flip-flop for latching data, 9 is an adder, 10 is a D flip-flop for sequentially integrating input data and resetting every n data, and 11 is a result of integrating n data. Is a horizontal 1 / n divider for averaging, and these constitute a horizontal 1 / n averaging filter 2.

Reference numeral 12 denotes a D flip-flop for latching luminance signal data of the output from the horizontal 1 / n averaging filter 2, and 13 denotes a D flip-flop used for linear interpolation.
Flip-flops, 14 and 15 are coefficient variable multipliers that can arbitrarily set filter coefficients, and 16 is an adder for adding the values obtained by multiplying the coefficients. These adders are used to perform a horizontal linear interpolation filter (horizontal interpolation filter) 3. Is composed. Further, 35 is a D flip-flop for latching the data of the color difference signal of the output from the horizontal 1 / n averaging filter 2, 36 is a D flip-flop for holding the value of one data before, and 37 is Switch means (switching means) for selecting data to be output next. These are DDA (DIGITAL DIFFERENTIAL ANALISYS.
) The filter 60 is configured. Here, the data to be output is, for example, Db when it is desired to output data at the position of D'b in FIG. The data to be output can always be selected from either the current data or the data one clock before.

Next, the operation will be described. As shown in the figure, the input luminance signal Y, chrominance signal U, and chrominance signal V are averaged by the corresponding horizontal 1 / n averaging filters 2 as in the first embodiment. Be transformed into Next, the averaged luminance signal Y is subjected to downsampling and interpolation processing by the horizontal linear interpolation filter 3 as in the first embodiment. Also in the present embodiment, by performing this 1 / n horizontal averaging filter processing, the value of n always satisfies the condition of L / K × n ≒ 1 even when the conversion ratio of the number of pixels is changed. With such a value, it is possible to avoid complicated control of reading data into the linear interpolation filter when performing the linear interpolation in the subsequent stage. On the other hand, the color difference signal U or the color difference signal V is averaged by the horizontal direction 1 / n averaging filter 2 provided in correspondence with the color difference signal U or the color difference signal V.
The A filter 60 performs downsampling and interpolation processing.

As described above, in the present embodiment, the fact that the sensitivity of the human eye is weaker for the color difference component than for the luminance component when passing through the interpolation filter is used, and the luminance signal Y For the color difference signals U and V, the horizontal direction DDA 60 performs DDA (Digital DIFFERENTIAL ANALYSIS).
LYSIS) Perform filtering processing. DDA filter 6
0 indicates that the circuit scale is smaller than that of the linear interpolation filter, so that the circuit scale can be further reduced as compared with the first embodiment.

Next, the same processing as in the horizontal direction is performed in the vertical direction. FIG. 10 shows a specific configuration of a vertical filter portion of the pixel number conversion device according to the second embodiment. In FIG. 10, reference numeral 25 denotes a D flip-flop for latching data obtained as a result of processing by the preceding horizontal filter, and 26 sequentially accumulates data (that is, data sequentially latched by the D flip-flop 25). Adder 27 stores data for one line in the horizontal direction and uses a line memory for use in integration calculation.
Is a 1 / n divider for averaging the integrated result, and these constitute a vertical 1 / n averaging filter 4. The vertical 1 / n averaging filter 4 having such a configuration is provided corresponding to each of the luminance signal Y, the color difference signal U, and the color difference signal V as shown in the figure.

Reference numeral 29 denotes D for latching data.
Flip-flops, 30 is a line memory for storing data for one line in the horizontal direction for performing a linear interpolation calculation in the vertical direction, 31 and 32 are filter coefficient variable multipliers with variable coefficients, and 33 is a filter for adding calculation results. These are adders, and these constitute the vertical linear interpolation filter 5. 38 is a D flip-flop for latching data, 39 is a line memory for holding the value of the data of the previous line, and 40 is the position of the next data to be output. Switching means (switching means) for performing switching for selecting and outputting any data closer to the data, and these constitute a vertical direction DDA filter 61. 34 _Y is an output terminal of the luminance signal processed by the vertical linear interpolation filter 5, and 34 _U and 34 _V are output terminals of the color difference signals U and V processed by the vertical DDA filter 61.

As shown in FIG. 10, in the vertical filter according to the present embodiment, the luminance signal Y is averaged by the vertical 1 / n averaging filter 4 and then by the vertical linear interpolation filter 5. Down-sampling and interpolation are performed. On the other hand, the chrominance signals U and V are averaged by the vertical 1 / n averaging filter 4, respectively, and then down-sampled and interpolated by the vertical DDA filter 61. .

In the first embodiment, a horizontal 1 / n averaging filter, a horizontal linear interpolation filter, a vertical 1 / n averaging filter, and a vertical linear interpolation filter are provided for each of the Y, U, and V signals. One by one, that is, three horizontal 1 / n averaging filters, three horizontal linear interpolation filters, one vertical 1 / n averaging filter, and three vertical linear interpolation filters were required. However, in the second embodiment, three horizontal 1 / n averaging filters for Y, U, and V signals, one horizontal linear interpolation filter for Y signals, and two horizontal DDA filters for U and V signals 3 vertical directions 1
/ N averaging filter, one vertical linear interpolation filter, and two vertical DDA filters.
Therefore, in the present embodiment, the number of variable coefficient multipliers can be reduced by eight by changing the four linear interpolation filters, horizontal and vertical, into DDA filters, and the circuit scale is further reduced as compared with the first embodiment. be able to.
Although a DDA filter with low accuracy is used for the color difference signals U and V, the sensitivity of human eyes is lower for the color (that is, the color difference signal) than for the luminance Y. The accuracy of the image quality after the conversion is practically no problem.

Embodiment 3 In this embodiment, in the configuration of Embodiment 1 shown in FIG. 1, a horizontal DDA (DIGITAL DIFFERENTIAL ANALISYS) filter 60 and a vertical A vertical DDA filter is provided for each of the luminance signal Y, the color difference signal U, and the color difference signal V in place of the direction linear interpolation filter 5. FIG. 11 is a diagram showing a basic configuration of a horizontal filter of the pixel number conversion device according to the third embodiment. That is, the horizontal direction filter according to the present embodiment has a configuration as shown in FIG. 11 for each of the luminance signal Y, the color difference signal U, and the color difference signal V. In the first embodiment, the horizontal linear interpolation filter 3 is used as a filter for downsampling and interpolation processing in the horizontal filter, but in the present embodiment, a DDA filter 60 is used instead.

In the figure, 8 is a D flip-flop for latching data, 9 is an adder, 10 is a D flip-flop for sequentially integrating input data, and 11 is 1/1 for averaging the integrated result. These are n dividers, and these constitute the 1 / n averaging filter 2. Also, 3
5 is a D flip-flop for latching the output from the horizontal 1 / n averaging filter 2, 36 is a D flip-flop for holding the value one data before, and 37 is the data to be output next. Means (switching means) for the DDA (DIGITAL DIFFERENT
IAL ANALISYS) The filter 60 is constituted. The data to be output is, as described in the second embodiment,
For example, in FIG. 8, it is Db when it is desired to output data at the position of D'b. The data to be output can always be selected from either the current data or the data one clock before.

Next, FIG. 12 shows the basic configuration of the vertical filter portion of the pixel number conversion device according to the third embodiment. That is, the vertical filter according to the present embodiment includes the luminance signal Y processed by the above-described horizontal filter,
For each of the color difference signal U and the color difference signal V, FIG.
2 is provided. In FIG.
25 is a D flip-flop for latching data from the horizontal direction DDA filter 60, 26 is an adder for sequentially accumulating data (that is, data sequentially latched by the D flip-flop 25), and 27 is a horizontal adder. A line memory 28 stores data for one line in the direction and uses it for integration calculation. Reference numeral 28 denotes a 1 / n divider for averaging the integrated result. Make up.

Reference numeral 38 denotes D for latching data.
Flip-flop 39 is a line memory for holding the value of the data one line before, and 40 is the result depending on whether the position of the data to be output next is closer to the current data or the data one line before. Switching means (switching means) for selecting data to be output and performing switching, and constitutes the vertical direction DDA filter 61. Reference numeral 34 denotes an output terminal for a luminance signal processed by the vertical linear interpolation filter 5 or a color difference signal processed by the vertical DDA filter 61. As described above, in the present embodiment, the DDA filter is used not only for the color difference signals U and V but also for the luminance signal Y. Is slightly reduced, but the circuit scale can be further reduced.

Fourth Embodiment In the first, second and third embodiments, the horizontal 1 / n averaging filter, the horizontal linear interpolation filter, the vertical 1 / n averaging filter, and the vertical linear interpolation filter are processed in this order. However, for example, when it is desired to perform processing of enlarging in the horizontal direction and reducing in the vertical direction, as described later, performing the processing in the vertical direction first reduces the overall calculation amount. Thus, the positions of the horizontal linear interpolation filter, the vertical 1 / n averaging filter, and the vertical linear interpolation filter processing filter (that is, according to the conversion ratio) in accordance with the horizontal and vertical enlargement and reduction ratios (ie, The fourth embodiment is such that the order of the filters can be freely rearranged. FIG. 13 shows a basic configuration of a pixel number conversion device according to the fourth embodiment.

In FIG. 13, reference numeral 1 denotes an input terminal for pixel data to which any one of the digitized luminance signal Y, color difference signal U, and color difference signal V is input;
/ N averaging filter, 41 is a switch for selecting whether to perform 1 / n averaging filter processing in the horizontal direction and then perform 1 / n averaging filter processing in the vertical direction or linear interpolation filter processing in the horizontal direction. Means (switching means), 4 is a vertical 1 / n averaging filter, 42 is a vertical 1 / n averaging filter which uses data after performing horizontal linear interpolation when performing vertical linear interpolation. Switch means (switching means) for selecting whether to use the data after the processing is performed, 5 is a vertical linear interpolation filter,
3 is for performing the linear interpolation filter processing in the horizontal direction.
Switch means (switching means) for selecting which processing result of a / n vertical averaging filter, a vertical linear interpolation filter, and a horizontal 1 / n averaging filter,
3 is a linear interpolation filter for the horizontal direction, and 44 is a switch means for temporarily selecting whether the data temporarily stored in the memory as output data is the output result of the horizontal linear interpolation filter or the output result of the vertical linear interpolation filter. (Switching means), 6 is a memory for temporarily storing output data, and 7 is an output terminal.

Also in this embodiment, a circuit having a configuration as shown in FIG. 13 is provided for each of the input luminance signal Y, color difference signal U, and color difference signal V. With such a configuration, a pixel number conversion device having a structure as shown in FIG. 1, a structure as shown in FIG. 14, or a three-type structure as shown in FIG. The switching can be realized as appropriate. FIG. 14 or FIG. 15 shows one mode of a pixel number conversion device realized by the present embodiment. As a result, it is possible to perform a filtering process with an optimum or minimum calculation amount for the relationship between the number of pixels before and after the conversion.

For example, when it is desired to enlarge in the horizontal direction and reduce in the vertical direction, as shown in FIG. 1, a horizontal 1 / n averaging filter (n = 1) → a horizontal linear interpolation filter → a vertical 1 / When processing is performed in a filtering order such as an n-averaging filter → a vertical linear interpolation filter, the number of pixels in the horizontal direction increases when the horizontal linear interpolation filter processing is performed. Filtering is performed, which is inefficient. Therefore, by appropriately switching each switch means (switching means) to obtain the configuration shown in FIG. 15, the filtering in the vertical direction is performed first, and after the number of pixels is reduced,
The processing is to increase the number of pixels in the horizontal direction, and the amount of calculation can be reduced without changing the result. In FIG. 13, the switch means (switching means) 41 is below, the switch means (switching means) 42 is down, the switch means (switching means) 43 is up, and the switch means (switching means) 4
If the number 4 is selected below, the filtering order is as shown in FIG.

Also, 1/3 in the horizontal direction and 1 in the vertical direction
In the case of / 5 times, the structure shown in FIG. 1 or the structure shown in FIG. 14 may be used. In this case, the value of n in the horizontal direction may be 3, for example, and the value of n in the vertical direction may be 5, for example. It should be noted that FIG. 1 shows that the switch means (switching means) 41 selects the upper side, the switch means (switching means) 43 selects the lower side, the switch means (switching means) 42 selects the lower side, and the switch means (switching means) 44 selects the upper side. In such a filtering order, the switch means (switching means) 41 is at the bottom, the switch means (switching means) 43 is at the middle, the switch means (switching means) 42 is at the top, and the switch means (switching means) 4
If the number 4 is selected above, the filtering order is as shown in FIG.

Fifth Embodiment In the first, second, and third embodiments, a circuit for performing a linear interpolation filter process is provided immediately after a 1 / n averaging filter. The output result of the n-averaging filter is temporarily stored in a memory, and linear interpolation processing is performed using the data. This is because, for example, when the value of n in the 1 / n averaging filter is set to (L / K) × n> 1, such a configuration can reduce the memory.

FIG. 16 is a block diagram showing a basic configuration of a pixel element conversion device according to the fifth embodiment. In the figure, 1 is an input terminal to which any one of the pixel data of the luminance signal Y and the color difference signals U and V is inputted, 2 is a horizontal 1 / n averaging filter, 4 is a vertical 1 / n averaging filter, 6 Is a memory, 3 is a horizontal linear interpolation filter, 5 is a vertical linear interpolation filter, and 7 is an output terminal. In this embodiment, it goes without saying that a circuit having a configuration as shown in FIG. 16 is provided for each of the input luminance signal Y, color difference signal U, and color difference signal V. As shown in FIG. 16, in the present embodiment, first, 1 / n averaging filter processing in the horizontal and vertical directions is performed on each of the input luminance signal Y, color difference signal U, and color difference signal V. The result is temporarily stored in the memory 6, and the data stored in the memory 6 is appropriately read to perform a linear interpolation filter process.

The case where the effect obtained by such a configuration is reduced to, for example, 2/9 will be described with reference to FIG. Regardless of the case where n = 5 or n = 10, if the memory is provided after performing the linear interpolation filter processing as in the first, second, and third embodiments, for example, FIG.
The three output data indicated by the crosses in 7 must be stored in the memory. However, once the output result of the 1 / n averaging filter is once stored in the memory as in the present embodiment, the number of data that needs to be stored in the memory to produce three output results is n = 5 Is four (D0, D5, D10, D15), n = 10
In this case, only two (D0, D10) are required. Therefore,
For example, when a circuit having a configuration as shown in FIG. 16 is created, and linear interpolation processing is performed at a display speed using data once stored in the memory and output is performed, it is not necessary to store the increased pixel data in the memory. , Memory can be reduced.

Sixth Embodiment FIG. 18 is a block diagram showing a basic configuration of a pixel number conversion device according to a sixth embodiment. In the figure, reference numeral 1 denotes an input terminal to which any one of pixel data of a digitized luminance signal Y, color difference signal U, and color difference signal V is input;
n averaging filter, 3 is a horizontal linear interpolation filter, 4
Is a vertical 1 / n averaging filter, 45 is a field memory, 46 is a motion detection circuit, 47 is data to be used for vertical linear interpolation filter processing one field before or one line before. A switch means (switching means) 5 for selecting whether or not, 5 is a vertical linear interpolation filter, and 34 is an output terminal. In the present embodiment,
A circuit having a configuration as shown in FIG. 16 is provided for each of the input luminance signal Y, color difference signal U, and color difference signal V.

In the present embodiment, after the input pixel data is subjected to the same horizontal processing as in the first embodiment by the 1 / n averaging filter 2 and the horizontal linear interpolation filter 3, Then, motion detection is performed using data after passing through the 1 / n averaging filter 4 in the vertical direction. Based on the result, it is determined whether to perform filtering using data between fields or to perform filtering using data in a field. That is, if motion is detected, processing is performed using intra-field data, and if motion is not detected, inter-field data is used.

FIG. 19 is a diagram for explaining the concept of motion detection. Motion detection means that, for example, when it is considered that a continuous screen is made by displaying slightly different screens one after another, a previous screen is displayed. The purpose is to quantitatively detect the difference between the screen and the current screen. The comparison may be performed between corresponding pixels, or may be performed by using a value as a reference in units of blocks having a certain size. Now, an appropriate criterion value is determined, and the value for comparing the corresponding pixel between the previous screen and the current screen or the block unit (for example, the average value of the pixels included in the block, etc.) is this value. If there is a big difference, it is determined that there is "movement".
Based on the determination result, data to be used for vertical linear interpolation is selected.

In the motion detection circuit 46 shown in FIG. 18, for example, when a general TV image is considered, a reference value is compared between a pixel on the current line of the current field and a corresponding pixel on the next line. The value of the time motion is compared with the value of the motion at the time of comparing the corresponding pixel of the current field and the next field in the interlace method, and the smaller value data is adopted as data used for linear interpolation. I do. That is, in the present embodiment, it is possible to select the optimal processing in accordance with the motion detection result of the image whether to perform the vertical linear interpolation processing between frames or between fields. It is possible to realize a pixel number conversion device that maintains high image quality for an image signal.

[0062]

According to the pixel number converter according to the present invention, a pixel number converter for enlarging and reducing the number of pixels of digital image data by interpolation calculation, wherein digitized pixel data is input, N (n
1 / n averaging means for calculating and outputting an average value of input pixel data of an arbitrary natural number) in the horizontal and vertical directions, and outputting the output data from the 1 / n averaging means in the horizontal and vertical directions. Since interpolation processing means for performing interpolation processing on the other hand and storage means for temporarily storing output data from the interpolation processing means are provided, data for each result of the 1 / n averaging processing in the horizontal and vertical directions is stored. This means that the pixel number can be read and subjected to the interpolation processing, and the pixel number conversion can be performed regardless of the relationship between the pixel numbers before and after the conversion and without the need for a high intermediate frequency higher than the frequency before and after the conversion. Further, the deterioration of the image quality due to the aliasing distortion is reduced, and the conversion of the number of pixels can be realized by a small-scale circuit.

Further, according to the pixel number converter according to the present invention, there is provided a pixel number converter for enlarging or reducing the number of pixels of digital image data by interpolation operation, wherein the digitized luminance signal Y and color difference signal U and color difference signal V
Respectively, and first, second and third horizontal 1 / n averaging means for performing 1 / n averaging in the horizontal direction on n pieces of input data (n is an arbitrary natural number),
First, second and third horizontal interpolation means for interpolating output data from the first, second and third horizontal 1 / n averaging means in the horizontal direction, respectively; First, second and third vertical 1 / n averaging means for performing 1 / n averaging on output data from the first, second and third horizontal interpolation filters in the vertical direction, respectively; First, second, and third vertical interpolation means for performing interpolation processing on output data from the first, second, and third vertical 1 / n averaging means in the vertical direction, respectively; , And storage means for temporarily storing output data from the second and third vertical interpolation means, respectively, so that the luminance signal Y, the color difference signal U, and the color difference signal V For each result of 1 / n averaging That is, it is only necessary to read the data and perform the interpolation processing. The pixel number conversion of the pixel data composed of the digitized luminance signal Y, color difference signal U and color difference signal V is performed regardless of the number of pixels before and after the conversion. Pixel number conversion can be performed without requiring a high intermediate frequency higher than the preceding and following frequencies. Further, the deterioration of the image quality due to the aliasing distortion is reduced, and the conversion of the number of pixels can be realized by a small-scale circuit.

Further, according to the pixel number conversion device of the present invention, the first, second and third horizontal interpolation means are each constituted by a horizontal linear interpolation filter, and the first, second and third horizontal interpolation filters are provided. Since each of the third vertical interpolation means is constituted by a vertical linear interpolation filter, the pixel number conversion of the pixel data composed of the digitized luminance signal Y, color difference signal U, and color difference signal V is performed based on the number of pixels before and after the conversion. Regardless of the relationship, the pixel number conversion can be performed with high accuracy without requiring a high intermediate frequency higher than the frequency before and after the conversion. Further, the deterioration of the image quality due to the aliasing distortion is reduced, and the conversion of the number of pixels can be realized by a small-scale circuit.

According to the pixel number converter according to the present invention, the second and third horizontal interpolation means are each constituted by a horizontal DDA filter, and the second and third vertical interpolation means are each constituted by a horizontal DDA filter. Each of them is composed of a vertical DDA filter, and the accuracy of the DDA filter is slightly lower than that of the color difference signal with low sensitivity to human eyes, but the circuit scale is smaller than that of the linear interpolation filter. The circuit scale can be reduced with almost no deterioration.

According to the pixel number converter according to the present invention, the first, second and third horizontal interpolation means are each constituted by a horizontal DDA filter, and the first, second and third horizontal interpolation means are provided. The vertical interpolation means 3 are each constituted by a vertical DDA filter, and the D signal is also applied to the luminance signal.
Since the DA filter is used, the image quality after conversion is slightly reduced, but the circuit scale can be further reduced.

According to the pixel number conversion device of the present invention, the horizontal interpolation means and the vertical 1 /
By further providing a switching means capable of changing the connection order of the n-averaging means and the vertical interpolation means to a predetermined order, according to the horizontal and vertical enlargement and reduction ratios (that is, according to the conversion ratio). In addition, the circuit configuration of the entire apparatus can be set to a desired configuration that minimizes the amount of calculation in the entire circuit.

According to the pixel number conversion device of the present invention, there is provided a pixel number conversion device for enlarging and reducing the number of pixels of digital image data by interpolation calculation, wherein the digitized luminance signal Y and color difference signal U and color difference signal V
Are respectively input, and first, second and third horizontal 1 / n averaging means for averaging the input n data (n is an arbitrary natural number) in the horizontal direction respectively. And the output data from the first, second and third horizontal 1 / n averaging means are each 1
/ N first, second and third vertical directions 1 /
n averaging means; first, second and third storage means for temporarily storing data output from the first, second and third vertical 1 / n averaging means, respectively; First, second, and third horizontal interpolation means for horizontally interpolating data read from the second and third storage means, respectively, and the first, second, and third horizontal interpolation means. Since there are first, second and third vertical interpolation means for vertically interpolating the output data from the means, respectively, the linear interpolation processing is performed at the display speed using the data once stored in the storage means. When output, the increased amount of pixel data does not need to be stored in the storage means, so that the memory capacity of the storage means can be reduced.

According to the pixel number conversion device of the present invention, the first, second, and third pixels in the second aspect of the present invention.
First, second, and third field memories for temporarily storing output data from the vertical 1 / n averaging means for one field, respectively, and the first, second, and third vertical 1 / n averaging means. Image data of the first, second, and third current screens, which are output data from the
And the first, stored in a third field memory,
First, second, and third detecting the motion of an image by comparing the image data of the first, second, and third previous screens respectively corresponding to the image data of the second and third current screens, respectively.
And image data of the first, second and third current screens based on the detection results of the first, second and third motion detecting means, and the first, second and third current screens. Third
Of the previous screen, and the switching means for outputting the image data to the first, second and third vertical interpolation means, so that the vertical linear interpolation processing is performed between frames or between fields. It is possible to select the optimal processing according to the motion detection result of the image,
It is possible to realize a pixel number conversion device that maintains high image quality even for a rapidly moving image signal.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a pixel number conversion device according to a first embodiment.

FIG. 2 is a diagram showing a specific configuration of a horizontal filter according to the first embodiment.

FIG. 3 is a diagram illustrating an example of a structure of a general 1 / n averaging filter.

FIG. 4 illustrates the difference between the data processing concept of the horizontal 1 / n averaging filter 2 shown in FIG. 2 and the general 1 / n averaging filter shown in FIG. 3, taking the case of n = 3 as an example. FIG.

FIG. 5 is a schematic diagram for explaining the concept of linear interpolation processing when 1 / n averaging filter processing is not performed as preprocessing.

FIG. 6 is a schematic diagram for explaining the concept of linear interpolation processing when 1 / n averaging filter processing is performed as preprocessing.

FIG. 7 is a diagram showing a specific configuration of a vertical filter according to the first embodiment.

[Fig. 8] DDA (DIGITAL DIFFERENTIAL ANALYSIS
FIG. 5 is a diagram for explaining the concept of a filter process.

FIG. 9 is a diagram showing a configuration of a horizontal filter portion of the pixel number conversion device according to the second embodiment.

FIG. 10 shows a configuration of a vertical filter part of a pixel number conversion device according to a second embodiment.

FIG. 11 is a diagram showing a basic configuration of a horizontal filter in a pixel number conversion device according to a third embodiment.

FIG. 12 is a diagram showing a basic configuration of a vertical filter in a pixel number conversion device according to a third embodiment.

FIG. 13 is a block diagram illustrating a basic configuration of a pixel number conversion device according to a fourth embodiment.

FIG. 14 is a block diagram illustrating one embodiment of a pixel number conversion device realized by Embodiment 4.

FIG. 15 is a block diagram illustrating one embodiment of a pixel number conversion device realized by Embodiment 4.

FIG. 16 is a block diagram illustrating a configuration of a pixel number conversion device according to a fifth embodiment.

FIG. 17 is a diagram illustrating an example of an effect of the pixel number conversion device according to the fifth embodiment.

FIG. 18 is a block diagram showing a basic configuration of a pixel number conversion device according to a sixth embodiment.

FIG. 19 is a diagram for explaining the concept of motion detection in the pixel number conversion device according to the sixth embodiment.

FIG. 20 is a block diagram showing a basic configuration of a conventional pixel number conversion device.

FIG. 21 is a diagram for explaining the concept of pixel number conversion.

FIG. 22 is a diagram for explaining a flow of data processing when data is to be inserted at a position ５ of the original data.

[Explanation of symbols]

1, 1 _Y , 1 _U , 1 _V input terminal 2 1 / horizontal direction
n averaging filter 3 horizontal linear interpolation filter 4 vertical 1 /
n averaging filter 5 vertical linear interpolation filter 6 memory 7,7 _Y, 7 _U, 7 _V output terminal 8 D flip-flop 9 adder 10 D flip-flops 11 1 / n divider 12 D flip-flop 13 D flip-flops 14 Coefficient variable multiplier 15 Coefficient variable multiplier 16 Adder 25 D flip-flop 26 Adder 27 Line memory 28 1 / n divider 29 D flip-flop 30 Line memory 31 Coefficient variable multiplier 32 Coefficient variable multiplier 33 Adder 34, 34 _Y ,
34 _U , 34 _V output terminals 35 D flip-flop 36 D flip-flop 37 switching means 38 D flip-flop 39 line memory 40 switching means 41 switching means 42 switching means 43 switching means 44 switching means 45 field memory 46 motion detecting circuit 47 switching means 60 horizontal direction D
DA filter 61 Vertical DDA filter

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H04N 9/74 G09G 5/00 520V 11/20 5/36 520G 520J F-term (Reference) 5C006 AA11 AA22 AC21 AF01 AF44 AF47 BB11 BC16 BF02 BF21 FA43 5C057 AA06 BB00 DA06 DB01 DC01 EA02 EA07 EB11 EB15 EJ02 EL01 GC09 GC10 GD04 GD05 GG02 GG04 GJ01 GJ03 GJ04 5C058 AA06 AA11 AB02 BA01 BA12 BA13 BB06 GA12 HA02 KC02 KC08 KC09 KE02 KE03 KE05 KE08 KE09 KF05 KG01 KG08 KM13 KM15 KP05 5C082 AA01 AA02 BA12 BA41 BB15 BB25 CA33 CA34 CA84 DA51 MM04

Claims (8)

[Claims] 1. A pixel number conversion device for enlarging and reducing the number of pixels of digital image data by an interpolation operation, wherein digitized pixel data is inputted, and n inputted (n is an arbitrary natural number) Calculate the average value of the input pixel data in the horizontal and vertical directions and output 1 /
n averaging means, interpolation processing means for performing interpolation processing on output data from the 1 / n averaging means in horizontal and vertical directions, and storage means for temporarily storing output data from the interpolation processing means. A pixel number conversion device, comprising: 2. A pixel number conversion device for enlarging and reducing the number of pixels of digital image data by an interpolation operation, wherein a digitized luminance signal Y, a color difference signal U and a color difference signal V are respectively inputted and inputted. First, second and third horizontal 1 / n averaging means for performing horizontal 1 / n averaging on n pieces of data (n is an arbitrary natural number); First, second and third horizontal interpolation means for performing interpolation processing on output data from the third horizontal 1 / n averaging means in the horizontal direction, respectively; and the first, second and third interpolation means First, second and third vertical 1 / n averaging means for performing 1 / n averaging on the output data from the horizontal interpolation filter in the vertical direction, respectively, and the first, second and third averaging means. 3 vertical 1 / n averaging means First, second, and third vertical interpolation means for performing interpolation processing on the output data in the vertical direction, respectively, and temporarily output data from the first, second, and third vertical interpolation means, respectively. A pixel number conversion device, comprising: storage means for storing. 3. The first, second and third horizontal interpolation means are each constituted by a horizontal linear interpolation filter,
3. The pixel number conversion device according to claim 2, wherein each of the first, second and third vertical interpolation means is constituted by a vertical linear interpolation filter. 4. The second and third horizontal interpolation means are each composed of a horizontal DDA filter.
And the third vertical interpolation means are respectively provided in the vertical direction DD.
The pixel number conversion device according to claim 2, comprising an A filter. 5. The first, second and third horizontal interpolation means are each composed of a horizontal DDA filter, and the first, second and third vertical interpolation means are respectively vertical DDA filters. The pixel number conversion device according to claim 2, wherein: 6. A switching means for switching the connection order of the horizontal interpolation means, the vertical 1 / n averaging means, and the vertical interpolation means in a predetermined order according to the conversion ratio. The pixel number conversion device according to claim 2, wherein 7. A pixel number conversion device for enlarging and reducing the number of pixels of digital image data by an interpolation operation, wherein a digitized luminance signal Y, a color difference signal U and a color difference signal V are inputted and inputted. N (n is an arbitrary natural number) data is 1 / n in the horizontal direction.
First, second and third horizontal 1 / n averaging means for performing averaging; and output data from the first, second and third horizontal 1 / n averaging means in the vertical direction, respectively. First, second, and third vertical 1 / n averaging means for performing 1 / n averaging on the output, and outputs from the first, second, and third vertical 1 / n averaging means. First, second and third storage means for temporarily storing data respectively; first, second and third means for horizontally interpolating data read from the first, second and third storage means, respectively. A third horizontal interpolation means; and first, second, and third vertical interpolation means for vertically interpolating output data from the first, second, and third horizontal interpolation means, respectively. A pixel number conversion device. 8. The first, second and third vertical directions 1 / n.
First, second, and third field memories for temporarily storing output data from the averaging means for one field, respectively; and output data from the first, second, and third vertical 1 / n averaging means. And the image data of the first, second and third current screens stored in the first, second and third field memories. First, second and third motion detecting means for comparing the image data of the corresponding first, second and third previous screens respectively to detect the motion of the image; and the first, second and third motion detecting means. The image data of the first, second, and third current screens and the image data of the first, second, and third previous screens are respectively switched based on the detection result of the third motion detection unit. First, second and third vertical interpolation means Pixel conversion apparatus according to claim 2, further comprising a switching means for outputting.