JP2001008170A - Synchronous reproducing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a synchronous reproducing device for realizing smooth picture reproduction and voice reproduction by synchronously reproducing video and picture data without overlapping or omitting them. SOLUTION: This device is provided with a voice data buffer 4 and a picture data buffer 5 for dividing decoded data FD from a recording medium 1 into voice data DA and picture data DV, and storing the data, a means 10A for decoding the voice data into voice signal data FA, a means 8A for decoding the picture data into picture signal data FV, means 11 and 12 for generating a voice signal SA and a picture signal SV, a means 6 for generating a reference clock CK, and means 13A and 7 and 9 for generating clocks CKA and CKV for decoding for synchronizing the voice signal and the picture signal. Then, at least one of the voice decoding means and the picture decoding means is controlled synchronously with the clocks for decoding generated based on the picture reproduction information VPTS, the voice reproduction information APTS, and the reference clock.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronous reproducing apparatus for synchronously reproducing image data and audio data from a recording medium (DVD, hard disk, etc.), and more particularly to a synchronous reproduction apparatus without duplication or loss. The present invention relates to a synchronous reproduction device that realizes smooth image reproduction and audio reproduction by performing synchronous reproduction.

[0002]

2. Description of the Related Art FIG.
FIG. 11 is a block diagram showing a conventional synchronous reproduction circuit described in Japanese Patent Laid-Open No. 3 (Kokai) 3;

In FIG. 10, reference numeral 1 denotes a disk made of an optical recording medium or the like, on which data including audio data and image data is divided and recorded. 2 is disk 1
Decoding means 8 for decoding the data D extracted from the image data; 8, image decoding means for decoding the image data into predetermined image signal data; and 10, audio decoding means for decoding the audio data into the predetermined audio signal data.

Reference numeral 13 denotes a controller composed of a CPU, which controls the decoding means 2, the image decoding means 8, and the audio decoding means 10. Reference numeral 14 denotes a local bus connected to the controller 13, which exchanges commands and data between the controller 13 and peripheral devices such as the decoding unit 2.

Reference numeral 15 denotes a buffer memory belonging to the controller 13, 19 denotes a display device connected to the image decoding means 8, 16
Is a speaker connected to the audio decoding means 10. 17
Are various external systems, and exchange control requests with the controller 13 via the local bus 14. 1
Reference numeral 8 denotes a bus interface unit that performs an interface function between the external system 17 and the local bus 14.

Here, MPEG (Moving Pictur)
The method of encoding and decoding in the e Expert Group standard will be described. In the MPEG standard, one picture (screen) is used to increase the data compression rate.
Is displayed, a method of reconstructing a picture by interpolating temporally preceding and succeeding pictures is adopted, and a data processing method for reconstructing each picture is defined.

In the MPEG standard, I (Intr
a-coded) picture (can be displayed only with data assigned to the picture), P (Predictive-code
d) Picture (requires data assigned to the picture and the temporally previous picture), B (Bidirect
Three picture types are defined, such as an ionally predictive-coded picture (requires data assigned to the picture and temporally preceding and succeeding pictures).

As described above, according to the MPEG standard, a picture (image) decoded before and after in time is a PTS.
It is output after rearrangement according to image reproduction information related to the reproduction time of image data called (Presentation Time-Stamps).

Next, the reproduction operation by the controller 13 of the conventional synchronous reproduction apparatus shown in FIG. 10 will be described. First,
When a reproduction request is issued from the external system 17 to the controller 13 via the bus interface unit 18 and the local bus 14, the controller 13 receives the reproduction request and decodes the information recorded on the disc 1. The data is decoded and read by the means 2.

If the information read from the disk 1 is image data, the controller 13 transfers the data to the image decoding means 8 via the local bus 14 and displays the processing result on the display device 19.

If the information read from the disk 1 is audio data, the controller 13 transfers the data to the audio decoding means 10 via the local bus 14 and outputs the processing result by the speaker 16 as audio.

On the other hand, when the information recorded on the disk 1 is not image data or audio data, when it is not necessary to immediately process even if it is image data or audio data, or when it is necessary to analyze the data contents Then, the controller 13 stores the information read from the disk 1 in the buffer memory 15.

Next, referring to the flow charts shown in FIG. 11 and FIG.
3 will be described. Here, it is assumed that the image decoding unit 8 decodes an MPEG standard video signal, and the audio decoding unit 10 decodes an MPEG standard audio signal.

FIG. 11 shows an audio frame processing routine, which shows a process of generating an audio PTS (information relating to audio reproduction time) based on the audio frame rate.

That is, in step S400 in FIG. 11, every time one audio frame is reproduced, the audio PTS is set as the initial audio time information to be reproduced.
A processed audio PTS is generated by adding a predetermined value corresponding to the audio frame rate to (audio reproduction information).

FIG. 12 shows an image frame processing routine, which shows processing for generating an image PTS (image reproduction information) based on an image frame rate. First, in step S501 in FIG. 12, the image PTS is generated based on the frame (two-field) rate of the image.

That is, the image PTS is set for each frame of the image, using the time information of the first image to be reproduced as an initial value.
By adding a predetermined value corresponding to the image frame rate to (image reproduction information), a processed image PTS is generated.

Subsequently, the processed image PTS and audio PTS are processed.
(Step S502), the image PTS and the sound P
It is determined whether or not the difference ΔPTS from the TS is larger than n frames (step S503).

In step S503, ΔPTS> n
If it is determined to be a frame (that is, YES), it is determined whether or not the image playback control interval exceeds m (S512).

However, each of steps S503 and S51
In 2, the predetermined values m and n are reference values required for each comparison judgment. In step S512, the image reproduction control interval is a time interval at which time axis control of an image signal, such as delay, promotion, and skip, is performed.

If the judgment condition is not satisfied in either step S503 or S512 (ie,
If the determination is NO, the processing routine of FIG.

On the other hand, if it is determined in step S512 that the image reproduction control interval> predetermined value m (that is, YES), it is determined whether or not the image PTS is larger than the audio PTS (step S504).

In step S504, image PTS>
If the audio PTS is determined (ie, YES), since the image is ahead of the audio, the image decoding means 8 is delayed by one frame (or the image PTS and the audio PT).
An instruction requesting (stop until S matches) is issued (step S505), and the processing routine of FIG. 12 ends.

On the other hand, in step S504, the image P
If it is determined that TS ≦ voice PTS (that is, NO),
The picture type is obtained (step S506). Subsequently, it is determined whether the acquired picture type is an I picture, a P picture, or a B picture (step S507).

If it is determined in step S507 that the picture is an I picture or a P picture, a display promotion instruction is issued to the image decoding means 8 (step S50).
8), the processing routine of FIG. 12 ends.

If it is determined in step S507 that the picture is a B picture, a decode skip command is issued to the image decoding means 8 (step S510).
Subsequently, it is repeatedly determined whether or not the skip instruction has been executed until the decode skip instruction is executed (step S511).

Finally, in step S511, a decode skip instruction is issued (ie, YE
After confirming S), the correction value is added to the image PTS (step S509), and the processing routine of FIG. 12 ends.

As described above, when the time difference ΔPTS between the image data and the audio data has occurred for a predetermined time or more, the image decoding means 8 is delayed by one frame (or the image PTS and the audio PTS are delayed by step S504). An instruction requesting a stop until a match is issued is issued, or a decode skip instruction is issued in step S510.

The above steps S504 and S510 mean that the frame image is inserted, stopped and removed.

Here, of the processing for accelerating the reproduction speed of the image (from step S506), the reason why the processing is divided in step S507 between the case where an I picture or a P picture is obtained and the case where a B picture is obtained is as follows. It is as follows.

That is, when an I picture or a P picture is obtained, information of the I picture or the P picture is required when calculating the B pictures arranged before and after the I picture or the P picture. Since it cannot be stopped, only display is promoted after decryption in step S508.

On the other hand, when a B picture is obtained,
Since the decoding of the image itself can be omitted, step S5
By 10, a decode skip instruction is executed.

[0033]

As described above, the conventional synchronous reproducing apparatus executes synchronous reproduction of audio data and image data by using means for inserting, stopping, and removing audio data and image data. Therefore, there is a problem that duplication or omission of reproduced data occurs, and smooth reproduction of an image is hindered.

There is another problem that the audio data and the image data cannot be reproduced without duplication or loss while the audio decoding or image decoding clock is synchronized with the reference clock of the reproducing apparatus.

The present invention has been made to solve the above problems, and synchronizes a decoding clock with a reference clock and adjusts the time axis with respect to the decoding clock by a fixed time axis (time axis compression and expansion). (Operation) to perform synchronous reproduction of audio data and image data without duplication or omission, and to obtain a synchronous reproduction device that realizes smooth image reproduction and audio reproduction.

Further, the present invention generates a decoding clock (audio decoding clock, image decoding clock), a sampling clock for a D / A converter, a sampling clock for an image signal, and the like from one reference clock generating means. Another object of the present invention is to provide a synchronous reproducing apparatus which can construct a system using a small number of reference clock generators.

[0037]

According to a first aspect of the present invention, there is provided a synchronous reproducing apparatus, comprising: decoding means for decoding data extracted from a recording medium to generate decoded data; Separating means for separating data, an audio buffer for storing audio data, an image buffer for storing image data, audio decoding means for decoding audio data read from the audio buffer into predetermined audio signal data, Image decoding means for decoding image data read from the buffer into predetermined image signal data, audio signal generation means for generating an audio signal from audio signal data, and image signal generation means for generating an image signal from the image signal data And a reference clock generator that generates a reference clock that is reflected in the reproduction speed of the recording medium, and synchronizes the audio signal and the image signal. A controller and a clock generator for generating a decoding clock for causing the controller to perform decoding, wherein the controller and the clock generator have image reproduction information relating to at least one of a reproduction time and a decoding time of image data, and a reproduction time and A decoding clock is generated based on the audio reproduction information relating to at least one of the decoding times and a reference clock, and at least one of the audio decoding unit and the image decoding unit is controlled in synchronization with the decoding clock.

According to a second aspect of the present invention, in the first aspect, the controller includes a phase comparison error calculating means for outputting a phase comparison error between the audio reproduction information and the image reproduction information. The clock generation means generates a decoding clock having a frequency corresponding to the phase comparison error.

According to a third aspect of the present invention, there is provided a synchronous reproduction apparatus, wherein the phase comparison error calculating means comprises:
An image reproduction information calculation means for counting the reference clock with the image reproduction information as an initial value to obtain second image reproduction information; outputting a phase difference between the second image reproduction information and the audio reproduction information as a phase comparison error; The clock generation means includes audio clock generation means for generating an audio decoding clock having a frequency corresponding to the phase comparison error.

According to a fourth aspect of the present invention, there is provided a synchronous playback apparatus according to the first aspect, wherein the controller is configured to generate a sampling clock for driving at least one of an audio signal generation unit and an image signal generation unit. Including clock generation means, the decoding clock is set to a frequency that is an integral multiple of the sampling clock.

[0041]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 Hereinafter, Embodiment 1 of the present invention will be specifically described with reference to the drawings. FIG. 1 is a block diagram schematically showing a functional configuration of a synchronous reproduction apparatus according to Embodiment 1 of the present invention.

FIG. 2 is an explanatory diagram showing a specific configuration example of image data and audio data recorded on the disk 1, and FIG. 3 is a block diagram showing the configuration of the audio clock generating means in FIG. It is.

Here, as an example of the synchronous reproduction apparatus, a DVD for reproducing recording data including image data and audio data (see FIG. 2) to reproduce the image signal and the audio signal.
The case of a player will be described.

In FIG. 1, the same components as those described above (see FIG. 10) are denoted by the same reference numerals, and components corresponding to those described above are denoted by “A” after the reference numerals. . As described above, the audio data DA, the image data DV, the audio reproduction information APT
S, image reproduction information VPTS, decoding information DTS (Decoding Time-Stamp) regarding decoding time, system reference time SCR (System Clock Referrer) used for the synchronous reproduction apparatus.
ence) is recorded.

The decoding means 2 performs a predetermined decoding process on the data D (reproduction information) extracted from the disc 1 to generate decoded data FD.

Reference numeral 3 denotes separating means for separating the decoded data FD, and separates and extracts the audio data DA and the image data DV from the decoded data FD based on various kinds of identification information existing in the decoded data FD. At the same time, it outputs the decoding information DTS (not shown here) and the system reference time SCR.

Reference numerals 4 and 5 denote an audio buffer and an image buffer, which store the audio data DA and the image data DV separated by the separating means 3, respectively. Reference numeral 6 denotes a reference clock generator for generating a reference clock CK of the synchronous reproduction device. The reference clock CK is supplied to the audio buffer 4 and the image buffer 5, and is input to the controller 13A to be reflected on the reproduction speed of the disk 1.

Reference numeral 7 denotes an image clock generating means, which divides the frequency of the reference clock CK to generate an image decoding clock CKV. The image decoding means 8A is provided with an image decoding clock CKV.
In synchronization with this, the image data DV read from the image buffer 5 is decoded into predetermined image signal data FV, and the image reproduction information VPTS is output.

Reference numeral 9 denotes an audio clock generating means, which generates an audio decoding clock CKA having a frequency corresponding to the phase comparison error ΔP input from the controller 13A. At least one of the image decoding clock CKV and the audio decoding clock CKA (here, the audio decoding clock CKA) included in the decoding clock is controlled by the controller 13A.

The audio decoding means 10A decodes the audio data DA in the audio buffer 4 into predetermined audio signal data FA in synchronization with the audio decoding clock CKA from the audio clock generating means 9, and outputs audio reproduction information APTS Is output.

Reference numeral 11 denotes an audio signal generating means constituted by a D / A converter, which performs an D / A conversion in accordance with the audio signal data FA from the audio decoding means 10A to output an audio signal SA.

Reference numeral 12 denotes an image signal generating means which outputs an image signal SV according to the image signal data FV from the image decoding means 8A. Audio signal SA and image signal SV
Are input to the speaker 16 and the display device 19, respectively.

Decoding means 2, separating means 3, audio decoding means 1
The controller 13A that performs a series of controls such as 0A (image decoding means 8A) executes the following processing to generate the phase comparison error ΔP input to the audio clock generating means 9.

That is, the controller 13A sets the image reproduction information VPTS from the image decoding means 8A as an initial value, counts the reference clock CK for the image reproduction information VPTS, and obtains the second image reproduction information VPTS2.

Subsequently, the controller 13A performs a phase comparison between the second image reproduction information VPTS2 and the audio reproduction information APTS from the audio decoding means 8A, and compares the second image reproduction information VPTS2 with the audio reproduction information APTS. A digital value proportional to the phase difference from the APTS is output as a phase comparison error ΔP.

The controller 13A includes a decoding clock generating means for generating a decoding clock for synchronizing the audio signal SA and the image signal SV, and the audio signal generating means 1
1 and a sampling clock generating means for generating a sampling clock for driving at least one of the image signal generating means 12.

The controller 13A uses the decoding clock generation means to output image reproduction information (VPTS) relating to at least one of the reproduction time and the decoding time of the image data DV and audio data relating to at least one of the reproduction time and the decoding time of the audio data DA. A decoding clock is generated based on the reproduction information (APTS) and the reference clock CK.

In this case, the decoded information DTS is not related to the audio reproduction information APTS, and is not related to the image reproduction information VPTS.
It is assumed that it can be used as a part of the image reproduction information VPTS.

The controller 13A controls at least one of the audio decoding means 10A and the image decoding means 8A in synchronization with the decoding clock. Further, the controller 13A controls the audio decoding means 10A by inputting the phase comparison error ΔP to the audio clock generating means 9.

Further, in FIG. 1, the reference clock CK from the reference clock generator 6 is supplied to the audio buffer 4 and the image buffer 5, so that the synchronous reproducing apparatus is configured to realize a so-called shock proof operation. ing.

That is, in the execution and stop processing of reading the audio buffer 4 and the image buffer 5, the respective buffers underflow by the operation of the decoding means 2 and the controller 13A together with the rotation speed of the disk 1 and the reproduction address control. Or it is controlled within the range that does not overflow.

Next, a schematic data arrangement recorded on the disk 1 (DVD recording medium) in FIG. 1 will be described with reference to FIG. Figure 2 shows the DVD Specificatio
1 shows an example of an array configuration of audio data DA and image data DV recorded on a disc 1 compliant with “n for Read-0nly Disc / Part 3. Video Specificatins”.

Here, the audio data DA and the image data DV are modulated, for example, according to the MPEG standard. Each data is included in an area called a VOS (Video Object Set), and is divided and
Recorded above.

In FIG. 2, reference numeral 81 denotes an NV_PCK (Navigation Pac) in which reproduction information and special reproduction information are recorded.
k) area, 82 is audio data (audio data DA)
A_PCK (Audio Pack) area in which is recorded, 83
Is V on which video data (image data DV) is recorded.
A _PCK (Video Pack) area 84 is an SP_PCK (Sub-picture Pack) area in which character data and the like are recorded.

Each of the areas 81 to 84 is composed of 2048 bytes, and has a header (Pack header) 8 at the beginning of each area.
5a and 85b are arranged. Also, V_PCK
In the area 83 and the A_PCK area 82, one or more packets (Pack
et) 86a, 86b are arranged.

That is, in the V_PCK area 83, V
_PKT packet (video packet) 86a exists,
In the _PCK area 82, an A_PKT packet (Audio
Packet) 86b exists and each packet 86a and 86
At the head of b, a packet header 87
a and 87b are arranged.

In each of the packet headers 87a and 87b, a system reference time SCR used as a reference time of the reproducing apparatus is arranged.

In the packet header 87a of the V_PKT area 83 including the I picture and the like, the image data DV
VPTS is recorded.

Also, in the packet header 87b of the A_PKT area 82 including the head of the audio frame,
Audio reproduction information APT regarding the reproduction time of the audio data DA
S is recorded.

Further, in the packet header 87a of the V_PKT area 83, decoding information DTS relating to the decoding time of the image data DV is recorded as necessary.

The reproducing apparatus rearranges the decoded image data DV in accordance with the image reproduction information VPTS in the order in which the decoding information DTS increases, and then outputs the image signal SV at the time of the image reproduction information VPTS. At this time, if the image reproduction information VPTS and the decoding information DTS indicate the same value, the decoding information DTS is not recorded.

Next, the configuration of the audio clock generating means 9 in FIG. 1 will be specifically described with reference to FIG.
In FIG. 3, reference numeral 91 denotes a D / A converter inserted on the input side of the audio clock generating means 9, and 92 denotes a loop filter for adjusting the response of the system.

Reference numeral 93 denotes a voltage-controlled oscillator that oscillates a frequency according to the output voltage of the loop filter 92. The relationship between the input frequency and the output voltage of the voltage-controlled oscillator 93 is assumed to monotonically increase or decrease.

Next, the operation of the synchronous reproduction apparatus according to the first embodiment of the present invention will be described with reference to FIGS. 1 to 3 and FIGS. 4 and 5. FIG. 4 shows the controller 13A.
Is a flow chart showing the phase comparison processing operation executed by the above, and FIG. 5 is an explanatory diagram showing a time change of each reproduction information APTS, VPTS and VPTS2.

The synchronous reproduction apparatus according to the first embodiment of the present invention performs synchronous reproduction of the image data DV and the audio data DA recorded on the disk 1 by configuring a PLL together with the phase comparison function of FIG.

In FIG. 4, vp is the value of the image reproduction information VPTS extracted by the image decoding means 8A, and ap is the audio reproduction information APTS extracted by the audio decoding means 10A.
, M and N are individual counter values.

The counter value N is a predetermined time interval TCK (= 1/1) synchronized with the reference clock CK from when the value vp of the image reproduction information VPTS is obtained to when the value ap of the next audio reproduction information APTS is obtained. (90000 × i)), is incremented by “1” every time.

VP is the second image reproduction information V after the addition processing.
The value of PTS2 is calculated as a value obtained by adding a predetermined value M / i (i is a predetermined value set according to system conditions) to the initial value vp. Ap is the value of the audio reproduction information APTS extracted by the audio decoding means 10A.

The phase comparison error ΔP is the second image reproduction information VPT generated based on the image decoding clock CKV.
This is a value corresponding to the phase difference between S2 and the audio reproduction information APTS.
(See FIG. 3).

Here, since the value VP of the second image reproduction information VPTS2 is added using the reference clock CK, as shown by the solid line in FIG. 5, the value VP is accurately calculated in proportion to the transition of the time t. It increases.

The value ap of the audio reproduction information APTS is
By the operation of the phase comparison error ΔP and the audio clock generation means 9, the control is performed so that the value approaches the solid line through which the value VP (the white circle point in FIG. 5) of the second image reproduction information VPTS2 passes.

In FIG. 5, dd is a delay time required for decoding. After the system reference time SCR is output from the separation means 3, the image reproduction information VP is output from the image decoding means 8A.
This corresponds to the time until the TS is output.

Further, α is the audio reproduction information A at the same time.
This is the difference between the value ap of the PTS and the value VP of the second image reproduction information VPTS2.

In FIG. 4, first, as an initial setting process, the initial value of the counter value M is set to M = 0 (step S101), and the initial value of the counter value N is set to N = 1 (step S102). ).

Subsequently, it is determined whether or not the value vp of the image reproduction information VPTS decoded by the image decoding means 8A has been obtained (step S103).
If ES) is determined, the value vp is stored in the memory.

At this time, the value vp of the image reproduction information VPTS obtained first corresponds to the diamond point vp1 in FIG. In step S103, the image reproduction information VP
If it is determined that the value vp of the TS has not been obtained (that is, NO), step S103 is repeated until the value vp of the image reproduction information VPTS can be obtained, and the standby state is maintained.

Next, following the acquisition of the value vp of the image reproduction information VPTS (step S103), the audio decoding means 10A
It is determined whether or not the value ap of the audio reproduction information APTS decoded according to is obtained (step S104). If it is determined that the value ap is obtained (ie, YES), the value ap is stored in the memory, and step S105 is performed. Proceed to.

At this time, the value ap of the audio reproduction information APTS obtained first corresponds to the black circle point ap1 in FIG. In step S104, the audio reproduction information AP
If it is determined that the TS value ap has not been obtained (that is, NO), the process proceeds to step S108 described later.

In step S105, the initial value vp, counter value M and predetermined value i of the image reproduction information VPTS are determined.
Is used to determine the value VP of the second image reproduction information VPTS2 according to the following equation (1).

VP = vp + M / i (1)

Subsequently, using the value ap of the audio reproduction information APTS obtained in step S104, the value VP of the second image reproduction information VPTS2 calculated in step S105, and the counter value N, the following ( The phase comparison error ΔP is obtained by the equation (2).

ΔP = k (ap−VP) / N (2)

However, in equation (2), k is an arbitrary weighting coefficient, and is a value determined by the sensitivity of the voltage controlled oscillator 93 (see FIG. 3) in the audio clock generating means 9 and the like.

The thus calculated phase comparison error ΔP is
The value ap of the audio reproduction information APTS at the same time and the second
5 is different from the value VP of the image reproduction information VPTS2 (α in FIG. 5).
), And the audio clock generation means 9
Is set and input to the D / A converter 91 (step S1)
06).

Here, the phase comparison error ΔP corresponds to the phase difference between the value ap of the audio reproduction information APTS and the value VP of the second image reproduction information VPTS2 generated based on the reference clock CK. Means audio clock generation means 9
And a phase comparator of a PLL configured together with the above. Next, the counter value N is initialized to "1" (step S10).
7), and proceed to step S108.

In step S108, a predetermined time (= 1/1) generated by dividing the frequency of the image decoding clock CKV is obtained.
(90000 × i)) is determined. If it is determined in step S108 that the predetermined time has not elapsed (that is, NO), step S108 is immediately performed.
Returning to 104, the above processing is repeated.

If it is determined in step S108 that the predetermined time has elapsed (ie, YES), the counter values N and M are incremented each time the predetermined time (= 1 / (90000 × i)) elapses. After the increment (steps S109 and S110), the process returns to step S104 to repeat the above processing.

As described above, the counter values M and N which always count up by the clock generated by dividing the image decoding clock CKV are provided, and the image decoding clock CK is provided.
An acquisition interval of the audio reproduction information APTS is measured by a clock synchronized with V.

In step S106, as shown in the above equation (2), the time difference between each value ap and VP is divided by a value N proportional to the time between the two pieces of acquired reproduction information. The processing is executed to keep the phase detection sensitivity per unit time constant since the interval at which the audio reproduction information APTS is recorded is not constant.

By executing these control processes,
Next audio reproduction information APTS (black circle point a in FIG. 5)
p2) is obtained until the previous phase comparison error Δ
P is output to the A / D converter 91.

These processes are performed by the audio clock generating means 9.
And a controller 13A as a component of the PLL.
The audio decoding clock CKA is generated such that the audio data DA and the audio data DA are synchronized.

Thus, the audio reproduction information APTS of the synchronous reproduction apparatus shown in FIG. 1 is synchronized with the value VP of the second image reproduction information VPTS2 which counts up in the free run (see the white circle point on the solid line in FIG. 5). Work.

Therefore, the value sc of the system reference time SCR including sc (t1) in FIG. 5 is necessarily controlled along a straight line (see a broken line) parallel to the solid line in FIG.

Here, the delay time dd (time in units of 1/90000) is the time from when the system reference time SCR is output to when the image reproduction information VPTS is output, so that the system reference time output at time t1 is obtained. The following equation (3) holds between the value sc (t1) of the time SCR and the value VP (t1) of the second image reproduction information VPTS2 output at the same time t1.

VP (t1) = sc (t1) −dd (3)

From the equation (3), if the delay time dd is known, the second image reproduction information VPTS2 can be used as the system reference time SCR. In addition, due to the system configuration, the image decoding clock CKV operates in synchronization with the reference clock CK, and the audio data DA and the image data DV can be reliably output without duplication or loss between the image data DV and the audio data DA. Synchronous playback becomes possible.

As described above, the image decoding clock CKV
(Or the audio decoding clock CKA) is synchronized with the reference clock CK, and the audio reproduction information APTS (or the image reproduction information VPTS) decoded by the other audio decoding clock CKA (or the image decoding clock CKV) is reproduced. It is continuously obtained from the decoding unit 10A (or the image decoding unit 8A).

Then, the acquisition interval is measured by a clock synchronized with the reference clock CK, and the audio decoding clock CKA (or the image decoding clock CKV) corresponding to the measured value is generated. A certain time axis adjustment (time axis compression / expansion operation) is performed on the audio decoding clock CKA (or the image decoding clock CKV).

That is, the image reproduction information VPT output from the image decoding means 8A (or the audio decoding means 10A).
S (or audio reproduction information APTS) is a reference clock C
In synchronization with K, the other audio reproduction information APTS (or image reproduction information VPTS) generates the audio decoding clock CKA having a frequency corresponding to the difference from the image reproduction information VPTS synchronized with the reference clock CK. The audio reproduction information APTS and the image reproduction information VPTS are synchronized.

Therefore, the synchronous reproduction of the audio data DA and the image data DV becomes possible.
In addition, it is possible to reproduce the audio data DA without duplication and omission.

Further, when the audio decoding clock CKA is synchronized with the reference clock CK, it is possible to reproduce the audio with high accuracy in the time axis direction.

Embodiment 2 In the first embodiment, based on the phase comparison error ΔP from the controller 13B,
Although only the audio decoding clock CKA was controlled, similarly,
The image decoding clock CKV may be controlled.

FIG. 6 is a block diagram showing a functional configuration of the second embodiment of the present invention in which the audio decoding clock CKA and the image decoding clock CKV are controlled based on the phase comparison error. FIG. 7 is a block diagram showing the configuration of the image clock generating means 7B in FIG.

In FIG. 6, those corresponding to the above (see FIG. 1) are denoted by "B" after the reference numerals, and those similar to the above are denoted by the same reference numerals and description thereof is omitted. In this case, the controller 13B outputs the phase comparison errors ΔPa and ΔPb with respect to the respective clock generators 9 and 7B based on the system reference time SCR, the reference clock CK, the audio reproduction information APTS, and the image reproduction information VPTS.

Therefore, the audio clock generating means 9
An audio decoding clock CKA having a frequency corresponding to the phase comparison error ΔPa for audio decoding is generated, and the image clock generating means 7B generates an image decoding clock CKV having a frequency corresponding to the phase comparison error ΔPb for image decoding. .

The controller 13B counts the reference clock CK using the system reference time SCR output from the separation means 3 as an initial value, and counts the second system reference time SCR2.
And outputs a digital value (phase comparison error ΔPb) proportional to the phase difference between the second system reference time SCR2 and the image reproduction information VPTS output from the image decoding means 8A to the image clock generation means 7B.

The image clock generating means 7B has the same configuration as the audio clock generating means 9 (see FIG. 3) as shown in FIG. 7, reference numeral 71 denotes a D / A converter inserted on the input side of the image clock generation means 7B, 72 denotes a loop filter for adjusting the response of the system, and 73 denotes a frequency corresponding to the output voltage of the loop filter 72. It is a voltage controlled oscillator that oscillates and outputs an image decoding clock CKV.

Here, the frequencies of the audio decoding clock CKA and the image decoding clock CKV are set to integer multiples of the sampling clock frequencies for the audio signal generating means 11 and the image signal generating means 12, respectively.

For example, the phase comparison error ΔP for image decoding
If the oscillation frequency (image decoding clock CKV) of the voltage controlled oscillator 72 when b is “0” is P × 48 KHZ, the controller 13B sets the frequency (= P × 48 KHZ) of the image decoding clock CKV to P × 48 KHZ. Divided frequency (= 48
KHZ) is supplied as a sampling frequency to the audio signal generating means 11.

When the oscillation frequency (voice decoding clock CKA) of the voltage controlled oscillator 93 (see FIG. 3) is 27 MHz when the audio decoding phase comparison error ΔPa is “0”, the controller 13 B The frequency (= 13.13) obtained by dividing the frequency of the audio decoding clock CKA (= 27 MHZ) by two.
5MHZ) is supplied as a sampling frequency to the image signal generating means 8A.

Next, the synchronous reproduction operation of the image data DV and the audio data DA by the controller 13B according to the second embodiment of the present invention will be described with reference to FIGS. FIG. 8 is a flowchart showing a processing operation of the controller 13B, and FIG. 9 is an explanatory diagram showing a time change of the image reproduction information VPTS and the audio reproduction information APTS.

In FIG. 8 and FIG. 9, the delay time dd
Is the time from when the separating means 3 outputs the system reference time SCR to when the audio decoding means 10A and the image decoding means 8A output the audio reproduction information APTS and the image reproduction information VPTS, and is a predetermined time (1/90000). (With reference to).

In FIG. 8, the second system reference time S
The value SC of CR2 is a value (= C / j) obtained by dividing the counter value C by a predetermined value j with respect to the value sc of the system reference time SCR obtained by the separating means 3 (j is set according to system conditions). ) Is calculated.

The phase comparison error ΔPa for speech decoding is a value taking into account the delay time dd required for speech decoding (= SC−d
The phase difference between d) and the audio reproduction information APTS is output to the D / A converter 91 (see FIG. 3) in the audio clock generating means 9.

The phase comparison error ΔPb for image decoding
Is a value considering the delay time dd required for image decoding (= S
C-dd) and the phase difference between the image reproduction information VPTS,
The D / A converter 71 in the image clock generating means 7B (FIG. 7)
Output).

The counter value A is a value obtained by counting the interval at which the audio reproduction information APTS is obtained at a predetermined time interval (= 1 / (90000 × j)) synchronized with the reference clock CK.

[0127] The counter value B is determined by the image reproduction information VP.
This is a value obtained by counting the interval at which the TS is acquired at a predetermined time interval (= 1 / (90000 × j)) synchronized with the reference clock CK.

Further, the counter value C is a predetermined time interval (= 1/1) from the time when the system reference time SCR is obtained.
(90000 × j)). Other variables are the same as in the first embodiment.

In FIG. 8, first, as initial setting processing, initial values of counter values A and B are respectively set to A = 1,
B is set to 1 (step S201), and the initial value of the counter value C is set to 0 (step S202).

Subsequently, the system reference time SCR during reproduction
It is determined whether or not the value sc has been acquired (step S20).
3) If it is determined that it has been acquired (that is, YES), the value sc is stored in the memory.

At this time, the value sc of the system reference time SCR obtained first corresponds to the white circle point sc1 in FIG. In step S203, the value sc of the system reference time SCR has not been obtained (ie, N
If determined to be O), the value sc of the system reference time SCR
Step S203 is repeated until is obtained, and the standby state is maintained.

Next, following the acquisition of the value sc of the system reference time SCR (step S203), the audio decoding means 10
It is determined whether or not the value ap (corresponding to the black circle point ap4 in FIG. 9) of the audio reproduction information APTS decoded by A is obtained (step S204).

If it is determined in step S204 that the value ap of the audio reproduction information APTS has been obtained (ie, YES), the value ap is stored in the memory, and the flow advances to step S205. If it is determined in step S204 that the value ap of the audio reproduction information APTS has not been obtained (that is, NO), the process proceeds to step S20 described later.
Proceed to 8.

In step S205, using the initial value sc of the system reference time SCR, the counter value C, and the predetermined value j, the value SC of the second system reference time SCR2 is obtained by the following equation (4).

SC = sc + C / j (4)

Subsequently, the value ap of the audio reproduction information APTS obtained in step S204, the value SC of the second system reference time SCR calculated in step S205, the delay time dd, and the counter value A are used. And the following (5)
The phase comparison error ΔPa for speech decoding is obtained from the equation.

ΔPa = k {ap− (SC−dd)} / A (5)

However, in the equation (5), k is a weighting coefficient similar to that described above (step S106).

The phase comparison error ΔPa thus calculated
Is set and input to the D / A converter 91 in the audio clock generator 9 (step S206). Hereinafter, after the counter value A is initialized to "1" (step S207), the process proceeds to step S212.

In step S204, the value ap of the audio reproduction information APTS cannot be obtained (ie, N
If it is determined to be O), in step S208, it is determined whether or not the value vp (corresponding to the diamond point vp4 in FIG. 9) of the decoded image reproduction information VPTS has been obtained.

If it is determined in step S208 that the value vp of the image reproduction information VPTS has been obtained (ie, YES), the value SC of the second system reference time SCR2 is calculated by the same equation (4) as in step S205. Is obtained (step S209).

Subsequently, the value vp of the image reproduction information VPTS obtained in step S208, the value SC of the second system reference time SCR calculated in step S209, the delay time dd, and the counter value B are used. The following (6)
From the equation, the phase comparison error ΔPb for image decoding is obtained.

ΔPb = k {vp− (SC−dd)} / B (6)

However, in the equation (6), k is a weighting coefficient similar to that described above. The phase comparison error ΔPb thus calculated is set and input to the D / A converter 71 in the image clock generating means 8A (step S210).

Hereinafter, after the counter value B is initialized to "1" (step S211), the process proceeds to step S212. On the other hand, in step S208, the image reproduction information VPTS
If it is determined that the value vp has not been acquired (that is, NO), the process immediately proceeds to step S212.

In step S212, it is determined whether or not a predetermined time (= 1 / (90000 × j)) has elapsed. If it is determined that the predetermined time has not elapsed (ie, NO), the process immediately proceeds to step S212. Returning to S204, the above processing is repeated.

If it is determined in step S212 that the predetermined time has elapsed (ie, YES), the counter values A, B, and C are incremented every time the predetermined time (= 1 / (90000 × j)) elapses. Are incremented (steps S213 and S214), and then step S204
And the above processing is repeated.

The above control is executed each time the audio reproduction information APTS or the image reproduction information VPTS is output from each of the decoding means 10A and 8A. First, the value S of the second system reference time SCR counted by the reference clock CK
C and audio reproduction information APTS or image reproduction information VPT
Compare with the value of S.

Subsequently, based on the comparison result, a phase comparison error ΔPa for generating the audio decoding clock CKA,
A phase comparison error ΔPb for generating the image decoding clock CKV is obtained, and these values are used as the clock generation means 9.
And 7B.

In other words, the synchronous playback device according to the second embodiment of the present invention is controlled by two independent PLLs. That is, the image clock generating means 7B and the controller 1
3B and a PLL constituted by the audio clock generating means 9 and the controller 13B.

Thus, when the audio reproduction information APTS is output, the audio decoding clock CKA is adjusted so that the audio decoding phase comparison error ΔPa matches the value (= SC−dd) taking the delay time dd into account. The frequency is controlled.

Similarly, when the picture reproduction information VPTS is output, the picture decoding clock CKV of the picture decoding clock CKV is set so that the picture decoding phase comparison error ΔPb matches the value (= SC−dd) in consideration of the delay time dd. The frequency is controlled.

Therefore, by executing the processing flow shown in FIG. 8, the phase comparison error output from controller 13B approaches "0". As a result, the frequency controlled by the voltage controlled oscillator 93 in the audio clock generating means 9 is P × 48K.
An HZ audio decoding clock CKA is output, and an image decoding clock CKV having a frequency of 27 MHz is output from the voltage controlled oscillator 73 in the image clock generating means 7B.

The controller 13B supplies the audio signal generating means 11 and the image signal generating means 12 with a sampling clock (figure shown) having a frequency which is an integer fraction of the frequency of the audio decoding clock CKA and the image decoding clock CKV. Are supplied.

That is, based on the single reference clock CK, the audio decoding clock CKA, the image decoding clock CKV, the audio signal sampling clock, and the image signal sampling clock can be generated. Therefore, a system can be constructed using only one reference clock generator 6, and an inexpensive synchronous reproduction device can be provided.

Embodiment 3 In the first embodiment, the second image reproduction information VPTS2 for decoding the image signal SV is synchronized with the reference clock CK, and only the audio reproduction information APTS is generated by the operation of the PLL including the controller 13A. Although the case has been described as an example, the audio signal S
The reproduction information APTS for decoding A is a reference clock C
K, and only the image reproduction information VPTS is transmitted to the controller 13A.
Needless to say, it can be configured to be generated by the action of the PLL including.

In general, it is known that a human sense of a shift in the time axis direction is more sensitive to a time shift for an audio signal than to a time shift for an image signal. Therefore, in particular, in audio reproduction such as linear PCM in which the audio decoding clock CKA is synchronized with the reference clock CK, smooth image reproduction without omission is executed and, at the same time, high speed without deviation in the time axis direction is achieved. Accurate audio output is obtained.

[0158]

As described above, according to the first aspect of the present invention, decoding means for decoding data extracted from a recording medium to generate decoded data, and separating the decoded data into at least audio data and image data. Separating means, an audio buffer for storing audio data, an image buffer for storing image data, an audio decoding means for decoding audio data read from the audio buffer into predetermined audio signal data, and reading from the image buffer. Image decoding means for decoding the output image data into predetermined image signal data, audio signal generation means for generating an audio signal from the audio signal data, image signal generation means for generating an image signal from the image signal data, and recording A reference clock generator for generating a reference clock that is reflected in the reproduction speed of the medium; and a decoder for synchronizing the audio signal and the image signal. A controller and a clock generator for generating a clock for use, wherein the controller and the clock generator have at least one of image reproduction information relating to at least one of a reproduction time and a decoding time of image data, and at least a reproduction time and a decoding time of audio data. A decoding clock is generated based on the audio reproduction information relating to one of them and the reference clock, and at least one of the audio decoding means and the image decoding means is controlled in synchronization with the decoding clock, so that the decoding clock is fixed. Time axis adjustment (time axis compression and decompression operations), so that audio data and image data can be reproduced synchronously without duplication or loss, and synchronous reproduction that achieves smooth image reproduction and audio reproduction There is an effect that the device can be obtained.

According to a second aspect of the present invention, in the first aspect, the controller includes a phase comparison error calculating means for outputting a phase comparison error between the audio reproduction information and the image reproduction information, The means generates a decoding clock having a frequency corresponding to the phase comparison error, so that audio data and image data can be reproduced synchronously without duplication or loss, and smooth image reproduction and audio reproduction can be realized. There is an effect that a synchronized playback device can be obtained.

According to a third aspect of the present invention, in the second aspect, the phase comparison error calculating means counts a reference clock with the image reproduction information as an initial value to obtain the second image reproduction information. An information calculating means for outputting a phase difference between the second image reproduction information and the audio reproduction information as a phase comparison error; and a clock generation means for generating an audio decoding clock having a frequency corresponding to the phase comparison error. Since it includes a generating means, it is possible to synchronously reproduce audio data and image data without duplication or omission,
There is an effect that a synchronous reproduction apparatus that realizes smooth image reproduction and audio reproduction can be obtained.

According to a fourth aspect of the present invention, in the first aspect, the controller comprises a sampling clock generating means for generating a sampling clock for driving at least one of the audio signal generating means and the image signal generating means. And the decoding clock is set to a frequency that is an integral multiple of the sampling clock, so that the decoding clock (audio decoding clock, image decoding clock), D / A converter sampling clock, image Since a signal sampling clock can be generated, a system can be constructed using a small number of reference clock generators, and an inexpensive synchronous reproduction device can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram schematically showing a functional configuration according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a specific configuration example of image data, audio data, and the like recorded on a disc.

FIG. 3 is a block diagram illustrating a configuration of an audio clock generation unit in FIG. 1;

FIG. 4 is a flowchart showing a phase comparison processing operation of the controller according to the first embodiment of the present invention.

FIG. 5 is an explanatory diagram showing a time change of each piece of reproduction information according to the first embodiment of the present invention.

FIG. 6 is a block diagram schematically showing a functional configuration according to a second embodiment of the present invention.

FIG. 7 is a block diagram illustrating a configuration of an image clock generation unit according to a second embodiment of the present invention.

FIG. 8 is a flowchart showing an operation of a controller according to Embodiment 2 of the present invention.

FIG. 9 is an explanatory diagram showing a time change of each piece of reproduction information and a system reference time according to the second embodiment of the present invention.

FIG. 10 is a block diagram schematically showing a functional configuration of a conventional synchronous reproduction circuit.

FIG. 11 is a flowchart showing an operation of the conventional synchronous reproduction circuit when acquiring audio reproduction information.

FIG. 12 is a flowchart showing an image frame processing operation when audio reproduction information is acquired by a conventional synchronous reproduction device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Disc (recording medium), 2 decoding means, 3 separation means, 4 audio buffers, 5 image buffers, 6 reference clock generators, 7, 7B image clock generation means, 8A
Image decoding means, 9 Audio clock generation means, 10A
Audio decoding means, 11 audio signal generating means, 12 image signal generating means, 13A, 13B controller, D extraction data, FD decoding data, DA audio data, DV image data, FA audio signal data, FV image signal data, SA audio Signal, SV image signal, CK reference clock, CKA audio decoding clock, CKV image decoding clock, APTS audio reproduction information, VPTS image reproduction information, SCR system reference time, ΔP, ΔPa,
ΔPb Phase comparison error.

Claims (4)

[Claims] A decoding unit that decodes data extracted from a recording medium to generate decoded data; a separating unit that separates the decoded data into at least audio data and image data; and an audio buffer that stores the audio data. An image buffer that stores the image data; an audio decoding unit that decodes the audio data read from the audio buffer into predetermined audio signal data; and an image buffer that reads the image data read from the image buffer. Image decoding means for decoding signal data; audio signal generation means for generating an audio signal from the audio signal data; image signal generation means for generating an image signal from the image signal data; and reflection on the reproduction speed of the recording medium A reference clock generator for generating a reference clock to be used for synchronizing the audio signal and the image signal A controller and clock generation means for generating a decoding clock for the image data, wherein the controller and the clock generation means reproduce image data on at least one of a reproduction time and a decoding time of the image data, and reproduce the audio data. Generating the decoding clock based on the audio reproduction information relating to at least one of time and decoding time, and the reference clock; and synchronizing with the decoding clock, at least one of the audio decoding unit and the image decoding unit. A synchronous playback device characterized by controlling the following. 2. The apparatus according to claim 1, wherein the controller includes a phase comparison error calculation unit that outputs a phase comparison error between the audio reproduction information and the image reproduction information, and the clock generation unit includes a frequency corresponding to the phase comparison error. 2. The synchronous reproducing apparatus according to claim 1, wherein a decoding clock is generated. 3. The image processing apparatus according to claim 1, wherein the phase comparison error calculation means includes an image reproduction information calculation means that counts the reference clock with the image reproduction information as an initial value and obtains second image reproduction information. Outputting a phase difference between information and the audio reproduction information as the phase comparison error, wherein the clock generation means includes an audio clock generation means for generating an audio decoding clock having a frequency corresponding to the phase comparison error. The synchronous playback device according to claim 2, wherein 4. The decoding clock according to claim 1, wherein the controller and the clock generator include a sampling clock generator that generates a sampling clock for driving at least one of the audio signal generator and the image signal generator. 2. The synchronous reproducing apparatus according to claim 1, wherein the frequency is set to an integral multiple of the sampling clock.