JP2000357670A - Film forming method and apparatus therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simplify a process when an insulation film and a hard mask layer are continuously formed by a method wherein the hard mask layer is formed on the insulation film formed on a substrate, and also any one of the insulation film and the hard mask layer is formed by coating a coating agent. SOLUTION: According to this embodiment, as any one of an insulation film and a hard mask layer is formed by coating a coating agent, it is possible to simplify a process of forming a two-layer structure of the insulation layer and the hard mask layer without interposing a CVD unit. Specifically, a film forming apparatus comprises a carrier station 23 which mounts a coating part 21, a side cabinet (chemical liquid part) 22, and a wafer carrier for accommodating a plurality of semiconductor wafers W, and conveys in and out the wafers W. Furthermore, the apparatus comprises a curing part 24 for curing the wafers W after the coating liquid is coated by a batch processing, and an interface part 25 for transferring the wafers W between the coating part 21 and the curing part 24.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a coating film forming apparatus for forming an insulating film or the like by spin-coating a coating solution on a substrate and performing a chemical treatment or a heat treatment in a semiconductor device manufacturing process or the like. .

[0002]

2. Description of the Related Art In recent years, in semiconductor devices, a low dielectric constant material, such as an organic bottom dielectric constant material, which can be rotated, has been used as an interlayer insulating film due to a demand for higher speed. As a method of easily forming such an interlayer insulating film made of an organic low dielectric constant material, SOD (Spin on Directr) is used.
ic) Methods using systems are known. This SO
In the D system, a coating film is spin-coated on a semiconductor wafer by a sol-gel method or the like, and after a pre-baking process, a chemical process or a heating process is performed to form an interlayer insulating film.

[0003] Such an organic low dielectric constant material has a low selectivity with respect to a resist. For example, when forming a trench wiring by a dual damascene method, the upper surface of an interlayer insulating film made of an organic low dielectric constant material is formed. Then, a hard mask layer made of, for example, SiN is formed by CVD (Chemical Vapor Deposit).
ion).

A procedure of the dual damascene method will be described with reference to FIG. First, a lower wiring 2 is placed on a silicon wafer 1.
Is formed, and then the lower wiring 2 is formed on the silicon wafer 1.
Is formed as the first interlayer insulating film so as to cover (FIG. 8A). The organic low-dielectric-constant film 3 is formed by spin coating, pre-baking, and curing the coating film by the above-described SOD.
After that, the silicon nitride (Si
N) A hard mask layer 4 made of a film is formed by CVD (FIG. 8B). Further, a resist film 5 is formed on the hard mask layer 4 (FIG. 8C).
A pattern is formed on the resist film 5 by a photolithography technique, and using the mask as a mask, the hard mask layer 4 is patterned by etching, and a lower wiring 2 is formed in a region where connection between the lower wiring 2 and a groove wiring to be formed later is performed. The opening 6 having a width smaller than the width of the opening 6 is provided (FIG. 8D).

Next, on the hard mask layer 4 and the opening 6
Then, an organic low dielectric constant film 7 as a second interlayer insulating film is
By D, the coating film is formed by performing spin coating, pre-baking, and curing treatment (FIG. 8E). Thereafter, a hard mask layer 8 made of, for example, a SiN film is formed on the organic low dielectric constant film 7 by CVD (FIG. 8F). Further, a photoresist film 9 is formed on the hard mask layer 8 (FIG. 8 (g)), a pattern is formed on the resist film 9 by a photolithography technique, and the hard mask layer 8 is etched using this as a mask. Then, an opening 10 is formed in the hard mask layer 8 (FIG. 8H).

[0006] Using the hard mask layer 8 patterned as described above as an etching mask,
Is used as an etching stopper film to etch the organic low dielectric constant films 3 and 7 (FIG. 8 (i)). Thereby, the grooves 11, 11 are formed in the organic low dielectric constant films 3, 7 respectively.
12 are formed.

After a barrier metal layer (not shown) is formed on the inner walls of these grooves 11, 12, a CVD method or the like is used.
A conductive material is buried in these grooves, and the CMP
Polishing is performed by a (Chemical Mechanical Polishing) method to selectively leave only the conductive material in the groove to form a conductive part having the plug 13 and the groove wiring 14 (FIG. 8 (j)).

[0008]

However, in the case of forming a trench wiring by the above-described process, there is a step of forming a hard mask layer on an organic low dielectric constant film. Immediately after the formation of the organic low dielectric constant film, the wafer must be transferred to a CVD apparatus to form a hard mask layer by CVD, which is extremely complicated.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and provides a film forming method and a film forming apparatus capable of simplifying a process when an insulating film and a hard mask layer are continuously formed. The purpose is to provide.

[0010]

In order to solve the above-mentioned problems, the present invention provides a film forming method comprising the steps of forming an insulating film on a substrate, and forming a hard mask layer on the insulating film. A method, wherein the insulating film and the hard mask layer are both formed by applying a coating liquid.

A step of applying a coating solution on the substrate to form an insulating film; a step of applying a coating solution on the insulating film to form a hard mask layer; And curing the film.

Further, a first coating unit for coating a coating liquid for an insulating film on a substrate, a second coating unit for coating a coating liquid for a hard mask on the insulating film, and a coating liquid are coated. And a heat treatment unit for subjecting the substrate to heat treatment.

According to the present invention, since both the insulating film and the hard mask layer are formed by applying a coating solution,
The process can be simplified when forming a two-layer structure of an insulating film and a hard mask layer without intervening a device.

[0014] Further, the insulating film and the hard film are continuously formed by a single apparatus including a first coating unit for applying a coating solution for an insulating film and a second coating unit for coating a coating solution for a hard mask. Since the two-layer structure of the mask layer is formed, there is no need to transport the substrate to another device, and these film forming processes can be significantly simplified, and the insulating film and the hard mask layer can be formed very quickly. be able to.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a film forming apparatus according to an embodiment of the present invention will be described with reference to the accompanying drawings.

FIG. 1 is a plan view showing a film forming apparatus according to an embodiment of the present invention, FIG. 2 is a side view of the film forming apparatus shown in FIG. 1, and FIG. It is a side view which shows the two unit laminated bodies mounted in the formed film-forming apparatus.

In this film forming apparatus, a coating processing section 21, a side cabinet (chemical solution section) 22, and a wafer carrier accommodating a plurality of semiconductor wafers (hereinafter, simply referred to as wafers) W are placed, and the wafers W are loaded and unloaded. Station (CSB) 23 that performs a curing process, and a curing processing unit 24 that performs a curing process by batch processing on a plurality of wafers W after the application liquid is applied.
Between the coating processing unit 21 and the curing processing unit 24
And an interface unit 25 for transferring the data.

As shown in FIGS. 1 and 2, the coating processing section 21 has a wafer transfer mechanism 31 at a substantially central portion, and all processing units are arranged around the wafer transfer mechanism 31. In the front part of the coating processing part 21, 2
There are provided two processing unit groups 32 and 33 formed by stacking processing units in stages, and the processing unit group 32 includes:
A solvent exchange unit (DSE) 34 and a first coating processing unit (SC
T) 35. The processing unit group 33
Has a second coating unit (SCT) 36 and a third coating unit (SCT) 37. In addition, a chemical chamber (not shown) containing a chemical or the like is provided in the coating processing unit 21.
Is provided.

On both sides of the wafer transfer mechanism 31, a plurality of processing units are stacked in multiple stages, and a processing unit group 38,
39 are provided. The processing unit group 38 on the left side
As shown in FIG. 3, in order from the top, a low-temperature hot plate unit (LHP) 40 and two DCCs (Di-
electric Oxygen Density Controlled Cure and Coolin
g-off) The processing unit 41 and two aging units (DACs) 42 are stacked. The processing unit group 39 on the right side is, in order from the upper side,
Two hot plate units (OHP) 43 for high temperature
And a low-temperature hot plate unit (LHP) 44
And two cooling plate units (CPL) 45
, A transfer unit (TRS) 46 and a cooling plate unit (CPL) 47 are stacked.

The first coating processing unit (SCT) 3
Numeral 5 is for applying a coating liquid for an organic low dielectric constant film used as an interlayer insulating film on the wafer W by SOD, and a fixed cup whose upper surface is opened and closed by a lid 81 as shown in FIG. 82, a rotating shaft 84 inserted from the bottom surface of the fixed cup 82 and capable of moving up and down and rotated by a driving unit 83, a vacuum chuck 85 as a wafer holding unit provided at an upper end of the rotating shaft 84, and a lid 81. And a coating liquid nozzle 86 for supplying a coating liquid to the center of the wafer W. The fixed cup 82 is connected to a solvent vapor supply pipe 88 for supplying a solvent used in the coating liquid, for example, a vapor of ethylene glycol, to which a drain pipe 89 and an exhaust pipe 90 are connected. The coating liquid and the solvent used in this unit are supplied from the above-described chemical chamber (not shown) provided in the coating processing unit 21. The chemical chamber contains a chemical such as ammonia or HMDS other than a chemical that adversely affects processing.

In order to form an organic interlayer insulating film by SOD, there are a sol-gel method, a silk method, a speed film method, a Fox method and the like. When an interlayer insulating film is formed by a sol-gel method, a coating liquid in which a colloid of TEOS is dispersed in an organic solvent is applied to the surface of a wafer, and the coating film is gelled. Is replaced with another solvent, and then dried to obtain an interlayer insulating film. Also, when forming an organic interlayer insulating film by a silk method, a speed film method, and a fox method,
An application liquid is applied to the cooled wafer, and the applied film is cured (cured) by a heat treatment to obtain an interlayer insulating film.

The second coating processing unit (SCT) 3
No. 6 is used for applying an adhesion promoter required when the silk method and the speed film method are employed, and is basically a first coating processing unit (SC).
T) has the same structure as 35.

The third coating processing unit (SCT) 3
Reference numeral 7 denotes an SOG (Spin On Glass) for applying a coating liquid for a hard mask made of, for example, SiO ₂ on the organic low dielectric constant film, which is also basically a first coating processing unit. It has the same structure as (SCT) 35. In SOG, for example, a processing solution (SOG solution) in which a silanol compound such as Si (OH) ₄ and a solvent such as ethyl alcohol are mixed is applied on the wafer W, and a heat treatment is performed on the wafer W to evaporate the solvent and thereby silanol. The polymerization reaction of the compound is advanced to form a SiO ₂ film.

The solvent exchange unit (DSE) 34 is provided with the first coating apparatus (SCT).
This is used in the case where the coating liquid to be applied in step 35 forms an organic low dielectric constant film by a sol-gel method. The spin chuck holds and rotates the wafer W horizontally, and surrounds the wafer W on the chuck. The water in the coating film after the aging treatment for gelling described later is first replaced with ethanol or the like, and the solvent in the coating film is further replaced with heptane or the like.

An aging unit (DAC) 42 belonging to the processing unit group 38 has a heating plate having a built-in heater in a closed processing chamber. Ammonia is vaporized by a bubbler 65 or the like in the side cabinet 22 and supplied to the processing chamber, and exhaust gas is trapped by a drain tank 68 in the side cabinet 22. This aging unit (DAC) is used for gelling a coating film by condensation polymerization and hydrolysis of TEOS when an organic low dielectric constant film is formed by a sol-gel method.

A hot plate unit (OHP) for high temperature and a hot plate unit (LHP) for low temperature belonging to the processing unit groups 38 and 39 place the wafer W on a hot plate set at a predetermined temperature or close to the hot plate. This is a unit for baking the wafer W after applying the application liquid. The cooling plate unit (CPL) is a unit for cooling the wafer W by placing the baked wafer W on or close to the cooling plate set at a predetermined temperature. further,
The transfer section (TRS) 46 has a wafer mounting table and is a unit for transferring a wafer to and from the carrier station (CSB) 23. The transfer unit (TRS) 46 can also have a cooling plate function by controlling the mounting table to a predetermined temperature.

The DCC processing unit 41 belonging to the processing unit group 38 heats and cools the wafer W on which the coating film is formed in a single wafer system in a low oxygen concentration atmosphere to cure the coating film. The unit is used for curing the coating film when forming an organic interlayer insulating film by a silk method, a speed film method, or a fox method, and is not necessary when forming a coating film by a sol-gel method. Absent. This DCC processing unit 4
1 is used when the curing temperature is relatively low, and when the curing temperature is 470 ° C. or higher, the vertical heat treatment furnace 78 of the curing section 24 is used.

As shown in FIG. 3, the wafer transfer mechanism 31 extends vertically and has a cylindrical support 51 having vertical walls 51a, 51b and side openings 51c therebetween.
And a wafer transfer body 52 provided inside the cylindrical support 51 so as to be able to move up and down in the vertical direction (Z direction) along the cylindrical support body 51. The cylindrical support 51 is rotatable by the rotational driving force of a motor 53, and accordingly, the wafer carrier 52 is also integrally rotated. The wafer transfer body 52 includes a transfer base 54 and three wafer holding arms 55, 5 movable back and forth along the transfer base 54.
6, 57, and these arms 55, 56, 5
Numeral 7 is large enough to pass through the side opening 51c of the cylindrical support 51. These arms 55, 56, 57
Can be independently advanced and retracted by a motor and a belt mechanism built in the transport base 54. The wafer carrier 52 is moved up and down by driving a belt 59 by a motor 58. Reference numeral 60 denotes a driving pulley, and 61 denotes a driven pulley.

The side cabinet 22 includes the coating processing section 2
1 is provided at a position adjacent to the coating processing unit 21 and is separated from the coating processing unit 21.
And a mist trap (TRAP) 66 for separating a gas-liquid mixed stream into gas and liquid and discharging exhaust gas, and a HMDS tank 67a and an ammonia tank 67b are provided below the mist trap (TRAP) 66.
And a drain tank 68 for discharging the drainage.

Since the side cabinet 22 is configured as described above, when ammonia is supplied to the aging unit (DAC) 42, the ammonia tank 67
The bubbler 65 is filled with ammonia from b, and the ammonia is bubbled by the bubbler 65, vaporized, and supplied to the aging unit (DAC) 42. In addition, the solvent exchange unit (DS
E) When HMDS is supplied to 34, HMDS is supplied directly from the HMDS tank 67a.

An aging unit (DAC) 42
Is trapped by a drain tank 68 in the side cabinet 22. Further, the exhaust mixed with the liquid from the solvent exchange unit (DSE) 34 is separated into gas and liquid by the mist trap 66 in the cabinet 22, and the discharged liquid is discharged to the drain tank 68.

As described above, the aging unit (DAC) 42 and the solvent exchange unit (DSE) 34 that require ammonia and HMDS supplied from the side cabinet 22 are provided adjacent to the side cabinet 22. Therefore, the chemical supply system can be shortened.

The interface unit 25 has a positioning mechanism 72 for receiving and positioning the wafer W transferred from the coating processing unit 21 in a substantially sealed box 71.
And a loading / unloading mechanism 73 for receiving the wafer W from the positioning mechanism 72 and loading / unloading the wafer W into / from the wafer boat 74. Further, in the interface section 25, a boat liner 76 on which a plurality of (three in the drawing) wafer boats 74 and one dummy wafer boat 75 are placed is arranged so as to be able to reciprocate in the Y direction.

The curing section 24 is connected to the interface section 25 through an opening window 77, and is connected to the curing section 2.
4, a vertical heat treatment furnace 78 and a wafer boat 74 disposed below the heat treatment furnace
A boat elevator 79 for loading the wafer boat 74 into the inside and a transport mechanism 80 for loading and unloading the wafer boat 74 from the boat liner 76 of the interface unit 25 to the boat elevator 79 are arranged.

As shown in FIG. 5, in the hardening section 24, a quartz process tube 91 having an inverted U-shaped cross section is housed in a heat treatment furnace 78.
A heater 92 is surrounded on the outer periphery of the heater 1. A manifold 93 is connected to the lower end of the opening of the process tube 91. The manifold 93 has an inlet pipe (not shown) for introducing a predetermined processing gas into the process tube 91. And an exhaust pipe (not shown) for exhausting the processed gas. Further, the boat elevator 79 is provided with a lid 94 which is in contact with the manifold 93 and maintains the inside of the process tube 91 in a sealed state. A heat retaining cylinder 95 is mounted on the lid 94.

Next, an interlayer insulating layer and a hard mask layer are formed based on the method of this embodiment using the film forming apparatus configured as described above, and a groove wiring and a plug are formed by a dual damascene method. Figure 6 about procedure
This will be described with reference to FIG.

First, a lower wiring 102 is formed on a wafer W, and then an organic low dielectric constant film 103 as a first interlayer insulating film is formed on the wafer W so as to cover the lower wiring 102.
(FIG. 6A), and a hard mask layer 104 made of a silicon oxide (SiO ₂ ) film is formed on the organic low dielectric constant film 103 (FIG. 6B).

The organic low dielectric constant film 103 and the hard mask layer 104 are formed by the above-described film forming apparatus as follows.

First, in forming the organic low dielectric constant film 103, when the coating liquid for the organic low dielectric constant film is formed by the silk method or the speed film method, it is taken out from the wafer carrier in the carrier station 23. The transferred wafer W is carried into the coating processing unit 21 via the transfer unit (TRS) 46, and after controlling the wafer W to a predetermined temperature by one of the cooling plate units (CPL),
An adhesion promoter is applied by the second coating unit (SCT) 36 prior to the coating liquid for the organic low dielectric constant film, baked on a low-temperature hot plate (LHP), and cooled on a cooling plate (CPL). After that, the first coating processing unit (SCT) 35 applies the coating liquid for the organic low dielectric constant film onto the wafer W. afterwards,
The baking process is performed by a low-temperature hot plate unit (LHP) and a high-temperature hot plate unit (OHP). In the Fox method, the cooling plate (C
PL) → the first coating processing unit (SCT) 35 → the low-temperature hot plate (LHP) → the high-temperature hot plate (OHP), and the process is completed until baking.
In the sol-gel method, a cooling plate (CPL) → a first coating processing unit (SCT) 35 → an aging unit (DAC) 42 → a solvent exchange unit (DSE) 34 → a hot plate for low temperature (LHP)
→ Processing is performed in the order of a hot plate (OHP) for high temperature, and the process is completed until baking.

Next, after the wafer W is cooled to a predetermined temperature by any one of the cooling plate units (CPL), an organic low dielectric constant film formed on the wafer W by the third coating processing unit (SCT) 37 A coating liquid for forming a hard mask layer is applied on 103. Thereafter, a baking process is performed in a low-temperature hot plate unit (LHP) and a high-temperature hot plate unit (OHP).

After the organic low dielectric constant film 103 and the hard mask layer 104 are formed in this manner, the wafer W is mounted on the wafer boat 74 in the interface section 25, and the wafer boat 74 on which a predetermined number of wafers W are mounted.
Is loaded into the vertical heat treatment furnace 78 of the curing processing unit 24, and a plurality of wafers W are subjected to batch-type curing (curing). After this batch-type curing process, the wafer boat 7
The wafers 4 are transferred to the interface unit 25, and are again stored one by one in a wafer carrier in the carrier station 23. In this curing process, the temperature is, for example, 400
In the case where the temperature may be as low as lower than or equal to
May be performed in a single-wafer manner. By performing the curing process in this manner, the organic low-dielectric-constant film 103 and the hard mask layer 104 are collectively cured (cured). In the case where the organic low dielectric constant film 103 is formed by the sol-gel method, the hardening has been completed by the baking process, and further hardening is not necessary. Process.

After forming the hard mask layer 104 in this manner, a resist film 105 is further formed on the hard mask layer 104 (FIG. 6C).
A predetermined pattern is formed by exposing and developing the resist film 105 by a photolithography technique, and the hard mask layer 104 is patterned by etching using the resist pattern as a mask to connect the lower wiring 102 to a groove wiring to be formed later. The opening 106 having a width smaller than the width of the lower wiring 102 is provided in a region where
(D)).

After removing the resist film 105, an organic low dielectric constant film 107 is formed on the hard mask layer 104 and in the opening 106 as a second interlayer insulating film.
(E)) Further, a hard mask layer 108 made of, for example, an SiO ₂ film is formed on the organic low dielectric constant film 107 (FIG. 6F). The organic low dielectric constant film 107 and the hard mask layer 108 are made of the organic low dielectric constant film 1 described above.
03 and the hard mask layer 104, the film is formed by the above film forming apparatus in exactly the same procedure.

After the hard mask layer 108 is formed in this manner, a photoresist film 109 is further formed on the hard mask layer 108 (FIG. 6G), and the photoresist film 109 is formed by photolithography. Form a predetermined pattern by exposing and developing,
Using this as a mask, the hard mask layer 108 is etched to form an opening 110 in the hard mask layer 108 (FIG. 6 (h)).

The organic low dielectric constant films 103 and 107 are etched using the hard mask layer 108 patterned as described above as an etching mask and the hard mask layer 104 as an etching stopper film (FIG. 6 (i)). ). Thereby, the organic low dielectric constant films 103 and 10 are formed.
7, grooves 111, 112 are formed.

After a barrier metal layer (not shown) is formed on the inner walls of these grooves 111 and 112, a conductive material is embedded in these grooves by using a CVD method or the like.
Polishing is performed by the P method to selectively leave only the conductive material in the groove, and the plug 113 and the groove wiring 11 are removed.
4 is completed (FIG. 6 (j)).

An outline of the flow of this processing will be described with reference to FIG. Conventionally, as shown in (a), an organic low dielectric constant film (Lowk1) is formed as a first interlayer insulating film by a coating technique (SOD technique), and then a first hard mask is formed by a CVD apparatus. After forming a layer (hard mask 1), photolithography and etching, an organic low dielectric constant film (Lowk2) is further formed as a second interlayer insulating film by SOD technique, and the second hard A mask layer (hard mask 2) is formed, and photolithography and etching are performed. On the other hand, in the present embodiment, the coating techniques (SOD, SOG)
Technique), an organic low dielectric constant film (Lowk1) as a first interlayer insulating film and a first hard mask layer (hard mask 1) are collectively formed, and after photolithography and etching, further by a coating technique. An organic low dielectric constant film (Lowk2) as a second interlayer insulating film and a second hard mask layer (hard mask 2) are collectively formed, and photolithography and etching are performed.

As described above, according to the present embodiment, unlike the related art, both the organic low dielectric constant film as the interlayer insulating film and the hard mask layer are formed by applying the coating liquid, so that the CVD apparatus is interposed. Since the two-layer structure of the organic low-dielectric-constant film and the hard mask layer can be formed at a time without performing the above steps, the steps of forming these layers can be simplified.

Further, since these two-layer structures are formed continuously by one of the above-described film forming apparatuses, it is not necessary to transfer the wafer to another apparatus, and the film forming process can be greatly simplified. The organic low dielectric constant film and the hard mask layer can be formed very quickly.

The present invention is not limited to the above-described embodiment, but can be variously modified. For example, the substrate to be processed is not limited to a semiconductor wafer, but may be another substrate such as an LCD substrate. Further, the insulating film is not limited to the above-described organic low-dielectric-constant material, but may be any material that can be formed by a coating technique. Further, the hard mask layer is not limited to SiO ₂ and may be any material that can be formed by coating. In particular, it is preferable to use an inorganic low dielectric constant material for the hard mask layer from the viewpoint of reducing the capacity and increasing the speed.

[0051]

As described above, according to the present invention,
Since both the insulating film and the hard mask layer are formed by applying a coating solution, the process can be simplified when forming the two-layer structure of the insulating film and the hard mask layer without intervening a CVD apparatus. .

Further, the insulating film and the hard film are continuously formed by one apparatus having a first coating unit for applying a coating solution for an insulating film and a second coating unit for applying a coating solution for a hard mask. Since the two-layer structure of the mask layer is formed, there is no need to transport the substrate to another device, and these film forming processes can be significantly simplified, and the insulating film and the hard mask layer can be formed very quickly. be able to.

[Brief description of the drawings]

FIG. 1 is a plan view showing a film forming apparatus according to an embodiment of the present invention.

FIG. 2 is a side view showing a film forming apparatus according to one embodiment of the present invention.

FIG. 3 is a side view showing two processing unit groups and a transport mechanism, which are mounted in a film forming apparatus according to an embodiment of the present invention and are formed by stacking a plurality of processing units in multiple stages.

FIG. 4 is a cross-sectional view showing a coating processing unit mounted on a film forming apparatus according to an embodiment of the present invention.

FIG. 5 is a vertical cross-sectional view showing a curing unit in the film forming apparatus according to the embodiment of the present invention.

FIG. 6 is a diagram showing a step of forming a groove wiring and a plug by a dual damascene method to which a film forming method according to an embodiment of the present invention is applied.

FIG. 7 is a process chart for comparing and explaining a conventional method and a method according to an embodiment of the present invention.

FIG. 8 is a view showing a step of forming a groove wiring and a plug by a dual damascene method to which a conventional film forming method is applied.

[Explanation of symbols]

 21; coating processing unit 22; side cabinet 23; carrier station (CSB) 24; curing processing unit 35, 36, 37; coating processing unit (SCT) 40, 43, 43, 44; hot plate unit 41;

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M104 DD08 DD16 DD20 EE01 EE12 EE18 HH20 5F045 AB32 AB39 CB05 CB06 DC51 EB20 EN04 HA12 HA16 5F058 BD04 BD19 BF46 BH01 BH10 BJ02

Claims (5)

[Claims] 1. A film forming method comprising: a step of forming an insulating film on a substrate; and a step of forming a hard mask layer on the insulating film, wherein both the insulating film and the hard mask layer are A film forming method by applying a coating liquid. A step of applying a coating solution on the substrate to form an insulating film; a step of applying a coating solution on the insulating film to form a hard mask layer; and the insulating film and the hard mask layer. Curing the film. 3. The method according to claim 1, wherein the insulating film is a low dielectric constant film that can be applied. 4. A first coating unit for coating a coating liquid for an insulating film on a substrate, and a second coating unit for coating a coating liquid for a hard mask on the insulating film.
A coating unit, and a heat treatment unit for performing a heat treatment on the substrate to which the coating liquid has been applied. 5. The film forming apparatus according to claim 4, further comprising a curing processing section for performing a curing treatment on the applied coating liquid.