JP2000357659A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JP2000357659A
JP2000357659A JP11167520A JP16752099A JP2000357659A JP 2000357659 A JP2000357659 A JP 2000357659A JP 11167520 A JP11167520 A JP 11167520A JP 16752099 A JP16752099 A JP 16752099A JP 2000357659 A JP2000357659 A JP 2000357659A
Authority
JP
Japan
Prior art keywords
furnace
film
gas
temperature
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11167520A
Other languages
Japanese (ja)
Inventor
Koichi Ando
公一 安藤
Susumu Koyama
晋 小山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP11167520A priority Critical patent/JP2000357659A/en
Publication of JP2000357659A publication Critical patent/JP2000357659A/en
Pending legal-status Critical Current

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

PROBLEM TO BE SOLVED: To form a film on an insulating film formed on a semiconductor substrate, without mixing contaminants into the insulating film by heat treating, within a furnace the semiconductor substrate to such a temperature level that chlorides are produced through reaction in a gas atmosphere containing chlorine. SOLUTION: A semiconductor substrate, having an oxide silicon. film formed on the surface thereof, is introduced into a silicon film forming low pressure vapor deposition furnace. Nitrogen gas is introduced into the furnace, until the temperature of the semiconductor substrate stabilizes. Flow rate of nitrogen gas, and the temperature and pressure within the furnace are varied. Upon stopping the supply of nitrogen gas, HCl gas is introduced into the furnace, and the temperature and pressure within the furnace are maintained. Upon stopping the supply of HCl gas, nitrogen gas is introduced into the furnace, and the temperature and pressure within the furnace are varied. Silane gas is introduced into the furnace. The silane gas is replaced with nitrogen gas, the pressure within the furnace is increased, and the temperature within the furnace is decreased. The semiconductor substrate is taken out of the vapor deposition furnace.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、絶縁膜表面に異物
を付着させることなく絶縁膜の上に膜を形成する半導体
装置の製造方法に関し、特に、半導体電界効果トランジ
スタ(以下、FETという。)等において、ゲート酸化
膜形成後の加熱処理とゲート電極の形成とを同一装置内
で連続して行うことができる半導体装置の製造方法に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device in which a film is formed on an insulating film without causing foreign matter to adhere to the surface of the insulating film, and more particularly to a semiconductor field effect transistor (hereinafter referred to as FET). The present invention relates to a method for manufacturing a semiconductor device in which heat treatment after formation of a gate oxide film and formation of a gate electrode can be continuously performed in the same device.

【0002】[0002]

【従来の技術】FETのゲート絶縁膜である酸化シリコ
ン膜は、トランジスタの信頼性を決定する材料であり、
いかなる汚染物質をも排除しなくてはならない。このた
め、従来、FETは、シリコン基板表面に酸化シリコン
膜を形成する工程と、その後に酸化シリコン膜上にシリ
コン膜を形成する工程を含む製造方法により製造されて
いる。図2は従来の酸化シリコン膜上にシリコン膜を形
成する工程の製造条件を示すグラフ図であり、(a)は
縦軸に炉内温度、横軸に時間をとりシリコン膜の製造条
件を示し、(b)は縦軸に炉内圧力、横軸に時間をとり
シリコン膜の製造条件を示し、(c)は縦軸にガス流
量、横軸に時間をとりシリコン膜の製造条件を示す。
2. Description of the Related Art A silicon oxide film, which is a gate insulating film of an FET, is a material that determines the reliability of a transistor.
Any contaminants must be eliminated. For this reason, conventionally, the FET has been manufactured by a manufacturing method including a step of forming a silicon oxide film on the surface of a silicon substrate and a step of forming a silicon film on the silicon oxide film thereafter. FIG. 2 is a graph showing manufacturing conditions in a conventional process of forming a silicon film on a silicon oxide film. FIG. 2 (a) shows the furnace temperature on the vertical axis and the time on the horizontal axis showing the manufacturing conditions of the silicon film. , (B) shows the furnace pressure on the vertical axis, the time on the horizontal axis, and the silicon film manufacturing conditions, and (c) shows the gas flow rate on the vertical axis, and the silicon film manufacturing conditions on the horizontal axis, time.

【0003】従来のシリコン膜形成の工程について添付
の図面を参照して詳細に説明する。先ず、半導体基板を
シリコン膜形成用減圧気相成長炉に導入する。次に、図
2(a)に示すように炉内温度を300℃、図2(b)
に示すように、炉内圧力が760Torr、図2(c)に示
すように、窒素ガスの流量が10リットル/分である初
期状態t0からt1まで炉内温度、炉内圧力及びガス流量
を保持する。
A conventional silicon film forming process will be described in detail with reference to the accompanying drawings. First, a semiconductor substrate is introduced into a low-pressure vapor deposition furnace for forming a silicon film. Next, as shown in FIG. 2A, the furnace temperature was set to 300 ° C., and FIG.
As shown in FIG. 2, the furnace pressure, the furnace pressure, and the gas flow rate from the initial state t 0 to t 1 in which the furnace pressure is 760 Torr and the nitrogen gas flow rate is 10 liters / minute as shown in FIG. Hold.

【0004】次に、時間t1からt2の間で図2(a)に
示すように、炉内温度を300℃から500℃まで上昇
させ、図2(b)に示すように、炉内圧力を760Torr
から1Torrにし、図2(c)に示すように、ガス流量を
1リットル/分の流量にする。
Next, as shown in FIG. 2 (a), the temperature in the furnace is increased from 300 ° C. to 500 ° C. between times t 1 and t 2 , and as shown in FIG. Pressure 760 Torr
The gas flow rate is set to 1 liter / minute as shown in FIG. 2 (c).

【0005】次に、時間t2からt3の間では、炉内温度
を500℃、炉内圧力を1Torrに維持したままシランガ
ス(SiH4)を0.1リットル/分の流量で炉内に導
入してシリコン膜を堆積する。
Next, from time t 2 to time t 3 , silane gas (SiH 4 ) is introduced into the furnace at a flow rate of 0.1 liter / min while maintaining the furnace temperature at 500 ° C. and the furnace pressure at 1 Torr. To deposit a silicon film.

【0006】次に、時間t3からt4までの間では図2
(a)に示すように、炉内温度を500℃から300℃
にし、図2(b)に示すように、炉内圧力を1Torrから
760Torrにする。これにより、シリコン酸化膜の上に
汚染物質を付着させることなくシリコン膜を形成させ
る。
Next, from time t 3 to time t 4 , FIG.
(A) As shown in FIG.
Then, as shown in FIG. 2B, the furnace pressure is changed from 1 Torr to 760 Torr. Thus, a silicon film is formed on the silicon oxide film without causing contaminants to adhere.

【0007】しかし、上述の従来の方法では、現実には
例えば、酸化シリコン膜の形成からシリコン膜の形成の
間に種々の汚染物が酸化シリコン膜表面に付着すること
がある。例えば、製造工場内空気に漂う浮遊物が付着す
る場合、半導体基板を自動的に搬送するロボット等から
発塵する場合又は半導体基板を搬送する際に物理的に接
触する部材等から転写される場合がある。このとき、最
もFETの信頼性を劣化させるのが鉄等の金属汚染物質
であり、面密度にして1011atoms/cm2程度の金属汚染
物質が半導体基板に付着する場合がある。即ち、従来の
方法では、この酸化シリコン膜表面に付着した汚染物質
を除去することができず、酸化シリコン膜とシリコン膜
の間に汚染物質を挟み込んでしまうという問題点があ
る。
However, in the above-mentioned conventional method, various contaminants may actually adhere to the surface of the silicon oxide film between the formation of the silicon oxide film and the formation of the silicon film. For example, when a floating substance adheres to the air in a manufacturing factory, when dust is generated from a robot or the like that automatically transports a semiconductor substrate, or when it is transferred from a member or the like that physically contacts the semiconductor substrate during transport. There is. At this time, a metal contaminant such as iron degrades the reliability of the FET most, and a metal contaminant having an area density of about 10 11 atoms / cm 2 may adhere to the semiconductor substrate. That is, in the conventional method, there is a problem that the contaminant attached to the surface of the silicon oxide film cannot be removed, and the contaminant is sandwiched between the silicon oxide film and the silicon film.

【0008】この問題点の一部を解決するため、積層さ
れる膜と膜との界面への不純物の混入を防止する種々の
技術が提案されている(特公平6−60401号公報、
特開平5−335337号公報等)。
In order to solve part of this problem, various techniques have been proposed for preventing impurities from being mixed into the interface between the films to be laminated (Japanese Patent Publication No. 6-60401,
JP-A-5-335337, etc.).

【0009】基板に400乃至600℃の温度範囲で、
水素ガスと塩素ガスとの混合ガス又は塩化水素ガス、更
に不活性ガスを含む雰囲気において前処理を行い、基板
を外気に晒すことなく連続してモノシランを500乃至
600℃の温度範囲で、又は高次シランを400乃至6
00℃の温度範囲で導入してシリコン薄膜を堆積するシ
リコン薄膜製造方法がある(特公平6−60401号公
報)。
In a temperature range of 400 to 600 ° C.,
The pretreatment is performed in an atmosphere containing a mixed gas of hydrogen gas and chlorine gas or a hydrogen chloride gas, and further an inert gas, and the monosilane is continuously exposed at a temperature in the range of 500 to 600 ° C. without exposing the substrate to the outside air, or Next silane 400 to 6
There is a silicon thin film manufacturing method in which a silicon thin film is deposited by introducing the silicon thin film in a temperature range of 00 ° C. (JP-B-6-60401).

【0010】薄膜トランジスタを形成するにあたり、半
導体薄膜上にゲート絶縁膜を成膜する直前に、雰囲気ガ
スとしてハロゲンガスを使用し、これに光エネルギを使
用して半導体薄膜上の不純物を揮発性の塩化物として半
導体薄膜の表面から除去する薄膜トランジスタの製造方
法がある(特開平5−335337号公報)。
In forming a thin film transistor, immediately before forming a gate insulating film on a semiconductor thin film, a halogen gas is used as an atmosphere gas, and light energy is used to convert impurities on the semiconductor thin film into volatile chloride. There is a method of manufacturing a thin film transistor which is removed from the surface of a semiconductor thin film as an object (Japanese Patent Application Laid-Open No. 5-335337).

【0011】[0011]

【発明が解決しようとする課題】しかしながら、上述の
特公平6−60401号公報では、基板の前処理を50
0乃至600℃の温度範囲で行っており、この温度範囲
を超えると、不純物が混入する虞があると共に、基板表
面にあれが生じる虞がある。
However, in the above-mentioned Japanese Patent Publication No. 6-60401, the pre-processing of the substrate is performed by 50 times.
The temperature is in the range of 0 to 600 ° C. If the temperature is exceeded, impurities may be mixed in and the substrate surface may be roughened.

【0012】上述の特開平5−335337号公報で
は、半導体薄膜上の不純物を除去するために複数の装置
を使用しているので、同一装置内で行うことができず、
半導体薄膜の移動に伴い不純物が混入する虞がある。ま
た、光エネルギを供給するための手段が必要になり、製
造装置が大型化するという問題点がある。
In the above-mentioned Japanese Patent Application Laid-Open No. 5-335337, since a plurality of devices are used to remove impurities on a semiconductor thin film, the processes cannot be performed in the same device.
There is a possibility that impurities may be mixed in with the movement of the semiconductor thin film. In addition, there is a problem that a means for supplying light energy is required, and the manufacturing apparatus is increased in size.

【0013】本発明はかかる問題点に鑑みてなされたも
のであって、絶縁膜上に汚染物質の混入させることなく
膜を形成することができる半導体装置の製造方法を提供
することを目的とする。
The present invention has been made in view of the above problems, and has as its object to provide a method of manufacturing a semiconductor device capable of forming a film on an insulating film without contamination. .

【0014】[0014]

【課題を解決するための手段】本発明に係る半導体装置
の製造方法は、絶縁膜が形成された半導体基板を塩素を
含有するガス雰囲気の炉内で塩化物が反応生成する温度
に加熱処理する工程と、前記炉内で前記絶縁膜上に膜を
形成する工程とを有することを特徴とする。
According to a method of manufacturing a semiconductor device according to the present invention, a semiconductor substrate having an insulating film formed thereon is heated in a furnace in a gas atmosphere containing chlorine to a temperature at which chloride reacts. And a step of forming a film on the insulating film in the furnace.

【0015】この場合、例えば、前記膜は多結晶シリコ
ン膜又は非晶質シリコン膜である。
In this case, for example, the film is a polycrystalline silicon film or an amorphous silicon film.

【0016】本発明においては、前記ガスは塩化水素ガ
ス又は塩素ガスを含有することが好ましい。
In the present invention, the gas preferably contains hydrogen chloride gas or chlorine gas.

【0017】また、本発明においては、前記半導体基板
を加熱処理する工程は、前記絶縁膜を600℃以上の温
度加熱するものであることが好ましい。
In the present invention, the step of heat-treating the semiconductor substrate preferably includes heating the insulating film to a temperature of 600 ° C. or higher.

【0018】更に本発明においては、例えば、前記絶縁
膜は電界効果トランジスタのゲート絶縁膜であり、前記
膜は電界効果トランジスタのゲート電極膜である。
Further, in the present invention, for example, the insulating film is a gate insulating film of a field effect transistor, and the film is a gate electrode film of the field effect transistor.

【0019】本発明においては、絶縁膜が形成された半
導体基板を塩素を含有するガス雰囲気の炉内で塩化物が
反応生成する温度に加熱処理し、同一の炉内で絶縁膜上
に膜を形成することにより、絶縁膜表面に付着した金属
汚染物質を除去することができ、同一炉内で連続して膜
を絶縁膜上に形成するため、金属汚染物質の再付着を防
止することができる。
In the present invention, the semiconductor substrate on which the insulating film is formed is heat-treated in a furnace in a gas atmosphere containing chlorine to a temperature at which chloride reacts and is formed on the insulating film in the same furnace. By forming, the metal contaminants attached to the surface of the insulating film can be removed, and the film is continuously formed on the insulating film in the same furnace, so that re-adhesion of the metal contaminants can be prevented. .

【0020】[0020]

【発明の実施の形態】以下、本発明の実施例に係る半導
体装置の製造方法について添付の図面を参照して詳細に
説明する。図1は本発明の実施例に係る半導体装置の製
造方法の製造条件を示すグラフ図であり、(a)は縦軸
に炉内温度、横軸に時間をとりシリコン膜の製造条件を
示し、(b)は縦軸に炉内圧力、横軸に時間をとりシリ
コン膜の製造条件を示し、(c)は縦軸にガス流量、横
軸に時間をとりシリコン膜の製造条件を示す。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for manufacturing a semiconductor device according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a graph showing manufacturing conditions of a method of manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 1A shows a furnace temperature on a vertical axis, a time on a horizontal axis showing manufacturing conditions of a silicon film, (B) indicates the furnace pressure on the vertical axis, the time on the horizontal axis indicates the manufacturing conditions of the silicon film, and (c) indicates the gas flow rate on the vertical axis and the time on the horizontal axis indicates the manufacturing conditions of the silicon film.

【0021】本実施例に係る半導体装置の製造方法にお
いては、先ず、シリコンからなる半導体基板の表面にゲ
ート絶縁膜となる絶縁膜として、酸化シリコン膜が形成
されている。この半導体基板をシリコン膜形成用減圧気
相成長炉に導入する。このとき、シリコン膜形成用減圧
気相成長炉の炉内温度は約300℃である。なお、この
シリコン膜形成用減圧気相成長炉は、炉内温度を300
℃乃至900℃の範囲で、また炉内圧力を大気圧(76
0Torr)から0.2Torrの範囲で、炉内への流入するガ
ス流量を0乃至10リットル/分の範囲で制御すること
ができ、コンピューターによってこれらの変数(炉内温
度、炉内圧力、ガス流量)を任意の組み合わせ、かつ任
意のステップ数で変化させるようにプログラムすること
ができる。
In the method of manufacturing a semiconductor device according to this embodiment, first, a silicon oxide film is formed on a surface of a semiconductor substrate made of silicon as an insulating film serving as a gate insulating film. This semiconductor substrate is introduced into a low-pressure vapor deposition furnace for forming a silicon film. At this time, the temperature in the furnace of the reduced pressure vapor phase growth furnace for forming a silicon film is about 300 ° C. Note that the reduced-pressure vapor deposition furnace for forming a silicon film has a furnace temperature of 300
C. to 900.degree. C. and the furnace pressure at atmospheric pressure (76
From 0 Torr) to 0.2 Torr, the flow rate of the gas flowing into the furnace can be controlled in the range of 0 to 10 liters / minute, and these variables (furnace temperature, furnace pressure, gas flow rate) can be controlled by a computer. ) Can be programmed to change in any combination and any number of steps.

【0022】次に、半導体基板を炉内に導入後、時間t
0からt1までの間、図1(c)に示すように、窒素ガス
を10リットル/分の流量で炉内に流し込みながら、半
導体基板の温度が安定するのを待つ。
Next, after the semiconductor substrate is introduced into the furnace, time t
From 0 to t 1 , as shown in FIG. 1C, while the nitrogen gas is being flowed into the furnace at a flow rate of 10 liter / min, the process waits for the temperature of the semiconductor substrate to stabilize.

【0023】次に、時間t1からt2までの間、図1
(c)に示すように、窒素ガスの流量を1リットル/分
にすると同時に図1(a)に示すように、炉内温度を8
00℃まで上昇させ、図1(b)に示すように、炉内圧
力を10Torrまで変化させる。
Next, from time t 1 to time t 2 , FIG.
As shown in FIG. 1 (c), the flow rate of the nitrogen gas is set to 1 liter / minute, and at the same time, as shown in FIG.
The temperature is raised to 00 ° C., and the furnace pressure is changed to 10 Torr as shown in FIG.

【0024】次に、時間t2からt3の間、図1(c)に
示すように、窒素ガスの流入を停止させると同時にHC
lガスを1リットル/分の流量で炉内に流入させ、図1
(a)及び(b)に示すように、炉内温度と炉内圧力と
を保持する。このHClガスが流入している間、即ち、
時間t2からt3の間で半導体基板上の酸化シリコン膜表
面の付着していた金属汚染物質がHClガスと反応し
て、塩化物になり、これが気化することにより金属汚染
物質が除去される。特に、金属汚染物質がFeの場合に
は下記化学式1で示すような反応式により除去される。
Next, from time t 2 to time t 3 , as shown in FIG.
1 gas was introduced into the furnace at a flow rate of 1 liter / min.
As shown in (a) and (b), the furnace temperature and the furnace pressure are maintained. While this HCl gas is flowing,
Reacting metallic contaminants having adhered to the surface of the silicon oxide film on the semiconductor substrate between the time t 2 of t 3 is the HCl gas, the metal contaminants are removed by it to the chloride, which is vaporized . In particular, when the metal contaminant is Fe, it is removed by a reaction formula as shown in the following chemical formula 1.

【0025】[0025]

【化1】Fe+2HCl → FeCl2 + H2 Embedded image Fe + 2HCl → FeCl 2 + H 2

【0026】次に、時間t3からt4の間、図1(c)に
示すように、HClガスの流入を停止させると同時に窒
素ガスを0.1リットル/分の流量で炉内に流入させ
る。図1(a)に示すように、炉内温度を800℃から
500℃、図1(b)に示すように、圧力を10Torrか
ら1Torrに変化させる。
Next, between time t 3 and time t 4 , as shown in FIG. 1C, the flow of HCl gas is stopped, and at the same time, nitrogen gas is flowed into the furnace at a flow rate of 0.1 liter / minute. Let it. As shown in FIG. 1A, the furnace temperature is changed from 800 ° C. to 500 ° C., and as shown in FIG. 1B, the pressure is changed from 10 Torr to 1 Torr.

【0027】次に、時間t4からt5の間、図1(c)に
示すように、炉内温度及び炉内圧力を保持したまま、シ
ランガス(SiH4)を0.1リットル/分の流量で炉
内に流入させる。このシランガスを炉内に流入させてい
る時間t4からt5の間、ゲート電極膜として非晶質シリ
コン膜が酸化シリコン膜上に減圧気相成長する。この非
晶質シリコン膜の膜厚は例えば、1000乃至3000
Åである。
Next, from time t 4 to t 5 , as shown in FIG. 1C, while maintaining the furnace temperature and the furnace pressure, silane gas (SiH 4 ) was supplied at a rate of 0.1 liter / minute. Flow into the furnace at a flow rate. Between t 5 the silane gas from the time t 4 when being caused to flow into the furnace, the amorphous silicon film as a gate electrode film grows pressure chemical vapor over the silicon oxide film. The thickness of this amorphous silicon film is, for example, 1000 to 3000.
Å.

【0028】次に、時間t5において炉内に流入させる
ガスをシランガスから窒素ガスに変更し、流量も10リ
ットル/分にする。時間t5からt6の間、図1(b)に
示すように、炉内圧力を1Torrから760Torrまで上昇
させ、図1(a)に示すように、炉内温度を500℃か
ら300℃まで下げる。次に、半導体基板を気相成長炉
から取り出す。これにより、ゲート絶縁膜の上にゲート
電極膜として非晶質シリコン膜が形成される。
Next, at time t 5 , the gas flowing into the furnace is changed from silane gas to nitrogen gas, and the flow rate is also set to 10 liter / minute. Between the time t 5 the t 6, as shown in FIG. 1 (b), the reactor pressure was increased from 1Torr to 760 Torr, as shown in FIG. 1 (a), up to 300 ° C. The furnace temperature from 500 ° C. Lower. Next, the semiconductor substrate is taken out of the vapor phase growth furnace. Thus, an amorphous silicon film is formed as a gate electrode film on the gate insulating film.

【0029】本実施例においては、ゲート絶縁膜(酸化
シリコン膜)を形成する工程からゲート電極膜(非晶質
シリコン膜)を形成する工程迄の時間内に半導体基板を
大気晒すことなく、炉外の物質と接触することなく連続
して加熱処理と減圧気相成長が行われる。これにより、
ゲート絶縁膜表面に付着した金属汚染物質を除去するこ
とができ、かつ気相成長炉内で連続してゲート電極膜を
ゲート絶縁膜上に形成することができるため、ゲート絶
縁膜への金属汚染物質の再付着を防止することができ
る。また、この塩素を含んだ雰囲気中での絶縁膜の加熱
処理は、ゲート絶縁膜上に付着した金属汚染物を除去
し、ゲート絶縁膜の故障を防止することができ、FET
の信頼性向上させると共に、半導体装置の歩留まりが向
上するという効果を得ることができる。
In this embodiment, the semiconductor substrate is not exposed to the air within the time from the step of forming the gate insulating film (silicon oxide film) to the step of forming the gate electrode film (amorphous silicon film). The heat treatment and the reduced pressure vapor phase growth are continuously performed without contacting any other substance. This allows
Metal contaminants attached to the surface of the gate insulating film can be removed, and the gate electrode film can be continuously formed on the gate insulating film in a vapor phase growth furnace. Reattachment of the substance can be prevented. In addition, the heat treatment of the insulating film in an atmosphere containing chlorine can remove metal contaminants attached on the gate insulating film and prevent the gate insulating film from malfunctioning,
And the effect of improving the yield of the semiconductor device can be obtained.

【0030】また、本実施例においては、塩素を含有す
るガスとして、HClガスを使用したが、特に、これに
限定されるものではなく、Cl2等のハロゲン系ガスと
することもできる。また、塩素を含有するガスの雰囲気
中での加熱を800℃で行っていたが、塩化物を反応生
成しうる温度であればよく、一般的には、この塩化物を
反応生成しうる温度は約600℃以上である。
In this embodiment, HCl gas is used as the chlorine-containing gas. However, the present invention is not particularly limited to this, and a halogen-based gas such as Cl 2 may be used. Further, the heating in the atmosphere of the gas containing chlorine was performed at 800 ° C., but any temperature may be used as long as it can react with chloride. Generally, the temperature at which this chloride can react is generated. It is about 600 ° C. or higher.

【0031】また、非晶質シリコン膜を形成したが、特
にこれに限定されるものではなく、多結晶シリコン膜又
はシリコン・ゲルマニウム化合物等のFETのゲート電
極材料を堆積させることもできる。なお、本実施例にお
いては、シリコン膜の堆積温度又は半導体基板の導入及
び引出し温度が特別な条件に限定されるものではないこ
とはいうまでもない。
Although an amorphous silicon film is formed, the present invention is not limited to this, and a gate electrode material for a FET such as a polycrystalline silicon film or a silicon-germanium compound may be deposited. In the present embodiment, it goes without saying that the deposition temperature of the silicon film or the introduction and withdrawal temperature of the semiconductor substrate is not limited to special conditions.

【0032】[0032]

【発明の効果】以上詳述したように本発明においては、
絶縁膜が形成された半導体基板を塩素を含有するガス雰
囲気の炉内で塩化物が反応生成する温度に加熱処理し、
同一の炉内で絶縁膜上に膜を形成することにより、絶縁
膜表面に付着した金属汚染物質を除去することができ、
同一炉内で連続して膜を絶縁膜上に形成するため、金属
汚染物質の再付着を防止することができる。
As described in detail above, in the present invention,
The semiconductor substrate on which the insulating film is formed is heated in a furnace in a gas atmosphere containing chlorine to a temperature at which chloride reacts,
By forming a film on the insulating film in the same furnace, metal contaminants attached to the insulating film surface can be removed,
Since the film is continuously formed on the insulating film in the same furnace, reattachment of metal contaminants can be prevented.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例に係る半導体装置の製造方法の
製造条件を示すグラフ図であり、(a)は縦軸に炉内温
度、横軸に時間をとりシリコン膜の製造条件を示し、
(b)は縦軸に炉内圧力、横軸に時間をとりシリコン膜
の製造条件を示し、(c)は縦軸にガス流量、横軸に時
間をとりシリコン膜の製造条件を示す。
FIG. 1 is a graph showing the manufacturing conditions of a method for manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 1 (a) shows the furnace temperature on the vertical axis and the time on the horizontal axis showing the silicon film manufacturing conditions. ,
(B) indicates the furnace pressure on the vertical axis, the time on the horizontal axis indicates the manufacturing conditions of the silicon film, and (c) indicates the gas flow rate on the vertical axis and the time on the horizontal axis indicates the manufacturing conditions of the silicon film.

【図2】従来の酸化シリコン膜上にシリコン膜を形成す
る工程の製造条件を示すグラフ図であり、(a)は縦軸
に炉内温度、横軸に時間をとりシリコン膜の製造条件を
示し、(b)は縦軸に炉内圧力、横軸に時間をとりシリ
コン膜の製造条件を示し、(c)は縦軸にガス流量、横
軸に時間をとりシリコン膜の製造条件を示す。
FIG. 2 is a graph showing manufacturing conditions in a conventional process of forming a silicon film on a silicon oxide film. FIG. 2 (a) shows the furnace temperature on the vertical axis, and the time on the horizontal axis. (B) shows the furnace pressure on the vertical axis, the time on the horizontal axis shows the manufacturing conditions of the silicon film, and (c) shows the gas flow rate on the vertical axis and the time on the horizontal axis shows the manufacturing conditions of the silicon film. .

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 4K030 AA07 BA29 BA30 BB03 DA03 FA10 JA10 LA15 5F040 DA00 DC01 EC04 EC07 FC00 5F045 AA06 AB03 AB04 AC01 AC13 AC15 AD07 AD08 AD09 AD10 AD11 AD12 AE21 AE23 AE25 AF01 BB14 HA06 HA23  ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4K030 AA07 BA29 BA30 BB03 DA03 FA10 JA10 LA15 5F040 DA00 DC01 EC04 EC07 FC00 5F045 AA06 AB03 AB04 AC01 AC13 AC15 AD07 AD08 AD09 AD10 AD11 AD12 AE21 AE23 AE25 AF01 BB14 HA06 HA23

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 絶縁膜が形成された半導体基板を塩素を
含有するガス雰囲気の炉内で塩化物が反応生成する温度
に加熱処理する工程と、前記炉内で前記絶縁膜上に膜を
形成する工程とを有することを特徴とする半導体装置の
製造方法。
1. A step of heating a semiconductor substrate on which an insulating film is formed to a temperature at which chloride reacts and generates in a furnace in a gas atmosphere containing chlorine, and forming a film on the insulating film in the furnace. And a method of manufacturing a semiconductor device.
【請求項2】 前記膜は多結晶シリコン膜であることを
特徴とする請求項1に記載の半導体装置の製造方法。
2. The method according to claim 1, wherein the film is a polycrystalline silicon film.
【請求項3】 前記膜は非晶質シリコン膜であることを
特徴とする請求項1に記載の半導体装置の製造方法。
3. The method according to claim 1, wherein the film is an amorphous silicon film.
【請求項4】 前記ガスは塩化水素ガス又は塩素ガスを
含有することを特徴とする請求項1乃至3のいずれか1
項に記載の半導体装置の製造方法。
4. The gas according to claim 1, wherein the gas contains hydrogen chloride gas or chlorine gas.
13. The method for manufacturing a semiconductor device according to the above item.
【請求項5】 前記半導体基板を加熱処理する工程は、
前記絶縁膜を600℃以上の温度加熱するものであるこ
とを特徴とする請求項1乃至4のいずれか1項に記載の
半導体装置の製造方法。
5. The step of heating the semiconductor substrate,
5. The method according to claim 1, wherein the insulating film is heated at a temperature of 600 ° C. or higher. 6.
【請求項6】 前記絶縁膜は電界効果トランジスタのゲ
ート絶縁膜であり、前記膜は電界効果トランジスタのゲ
ート電極膜であることを特徴とする請求項1乃至5のい
ずれか1項に記載の半導体装置の製造方法。
6. The semiconductor according to claim 1, wherein the insulating film is a gate insulating film of a field-effect transistor, and the film is a gate electrode film of the field-effect transistor. Device manufacturing method.
JP11167520A 1999-06-14 1999-06-14 Manufacture of semiconductor device Pending JP2000357659A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11167520A JP2000357659A (en) 1999-06-14 1999-06-14 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11167520A JP2000357659A (en) 1999-06-14 1999-06-14 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JP2000357659A true JP2000357659A (en) 2000-12-26

Family

ID=15851226

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11167520A Pending JP2000357659A (en) 1999-06-14 1999-06-14 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JP2000357659A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106206266A (en) * 2016-07-22 2016-12-07 上海芯导电子科技有限公司 One pushes away trap technique

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03266434A (en) * 1990-03-15 1991-11-27 Fujitsu Ltd Manufacture of semiconductor device
JPH0660401B2 (en) * 1987-08-04 1994-08-10 工業技術院長 Silicon thin film manufacturing method
JPH08153688A (en) * 1994-09-13 1996-06-11 Toshiba Corp Manufacture of semiconductor device and semiconductor device
JPH08203889A (en) * 1995-01-27 1996-08-09 Sony Corp Fabrication of semiconductor device
JPH08279502A (en) * 1995-04-05 1996-10-22 Sony Corp Forming method of silicon oxide film

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0660401B2 (en) * 1987-08-04 1994-08-10 工業技術院長 Silicon thin film manufacturing method
JPH03266434A (en) * 1990-03-15 1991-11-27 Fujitsu Ltd Manufacture of semiconductor device
JPH08153688A (en) * 1994-09-13 1996-06-11 Toshiba Corp Manufacture of semiconductor device and semiconductor device
JPH08203889A (en) * 1995-01-27 1996-08-09 Sony Corp Fabrication of semiconductor device
JPH08279502A (en) * 1995-04-05 1996-10-22 Sony Corp Forming method of silicon oxide film

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106206266A (en) * 2016-07-22 2016-12-07 上海芯导电子科技有限公司 One pushes away trap technique
CN106206266B (en) * 2016-07-22 2020-02-04 上海芯导电子科技有限公司 Well pushing process

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