JP2000349765A - Packet exchanger, switch control method therefor, and storage medium storing switch control program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a packet exchange which avoids generation of HOL blocking, improves throughput and reduces a buffer overflow frequency. SOLUTION: This device is equipped with input buffer parts 10-1 to 10-n which are provided by every input ports and temporarily accumulate a packet that reaches a corresponding input port, a switch exchange part 20 which controls connection of an input port and an output port and switches a packet, and a main arbiter part 30 which performs arbitration processing for deciding any of which input buffer parts 10-1 to 10-n an output permission to a specified output port is to be given to. With respect to each of the input buffer parts 10-l to 10-n and each of output ports 101-1 to 101-n, in the main arbiter part 30, a destination output port which is ready for output is compared with an output port in an empty state in the input buffer parts by specified order, the coincident input buffer parts 10-1 to 10-n and the output ports 101-1 to 101-n are coordinated to one another, and the output permission is given.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ATM (Asyn)
The present invention relates to a packet switching apparatus that performs packet switching between a specific input port and an output port using a packet communication technique such as a chronous transfer mode, a switch control method thereof, and a storage medium storing a switch control program.

[0002]

2. Description of the Related Art FIG. 16 is a block diagram showing the configuration of a conventional packet switching device, and FIG. 17 is a diagram for explaining the operation of the conventional packet switching device. Conventionally, this type of packet switching device has input ports 100-1 to 100-1 as shown in FIG.
Input buffer units 1610-1 to 1610-n (input buffer unit 1) for temporarily storing packets arriving at 100-n (input ports 100-3 to 100-n are not shown).
610-3 to 1610-n are not shown), a switch switching unit 1620 for switching packets, and an arbiter unit 1630.

[0003] The structure of the switch exchange unit 1620 is as follows.
A configuration that opens and closes (turns on / off) the crossing point of a transmission line that is routed in a grid pattern is conceivable. In this configuration, if multiple input ports transmit packets to a specific output port at the same time, packet collision occurs and the data carried by the packet is destroyed, so packets are transmitted to a specific output port at the same timing It is necessary to limit the number of input ports to be used to at most one.

Input buffer sections 1610-1 to 1610-n prepared for each of the input ports 100-1 to 100-n
Have a single logical queue 1611 respectively.
Packets arriving at the input ports 100-1 to 100-n are stored at the end of the logical queue 1611, and the switch switching unit 1620 is sequentially arranged from the head of the logical queue 1611.
Send to Input buffer units 1610-1 to 1610-
n transmits to the arbiter unit 1630 an output request signal 1650 describing which output port 101-1 to 101-1n (output port 101-3 to 101-n is not shown) the packet is to be output.

The arbiter unit 1630 determines which of the input / output ports of the switch switching unit 1620 should switch the packet so that packet collision does not occur, and notifies the arbitration result by the output enable signal 1651 to the input buffer unit 1610-1. 1 to 1610-n.

Next, the operation of the prior art will be described. First,
Packets arriving at the input ports 100-1 to 100-n are accumulated at the end of the logical queue 1611. The input buffer units 1610-1 to 1610-n are connected to the logical queue 1
From the header information of the first packet 611, it is determined which output port 101-1 to 101-n the packet is addressed to, and the output request signal 1650 tells the arbiter unit 1630 the output port 101 that is the destination.
-1 to 101-1n are notified of an output request.

The arbiter unit 1630 outputs the output request signals 1 from all the input buffer units 1610-1 to 1610-n.
650, a plurality of input buffer units 1610-1
To the same output port 101-1 to 1010-n
If there is an output request for 1-n (when a conflict occurs), any one of the input buffer sections 1610-1 to 1610-1
Arbitration is performed so that output permission is given only to 0-n.

[0008] Predetermined output ports 101-1 to 101-n
Input buffer units 1610-1 to 1610
-N, there is only an output request from the output port 10
The output permission for 1-1 to 101-n is given to the input buffer units 1610-1 to 1610-n.

All output ports 101-1 to 101-n
After the arbitration is performed so that the packet collision does not occur, request acceptance or rejection of the request is notified to the input buffer units 1610-1 to 1610-n by the output permission signal 1651.

The input buffer unit 16 for which the request has been accepted
10-1 to 1610-n send the first packet to the switch switching unit 1620.

The switch exchange unit 20 includes an arbiter unit 163
Based on the arbitration result obtained from 0, the packet is switched to a predetermined output port 101-1 to 101-n.

FIG. 17 shows that the switch switching unit 1620 has four input ports # 0 to # 3 and four output ports # 0 to # 3.
FIG. 4 is a diagram showing a state in which switching is performed between and. FIG.
7, the first packet of the input port # 0 obtains the output permission to the output port # 2, and the switch exchange unit 2
0 input port # 0 and output port # 2 are connected. The first packets of the input ports # 1 and # 2 also want to connect to the output port # 2, but cannot transfer because they have not obtained the output permission to the output port # 2.

At this time, paying attention to the packet stored next to the first packet of the input ports # 1 and # 2, the input ports (# 1, # 2) are empty and the destination output ports (# 1, # 2) Although # 0) is also in an empty state, it cannot be transferred due to the blockage of the first packet. The state of these packets is called a HOL (Head Of Line) blocking state, and causes deterioration in throughput and buffer overflow.

Further, input buffer units 1610-1 to 1610-16
The 10-n logical queue 1611 is divided corresponding to the output port, and the logical queue 1 corresponding to the destination output ports 101-1 to 101-n obtained from the header information of the packet.
Even in the case where the packet is stored in the 611, the arbitration method in which the input buffer units 1610-1 to 1610-n synchronously issue an output request to a certain output port 101-1 to 101-n Is rejected, the leading packet of the logical queue 1611 corresponding to the other output ports 101-1 to 101-n falls into the HOL blocking state, and the throughput is degraded.

[0015]

As described above, in the conventional packet switching apparatus, when a plurality of packets input from a plurality of input ports request output permission to the same output port at the same time, the packet is switched to the output port. At the input port where the connection was not permitted, HOL blocking occurs in which a packet subsequent to the packet cannot be transferred even if the destination output port is in an empty state, which causes a disadvantage that a throughput is degraded and a buffer overflows. There was.

Further, even when the logical queue of the input buffer section is divided so as to correspond to the output port and packets are stored in the logical queue corresponding to the destination output port, each input buffer section is synchronized. In the arbitration method for issuing an output request, if the output request to a certain output port is rejected, the leading packet of the logical queue corresponding to another output port falls into the HOL blocking state, and the throughput is degraded. There was.

The present invention solves the above-mentioned conventional drawbacks and provides a HO
It is an object of the present invention to provide a packet switching device that realizes an improvement in throughput and a reduction in buffer overflow frequency while avoiding occurrence of L-blocking, a switch control method thereof, and a storage medium storing a switch control program.

[0018]

According to the present invention, there is provided a packet switching apparatus used in packet communication for switching between a plurality of input ports and a plurality of output ports. An input buffer for temporarily storing a packet arriving at a corresponding input port, a switch exchange means for controlling connection between the input port and the output port to exchange packets, and An arbiter that performs an arbitration process that determines which of the input buffers is given output permission to the output port, wherein the arbiter performs the input processing in a predetermined order with respect to the input buffers and the output ports. The destination output port ready for packet output in the buffer is compared with the empty output port, and Packet switching device characterized by providing an output permission associated buffers and said output port.

According to a second aspect of the present invention, there is provided a packet switching apparatus comprising:
The arbiter means pays attention to each of the input buffers in a predetermined order, and sequentially checks whether or not a packet output to each of the output ports is possible for the input buffer under consideration in a predetermined order. Thus, an output port selection process for determining an output port that is a destination of a packet output destination is performed.

According to a third aspect of the present invention, there is provided a packet switching apparatus comprising:
The arbiter means updates the input buffer of interest first, each time the arbitration process is performed, according to the order of interest of the input buffer, and the output port to be inspected first in the output port selection process. Is updated every time the arbitration process is performed a number of times corresponding to the number of ports, in accordance with the order in which the output port selection process is to be inspected.

According to a fourth aspect of the present invention, there is provided a packet switching apparatus comprising:
The arbiter means pays attention to the output port according to a predetermined order, and the input buffer can output a packet to the output port under consideration according to a predetermined order with respect to the output port under consideration. It is characterized in that an input buffer selecting process for determining the input buffer for outputting a packet with the output port under consideration as a destination is performed by sequentially examining whether the output port is of interest.

According to a fifth aspect of the present invention, there is provided a packet switching apparatus comprising:
The arbiter means updates the output port of interest first, each time the arbitration process is performed, according to the order of interest of the output port, and the input buffer to be inspected first in the input buffer selection process. Is updated every time the arbitration process is performed a number of times corresponding to the number of ports, in accordance with the order in which the input buffer selection process is to be inspected.

Another aspect of the present invention that achieves the above object is a switch control method for a packet switching device used in packet communication and switching between a plurality of input ports and a plurality of output ports. The arriving packet is temporarily stored in buffer means provided corresponding to the input port, and the buffer means is ready for packet output in a predetermined order with respect to each buffer means and each output port. The arbitration process of comparing the destination output port with the empty output port and providing the output permission by associating the corresponding input buffer with the output port, and performing the arbitration process according to the result of the arbitration process. A packet is exchanged by controlling connection between a port and the output port.

According to a seventh aspect of the present invention, there is provided a switch control method comprising:
In the arbitration processing, attention is paid to the input buffers in a predetermined order, and for the input buffer under consideration, it is sequentially checked whether packet output to each output port is possible in a predetermined order. Thus, an output port selection process for determining an output port that is a destination of a packet output destination is performed.

The switch control method of the present invention according to claim 8 is
In the arbitration process, the input buffer of interest first is updated in accordance with the order of attention of the input buffer each time the arbitration process is performed, and the output port to be inspected first in the output port selection process is updated. Is updated every time the arbitration process is performed a number of times corresponding to the number of ports, in accordance with the order in which the output port selection process is to be inspected.

According to a ninth aspect of the present invention, there is provided a switch control method comprising:
In the arbitration process, the output ports are focused on in accordance with a predetermined order, and the input buffers are capable of outputting packets to the focused output ports in accordance with a predetermined order with respect to the focused output port. It is characterized in that an input buffer selecting process for determining the input buffer for outputting a packet with the output port under consideration as a destination is performed by sequentially examining whether the output port is of interest.

According to a tenth aspect of the present invention, in the arbitration process, the arbitration process updates the output port of interest first, each time the arbitration process is performed, according to the order in which the output ports are observed. The input buffer to be inspected first in the input buffer selection processing is updated in accordance with the order to be inspected in the input buffer selection processing every time the arbitration processing is performed a number of times corresponding to the number of ports. Features.

Still another aspect of the present invention to achieve the above object is to control a packet switching device used in packet communication for switching between a plurality of input ports and a plurality of output ports, thereby controlling the switching. In a storage medium storing a switch control program to be executed, packets arriving at the input port are temporarily stored in buffer means provided corresponding to the input port, and for each of the buffer means and each of the output ports, In a predetermined order,
The buffer means compares a destination output port ready for packet output with the empty output port, and performs an arbitration process for associating the input buffer and the output port with each other and giving output permission, According to a result of the arbitration process, the connection between the input port and the output port is controlled to exchange packets.

According to the present invention having the above-mentioned configuration, the input buffer and the output port are arranged in a predetermined order in a predetermined order with the destination output port ready for packet output in the input buffer. By comparing output ports and matching input buffers with the output ports and giving output permission, when output requests from a plurality of input buffer units collide, packets are output from a predetermined input buffer unit. Cannot be output
Blocking can be avoided.

[0030]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a packet switching device according to an embodiment of the present invention. Referring to FIG. 1, the packet switching apparatus according to the present embodiment includes an input buffer unit 10-10 provided for each input port.
1 to 10-n (input buffer units 10-3 to 10-n are not shown), switch switching unit 20, main arbiter unit 3
0. In FIG. 1, only the characteristic configuration of the present embodiment is described, and the description of other general configurations is omitted.

The packet switching apparatus according to the present embodiment is realized by, for example, a microprocessor controlled by a program and a RAM or other internal memory. The switch control program, which is a computer program for controlling the microprocessor, is provided by being stored in a magnetic disk, an optical disk, a semiconductor memory, or another general storage medium, and is loaded into the internal memory to control the microprocessor. Implement each component.

In the above configuration, the input buffer unit 10-
1 to 10-n are logical queues 11-1 to 11-n, a packet input unit 12, a flow information database 13,
A sub arbiter unit 14 and a packet output unit 15 are provided.
Numbers for identification are assigned to the input buffer units 10-1 to 10-n. In the present embodiment, an integer from 0 to N−1 is assigned, where N is the number of ports.

Input ports 100-1 to 100-n (input ports 100-3 to 100-n are not shown) and output ports 101-1 to 101-n (output ports 101-3-1 to 101-n)
For example, the switch switching unit 20 that switches a packet between 01-n (not shown) opens and closes (turns on / off) a crossing point of a transmission line arranged in a grid.
It can be configured.

Numbers for identification are assigned to the input ports 100-1 to 100-n and the output ports 101-1 to 101-n. For example, if the number of ports is N, an integer from 0 to N-1 is assigned. However,
It is assumed that the number of the input port matches the number of the input buffer unit provided at the input port.

The input buffer units 10-1 to 10-n construct therein logical queues 11-1 to 11-n which are distinguished corresponding to the output ports 101-1 to 101-n, respectively. Packets arriving at -1 to 100-n are stored separately for each of the destination output ports 101-1 to 101-n. In the present embodiment, for simplicity of explanation, the logical queues 11-1 to 11-n are connected to the destination output port 101-1.
Although it is described that the packets are stored for each of the packets 101 to 101-n, the present invention can be applied without any change even when storing the packets for each flow, and the same effect can be expected.
Also, by providing logical queues 11-1 to 11-n corresponding to output ports constructed in the input buffer units 10-1 to 10-n for each service class, a multi-traffic class environment can be easily provided. Can be. In the present embodiment, for the sake of simplicity of description, it is assumed that there is one service class, but in practice, it is possible to prepare only the number of desired service classes.

The packet input section 12 has an input port 100
The flow identifier is extracted from the header portion of the packet arriving at -1 to 100-n, and the service class to which the packet belongs and the destination output port are recognized by referring to the flow information database 13 using the flow identifier as a key. Then, based on the identification result, an appropriate logical queue 1
Packets are stored in 1-1 to 11-n.

FIG. 2 is a block diagram showing the configuration of the sub-arbiter unit 14. As shown in FIG. 2, the sub-arbiter unit 14 includes an output request signal transmission unit 141 and an output permission signal reception unit 142.

The output request signal transmitting section 141 generates an output request signal 50 for transmitting information about a logical queue having a packet that can be output, that is, which output port is ready to output the packet. This is transmitted to the main arbiter unit 30. FIG. 3 shows the output request signal 50.
Is an example of the format. In the present embodiment,
“1” is described in the column of the destination output port capable of outputting a packet, and “0” is described in the other fields.

The output permission signal receiving section 142 receives from the main arbiter section 30 an output permission signal 51 indicating whether or not output permission has been given, and notifies the packet output section 15 of a destination output port to which a packet is to be output. . FIG.
It is an example of a format of an output permission signal 51. In the present embodiment, the output permission signal 51 is information (ACK / NAC) indicating whether output permission has been given to the input buffer unit.
K) and information indicating to which destination output port the output permission has been given.

The packet output unit 15 is a sub arbiter 1
4 to extract the head packet of the logical queue corresponding to the destination output port notified from the input ports 100-1 to 100-1.
00-n.

FIG. 5 is a block diagram showing the structure of the main arbiter unit 30. Referring to FIG. 5, the main arbiter unit 30 includes an arbitration control unit 31 and an output request signal receiving unit 3
2, an output permission signal transmission unit 33, and an output request status management memory 34. The main arbiter unit 30 executes the arbitration process, and according to the arbitration result, the input port 10
0-1 to 100-n and output ports 101-1 to 101-
The switch switching unit 20 is controlled so as to perform packet switching between n.

FIG. 6 is an example of the output request status table stored in the output request status management memory 34. As shown, the output request status table includes the input buffer unit 10.
Information on which output port the packet can be output from -1 to 10-n is stored. In FIG.
“1” indicates that output is possible, and “0” indicates that output is not possible.

FIG. 7 is a block diagram showing the configuration of the arbitration control unit 31. As shown in FIG. 7, the arbitration control unit 31
It comprises a port number control unit 311 and a selector unit 312. The port number control unit 311 calculates the input port number X
/ Output port number Y is saved / updated, and history information indicating which output buffer is given output permission to which input buffer unit is saved. The selector unit 312 executes an output port selection process / input buffer selection process for determining which input buffer unit is given output permission to which output port.

The output request signal receiving section 32 receives the output request signal 50 from the input buffer sections 10-1 to 10-n, and the input buffer sections 10-1 to 10-n can output the packet to any output port. Is recorded in the output request status table 34.

The output permission signal transmitting section 33 generates an output permission signal 51 for transmitting information about the destination output port to which the output is permitted, and outputs the output buffer signal to the input buffer sections 10-1 to 10-1.
Notify -n.

FIG. 8 is a flowchart showing the operation of the arbitration process by the arbitration control unit 31. Referring to FIG.
First, the port number control unit 311 determines an input port number X and an output port number Y (Step 801). In this step, the input port number X is updated to the value of the next order according to the predetermined input port order every time the arbitration process is started, and the output port number Y is set to the number of arbitration processes corresponding to the number of ports. Is executed, a process of updating to a value in the next order according to a predetermined output port order is executed. Various methods can be used to determine the predetermined input port order / output port order, but in the present embodiment, in the order of youngest (# 0 → # 1 → # 2 →...)
・ → # N-1) Subsequent to the number N-1, the result is number 0. However, it is needless to say that the order is merely an example and may be an order determined by another method. The timing for updating the output port number Y is controlled by a counter that is decremented each time the arbitration process is executed. That is, when the counter is zero, the output port number Y is updated, and the number of ports N is set in the counter.

FIG. 9 shows how the input port number X and the output port number Y are updated. Referring to FIG. 9, when the number of ports N = 4, the input port number X is changed every arbitration process, but the output port number Y is changed every four arbitration processes.

Next, the number X is input to the variable A and 0 is input to the variable B (step 802), and the variable B is compared with the number of ports N (step 803). If the variable B is smaller than N, the selector unit 312 executes an output port selection process (Step 804). On the other hand, if the variable B is equal to or greater than N, the arbitration process ends.

In the output port selection processing by the selector unit 312, first, in the input buffer unit of the number A (hereinafter referred to as the input buffer A), the output port starting from the output port of the number Y (hereinafter referred to as the output port Y) Check if output is possible in order. Then, if the output port is not occupied by another input buffer unit and the packet output is ready for the output port, the input buffer A is permitted to output the packet to the output port. Whether or not the output port is occupied by another input buffer unit can be grasped by an internal variable for each output port held by the selector unit 312. This internal variable is
It is reset to "0" before the start of arbitration, and each time the output port is occupied by the input buffer unit, the corresponding internal variable is updated to "1". Whether or not the input buffer unit is ready to output a packet to the output port can be grasped by referring to the output request status table stored in the output request status management memory 34. In the present embodiment,
The order of output ports for checking whether output is possible in the output port selection process is in ascending order, and the number following the number N-1 results in the number 0. However, this is only an example, and it goes without saying that the inspection order may be changed to another order.

After the output port selection processing for the input buffer A is completed as described above, the variable A is updated by adding 1 to the variable B (step 805). Thereafter, the process returns to step 803 to execute a determination process based on the variable B.
If the variable B is less than N, the output port selection processing for the input buffer A is executed. If the variable B is N or more, the output port selection processing for all the input buffer units is completed, and the arbitration processing is performed. finish. In the present embodiment, the order of the input buffer units that perform the output port selection process is the lowest order, and the number following the number N−1 results in the number 0. Therefore, in step 805 of this embodiment, the value obtained by adding 1 to the variable A is divided by the number of ports N, and the remainder is overwritten and set to A. However, this is only an example, and it goes without saying that the order of the input buffer units for performing the output port selection processing may be changed to another order.

The main arbiter 30 that has completed the arbitration process
Transmits the output permission to the input buffer sections 10-1 to 10-n via the output permission signal transmitting section 33, and also sets the input ports 100-1 to 100-n and the output ports 101-1 to 101-101 based on the output permission. The switch switching unit 20 is controlled so that packets are switched between −n.

FIG. 10 shows an operation example in the case where arbitration processing is performed in a packet switching apparatus having the number of ports N = 4. Here, it is assumed that 0, 1, 2, and 3 are assigned as the input / output port number / input buffer number. By referring to the output request status table stored in the output request status management memory 34, the input buffer unit # 0 is ready for output to the output port # 2. The input buffer unit # 1 is ready for output to the output ports # 0, # 1, and # 2. The input buffer unit # 2 is connected to the output port #
2. Ready for output to # 3. The input buffer unit # 3 is ready for output to the output ports # 0 and # 3.

First, the port number control section 311 determines an input port number X and an output port number Y, respectively. As described above, the input port number X is updated each time arbitration processing is performed, whereas the output port number Y is updated every N = 4 arbitration processing. In this embodiment, the input port number X is X =
2. It is assumed that the output port number Y is determined to be Y = 3. In addition, the selector unit 312 performs output port selection processing in the order of input buffer according to # 2 → # 3 → # 0 → # 1 under control using the variables A and B. In the output port selection process in the input buffer unit, # 3 → # 0 → # 1 → #
It is checked whether output is possible in the output port order according to 2.

In the initial state, all the output ports are not occupied by any of the input buffer sections. Therefore, in the output port selection processing for the input buffer section # 2, the output port #
As a result of checking in the order of 3 → # 0 → # 1 → # 2, the input buffer unit # 2 obtains output permission for the output port # 3.

Next, an output port selection process for the input buffer unit # 3 is executed, and the output port # 3 → # 0 → # 1
→ Check in the order according to # 2, but already output port # 3
Is occupied by the input buffer unit # 2, so that the output permission of the vacant output port # 0 is obtained. Less than,
The output port selection process is executed in the order of the input buffer unit # 0 → # 1 to obtain the output permission of the output ports # 2 and # 1 among the vacant output ports.

FIG. 11 shows the state at the time when the output port selection processing for all the input buffer units has been completed from the state of FIG. 10 as described above.

When the output port selection processing for all the input buffer units is completed, the output request status management memory 3
Among the elements of the output request status table stored in No. 4, the element determined by the combination of the input port and the output port corresponding to the established output permission is set to “0”. Also,
The main arbiter unit 30 controls the switch switching unit 20 so that packets are exchanged between the input port and the output port corresponding to the established output permission.

As described above, according to the present embodiment, the input buffer units 10-1 to 10-n determine the output ports in order, whereby a plurality of input buffer units 10-1 to 10-n are determined.
An output request from 10-n collides and a predetermined input buffer unit 10-1 to 10-n cannot transmit a packet H
Since the occurrence of OL blocking is avoided, an improvement in throughput and a reduction in the frequency of buffer overflow are achieved.

Further, in the arbitration process started periodically, the input buffer units 10-1 to 10-n which initially execute the output port selection process are shifted every time the arbitration process is executed. A fair packet service is realized between them.

Further, each of the input buffer units 10-1 to 10-10
-N, the output port to be checked first is set to N
Each time the arbitration process is executed, the packet is shifted, so that a fair packet service is realized between the destination output ports in each of the input buffer units 10-1 to 10-n.

FIG. 12 is a flowchart showing another example of the operation of the arbitration processing by the arbitration control unit 31. Referring to FIG. 12, first, the port number control unit 311 determines an input port number X and an output port number Y (Step 1).
201). In this step, when the arbitration process for the number of ports corresponding to the number of ports is executed, the input port number X is updated to the next order value according to the predetermined input port order, and the output port number Y is Every time the process is started, a process of updating to a value in the next order according to a predetermined output port order is executed. Various methods can be used to determine the predetermined input port order / output port order. However, in the present embodiment, in the order of youngest (# 0 → # 1 →
# 2 →... # N−1). After the number N-1,
The result is number 0. However, it is needless to say that the order is merely an example and may be an order determined by another method. The timing at which the input buffer number X is updated is controlled by a counter that is decremented each time the arbitration process is executed. When the counter is zero, the input buffer number X is updated, and the number of ports N is set in the counter.

FIG. 13 shows how the input port number X and the output port number Y are updated. Referring to FIG. 13, when the number of ports N = 4, the input port number X is changed every four arbitration processes, but the output port number Y is changed every arbitration process.

Next, the number Y is input to the variable A and 0 is input to the variable B (step 1202), and the variable B is compared with the number of ports N (step 1203). If the variable B is smaller than N, the selector unit 312 executes an input buffer selection process (step 1204). If the variable B is equal to or greater than N, the arbitration process ends.

In the input buffer selecting process performed by the selector unit 312, first, at the output port of the number A (hereinafter referred to as output port A), the input buffer starting from the input buffer unit of the number X (hereinafter referred to as input buffer A) Check if output is possible in order. Then, if the input buffer unit has not obtained output permission to another output port and is ready to output a packet to the output port, the input buffer unit outputs the packet to the output port A to the input buffer unit. Allow Whether or not the input buffer unit has obtained the output permission to another output port can be grasped by an internal variable for each input buffer unit held by the selector unit 312. This internal variable is reset to “0” before the start of arbitration, and each time the input buffer unit acquires the output permission, the corresponding internal variable is updated to “1”. Whether the input buffer unit is ready to output a packet to an output port can be grasped by referring to the output request status table stored in the output request status management memory 34. In the present embodiment, the order of the input buffer units for checking whether output is possible in the input buffer selection process is in ascending order, and the number following the number N-1 is reduced to number 0. However, this is only an example, and it goes without saying that the inspection order may be changed to another order.

As described above, when the input buffer selection processing for the output port A is completed, the variable A is updated by adding 1 to the variable B (step 1205). afterwards,
Returning to step 1203, the judgment process is performed by using the variable B. If the variable B is smaller than N, the input buffer selecting process for the output port A is executed. The buffer selection processing is completed, and the arbitration processing ends. In the present embodiment, the order of the output ports for performing the input buffer selection processing is the lowest order, and the number following the number N−1 results in the number 0. Therefore, in step 1205 of the present embodiment, the variable A
The remainder obtained by dividing the value obtained by adding 1 to the number of ports N is overwritten to A. However, this is only an example, and it goes without saying that the order of the input buffer units for performing the input buffer selection processing may be changed to another order.

The main arbiter 30 that has completed the arbitration process
Transmits the output permission to the input buffer sections 10-1 to 10-n via the output permission signal transmitting section 33, and also sets the input ports 100-1 to 100-n and the output ports 101-1 to 101-101 based on the output permission. The switch switching unit 20 is controlled so that packets are switched between −n.

FIG. 14 shows an operation example in the case where arbitration processing is performed in a packet switching apparatus having the number of ports N = 4. Here, it is assumed that 0, 1, 2, and 3 are assigned as the input / output port number / input buffer number. By referring to the output request status table stored in the output request status management memory 34, the input buffer unit # 0 is ready for output to the output port # 2. Input buffer section # 1
Are ready for output to output ports # 0, # 1, # 2, and # 3. The input buffer unit # 2 includes output ports # 1 and #
3. Ready for output. The input buffer unit # 3 is ready for output to the output ports # 0 and # 3.

First, the port number control section 311 determines an input port number X and an output port number Y, respectively. As described above, the input port number X is changed every N arbitration processes, but the output port number Y is changed every arbitration process. In this embodiment, it is assumed that the input port number X is determined to be X = 3 and the output port number Y is determined to be Y = 2. In addition, the selector unit 312 performs # control by using the variables A and B,
Input buffer selection processing is performed in the order of output ports according to 2 → # 3 → # 0 → # 1. In the input buffer selection processing at the output port, it is checked whether or not output is possible in the input buffer order according to # 3 → # 0 → # 1 → # 2.

In the initial state, since all the input buffer units have not obtained the output permission of any output port, in the input buffer selection processing for the output port # 2, the input buffers # 3 → # 0 → # 1 → # 2 As a result, the output port # 2 gives output permission to the input buffer unit # 0.

Next, an input buffer selection process for the output port # 3 is executed, and the input buffer # 3 → # 0 → # 1
The inspection is performed in the order according to # 2, but the output port # 3 gives the output permission to the input buffer unit # 3. Hereinafter, the input buffer selecting process is executed in the order of the output ports # 0 → 1, and the output permission is given to the input buffer units # 1 and # 2 among the vacant input buffer units.

FIG. 15 shows a state at the time when the input buffer selection processing for all the output ports is completed from the state of FIG. 14 as described above.

When the input buffer selection processing for all the output ports is completed, the output request status management memory 34
Is set to "0" among the elements of the output request status table stored in the combination of the input port and the output port corresponding to the established output permission. Further, the main arbiter unit 30 controls the switch switching unit 20 so that packets are exchanged between the input port and the output port corresponding to the established output permission.

As described above, according to the present embodiment, each of the output ports 101-1 to 101-n sequentially determines the input buffer section to which the output permission is given, so that the plurality of input buffer sections 10-1 HOL blocking, in which output requests from the input buffers 10-1 to 10-n collide with each other and a predetermined input buffer unit 10-1 to 10-n cannot transmit a packet, does not occur, thereby improving throughput and reducing the frequency of buffer overflow. Is done.

In the arbitration process started periodically, the output ports 101-1 to 101-n for executing the input buffer selection process are shifted each time the arbitration process is executed. Stop providing unbalanced packet services.

Further, each of the output ports 101-1 to 101-1
With respect to the inspection order of the input buffer units 10-1 to 10-n in the input buffer selection process executed in -n, the input buffer unit to be inspected first is shifted every time the arbitration process is performed a number of times corresponding to the number of ports. As such, the output port provides a fair packet service to each input buffer unit.

Although the present invention has been described with reference to the preferred embodiments, the present invention is not necessarily limited to the above embodiments.

[0077]

As described above, according to the packet switching device, the switch control method thereof, and the storage medium storing the switch control program of the present invention, each input buffer unit determines the output port from which the output permission is obtained in order. By doing so, when output requests from a plurality of input buffer units collide, it is possible to avoid occurrence of HOL blocking in which packets cannot be output from a predetermined input buffer unit, thereby improving throughput and buffer overflow frequency. There is an effect that reduction of the amount is achieved.

Further, in the arbitration process started periodically, the input buffer unit for executing the output port selection process is first shifted with the execution of the arbitration process, so that a fair packet service is realized between the input buffers. .

Further, as for the order of checking the destination output port in the output port selection processing executed in each input buffer unit, the output port to be checked first is shifted by executing the arbitration processing N times and shifting each output buffer. Thus, a fair packet service is realized between destination output ports.

According to the present invention, each output port sequentially determines an input buffer unit to which output permission is given, so that when output requests from a plurality of input buffer units collide, a predetermined input buffer Since it is possible to avoid occurrence of HOL blocking in which a packet cannot be output from the unit, there is an effect that improvement in throughput and reduction in buffer overflow frequency are achieved.

Further, in the arbitration process started periodically, the output port for executing the input buffer selection process is shifted at the same time as the execution of the arbitration process, so that a biased packet service is not provided between the output ports.

Further, regarding the inspection order of the input buffer section in the input buffer selection processing executed at each output port,
Since the input buffer to be checked first is shifted every time the arbitration process is performed N times, the output port can provide a fair packet service to each input buffer.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a packet switching device according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a sub-arbiter unit of an input buffer unit according to the present embodiment.

FIG. 3 is a diagram illustrating an example of a format of an output request signal according to the embodiment.

FIG. 4 is a diagram illustrating an example of a format of an output permission signal according to the embodiment.

FIG. 5 is a block diagram illustrating a configuration of a main arbiter unit according to the present embodiment.

FIG. 6 is a diagram illustrating an example of an output request status table stored in an output request status management memory of the main arbiter unit according to the present embodiment.

FIG. 7 is a block diagram illustrating a configuration of an arbitration control unit of a main arbiter unit according to the present embodiment.

FIG. 8 is a flowchart illustrating an operation example of an arbitration process performed by the arbitration control unit according to the embodiment.

9 is a diagram showing how an input port number X and an output port number Y are updated in the operation shown in FIG. 8;

FIG. 10 is a diagram illustrating an operation example in a case where arbitration processing is performed by a packet switching device having the number of ports N = 4 in the operation example of FIG. 8;

11 is a diagram illustrating a state at the time when output port selection processing for all input buffer units has been completed from the state of FIG. 10;

FIG. 12 is a flowchart illustrating another operation example of the arbitration process by the arbitration control unit according to the embodiment.

13 is a diagram showing a state of updating an input port number X and an output port number Y in the operation of FIG.

FIG. 14 shows an example of the operation of FIG.
FIG. 10 is a diagram illustrating an operation example when arbitration processing is performed by the packet switching device of FIG.

FIG. 15 is a diagram illustrating a state at the time when input buffer selection processing for all output ports is completed from the state of FIG. 14;

FIG. 16 is a block diagram showing a configuration of a conventional packet switching device.

FIG. 17 is a diagram illustrating the operation of a conventional packet switching device.

[Explanation of symbols]

 10-1 to 10-n Input buffer unit 11-1 to 11-n Logical queue 12 Packet input unit 13 Flow information database 14 Sub arbiter unit 15 Packet output unit 20 Switch switching unit 30 Main arbiter unit 100-1 to 100-n Input Port 101-1 to 101-n Output port

Claims (15)

[Claims] 1. A packet switching device used in packet communication and switching between a plurality of input ports and a plurality of output ports, wherein a packet provided for each of the input ports and temporarily arriving at a corresponding input port is provided. An input buffer for temporarily storing, a switch switching means for controlling connection between the input port and the output port and exchanging packets, and giving an output permission to a predetermined output port to any of the input buffers. An arbiter that performs an arbitration process for determining whether the destination buffer is ready for packet output in the input buffer in a predetermined order with respect to each of the input buffers and the output ports. The output port in the state is compared with the output port, and the matching input buffer and the output port are output in association with each other. Packet switching apparatus characterized by giving permission. 2. The arbiter means pays attention to each input buffer in a predetermined order, and can output a packet to each output port in a predetermined order with respect to the input buffer under consideration. 2. The packet switching apparatus according to claim 1, wherein an output port selection process of determining an output port which is a destination of a packet output by sequentially checking whether the packet is output or not is performed. 3. The arbiter means updates the input buffer of interest first, each time the arbitration process is performed, according to the order of attention of the input buffer, and first checks the input buffer in the output port selection process. 3. The output port according to claim 2, wherein the output port is updated in accordance with an order to be inspected in the output port selection processing every time the arbitration processing is performed a number of times corresponding to the number of ports. Exchange equipment. 4. The arbiter means pays attention to the output ports in a predetermined order, and for each of the output ports of interest, the respective input buffers output the current output port in accordance with a predetermined order. 2. The packet according to claim 1, wherein an input buffer selection process for determining the input buffer for outputting a packet with the output port of interest as a destination is performed by sequentially checking whether a packet output to a port is possible. Exchange equipment. 5. The arbiter means updates the output port of interest first in accordance with the order of attention of the output port each time the arbitration process is performed, and 5. The packet according to claim 4, wherein each time the arbitration process is performed a number of times corresponding to the number of ports, the input buffer is updated according to an order to be inspected in the input buffer selection process. 6. Exchange equipment. 6. A switch control method for a packet switching device used in packet communication and performing switching between a plurality of input ports and a plurality of output ports, wherein a packet arriving at the input port corresponds to the input port. Temporarily storing the data in the buffer means provided in the buffer means, and for each of the buffer means and each of the output ports, in a predetermined order, the destination output port ready for packet output in the buffer means and the empty output. A arbitration process of comparing the input buffer and the output port with the corresponding input buffer and performing output arbitration is performed, and a connection between the input port and the output port is controlled according to a result of the arbitration process. A switch control method for exchanging packets. 7. In the arbitration processing, attention is paid to each of the input buffers according to a predetermined order, and a packet output to each of the output ports is possible with respect to the input buffer under consideration in a predetermined order. 7. The switch control method according to claim 6, wherein an output port selection process of determining an output port that is a destination of a packet output by sequentially examining whether the packet is output or not is performed. 8. In the arbitration processing, the input buffer to be focused on first is updated in accordance with the order in which the input buffer is focused each time the arbitration processing is performed. 8. The switch according to claim 7, wherein the output port is updated in accordance with an order to be inspected in the output port selection processing every time the arbitration processing is performed a number of times corresponding to the number of ports. Control method. 9. In the arbitration process, the output ports are focused on in accordance with a predetermined order, and the input buffers are controlled by the input buffers in accordance with a predetermined order with respect to the output ports under consideration. 7. The switch according to claim 6, wherein an input buffer selection process is performed for sequentially determining whether a packet can be output to a port and determining the input buffer for outputting a packet with the output port of interest as a destination. Control method. 10. In the arbitration processing, the output port of interest first is updated in accordance with the order of attention of the output port every time the arbitration processing is performed, and the inspection target is first checked in the input buffer selection processing. 10. The switch according to claim 9, wherein the input buffer is updated in accordance with an order to be inspected in the input buffer selection process every time the arbitration process is performed a number of times corresponding to the number of ports. 11. Control method. 11. A storage medium storing a switch control program for controlling a packet switching device used for packet communication and performing switching between a plurality of input ports and a plurality of output ports, and controlling the switching. A packet arriving at the input port is temporarily stored in buffer means provided corresponding to the input port, and a packet is output from the buffer means in a predetermined order with respect to each buffer means and each output port. Comparing the ready destination output port with the empty output port, performing arbitration processing for associating the corresponding input buffer with the output port and giving output permission, and according to the result of the arbitration processing And controlling the connection between the input port and the output port to exchange packets. Storage medium storing a switch control program. 12. In the arbitration processing, attention is paid to each of the input buffers in a predetermined order, and a packet output to each of the output ports can be performed according to a predetermined order with respect to the input buffer under consideration. 12. The storage medium storing the switch control program according to claim 11, wherein an output port selection process of determining an output port which is a destination of the output destination of the packet by sequentially examining whether the packet is output or not is performed. 13. In the arbitration processing, the input buffer to be focused on first is updated in accordance with the order in which the input buffer is focused each time the arbitration processing is performed. 13. The switch according to claim 12, wherein each time the arbitration process is performed a number of times corresponding to the number of ports, the output port is updated in accordance with an order to be inspected in the output port selection process. A storage medium storing a control program. 14. In the arbitration processing, the output ports are focused on in accordance with a predetermined order, and the output buffers are focused on in accordance with a predetermined order with respect to the output ports of interest. 12. The switch according to claim 11, wherein an input buffer selection process is performed for sequentially determining whether a packet can be output to a port and determining the input buffer for outputting a packet with the output port of interest as a destination. A storage medium storing a control program. 15. In the arbitration processing, the output port of interest first is updated in accordance with the order of attention of the output port every time the arbitration processing is performed, and the inspection target is first checked in the input buffer selection processing. The switch according to claim 14, wherein the input buffer is updated in accordance with the order in which the input buffer selection process is to be inspected each time the arbitration process is performed a number of times corresponding to the number of ports. A storage medium storing a control program.