JP2000349739A - Device and method for acquiring synchronism - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce processing quantity and to reduce necessary memory quantity by executing a correlation processing for a reception signal at every slot through the use of a short period code allocated to every slot, specifying the array of the short period codes in a communication frame through the use of a table and a group number and integrating the result of the correlation processing in accordance with the array of the short period codes. SOLUTION: A data take-in part 204 takes in data for one frame in accordance with slot timing detected by a slot timing detection part 203. A correlation processing part 205 executes a correlation processing between one prescribed symbol of respective slots and a search code and calculates a correlation value. The obtained correlation value is stored. When a search code group number is transmitted from an integration processing part 206 to a search code generation part 209, the search code generation part 209 refers to the value of a search code conversion table accumulation memory 208 and generates the search code.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a synchronization acquisition device and a synchronization acquisition method provided in a wireless communication device used in a CDMA wireless communication system.

[0002]

2. Description of the Related Art Code Division Multiple Access (CDMA) is used as a multiple access system for the next generation mobile communication system.
Is being developed. In this CDMA cellular system, it is necessary to perform a cell search for initial synchronization establishment work when the mobile station is powered on, cell switching (handover) accompanying movement, and the like.

[0003] A comma-free method has been used as a method for acquiring synchronization at the time of this cell search. The comma-free method is to spread information using a code called comma-free arranged with a certain regularity within one frame,
This is a method of identifying a frame synchronization and spreading code using the regularity. This comma-free code is Texas Inst
ruments "Comma Free Codes for Acquisition: Code C
onstruction and simulation Results ", IMT2000 Stud
y Committee, Air-interface WG, SWG2, July 15, 1998
As described in (16, 3) Reed Solomon code. Hereinafter, this comma-free synchronization acquisition method will be described with reference to FIGS.

[0004] The synchronization acquisition method in CDMA has three stages of slot timing detection, frame timing detection, and spreading code (scrambling code) identification. In addition, the spread code which is a short-cycle code common to all base stations is used, and the search code which is a short-cycle code is used in. This search code is arranged in a different pattern (array pattern of search code numbers multiplied by one symbol of each slot) for each group including a plurality of scrambling codes that are long period codes (see FIG. 9 described later). reference).

[0005] Slot timing detection Normally, in CDMA, a first channel is used as a synchronization channel.
A synchronization channel and a second synchronization channel are provided. Here, the slot timing is detected using the first synchronization channel. In the signal of the first synchronization channel, one specific symbol in the slot is spread only with a spreading code common to all base stations. The slot timing is detected using the spreading code.

Specifically, the detection of the slot timing is performed in a process as shown in FIG. In ST1, data for one slot in the received data frame is fetched. In ST2, a correlation value between data for one symbol and a common spreading code is calculated. ST
In 3, the phase of the common spreading code is shifted. S
At T4, it is determined whether the correlation processing has been completed for one frame. If one frame has not been completed, the process returns to ST2 to perform the correlation process. If the correlation processing has been completed for one frame in ST4, a peak of the correlation value of the correlation processing for one frame is detected in ST5, and the timing of the peak is detected as the slot timing.

Here, frame timing detection (search code group identification) Here, frame timing detection and search code group identification are performed using the second synchronization channel. Second
In the synchronization channel, one specific symbol of all slots in one frame is spread with a search code. Different search codes are used for each slot in one frame. The arrangement of search codes in a frame differs for each group in which scrambling codes, which are long-period codes, are classified. The number of groups is 32 as shown in FIG. A search code group (row in FIG. 9) is identified using this search code, and thereafter, the head of a slot, that is, a frame timing is detected from one identified search code group.

Specifically, the detection of the frame timing is performed in a process as shown in FIG. In ST11,
Based on the slot timing in the communication frame detected in step 1, data for one frame is fetched. ST14
Then, a correlation process is performed between one specific symbol of each slot and a search code, and a correlation value is calculated. This correlation processing is performed for each of the slots 1 to 16 with the search code SC1.
To SC17. That is, slot 16
The correlation processing of ST14 is performed for each of the search codes 1-1.
It repeats for seven pieces (ST12-ST16). The obtained correlation values are stored.

Next, in ST19, the stored correlation values for 16 slots are integrated for each group (for each row of the allocation table) according to the search code allocation table of FIG. At this time, the processing of ST19 is repeated for 16 pieces while shifting the leading slot of integration, and this integration processing is repeated for 32 search code groups (ST1).
7 to ST21). Next, a search code group and a frame head are detected from the search code arrangement and the maximum value of the integration result in FIG. 9 (ST22). The storage memory of the search code arrangement table has 16 types of slots,
Since it is a type, 16 × 32 = 512 words are required.

Here, one scrambling code is identified from the 16 scrambling code candidates determined from the search code group identified in the above. Specifically, scrambling code identification is performed in the step shown in FIG.

In ST32, a correlation value between data for four symbols of the second synchronization channel and the scrambling code is calculated according to the detected frame timing.
This process is repeated for 16 scrambling codes belonging to the identified search code group (ST31 to ST33). Next, in ST34, the one having the largest correlation value among the correlation results is identified as a scrambling code.

[0012]

However, when the above-described synchronization acquisition operation is realized, a memory amount of 512 words is required in the frame timing detection process.
In addition, many memory access operations occur in the integration process. This has the problem of increasing the amount of hardware and shortening the mobile phone terminal usage time due to the prolonged synchronization acquisition operation.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a synchronization acquisition device which requires a small amount of processing at the time of cell search and can reduce the amount of memory required at the time of synchronization acquisition. And

[0014]

The present inventor paid attention to the regularity of the comma-free code sequence table, created a table in which the number of words was significantly reduced by utilizing this regularity, and used this table. The present inventors have found that a comma-free code sequence table can be reproduced by performing a special operation, and have accomplished the present invention.

That is, the gist of the present invention is that a received signal is determined by using a short-period code determined for each group number including a plurality of long-period codes and assigned to each slot in a communication frame of the received signal. The correlation processing is performed for each slot, the arrangement of short-period codes in the communication frame is specified using the table and the group number, and the result of the correlation processing is integrated according to the specified short-period code arrangement to perform group processing. And detecting the timing of the communication frame in the received signal.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A synchronization acquisition apparatus according to a first aspect of the present invention is determined for each group number including a plurality of long-period codes and assigned to each slot in a communication frame of a received signal. Correlation processing means for performing a correlation process on a received signal for each slot using a short-period code, operation means for performing an operation for specifying an arrangement of the short-period code in the communication frame, and a specified short-period code Frame timing detection means for integrating the result of the correlation processing according to the array to identify the group and detect the timing of a communication frame in the received signal.

According to a second aspect of the present invention, in the synchronization acquisition apparatus according to the first aspect, the short cycle code sequence is
This is an array according to a comma-free code array, and employs a configuration in which the calculation is performed for all slots based on the following equation using the values of the table obtained from the comma-free code array and the numbers of the groups.

Y = (A × X + B)% 17 (where Y indicates the number of the short-period code, X indicates the number of the group, A and B indicate the values in the table, and the operator “%” Represents the remainder calculation.) In the synchronization acquisition apparatus according to the second aspect, a predetermined number is assigned as the number of the short-period code of a specific slot, as in the third aspect.

According to these configurations, since a special operation for specifying the arrangement of the short-period codes is performed, the arrangement of the short-period codes in the communication frame can be efficiently specified. This operation can be performed using a table with a small number of words, thereby reducing the amount of memory and
The amount of hardware can be reduced.

The synchronization acquisition apparatus according to a fourth aspect of the present invention, in any one of the first to third aspects, wherein the slot timing detection means for detecting the timing of a slot in a communication frame of a received signal; And a long-period code identification means for identifying the long-period code included in the group from the identification result of the above.

According to a fifth aspect of the present invention, there is provided a communication terminal device including the synchronization acquisition device according to any one of the first to fourth aspects. A base station apparatus according to a sixth aspect of the present invention performs wireless communication with the communication terminal apparatus according to the fifth aspect.

According to these configurations, since the amount of hardware is reduced and a high-speed synchronization acquisition device is used, the size of the communication terminal device can be reduced, and the use time of the mobile phone terminal can be increased. The convenience of the terminal in the communication system can be improved.

[0023] A synchronization acquisition method according to a seventh aspect of the present invention comprises the steps of: detecting a timing of a slot in a communication frame of a received signal; Using the short-cycle code assigned to each slot in the communication frame of the signal, performing a correlation process on the received signal for each slot, and performing an operation to specify the arrangement of the short-cycle code in the communication frame Detecting the timing of a communication frame in the identification of the group and the received signal by integrating the result of the correlation processing according to the identified short-period code sequence; and Identifying the long-period code included in.

In a frame timing detecting method according to an eighth aspect of the present invention, a short cycle code determined for each group number including a plurality of long cycle codes and assigned to each slot in a communication frame of a received signal is provided. Performing a correlation process on the received signal for each slot, performing an operation to specify the arrangement of the short-period code in the communication frame, and performing the correlation process according to the specified short-period code array Detecting the timing of the communication frame in the received signal by identifying the group and integrating the results of the above.

According to these methods, a special operation for specifying an array of short-period codes is performed, so that an array of short-period codes in a communication frame can be efficiently specified. Since this operation can be performed using a table having a small number of words, the amount of memory can be significantly reduced, the amount of hardware can be reduced, the number of times of memory access processing can be reduced, and the synchronization acquisition processing can be shortened. Can be timed.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a block diagram illustrating a schematic configuration of a wireless communication system including a communication terminal including a synchronization acquisition device according to an embodiment of the present invention and a base station that performs wireless communication with the communication terminal device. On the base station side, the control section 101 controls the error correction coding / decoding section 102 so as to perform error correction coding processing and error correction decoding processing of transmission data. The signal subjected to the error correction coding processing is subjected to normal wireless transmission processing in transmitting section 103 and transmitted from antenna 105. Also, the signal received via the antenna 105 is sent to the receiving unit 104, and after being subjected to normal radio reception processing, sent to the error correction code / decoding unit 102 where error correction decoding is performed.

On the terminal side provided with the synchronization acquisition apparatus according to the present invention, the signal received from the antenna 106 is sent to the modulation / demodulation processing section 107 and the synchronization processing section 109, where modulation processing and synchronization processing are respectively performed. That is, while the synchronization processing unit 109 performs synchronization acquisition and synchronization holding, the modulation / demodulation processing unit 107 and the error correction / audio codec unit 10
At 8, the signal is voiced and output from the microphone / speaker 111. When transmitting voice, the voice input from the microphone / speaker 111 is voice-encoded by the error correction / voice codec unit 108, and the modulation / demodulation processing unit 107
Are transmitted from the antenna 106 after being modulated. The processing of the modulation / demodulation processing unit 107, the error correction / voice codec unit 108, and the synchronization processing unit 109 is controlled by the control unit 110.

The synchronization processing unit 109 is a synchronization acquisition device of the present invention, and has a configuration shown in FIG. FIG. 2 is a block diagram showing a configuration of the synchronization acquisition device in the wireless communication system.

The synchronization processing unit 109 includes a slot timing detection processing unit, a frame timing detection processing unit,
And a synchronization acquisition unit 213 that performs synchronization acquisition processing based on information from each processing unit.

The slot timing detection processing section includes a data capturing section 201 for capturing received data, a correlation processing section 202 for performing correlation processing on received data using a spreading code, and a slot timing detection section based on a correlation result. And a slot timing detection unit 203 that performs the operation.

The frame timing detection processing section includes a data capturing section 204 for capturing the received data, a correlation processing section 205 for performing a correlation process on the received data by using a spreading code, and an integration process for adding a correlation result. Part 20
6, a group for detecting a group number and a frame timing from the integration result, a frame head detection unit 207,
A search code generator 209 for obtaining a search code number from the integrated value and a search code conversion table storage memory 208 for storing a search code conversion table are provided.

A search code creation unit 209 receives a search code creation request from the integration processing unit 206, and determines a search code number of which slot in which group to create a search code number. The control unit 302 includes a control unit 302 that controls an algorithm and a search code number calculation unit 303 that calculates a search code number with reference to the search code conversion table storage memory 208 and outputs the search code number to the integration processing unit 206.

The scrambling code identification processing unit comprises:
A data capturing unit 210 for capturing received data, a correlation processing unit 211 for performing a correlation process on the received data using a spreading code, and a scrambling code identification unit 212 for determining a scrambling code number from the correlation result are provided. I have.

Next, the operation of the synchronization acquisition apparatus having the above configuration will be described. Of the three stages of synchronization acquisition performed by the synchronization processing unit 109, the first stage (slot timing detection) and the third stage (scrambling code (long-period code) identification) are the same as the conventional processes. Therefore, the description is omitted, and the process of the second stage (frame timing detection) will be described.

First, in detecting the frame timing in the synchronization acquisition of the present invention, first, the slot timing in the communication frame detected in the slot timing detecting step, that is, the slot timing detecting unit 2 is used.
According to the slot timing detected in step 03, the data capturing section 204 captures data for one frame.

Next, in the correlation processing unit 205, a correlation process is performed between one specific symbol in each slot and the search code, and a correlation value is calculated. This correlation process is performed for each of the slots 1 to 16 with the search codes SC1 to SC17.
Do up to. That is, correlation processing for 16 slots is repeated for 1 to 17 search codes. The obtained correlation values are stored.

Next, a search code group is identified,
Detect frame timing. The search code arrangement table shown in FIG. 9 can be reproduced according to the following algorithm using the table shown in FIG. Therefore, when the search code group number is output from integration processing section 206 to search code generation section 209, search code generation section 209 is generated.
Then, a search code is created with reference to the value of the search code conversion table storage memory 208.

Specifically, as shown in FIG. 3, upon receiving a search code creation request from integration processing section 206, determination section 301 determines which search code number of which slot of which group is to be created. In the search code number calculation unit 303, the search code conversion table storage memory 2
08 to calculate the search code number,
The search code numbers for one group are output to integration processing section 206. At this time, the search code creation algorithm is controlled by the control unit 302.

Here, the search code creation algorithm will be described. The arrangement of search codes in the arrangement table shown in FIG. 9 has a certain rule. Focusing on the columns of the sequence table in FIG. 9, it can be seen that the search code numbers are in arithmetic progression. The formula of the arithmetic progression can be generally expressed by the following equation (1). Y = A × X + B Equation (1)

In this embodiment, the search code number is determined by expressing the above equation as equation (2). Y = (A × X + B)% 17 Expression (2) Here, the operator “%” indicates that the remainder calculation is performed. However, when the result of the remainder calculation is “0”, it is replaced with “17”.

In the formula (2), when Y is a search code number, X is a search code group number, and A and B are examined for each slot, they can be summarized in a table shown in FIG. B1 and B2 in the table shown in FIG.
It corresponds to B in equation (2) and has the following relationship. When X (search code group number) <18: B = B1 When X ≧ 18: B = B2 Equation (3)

In the table shown in FIG. 5, A, B1, and B2 of the first slot are not described because the first slot is set according to a different rule from other slots. Therefore, in the first slot, when X (search code group number) <18: Y (search code number) = 1 When X ≧ 18: Y = 2 Equation (4)

Therefore, A, B1, B in the table shown in FIG.
The search code number is determined by performing the calculations of Expressions (2) to (4) using the value of 2. This calculation is sequentially performed for each search code group for each slot, and a search code array of the search code group requested for creation is created. Thus, a search code array can be efficiently created.

For example, a case where the search code group number requested to be created by the integration processing unit 206 is 7 will be described. At this time, the search code group number is 18
Therefore, according to equation (3), B1 (N) of the table shown in FIG.
o. See 2).

The search code number of the first slot is 1 because the search code group number is smaller than 18 according to equation (4).

The search code number of the second slot is shown in FIG.
Using the number 17 in the second slot of B1 in the table shown in FIG. That is, Y = (A × X + B1)
% 17 = (1 × 7 + 17)% 17 = 7.

Such an operation is performed up to 16 slots.
By such an operation, an array of search code numbers of the search code group number 7 shown in FIG. 9 is created. These search code number arrays are stored.

The above algorithm, that is, search code number generation will be described with reference to the flowchart of FIG.

Step (hereinafter abbreviated as ST) 101
Then, the search code group number created from the integration processing unit 206 is received. In the search code group requested to be created, a slot number for which a search code number is to be obtained is specified (ST102).

Next, the equation (3) is determined for the search code group number (ST103). If the search code group number is smaller than 18, B1 of the table shown in FIG.
(ST104), if the search code group number is 18 or more, the search code conversion table storage memory 20
8 is referred to in the table shown in FIG.
05).

Next, the calculation of the equation (2) is performed using the search code group number and the values in the table shown in FIG. 5 (ST1).
06-ST112). That is, first, it is determined whether or not the slot number for which the search code number is to be determined is 1 (ST107). If the slot number is not 1, the calculation of equation (2) is performed (ST108), and the search code number is determined. At this time, if the calculation result in the remainder calculation (% 17) is “0”, it is set to “17”.

If the slot number is 1, it is determined whether or not the search code group number is smaller than 18 (ST109). If the search code group number is smaller than 18, it is determined according to equation (4). 1
(ST110), and the search code group number is 18
If so, the search code number is set to 2 (ST11).
1).

The above processing (ST106 to ST112) is
This is repeated for six slots (ST113) to create search code numbers for one search code group.

These search code numbers are stored in the integration processing unit 2
06. Next, integration processing is performed by the integration processing unit 206 using the array of search code numbers for the search code group numbers thus obtained. Next, these integration results are sent to the group / frame head detection unit 207, and the search code group and the frame head are detected from the maximum value of the integration results.

Information on the search code group and the frame timing detected by the group / frame head detection section 207 is sent to the data acquisition section 210 of the scrambling code identification processing section. The scrambling code identification processing unit identifies the scrambling code based on this information.

The slot timing detection result, group,
The frame head detection result and the scrambling code identification result are sent to the synchronization acquisition unit 213, and the synchronization acquisition unit 213 performs synchronization acquisition processing. By this synchronization acquisition processing, cell search, handover, and the like are performed on the terminal side.

In the synchronization acquisition according to the present embodiment, the memory size of search code conversion table storage memory 208 is as shown in FIG.
As shown in FIG. 15, 15 × 3 = 45 words. Since the memory amount required in the conventional synchronization acquisition is 512 words as described above, according to the synchronization acquisition according to the present embodiment, the memory amount is (45/512) × 100 =
87.9, a reduction of about 90%. As a result, the amount of hardware as a terminal can be reduced, and the size can be significantly reduced.

The present invention is not limited to the above embodiment, but can be implemented with various modifications. For example, the algorithm of the present invention can be similarly applied to synchronization acquisition using a search code number arrangement table in which search code numbers are in arithmetic progression regardless of the number of slots or the number of search codes.

[0059]

As described above, the synchronization acquisition apparatus and the synchronization acquisition method of the present invention perform a special operation for specifying the arrangement of short-period codes, so that the arrangement of short-period codes in a communication frame is efficiently specified. be able to. Since this operation can be performed using a table having a small number of words, the amount of memory can be significantly reduced, the amount of hardware can be reduced, and the number of memory accesses can be reduced. The time required for the capturing process is reduced, and the mobile phone device can be used for a long time.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a wireless communication system using a synchronization acquisition device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a synchronization acquisition device according to the embodiment.

FIG. 3 is a block diagram showing a configuration of a synchronization processing unit of the synchronization acquisition device according to the embodiment.

FIG. 4 is a flowchart showing an operation flow of the synchronization acquisition apparatus according to the embodiment.

FIG. 5 is a diagram showing a search code conversion table used in the synchronization acquisition method according to the embodiment.

FIG. 6 is a flowchart for explaining the operation of the first stage of the conventional synchronization acquisition method.

FIG. 7 is a flowchart for explaining the operation of the second stage of the conventional synchronization acquisition method.

FIG. 8 is a flowchart for explaining the operation of the third stage of the conventional synchronization acquisition method.

FIG. 9 is a diagram showing a search code group arrangement table.

[Explanation of symbols]

 101, 110, 302 Control unit 102 Error correction coding / decoding unit 103 Transmitting unit 104 Receiving unit 105, 106 Antenna 107 Modulation / demodulation processing unit 108 Error correction / voice codec unit 109 Synchronization processing unit 111 Microphone / speaker 201, 204, 210 Data acquisition Units 202, 205, 211 Correlation processing unit 203 Slot timing detection unit 206 Integration processing unit 207 Group, frame head detection unit 208 Search code conversion table storage memory 209 Search code creation unit 212 Scrambling code identification unit 301 Judgment unit 303 Search code number Arithmetic unit

Claims (8)

[Claims] 1. A short cycle code determined for each group number including a plurality of long cycle codes and assigned to each slot in a communication frame of a received signal.
Correlation processing means for performing correlation processing for each received signal slot, operation means for performing an operation for specifying the arrangement of the short-period code in the communication frame, and the correlation processing according to the specified short-period code arrangement A frame timing detecting means for integrating the result to detect the group and detect the timing of a communication frame in the received signal. 2. The array of short-period codes is an array according to a comma-free code array, and the operation is performed by using a table value obtained from the comma-free code array and the group number according to the following equation. 2. The synchronization acquisition device according to claim 1, wherein the synchronization acquisition is performed for all slots based on the information. Y = (A × X + B)% 17 (where Y indicates the number of the short-period code, X indicates the number of the group, A and B indicate the values in the table, and the operator “%” indicates the remainder Indicates that calculation is performed) 3. The synchronization acquisition device according to claim 2, wherein a predetermined number is assigned as a number of a short-period code of a specific slot. 4. Slot timing detecting means for detecting a timing of a slot in a communication frame of a received signal,
Long-period code identification means for identifying the long-period code included in the group from the identification result of the group,
The synchronization acquisition device according to any one of claims 1 to 3, further comprising: 5. A communication terminal device comprising the synchronization acquisition device according to claim 1. Description: 6. A base station apparatus for performing wireless communication with the communication terminal apparatus according to claim 5. 7. A step of detecting the timing of a slot in a communication frame of a received signal, wherein the timing is determined for each group number including a plurality of long-period codes and assigned to each slot in the communication frame of the received signal. Using the short-period code, performing a correlation process on the received signal for each slot, performing an operation to specify the array of the short-period code in the communication frame, and according to the specified short-period code array A step of identifying the group and detecting a timing of a communication frame in the received signal by integrating the result of the correlation processing; and a step of identifying the long-period code included in the group from the identification result of the group. And a synchronization acquisition method. 8. Using a short-period code determined for each group number including a plurality of long-period codes and assigned to each slot in a communication frame of a received signal,
Performing a correlation process on the received signal for each slot;
Performing an operation of specifying the arrangement of the short-period codes in the communication frame, and identifying the group by performing an integration process on the result of the correlation processing according to the specified short-period code array; Detecting the timing of the frame timing.