JP2000349190A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device, where the number of processes can be greatly reduced. SOLUTION: In a semiconductor device manufacturing method where an outermost wiring 12 is formed, and then a nearly hemispherical outer terminal 16 is formed so as to be electrically connected to the outermost wiring 12, a process where the outermost wiring is formed of a copper film, a process where an insulating protective layer 14 is formed on all the surface, a process where a through-hole 26 is formed by an energy beam 42 so as to lead to the outermost wiring, and a process where conductive material is buried in the through-hole 26 protruding outside to form an outer terminal are provided. By this setup, a semiconductor device manufacturing method can be greatly reduced in the number of processes.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a so-called CSP (Chip Size Packer) in which bump electrodes are directly provided on a bare chip.
ge) A method for manufacturing a semiconductor device having a structure.

[0002]

2. Description of the Related Art Generally, as a semiconductor device such as an LSI, as shown in FIG. 4, a so-called Q is formed by embedding a whole semiconductor chip 2 as a main body in a package 4 made of resin.
2. Description of the Related Art A semiconductor device having an FP (Quad Flat Package) structure is known. In this semiconductor device, a large number of wires 6 are provided so as to spread out of a package 4 and the wires 6 are connected to a wiring 1 such as a printed circuit board 8.
0 by soldering or the like. this is,
Since the size of the entire device is several times larger than the size of the semiconductor chip 2 and the thickness is large, various types of electric devices, such as notebook personal computers, mobile phones, It is no longer suitable for video cameras. Therefore, Japanese Patent Application Laid-Open No. H10-650
No. 49, etc., the electrode bumps are directly provided on the semiconductor chip to reduce the overall size.
A semiconductor device having an SP structure has been proposed and used. In the semiconductor device having the CSP structure, as shown in FIG. 5, an insulating protective layer 14 is formed over the entire surface of the outermost wiring 12 of the semiconductor chip 2, and selectively formed on the surface of the protective layer 14. Electrode bump 1 electrically connected to outermost layer wiring 12
6 are provided. The electrode bumps 16 are directly connected to, for example, the wiring 10 of the printed circuit board 8.

In this case, the pitch of the wires 6 shown in FIG. 4 is very small, about 0.3 to 0.5 mm, whereas in the case of FIG. Since 16 can be arranged, the pitch can be increased to about 0.8 to 1.0 mm, and there is an advantage that not only the entire device can be reduced in size and thickness, but also the mounting on the printed circuit board 8 becomes easy. As is well known, for example, an insulating layer 2 is formed on a silicon wafer W in the semiconductor chip 2.
0 and the wiring pattern 18 are formed in multiple layers. Here, a process of forming a through hole before embedding the bump electrode 16 will be described with reference to FIG. FIG.
6A, the above-mentioned outermost wiring 12 is generally made of aluminum (Al), and the entire surface thereof is formed as shown in FIG.
(B), an insulating protective layer 14 is formed.
A photoresist 22 is uniformly applied thereon and patterned into a desired shape.

[0006] Next, as shown in FIG. 6 (C), using the patterned photoresist as a mask, for example, UV light
(Ultraviolet), carbon dioxide (CO ₂ ) gas laser, excimer laser, energy beam 24 composed of YAG laser, through hole 26 is formed selectively with respect to insulating protective layer 14, and outermost layer wiring made of underlying Al is used. Expose 12 Next, as shown in FIG. 6D, the photoresist 22 on the surface is removed by washing or the like. After that, this through hole 2
After attaching an appropriate base film to 6, a metal made of, for example, solder is buried and the upper surface is projected to form an electrode bump 16 (see FIG. 5).

[0005]

In the process described with reference to FIG. 6, the surface 12A of the outermost layer wiring 12 made of Al is melted by the energy ray 24 having a high energy density when the through hole 26 is formed. In the worst case, the wiring may be defective. Therefore, in order to prevent melting of the outermost wiring 12 made of Al, a thin chromium layer 28 is formed on the surface of the outermost wiring 12 made of Al before the formation of the insulating protective layer 14 as shown in FIG. Thin copper layer 30
The etch stopper film 32 having excellent heat resistance is used to prevent the Al outermost wiring 12 from melting with respect to the energy rays 24 when the through hole 26 is formed. I have. The function of the chromium layer 28 is used to enhance the adhesion of the upper copper layer 30. FIG. 8 shows an example of a structure near the bump electrode when manufactured by using the manufacturing method shown in FIG. In FIG. 8, reference numeral 34 denotes a Cu pad film, 36 denotes a Ni pad film, and 38 denotes an Au pad film.

However, in the case of the manufacturing method shown in FIG. 7, although the melting of the Al outermost wiring 12 can be prevented, the etch stopper layer 32 composed of the chromium layer 28 and the copper layer 30 is formed. In addition, there is a problem that the number of steps is very large, the production is complicated, and the cost is high because the pattern must be formed and provided. SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has been made in order to effectively solve the problems. It is an object of the present invention to provide a method of manufacturing a semiconductor device capable of greatly reducing the number of steps. It is in.

[0007]

According to the invention defined in claim 1, after forming the outermost layer wiring, a substantially hemispherical external terminal electrically connected to the outermost layer wiring is formed. Forming the outermost layer wiring with a copper film, forming an insulating protective layer on the entire surface, and forming a through hole communicating with the underlying outermost layer wiring in the insulating protective layer. The method includes a step of forming the external terminal by embedding a conductive material in the through hole and protruding the through hole with an energy ray.

According to this, since the outermost layer wiring is formed of a copper film having better heat resistance than aluminum, the outermost layer wiring made of copper is not melted by the energy beam when the through hole is formed. This eliminates the need to form an etch stopper film, which was conventionally required,
Accordingly, the number of steps can be reduced. Also,
According to the invention defined in claim 2, in the method of manufacturing a semiconductor device, after forming the outermost layer wiring, a substantially hemispherical external terminal electrically connected to the outermost layer wiring is formed. A step of forming an outermost layer wiring by a copper film, a step of forming a through hole by selectively applying an insulating protective layer by a screen printing method, and a step of embedding and projecting a conductive material into the through hole to form the outer layer. And forming a terminal. According to this, since the formation of the insulating protective film and the formation of the through hole can be simultaneously performed by the screen printing method, it is possible to further reduce the number of steps in addition to the above effects.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for manufacturing a semiconductor device according to the present invention will be described below in detail with reference to the accompanying drawings.
FIG. 1 is an enlarged view showing a main part of a semiconductor device according to the present invention, and FIG. 2 is a view showing a step of forming a through hole in the semiconductor device shown in FIG. In the illustrated example, the same parts as those of the conventional device described above are denoted by the same reference numerals and described. In FIG. 1, reference numeral 2 denotes a semiconductor chip. As described above with reference to FIG. 5, the semiconductor chip 2 is formed by laminating a wiring pattern 18 and an insulating layer 20 on a silicon wafer W in multiple layers, for example. Here, the outer layer wiring 12 is formed using a copper film which is particularly excellent in high-speed operation and heat resistance. Note that, in FIG.
8 is omitted.

The entire surface of the semiconductor chip 2 is covered with an insulating protective film 14. A through hole is formed in a portion corresponding to the copper outermost wiring 12, and a pad film 40 made of a metal thin film is formed on the through hole. An external terminal whose upper end protrudes in a substantially hemispherical shape, that is, a bump electrode 16 is formed by embedding a conductive material through the intermediary. Here, if the material of the bump electrode 16 and the pad film 40 is a conductive material, various materials can be used.
Gold, solder, or the like can be used, and copper or gold can be used for the pad film 40. In particular, the bump electrode 16
When gold is used as the material of the pad film 40 and
It has the advantages of excellent corrosion resistance and low resistance. Further, when copper is used as the material of the bump electrode 16 and the pad film 40, the material of the outermost layer wiring 12 is also the same, so that the thermal expansion coefficients of these members are the same, and the adhesion between the members is the same. Not only is greatly improved, but also because the bonding is made of the same kind of metal, the bonding resistance can be reduced.

Next, a method of manufacturing the device shown in FIG. 1 will be described with reference to FIG. In the semiconductor chip 2 shown in FIG. 2 (A), circuits and elements are formed in multiple layers by repeating a film forming process, a pattern etching process, and the like on the surface of the semiconductor wafer a plurality of times in the preceding process. A state in which a copper film is formed as the outermost layer wiring 12 is shown. As a method for forming the outermost layer wiring 12 made of copper, there are sputtering and CVD.
Method or plating method can be used. Here, for example, a plating method is used. After forming a concave portion on the surface of the insulating layer 20 according to the circuit design, a copper film is plated on the entire surface to fill the concave portion, and unnecessary copper film on the surface other than the concave portion is removed by chemical mechanical processing. Polishing method (CMP: Chemical Mechanic)
The outermost layer wiring 12 is formed by scraping the outermost wiring 12 by using an electrical polishing method.

Next, as shown in FIG. 2B, an insulating protective layer 14 is formed on the entire surface to a predetermined thickness by spin coating, for example. As a material of the insulating protective layer 14,
For example, the following two types of resin materials can be selectively used. <Resin material 1> (1) Bisphenol A-based epoxy resin 100 parts by weight (2) Curing agent 10 parts by weight (3) Calcium carbonate (average particle size: 1 μm to 5 μm) 15 to 35 Parts by weight (4) Stress relaxation agent (polybutadiene) 10-20 parts by weight (5) Additives Small amount <Resin material 2> (1) As a modified epoxy resin, bisphenol A and cresol novolac epoxy Resin 1: 1 (weight ratio) 100 parts by weight (2) Curing agent 2 parts by weight (3) CTBN1300-31 (Ube Industries, Ltd.) as a stress relieving agent 10 parts by weight ( 4) As organic filler, powder epoxy (YX-4000 oily shell) ... 50 parts by weight (5) Inorganic filler, coloring pigment, thixotropic agent, leveling agent, defoamer, flame retardant, organic solvent ... … Amount

Next, as shown in FIG. 2C, the through hole 26 is formed by selectively etching the insulating protective layer 14 using the energy beam 42, and the lowermost copper outermost layer is formed at the bottom. The wiring 12 is exposed. In this case, since the outermost layer wiring 12 made of copper is superior in heat resistance as compared with the conventional aluminum wiring, there is no problem that the surface is melted. Further, for the processing by the energy beam 42, for example, a YAG laser processing apparatus disclosed in Japanese Patent Application Laid-Open No.
No. 50, a processing method using a YAG laser can be used.
Processing is performed directly without using a mask while controlling the coordinates on the order of m.

Next, if necessary, the entire surface of the insulating protective layer 14 including the inner surface of the through hole 26 is subjected to a surface roughening treatment, for example, O.sub.2 to increase the adhesion to the metal film deposited thereon. ₂ By performing a plasma etching process, fine irregularities are formed, and as shown in FIG.
6, a pad film 40 is formed on the inner peripheral surface and the hole opening surface. As a material of the pad film 40, for example, copper is used as described above, and this is formed by sputtering, vapor deposition, plating, or the like, and is patterned. Next, as shown in FIG. 2E, the bump electrodes 16 are formed so as to fill the through holes 26. As a material of the bump electrode 16, for example, copper is used as described above, and this is deposited by, for example, a metal electrolytic / electroless plating method. As a result, a semiconductor device is manufactured. Thereafter, the individual semiconductor devices are separated by cutting the wafer with, for example, a dicer.

As described above, in the present embodiment, the outermost wiring 12
Is formed of a copper film having excellent heat resistance, the conventionally required etch stopper film 32 (see FIG. 7) can be made unnecessary, so that the film forming process of the etch stopper film 32 and the pattern process are omitted. Therefore, the number of steps can be significantly reduced. When the through hole 26 is formed in the insulating protective layer 14, the energy rays 42 can be coordinate-controlled with, for example, about several μm.
By using an AG laser beam, through-hole processing can be performed directly without using a mask. Accordingly, in this case, the application step of the photoresist 22 and the patterning step as described in the conventional method shown in FIGS. 6 and 7 can be omitted, so that the number of steps can be further reduced. In addition, an expensive exposure apparatus can be omitted.

Although the effect of reducing the number of steps as described above is weakened, also in this embodiment, without using a YAG laser beam, as shown in FIGS. Through holes may be formed through this patterning step. Further, in the above-described step shown in FIG. 2, the step of forming the insulating protective layer 14 (FIG.
(B)) and the step of forming the through hole 26 by the energy beam 42 (FIG. 2C) are performed in separate steps. However, the steps may be performed in the same step by using a screen printing method. Good. FIG. 3 is a diagram showing main steps in a manufacturing process using such a screen printing method. Here, in order to facilitate understanding of the description, a plurality of outermost layer wirings 12 are formed on the upper surface of the insulating layer 20 of the semiconductor chip 2.
Is described.

First, as shown in FIG. 3A, a screen plate 50 is arranged above the semiconductor chip 2 on which the outermost layer wiring 12 is formed. The semiconductor chip 2 at this time is shown in FIG.
This corresponds to (A). A bump electrode pattern is baked on the screen plate 50 in advance by photolithography. Examples of the material include tetron, nylon, and the like.
Stainless steel, metal, or the like can be used. The screen plate 50 has a mesh portion 50N through which the thermosetting resin 52 passes and a seaming portion 50P through which the thermosetting resin 52 does not pass, and a portion corresponding to the outermost layer wiring 12 is formed by the above-mentioned baking. Has become. The thermosetting resin 52 is placed on the screen plate 50, and in this state, a printing pressure is applied to the squeegee 54 as shown in FIG. The resin 52 is extruded by moving at a constant speed (for example, 20 to 30 cm / sec).

At this time, the resin 52 selectively passes through the screen plate 50, the resin 52 remains on the seam 50P, and the resin 52 passes below the plate in the mesh portion 50N.
Usually, the squeegee 54 is made of urethane rubber (with a hardness of 80).
Degree). The squeegee 54 made of metal and the screen plate 50 made of stainless steel may be used in combination depending on the fluidity of the resin 52 and the film thickness after printing. In this way, the resin 52 that has passed through the mesh portion 50 is transferred in a wet state to the surface of the semiconductor chip 2 as shown in FIG. It does not exist but exists only in the periphery.

Next, the semiconductor chip 2 (wafer) is housed in, for example, an electric furnace and dried in an atmosphere of 150 ° C. for about 20 minutes as shown in FIG. Is dried to complete the insulating protective layer 14 and the through hole 26 at the same time. This state corresponds to FIG. Subsequent steps may be performed as described with reference to FIG. As described above, if the insulating protective layer 14 and the through hole 26 are simultaneously formed using the screen printing method, the number of steps can be further reduced as compared with the manufacturing method shown in FIG. It is possible to further contribute to cost reduction. Further, in the case of this embodiment, since the thermosetting resin 52, which is less expensive than the photocurable resin used as the photoresist, can be used, it is possible to further reduce the material cost. . It should be noted that the materials used in each of the above embodiments are merely examples, and are, of course, not limiting.

[0020]

As described above, according to the method of manufacturing a semiconductor device of the present invention, the following excellent effects can be obtained. According to the first aspect of the present invention, since the outermost layer wiring is formed of a copper film having better heat resistance than aluminum, the outermost layer wiring made of copper is not melted by the energy beam when forming the through hole, Therefore, it is not necessary to form an etch stopper film which has been required conventionally, and the number of steps can be reduced accordingly. According to the second aspect of the present invention, the formation of the insulating protective film and the formation of the through hole can be simultaneously performed by the screen printing method, so that the number of steps can be further reduced in addition to the above effects.

[Brief description of the drawings]

FIG. 1 is an enlarged view showing a main part of a semiconductor device according to the present invention.

FIG. 2 is a view showing a step of forming a through hole in the semiconductor device shown in FIG. 1;

FIG. 3 is a diagram showing main steps in a manufacturing process using a screen printing method.

FIG. 4 is a diagram showing a semiconductor device having a QFP structure.

FIG. 5 is a partial cutaway view showing a semiconductor device having a CSP structure.

FIG. 6 is a process chart showing an example of a conventional method for manufacturing a semiconductor device.

FIG. 7 is a process chart showing an example of another conventional method for manufacturing a semiconductor device.

FIG. 8 is a diagram showing an example of a structure near a bump electrode when manufactured using the manufacturing method shown in FIG. 7;

[Explanation of symbols]

2 ... Semiconductor chip, 8 ... Printed circuit board, 12 ... Outermost layer wiring, 14 ... Insulating protective layer, 16 ... Bump electrode (external terminal), 26 ... Through hole, 42 ... Energy ray, 50 ... Screen plate, 52 ... Thermosetting Resin, 54 ... Squeegee.

Claims (2)

[Claims] 2. A semiconductor device manufacturing method according to claim 1, wherein after forming the outermost layer wiring, a substantially hemispherical external terminal electrically connected to the outermost layer wiring is formed. Forming an insulating protective layer over the entire surface, forming a through hole through the underlayer outermost wiring by an energy beam in the insulating protective layer, and forming a conductive material in the through hole. Forming the external terminal by embedding and projecting the semiconductor device. 2. The method of manufacturing a semiconductor device according to claim 1, wherein after forming the outermost layer wiring, a substantially hemispherical external terminal electrically connected to the outermost layer wiring is formed. Forming a through hole by selectively applying an insulating protective layer by a screen printing method, and forming the external terminal by embedding and projecting a conductive material into the through hole. A method for manufacturing a semiconductor device, comprising: