JP2000341158A - Reception circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent an amplifier from oscillating due to an amplified received signal that is re-input to the amplifier via a bypass circuit. SOLUTION: This reception circuit is provided with one or more amplifier 5 that amplifies a received signal and outputs the amplified signal to a common output terminal 9, a bypass circuit 6 that outputs the received signal to the common output terminal 9 without amplification, and a signal changeover means 7 that is provided at the input of the amplifier 5 and an input of the bypass circuit 6 and gives the received signal to the amplifier 5 or the bypass circuit 6. The bypass circuit 6 has an impedance element 6a inserted in series in the circuit 6.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiving circuit such as a transceiver used for a portable telephone.

[0002]

2. Description of the Related Art In a receiving circuit of a transceiver used in a CDMA mobile phone, the level of a received signal varies over a wide range. Therefore, when the signal level is low, the signal is amplified by an amplifier. When the signal level is high, the signal is input to a subsequent mixer or the like without amplification to reduce distortion and reduce S
/ N to prevent deterioration.

A conventional receiving circuit will be described with reference to FIG. The received signal received by the antenna 51 is input to the receiving circuit 53 via the duplexer 52. The transmission signal output from the transmission circuit 54 is transmitted to the antenna via the duplexer 52. The receiving circuit 53 includes an amplifier (a low-noise amplifier) 55 for amplifying a received signal, a bypass circuit 56, a signal switching unit 57, a switching control unit 58, and the like.

[0004] The amplifier 55 is constituted by using a transistor 55a having a common emitter, and the bypass circuit 56 is constituted by a simple signal line. The output side of the amplifier 55 (collector side of the transistor 55a) and the output side of the bypass circuit 56 are connected to a common output terminal 59, and the respective input sides are connected to the signal switching means 57.

The signal switching means 57 comprises two switch diodes 57a and 57b.
One end (anode) of 7a is connected to the input side of the amplifier 55, and one end (anode) of the switch diode 57b is connected to the bypass circuit 56. Also, both switch diodes 57
The other ends (cathodes) of a and 57b are connected to the ground by a resistor 60 and to the duplexer 52.

The switching control means 58 comprises a transistor switch circuit, has a voltage input terminal 58a and two voltage output terminals 58b and 58c, and is applied to the voltage input terminal 58a by a switching control signal S. The power supply voltage B is output to the voltage output terminal 58b or 58c.

The switching control signal S input to the switching control means 58 is output from a switching control circuit (not shown). For example, when the level of the received signal is lower than a predetermined value, the voltage becomes a high level voltage and becomes higher than the predetermined value. Sometimes it is a low level voltage. When the signal is at the high level, the power supply voltage B is output from the voltage output terminal 58b, the amplifier 55 is activated, the switch diode 57a is turned on, and the received signal is amplified by the amplifier 55 and passed through the common output terminal 59. Is output to a subsequent mixer (not shown).
On the other hand, in the case of the low level, the power supply voltage B is output from the voltage output terminal 58c, the switch diode 57b is turned on, and the received signal is output to the common output terminal 59 via the bypass circuit 56 without being amplified. .

[0008]

In the above configuration,
When the level of the received signal is low, switch diode 5
7b becomes non-conductive, while the switch diode 57a
Is conducted, and the amplifier 55 is activated. Then, the received signal amplified by the amplifier 55 appears at the common output terminal 59. However, the received signal appearing at the common output terminal 59 is fed back to the input side of the amplifier 55 via the bypass circuit 56 and the non-conductive switch diode 57b. Since the amplifier 55 amplifies a weak electric field received signal, when the gain is high, the signal fed back becomes a positive feedback, causing a problem of oscillation.

It is an object of the present invention to prevent the amplifier from oscillating when the amplified received signal is input to the amplifier again via the bypass circuit.

[0010]

As a means for solving the above problems, a receiving circuit according to the present invention comprises: one or more amplifiers for amplifying an input received signal and outputting the amplified signal to a common output terminal; A bypass circuit that outputs to the common output terminal without amplifying, and a signal switch that is provided on an input side of the amplifier and an input side of the bypass circuit and that inputs the reception signal to one of the amplifier and the bypass circuit. Means, and an impedance element is inserted in series in the bypass circuit.

In the receiving circuit according to the present invention, the impedance element is constituted by a resistor.

Further, in the receiving circuit according to the present invention, the impedance element is constituted by a diode, and when the received signal is outputted to the common output terminal via the bypass circuit, the diode is turned on, and the receiving signal is outputted. Was amplified by the amplifier and output to the common output terminal, the diode was turned off.

[0013] The receiving circuit of the present invention may further comprise a first switch diode having one end connected to the input side of the amplifier and a second switch diode having one end connected to the input side of the bypass circuit. A switching means is configured, the reception signal is input to the other end of each of the first and second switch diodes, and any one of the first or second switch diodes is configured to be conductive, and the amplifier And the conduction state of the first switch diode are linked.

Further, in the receiving circuit of the present invention, the direction of the PN junction of the second switch diode and the direction of the PN junction of the diode are the same, and are connected to each other in a DC manner.

Further, in the receiving circuit according to the present invention, the amplifier includes a first amplifier and a second amplifier having different amplification degrees, and the first amplifier and the second amplifier are arranged in parallel. Each output side was connected to the common output terminal, and each input side was connected to the signal switching means.

Further, in the receiving circuit according to the present invention, the amplifier comprises a third amplifier and a fourth amplifier connected in cascade, wherein the third amplifier is provided at a preceding stage, the fourth amplifier is provided at a subsequent stage, and The output side of a fourth amplifier was connected to the common output terminal, and the input side of the third amplifier and the input side of the fourth amplifier were connected to the signal switching means.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A receiving circuit according to the present invention is shown in FIGS.
Will be described. First, the configuration of the transceiver shown in FIG. 1 is substantially the same as the configuration of the conventional transceiver shown in FIG. 5, and a reception signal received by the antenna 1 is input to the reception circuit 3 via the duplexer 2. A transmission signal output from the transmission circuit 4 is transmitted to the antenna 1 via the duplexer 2. The receiving circuit 3 includes an amplifier (a low-noise amplifier) 5 for amplifying an input received signal, a bypass circuit 6, a signal switching unit 7, a switching control unit 8, and the like.

The amplifier 5 is a transistor 5 having a common emitter.
and a bypass circuit 6 includes a signal line 6b in which a resistor 6a as an impedance element is inserted in series.
It is composed of The resistance value of the resistor 6a is selected between several ohms and several tens of ohms. The output side of the amplifier 5 (the collector side of the transistor 5a) and the bypass circuit 6
Are connected to a common output terminal 9, and their input sides are connected to signal switching means 7.

The signal switching means 7 comprises two switch diodes 7a and 7b,
One end (anode) of a is connected to the input side of the amplifier 5, and one end (anode) of the second switch diode 7b is connected to the resistor 6a of the bypass circuit 6. The other ends (cathodes) of the switch diodes 7a and 7b are connected to the ground by a resistor 10 in a DC manner.
Connected to.

The switching control means 8 is constituted by a transistor switch circuit, has a voltage input terminal 8a and two voltage output terminals 8b and 8c, and is applied to the voltage input terminal 8a by a switching control signal S. The power supply voltage B is output to the voltage output terminal 8b or 8c.

The switching control signal S input to the switching control means 8 is output from a switching control circuit (not shown).
When the level of the received signal is equal to or lower than a predetermined value, the voltage becomes a high level voltage, and when the level of the received signal becomes equal to or higher than the predetermined value, the voltage becomes a low level voltage. In the case of the high level, the power supply voltage B is output from the voltage output terminal 8b, the amplifier 5 is activated, and the first switch diode 7a is turned on.
The received signal is amplified by the amplifier 5 and output to a subsequent mixer (not shown) via the common output terminal 9. On the other hand, in the case of the low level, the power supply voltage B is output from the voltage output terminal 8c, the second switch diode 7b is turned on, and the reception signal is not amplified and passes through the bypass circuit 6 including the resistor 6a. Output to the common output terminal 9.

In the above configuration, since the resistor 6a is inserted in series in the bypass circuit 6, the received signal amplified by the amplifier 5 is fed back to the input side of the amplifier 5 via the bypass circuit 6. In this case, the feedback amount is reduced, and the amplifier 5 does not oscillate. Further, by appropriately setting the resistance value of the resistor 6a, a difference between the signal level at the common output terminal 9 amplified by the amplifier 5 and the signal level at the common output terminal 9 via the bypass circuit 6 is required. Can be changed accordingly. Further, since the resistor 6a is interposed in series with the second switch diode 7b, the non-linearity of the second switch diode 7b in the conductive state is reduced by the resistor 6a, and the reception via the bypass circuit 6 is performed. Signal distortion is reduced.

FIG. 2 shows a configuration in which a first diode 6c is further provided in series as an impedance element inserted into the bypass circuit 6, and the other configuration is the same as that of FIG. Since the first diode 6c is connected so as to be in the same PN junction direction as the second switch diode 7b, it becomes conductive or non-conductive together with the second switch diode 7b. In this configuration, when the first diode 6c is non-conductive, the capacitance between the two terminals is extremely small, so that the impedance is increased, the feedback amount is further reduced, and the amplifier 5 becomes more difficult to oscillate.

FIG. 3 shows a configuration in which two amplifiers are provided between the signal switching means 7 and the common output terminal 9, and a first amplifier 11 and a second amplifier 12 are provided in parallel. Then, for example, the amplification of the first amplifier 11 is larger than the second amplification.

The signal switching means 7 comprises three switch diodes 7b, 7c and 7d. One end (anode) of the second switch diode 7b is connected to the bypass circuit 6, and one end (anode) of the third switch diode 7c is connected to the bypass circuit 6. Input side of first amplifier 11 (base side of transistor 11a)
, One end (anode) of the fourth switch diode 7d
Are connected to the input side of the second amplifier 12 (the base side of the transistor 12a). A second diode 12b as an impedance element and a resistor 12 are provided between the fourth switch diode 7d and the second amplifier 12.
and c are connected in series. The other ends (cathodes) of the three switch diodes 7 b, 7 c, and 7 d are connected to the ground by a resistor 10 and to the duplexer 2.

The switching control means 13 is similarly constituted by a transistor switch circuit, has a voltage input terminal 13a and three voltage output terminals 13b, 13c, 13d. The power supply voltage B applied to 13a is output to the voltage output terminal 13b or 13c or 13d.

The switching control means 13 receives two switching control signals S1 and S2. These switching control signals S1,
S2 is output from a switching control circuit (not shown). For example, when the level of the received signal is equal to or lower than a first predetermined value, both of the switching control signals S1 and S2 become high-level voltages (first state), When the level becomes equal to or higher than the first predetermined value, the switching control signal S1 becomes a high level voltage and the switching control signal S2 becomes a low level voltage (second state), and the level of the received signal becomes higher than the second predetermined value. , Both of the switching control signals S1 and S2 become low-level voltages (third state).

In the first state, the voltage output terminal 13b
Supplies the power supply voltage B, the first amplifier 11 is activated, and the third switch diode 7c is turned on. The received signal is amplified by the first amplifier 11 and is not shown through the common output terminal 9. It is output to the subsequent mixer. In the second state, the power supply voltage B is output from the voltage output terminal 13c, the second amplifier 12 is turned on, the second diode 12b and the fourth switch diode 7d are both turned on, and the second amplifier 12 is turned on. The signal is supplied to the second amplifier 12
And is output to the common output terminal 9. Further, in the third state, the power supply voltage B is supplied from the voltage output terminal 13d.
Is output, the first diode 6c and the second switch diode 7b both conduct, and the received signal is output to the common output terminal 9 via the bypass circuit 6 including the resistor 6a without being amplified.

For this reason, the received signal is amplified in three stages corresponding to the level, so that both S / N and distortion can be finely balanced. Also in the above configuration, since the resistor 6a and the first diode 6c are inserted in series in the bypass circuit 6, the first amplifier 11
Alternatively, the amount of feedback when the reception signal amplified by the second amplifier 12 is fed back to the input side of the first amplifier 11 and the second amplifier 12 via the bypass circuit 6 is reduced, and the first amplifier 11, the second amplifier 12 does not oscillate.

Similarly, by appropriately setting the resistance values of the resistor 12c provided on the input side of the second amplifier 12 and the resistor 6a provided in the bypass circuit 6, the first amplifier The difference between the signal level amplified by 11, the signal level amplified by the second amplifier 12, and the signal level passed through the bypass circuit 6 can be changed as required. Further, since the resistor 12c is interposed in series with the second diode 12b and the fourth switch diode 7d, the nonlinearity of these diodes 12b and 7d is reduced by the resistor 12c, and the distortion of the received signal is reduced. Is reduced.

FIG. 4 shows a configuration in which two amplifiers, a third amplifier 14 and a fourth amplifier 15, are connected in series (cascade connection) between the signal switching means 7 and the common output terminal 9. It is. The output side (collector side of the transistor 15 a) of the fourth amplifier 15 provided at the subsequent stage is connected to the common output terminal 9.
Connected to. One end (anode) of the second switch diode 7b is connected to the bypass circuit 6, and one end (anode) of the third switch diode 7c is connected to the third amplifier 14a.
One end (anode) of the fourth switch diode 7d is connected to the input side of the fourth amplifier 15 (the base side of the transistor 14a). Note that a third diode 15b as an impedance element and a resistor 15c are connected in series between the fourth switch diode 7d and the fourth amplifier 15. Then, the other ends (cathodes) of the three switch diodes 7b, 7c, 7d
These are connected to the ground by a resistor 10 in a DC manner and to the duplexer 2.

Further, the voltage output terminal 1 of the switching control means 13
A diode 16 having an anode connected to 3b and a cathode connected to the voltage output terminal 13c is provided. Further, a switch transistor 17 is provided to the base of which a switching control signal S3 which becomes low level in the first state and becomes high level in the second state is provided. The collector of the switch transistor 17 is provided from the voltage output terminal 13c. The output power supply voltage B is supplied, and the resistor 1 connected in series
The emitter is connected to 5c, the second diode 15b, and the fourth switch diode 7d.

In the first state, the voltage output terminal 13b
Is supplied to the third amplifier 14 and the fourth amplifier 15 to activate them and conduct the third switch diode 7c, and the received signal is supplied to the third amplifier 14 and the fourth amplifier 14. The signal is amplified by the fourth amplifier 15 and output to the subsequent mixer (not shown) via the common output terminal 9. In the second state, the voltage output terminal 13c
Is supplied to the fourth amplifier 15 to be activated, the third diode 15b and the fourth switch diode 7d both conduct, and the received signal is amplified by the fourth amplifier 15. The signal is output to the common output terminal 9. Further, in the third state, the voltage output terminal 13
The first diode 6c and the second switch diode 7b both conduct due to the power supply voltage B output from the common output terminal 9 via the bypass circuit 6 including the resistor 6a without being amplified. Is output to

Also in the above configuration, since the resistor 6a is inserted in series in the bypass circuit 6, the signal fed back from the common output terminal 9 to the third amplifier 14 or the fourth amplifier 15 is output. The level decreases, and the third amplifier 14 and the fourth amplifier 15 do not oscillate.

Also, similarly to the configuration of FIG. 3, by appropriately setting the respective resistance values of the resistor 15c provided on the input side of the fourth amplifier 15 and the resistor 6a provided in the bypass circuit 6. The difference between the signal level amplified by the third amplifier 14 and the fourth amplifier 15, the signal level amplified by only the fourth amplifier 15, and the signal level passed through the bypass circuit 6 is determined as necessary. Can be changed.

[0036]

As described above, the receiving circuit according to the present invention comprises one or more amplifiers for amplifying an input received signal and outputting the amplified signal to a common output terminal, and amplifying the received signal to a common output terminal without amplifying the received signal. A bypass circuit for outputting, and a signal switching means provided on the input side of the amplifier and the input side of the bypass circuit and for inputting a received signal to one of the amplifier and the bypass circuit, wherein an impedance element is connected in series to the bypass circuit. Because of the insertion, the amount of feedback when the received signal amplified by the amplifier is fed back to the input side of the amplifier via the bypass circuit is reduced, and the amplifier does not oscillate.

In the receiving circuit according to the present invention, since the impedance element is constituted by a resistor, the signal level at the common output terminal amplified by the amplifier and the bypass circuit can be set by appropriately setting the resistance value of the resistor. Can be changed as necessary. Furthermore, since the resistor is interposed in series with the second switch diode, the nonlinearity of the second switch diode in the conductive state is reduced by the resistor, and the distortion of the received signal passing through the bypass circuit is reduced. Become.

Further, in the receiving circuit of the present invention, the impedance element is constituted by a diode, and when the received signal is output to the common output terminal via the bypass circuit, the diode is turned on and the received signal is amplified by the amplifier. When the diode is output to the common output terminal, the diode is non-conductive.When the diode is non-conductive, the capacitance between the two terminals is extremely small. Oscillation becomes more difficult.

In the receiving circuit according to the present invention, the signal switching means includes a first switch diode having one end connected to the input side of the amplifier and a second switch diode having one end connected to the input side of the bypass circuit. The receiving signal is input to the other end of each of the first and second switch diodes, and any one of the first and second switch diodes is made conductive, and the operating state of the amplifier and the second Since the conduction state of one switch diode is linked, the reception signal can be easily switched.

In the receiving circuit according to the present invention, since the direction of the PN junction of the second switch diode and the direction of the PN junction of the diode are the same, they are connected to each other in a DC manner. Can be linked to conduction and non-conduction.

Further, in the receiving circuit of the present invention, the amplifiers include a first amplifier and a second amplifier having different amplification degrees from each other. Side is connected to the common output terminal, and each input side is connected to the signal switching means, so that the received signal is amplified in three stages corresponding to its level. It is possible to finely balance S / N and distortion.

Also, in the receiving circuit of the present invention, the amplifier is composed of a third amplifier and a fourth amplifier connected in cascade, the third amplifier being a front stage, the fourth amplifier being a rear stage, and a fourth amplifier being a fourth stage. Is connected to the common output terminal, and the input side of the third amplifier and the input side of the fourth amplifier are connected to the signal switching means, so that the S / N of the received signal input to the subsequent mixer is connected. And distortion can be finely balanced.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a transceiver showing a receiving circuit of the present invention.

FIG. 2 is a configuration diagram of a transceiver showing a receiving circuit of the present invention.

FIG. 3 is a configuration diagram of a transceiver showing a receiving circuit of the present invention.

FIG. 4 is a configuration diagram of a transceiver showing a receiving circuit of the present invention.

FIG. 5 is a configuration diagram of a transceiver showing a conventional receiving circuit.

[Explanation of symbols]

 Reference Signs List 1 antenna 2 duplexer 3 receiving circuit 4 transmitting circuit 5 amplifier 5a transistor 6 bypass circuit 6a resistor (impedance element) 6b signal line 6c first diode (impedance element) 7 signal switching means 7a first switching diode 7b second Switch diode 7c Third switch diode 7d Fourth switch diode 8 Switching control means 8a Voltage input terminal 8b, 8c Voltage output terminal 9 Common output terminal 10 Resistor 11 First amplifier 11a Transistor 12 Second amplifier 12a Transistor 12b Second diode (impedance element) 12c Resistor (impedance element) 13 Switching control means 13a Voltage input terminal 13b, 13c, 13d Voltage output terminal 14 Third amplifier 14a Transistor 15 Fourth amplifier 1 5a transistor 15b third diode (impedance element) 15c resistor (impedance element) 16 diode 17 switch transistor

Claims (7)

[Claims] 1. An amplifier for amplifying an input received signal and outputting the amplified signal to a common output terminal, a bypass circuit for outputting the received signal to the common output terminal without amplifying the input signal, and an input of the amplifier. And a signal switching means provided on the input side of the bypass circuit and for inputting the received signal to either the amplifier or the bypass circuit, wherein an impedance element is inserted in series in the bypass circuit. A receiving circuit characterized by the above-mentioned. 2. The receiving circuit according to claim 1, wherein said impedance element is constituted by a resistor. 3. The method according to claim 1, wherein the impedance element is configured by a diode, and when the reception signal is output to the common output terminal via the bypass circuit, the diode is turned on, and the reception signal is amplified by the amplifier. 2. The receiving circuit according to claim 1, wherein the diode is turned off when the signal is output to the common output terminal. 4. The signal switching means includes a first switch diode having one end connected to an input side of the amplifier and a second switch diode having one end connected to an input side of the bypass circuit. Inputting the received signal to the other end of each of the first and second switch diodes,
3. The device according to claim 1, wherein one of the first and second switch diodes is made conductive, and the operating state of the amplifier and the conductive state of the first switch diode are linked. 4. Or the receiving circuit according to 3. 5. The PN junction of the second switch diode and the PN junction of the diode are connected in the same direction with the same direction.
The receiving circuit as described. 6. The amplifier comprises a first amplifier and a second amplifier having different amplification degrees from each other. The first amplifier and the second amplifier are arranged side by side, and their output sides are connected to the common amplifier. 2. The receiving circuit according to claim 1, wherein said receiving circuit is connected to an output terminal, and each input side is connected to said signal switching means. 7. The amplifier comprises a third amplifier and a fourth amplifier connected in cascade, wherein the third amplifier is in the former stage, the fourth amplifier is in the latter stage, and the output side of the fourth amplifier is 2. The receiving circuit according to claim 1, wherein the input terminal of the third amplifier and the input terminal of the fourth amplifier are connected to the signal switching means.