JP2000341139A - Convolution arithmetic unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To decrease delays between an input signal and an output signal by dividing an impulse response into nonequivalent blocks and performing convolution arithmetic using FFT. SOLUTION: In the case of processing an impulse response, the data of the impulse response are inputted to an impulse response buffer, in the order (11) to obtain N samples as data divided into pieces. Every block is subjected to FFT processing, and FFT processing result are stored in the impulse response buffer (14). In the case of processing an input signal, the input signal is inputted to respective input buffers successively for every N/16 sample (15), every block is subjected to FFT processing are performed, and processing results are stored in a buffer for the input signal (18). Then the FFT processing results of the input signal for every block and the FFT processing results of the impulse response are multiplied (19), inverse FFT processing for the multiplication result for every block are performed (20), and the multiplication results are added by seven blocks (21). The addition results are written sequentially to an output buffer as a convolutional arithmetic result of the N samples (22).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to sound field reproduction and sound field control, and more particularly to a technique for adding reverberation in a concert hall. It relates to an arithmetic unit.

[0002]

2. Description of the Related Art In general, when a transfer function (impulse response) h (n) of a certain system is known, a signal x (n) input to the system is convoluted with the transfer function to obtain a convolution. The output signal y (n) of the system can be obtained. This convolution operation is represented by the following equation (1).

[0003]

(Equation 1)

[0004] However, this calculation requires N ² multiplications. Therefore, in order to improve the calculation efficiency, a method of Fourier transforming the impulse response h (n) and the input signal x (n), multiplying the result by the Fourier transform, and performing the inverse Fourier transform on the product is used. In this method, three F
Since the number of multiplications in the FT is (3N / 2) log ₂ N times, the number of multiplications can be reduced as compared with the case of using equation (1).

Although this method is effective for improving the calculation efficiency, when real-time processing is performed, a delay equal to or longer than the number N of taps of the impulse response h (n) occurs. FIG. 3 shows a process in which an overlap-save method is used as a convolution operation using FFT.
As shown in FIG. 3 and 4, the impulse response h
When processing (n), the data of the impulse response h (n) for N samples is
Impulse response buffers for 2N samples (a1, a
2) The second half of the impulse response h (n) is acquired before the impulse response h (n), and “0” is added before the first impulse response h (n) (block 1). ).・ Next, FFT is performed on the 2N samples to which “0” is added.
Performs processing (block 2), and stores the FFT processing results in impulse response buffers a1, a2
(Block 3).

When the input signal x (n) is processed, the input signal x (n) is alternately acquired in the first and second input buffers (not shown) every N samples (block 4). And when the first input buffer is filled with N samples of the input signal x _m (n), another 2N separate from the input buffer
The data is copied to the second half b2 of the input signal buffers (b1, b2) for the samples, and the first half b1 is filled with the input signal x _m-1 (n) of the previous N samples (however, the first time is “0”).
(Block 5). Then, FFT processing is performed on 2N samples, and the processing results are stored in the input signal buffers (b1, b2) (block 6).

Next, the result of the FFT processing of the input signal x (n) is multiplied by the result of the FFT processing of the impulse response h (n) (block 7). Then, the result of the multiplication is subjected to inverse FFT processing (block 8). The first N samples are written to the output buffer c as a convolution operation result (block 9). During this time, the next input signal x (n) is written to the second input buffer, and the processing for the first input buffer is completed before the second input buffer is filled. Therefore, by repeating this series of processing on the input signal x (n), a convolution operation result using FFT can be obtained.

[0008]

However, in the convolution operation using the FFT as described above, the number of multiplications can be reduced as compared with the case where the expression (1) is directly operated. Is N as shown in FIG.
Unless the input signal x (n) for the sample is accumulated in the first or second input buffer, the FFT processing cannot be performed. Therefore, 2N samples are provided between the input signal x (n) and the output signal y (n). There is a problem that a large delay occurs.

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above-mentioned problems of the prior art, and has as its object to provide a convolution operation device capable of reducing a delay between an input signal and an output signal.

[0010]

Means for Solving the Problems In order to achieve the above object, the present invention comprises the following means 1) and 2). That is,

1) The impulse response data of N samples is divided by 2 ^N (N = 1, 2, 3,...), And the first half of the divided block is divided by 2 ^M (M = 1, 2, 3,...). Then, a part of the divided block is divided into 2 ^L (L = 1,
Input means for dividing the input signal into input buffers, inputting the input signal into the input buffer, first FFT means for performing an FFT of the impulse response data taken in the input buffer for each block, and buffering an audio signal for each block. Buffering means for performing an FFT on the buffered audio signal for each block.
FT means, multiplication means for multiplying the results obtained by the first and second FFT means by the FFT means, inverse FFT means for performing an inverse FFT on the result multiplied by the multiplication means, and inverse FFT means for performing the inverse FFT means. A convolution operation device comprising: an addition unit that adds the results of the blocks before and after the addition.

2) In the first aspect, N = 1, M =
2. A convolution operation device, wherein 2 and L = 1.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the convolution operation device according to the present invention, and FIG. 2 is an explanatory diagram showing a timing chart between an input signal and an output signal by the device of FIG.

In these figures, the impulse response h
When processing (n), the data of the impulse response h (n) is sequentially input to the impulse response buffer (input block 11), and then N samples are stored in 2m, m, m,.
It is obtained as data divided into 7 sections of 2 m, 2 m, 4 m, and 4 m (where m = N / 16) [divided block 12 in FIG. 1 and (a) in FIG. 2]. Next, FFT processing is performed for each of the blocks [FFT processing block 13 in FIG. 1, and (d) to (j) in FIG. 2], and the FFT processing result is stored in an impulse response buffer (FFT processing result storage block). 14). When processing the input signal x (n), the input signal x (n) is converted into the first, second, third, and fourth samples every N / 16 (m length) samples (blocks).
Of the input buffer (not shown) of FIG. 1 (input block 15 of FIG. 1, FIG. 2 (c)). Then, the data is buffered (buffering block 16), and the buffered data is stored (store block 17). And 2m, m, m, 2
FFT for each block of m, 2m, 4m, 4m
The processing is performed, and the processing result is stored in the input signal buffer (FFT processing block 18). ]

Next, F of the input signal x (n) for each block
The result of the FT processing is multiplied by the result of the FFT processing of the impulse response h (n) [the multiplication processing block 19 in FIG. 1 and FIG.
~ (J)], inverse FFT processing is performed on the multiplication result for each block (inverse FFT processing block 20), and the multiplication result for each block is added for 7 blocks (for N samples) [addition block 21 in FIG. 1, FIG. (H)-(r)]. Then, the addition result is sequentially written to the output buffer c as a convolution operation result for N samples [Step 22, FIG.
FIG. 2 (r)].

Therefore, as shown in FIG.
When the impulse response h (n) for a sample is divided into 7 divided blocks by the above-described method, the input signal x
There is a delay of N / 4 samples between (n) and the output signal y (n), and the delay can be reduced as compared with the conventional method. For example, N = 131072, sampling frequency 4
In the case of 4.1 kHz, 5.9 seconds (262
In this method, if the number of divisions of the impulse response is 16, the delay can be 0.092 seconds (4021 samples), and the real-time property can be improved. According to the above-described embodiment, the N samples are divided into 16 equal parts and the irregular unit is used as a minimum unit. However, the present invention is not limited to this, and the impulse response data of N samples is calculated as 2 ^N (N = 1, 2, 3 ...) and the first half of the divided block is 2 ^M
(M = 1, 2, 3,...) And a part of the divided block is further divided by 2 ^L (L = 1, 2, 3,...), And the same effect can be obtained. In the above embodiment, N = 1,
This is an example where M = 2 and L = 1.

[0017]

As described above, according to the present invention, the impulse response is divided into a plurality of unequal blocks,
Since the convolution operation is performed using the FT, when an impulse response having an extremely large N is used for sound field reproduction and sound field control, a delay between an input signal and an output signal can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an embodiment of a convolution operation device according to the present invention.

FIG. 2 is an explanatory diagram showing a delay between an input signal and an output signal by the device of FIG. 1;

FIG. 3 is a block diagram showing a conventional convolution operation device.

FIG. 4 is an explanatory diagram showing a process of the apparatus in FIG. 3;

5 is an explanatory diagram showing a delay between an input signal and an output signal by the device of FIG. 3;

[Explanation of symbols]

Reference Signs List 11 input block (configures input means together with divided blocks) 12 divided block 13 FFT processing block (first FFT means) 14 FFT processing result storage block 15 input block 16 buffering block (buffering means) 17 store block 18 FFT Processing block (second FFT means) 19 Multiplication processing block (multiplication means) 20 Inverse FFT processing block (inverse FFT means) 21 Addition block (addition means)

Claims (2)

[Claims] 1. An N-sample impulse response data is represented by 2
^N (N = 1, 2, 3,...), The first half of the divided block is divided by 2 ^M (M = 1, 2, 3,...), And a part of this divided block is 2 ^L (L = 1,
Input means for dividing the input signal into input buffers and inputting the divided signals into input buffers; first FFT means for performing an FFT of the impulse response data input to the input buffer for each of the blocks; buffering of an audio signal for each of the blocks; Buffering means, FFT means for performing FFT on the buffered audio signal for each block, multiplying means for multiplying results obtained by performing FFT by the first and second FFT means, Inverse FFT for inverse FFT of the result multiplied by the multiplication means
A convolution operation device comprising: FT means; and addition means for adding results of blocks before and after inverse FFT performed by the inverse FFT means. 2. The convolution operation device according to claim 1, wherein N = 1, M = 2, and L = 1.