JP2000338457A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To actualize an excellent video display device which is free from a striped pattern and a flicker. SOLUTION: A counter electrode circuit 204 amplifies the signal from a controller and sets its DC level so as to obtain a counter electrode signal 30 matching the specifications of a liquid crystal display panel. The counter electrode circuit 204 is composed of a DC amplifying circuit 2, which is composed of an operational amplifier 4 and a buffer circuit 8 outputting a counter electrode signal 6 outputted by the operational amplifier with low impedance. The operational amplifier 4 constitutes an inverting amplifying circuit together with 1st and 2nd resistances 10 and 12. Further, the voltage developed by dividing a source voltage by 3rd and 4th resistors 18 and 20 is supplied to a noninverting input terminal 24 to set the DC level of the counter electrode signal 30. The signal is inputted to the amplifying circuit not through any capacitor, so the waveform has no variation even if a difference in continuance between its low and high level is present, thereby the striped patterned flicker of video is eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display, and more particularly to a liquid crystal display in which a voltage whose polarity is periodically inverted is applied to a liquid crystal display element of a liquid crystal display panel constituting the liquid crystal display. is there.

[0002]

2. Description of the Related Art FIG. 3 is a diagram showing a main part of an example of a conventional liquid crystal display device. The liquid crystal display device 102 shown in FIG.
A liquid crystal display panel 104 (LCD) including a large number of liquid crystal display elements arranged in a matrix, element electrodes (also referred to as pixel electrodes) for applying a voltage to the liquid crystal display elements, and a counter electrode, and an image formed on the element electrodes. A signal processing circuit 106 for supplying a signal; a controller 110 for supplying a timing signal to the liquid crystal display panel 104 to drive the liquid crystal display panel 104 and outputting a signal for generating a counter electrode signal 108 to be applied to the counter electrode; ,
And a counter electrode circuit 112 that amplifies a signal from the controller 110 and sets a DC level of the signal to generate a counter electrode signal 108.

A signal processing circuit 106 converts a given video signal 114 into a video signal conforming to the specification of the liquid crystal display panel 104, and at the same time, generates a video signal 116 whose polarity is periodically inverted based on a predetermined voltage. LCD panel 10
4 More specifically, the signal processing circuit 106
A video signal 116 supplied to the liquid crystal display panel 104 is supplied to a liquid crystal display panel 104 by a horizontal scanning cycle (hereinafter, referred to as 1).
H), the polarity is inverted every time. Further, the counter electrode circuit 112 periodically reverses the polarity based on a predetermined voltage, and has the same period as the video signal 116, and the opposite electrode signal 108 whose polarity is reversed with the opposite polarity to the video signal 116.
Is generated and supplied to the liquid crystal display panel 104. The backlight 118 shown in FIG. 3 is for illuminating the liquid crystal display panel 104 from the back of the liquid crystal display panel 104.

Each of the liquid crystal display elements constituting the liquid crystal display panel 104 changes its light transmittance by a voltage applied between the corresponding element electrode and the counter electrode. FIG. 4 is a graph showing the relationship between the applied voltage and the transmittance in the liquid crystal display device. In the figure, the horizontal axis represents the applied voltage, and the vertical axis represents the transmittance. The curve 120 shown in the figure shows the relationship between the applied voltage and the transmittance, and shows a tendency that the transmittance decreases as the voltage increases in a predetermined range.

Therefore, the liquid crystal display element to which a high voltage is applied has a small light transmittance, and the liquid crystal display element to which a low voltage is applied has a large light transmittance. as a result,
The light from the backlight 118 passes through the liquid crystal display elements with different intensities for each liquid crystal display element, and by appropriately setting the applied voltage for each liquid crystal display element, the liquid crystal display panel 10
The image is displayed on the screen of No. 4. The applied voltage of the liquid crystal display element is the voltage of the video signal 116 and the counter electrode signal 10.
An image is formed by setting the voltage of the video signal 116 for each liquid crystal display element, in particular, by the difference from the voltage 8.

As is well known, in this type of liquid crystal display panel 104, in order to prevent the liquid crystal material of the liquid crystal display element from deteriorating by applying a DC voltage, the polarity of the voltage applied to the liquid crystal display element is periodically changed. Therefore, as described above, the signal processing circuit 106 and the counter electrode circuit 112
And the polarity of the counter electrode signal 108
Inversion is performed for each horizontal scanning cycle in 04.

FIG. 5 is a circuit diagram showing a detailed configuration of the conventional counter electrode circuit 112. As shown in FIG. As shown in FIG. 5, the counter electrode circuit 112 includes an amplifier circuit 124 including a first transistor 122 and a buffer circuit 126 subsequent thereto. The amplifying circuit 124 includes first to fourth resistors 128 and 130 in addition to the first transistor 122.
132, 134 and a capacitor 136. The capacitor 136 is connected to the input terminal 13 to remove the DC component of the signal from the controller 110 supplied from the input terminal 138.
8 and the base of the first transistor 122.

The first and second resistors 128 and 130 are connected in series between the power supply 140 and the ground 142, and the common connection point of the first and second resistors 128 and 130 is
, And supplies a bias voltage to the base. The third resistor 132
Is connected between the collector of the first transistor 122 and the power supply 140, while the fourth resistor 134 is connected between the emitter of the first transistor 122 and the ground 142. The amplification factor of the amplifier circuit 124
And the ratio of the resistance values of the fourth resistors 132 and 134.

The buffer circuit 126 includes an N-type second transistor 144 and a P-type third transistor 146. The bases and the emitters of the second and third first transistors are commonly connected, respectively. Is the first
, And on the other hand, the counter electrode signal 108 is output from the emitter and supplied to the liquid crystal display panel 104.

FIGS. 6A to 6D are timing charts for explaining the operation of the counter electrode circuit 112. FIG. The controller 110 supplies a signal serving as a source of the counter electrode signal 108, that is, an input signal 148 of the counter electrode circuit 112 to the counter electrode circuit 112. The input signal 148 is a rectangular wave as shown in FIG. 6A, and switches between a low level and a high level every horizontal scanning cycle in the liquid crystal display panel 104.
Therefore, the polarity is inverted every horizontal scanning cycle based on the voltage between the low level and the high level.

When such a signal is input to the counter electrode circuit 112, the DC component is first removed by the capacitor 136, and then the first and second resistors 128, 128
A bias voltage determined by a division ratio of 130 is applied,
Then, the signal is amplified by the first transistor 122 at an amplification rate determined by the ratio of the resistance values of the third and fourth resistors 132 and 134 to the buffer circuit 126. The buffer circuit 126 supplies this signal to the liquid crystal display panel 104 as a counter electrode signal 108 through the output terminal 150 with a low impedance. As described above, as a result of the application of the bias voltage, the counter electrode signal 108 is shifted in DC level and further amplified as shown in FIG. 6B, so that the amplitude is also increased.

By the way, in the case of performing display using a PAL video signal, for example, the number of horizontal scanning lines in the PAL system is larger than that in the NTSC system, so that it is necessary to thin out the scanning lines at a fixed rate. When the thinning of the scanning lines is performed, the low-level period and the high-level period of the input signal 148 are not always the same in length, and some portions intermittently do not coincide. FIG. 6C shows the input signal 148 of the counter electrode circuit 112 in this case. In the drawing, a and b each indicate a period of one cycle (also referred to as 1 V) of vertical scanning in the liquid crystal display device. The input signal 148 shown in the period a includes a portion where the low level state is long intermittently. Therefore, the low level period is longer than the high level period as a whole, and the average level is low and high. It is slightly lower than the middle of the level.

In a liquid crystal display device, the polarity of the counter electrode signal is switched for each frame in order to prevent the direction of twist of molecules of the liquid crystal material from being fixed in one direction. That is, if the counter electrode signal is set to the high level in the even-numbered horizontal scanning lines of a certain frame (therefore, to the low level in the odd-numbered horizontal scanning lines), the counter electrode signal is set to Set to low level. Therefore, in the period b following the period a in FIG. 6, the input signal 148 conversely includes a portion where the high level state is long intermittently, and the high level period is longer than the low level period as a whole, The average level is slightly higher than the middle between the low level and the high level.

FIG. 6D shows such an input signal 14.
8 shows the counter electrode signal 108 output from the counter electrode circuit 112 when 8 is supplied. Input signal 14 in period a
8, the average level is low as described above, while the period b
In this case, since the average level of the input signal 148 is high, the DC component of the voltage across the capacitor 136 changes during the transition from the period a to the period b. As a result, as shown in FIG. 6D, the vicinity 152 between the periods a and b
Thus, the counter electrode signal 108 has a slightly lower right waveform.

Conversely, in the next period (not shown) after the period b, the average level of the input signal 148 is slightly lower.
In the vicinity 154 of the boundary between the period b and the next period, the counter electrode signal 108 has a slightly upward-sloping waveform. In FIG. 6D, the time axis is shorter than that in FIG.

[0016]

As described above, in the counter electrode circuit 112 of the conventional liquid crystal display device 102, the waveform of the generated counter electrode signal 108 changes for each period of the vertical scanning and is not uniform. There was a disadvantage. As a result, bright and dark horizontal stripes may appear on the screen or flicker may occur. Further, in the liquid crystal display element to which the counter electrode signal 108 whose waveform is disturbed as described above, the DC component remains even if the polarities of the video signal 116 and the counter electrode signal 108 are inverted, so that the deterioration of the liquid crystal material is reduced. There was also a problem that it was easy to proceed.

Hereinafter, the cause of the occurrence of bright and dark horizontal stripes and flicker will be described in detail. FIGS. 7A and 7B are waveform diagrams showing the counter electrode signal 108 and the video signal 116 supplied to the element electrode and the counter electrode of the liquid crystal display panel 104, respectively. As described above, the video signal 116 and the counter electrode signal 108 correspond to one horizontal scanning cycle (1
H), the video signal 116 and the counter electrode signal 108 have waveforms as shown in FIG. Then, in each cycle of the horizontal scanning, a voltage having a difference between these two signals is applied between the element electrode and the counter electrode. (A) of FIG.
The voltages Va and Vb shown in FIG.
And a voltage applied between the element electrode and the counter electrode in the next cycle 158.

Here, assuming that two adjacent horizontal scanning lines corresponding to the two periods 156 and 158 are displayed with the same luminance, the voltages Va and Vb have the same value. However, when the vertical scanning is switched,
As shown in FIG. 6 (C), the counter electrode signal 108 falls to the right or rises to the right.
As a result, the DC level of the counter electrode signal 108 shifts above or below the original level.

FIG. 7B shows the vicinity 154 of the boundary shown in FIG. 6C with the time axis enlarged.
In the vicinity 154 of the boundary, since the counter electrode signal 108 rises to the right, the DC level is shifted upward. In the figure, a dashed line 160 indicates the center level of the counter electrode signal 108, and a dashed line 162 indicates the center level of the video signal 116.

Therefore, the voltages Va and Vb, which are the difference between the video signal 116 and the counter electrode signal 108, satisfy Va> Vb in this case, and a high voltage is applied between the element electrode and the counter electrode in the cycle 156. Applied, while period 158
, A low voltage is applied. As a result, the horizontal scanning lines corresponding to the period 156 are displayed dark, and the horizontal scanning lines corresponding to the period 158 are displayed bright, and the liquid crystal display panel 10
Horizontal stripes appear on the screen of No. 4.

Also, the level of the counter electrode signal 108 is shifted up or down alternately in the vicinity of the boundary with the next frame for each frame, and the voltage applied to the liquid crystal display element changes for each frame. In the upper corresponding portion, the brightness changes for each frame, and as a result, flicker occurs.

The present invention has been made to solve such a problem, and an object of the present invention is to provide a liquid crystal display device which realizes a good image display without stripes and flickers.

[0023]

In order to achieve the above object, the present invention provides a liquid crystal display panel including a large number of liquid crystal display elements arranged in a matrix, element electrodes for applying a voltage to the liquid crystal display elements, and a counter electrode. A signal processing circuit that supplies a video signal to the element electrode, a controller that supplies a timing signal to the liquid crystal display panel to drive the liquid crystal display panel and outputs a signal for generating a counter electrode signal, A counter electrode circuit for amplifying a signal from the controller, setting the DC level of the signal, generating the counter electrode signal, and supplying the counter electrode signal to the counter electrode, wherein the video signal has a period based on a predetermined voltage. The polarity of the counter electrode signal is periodically inverted based on a predetermined voltage, and at the same cycle as the video signal, and A liquid crystal display device in which the polarity is inverted with an opposite polarity to an image signal, wherein the counter electrode circuit is configured by a DC amplifier circuit that amplifies the signal from the controller and adds a bias voltage to the signal. It is characterized by having.

Therefore, in the liquid crystal display device of the present invention,
Since the counter electrode signal is directly amplified without passing through a capacitor, there is a difference between the low level duration and the high level duration of the signal supplied from the controller,
Even if the durations of the low level and the high level are reversed in two adjacent vertical scanning periods, the waveform does not change near the boundary between the vertical scanning periods. As a result, it is possible to realize a favorable image display without a stripe pattern or a flicker.

[0025]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 2 is a main block diagram showing an example of the liquid crystal display device according to the present invention, and FIG. 1 is a circuit diagram showing a counter electrode circuit constituting the liquid crystal display device of FIG.
2, the same elements as those in FIG. 3 are denoted by the same reference numerals, and a description thereof will be omitted here.

The liquid crystal display device 202 shown in FIG. 2 differs from the liquid crystal display device 102 in FIG. 3 in that the counter electrode circuit 112 in FIG. As shown in FIG. 1, the counter electrode circuit 204 includes the DC amplifier circuit 2 that amplifies a signal from the controller 110 (FIG. 3) and adds a bias voltage to the signal. The DC amplifier circuit 2 includes an operational amplifier 4 and a buffer circuit 8 that outputs a counter electrode signal 6 output from the operational amplifier with low impedance. The operational amplifier 4 includes first and second resistors 10, 1, and 2.
2 constitutes an inverting amplifier circuit, one end of the first resistor 10 is connected to the inverting input terminal 14 of the operational amplifier 4,
Is connected between the inverting input terminal 14 and the output terminal 16 of the operational amplifier 4. A signal 148 from the controller 110 is input to the other end of the first resistor 10.

The DC amplification circuit 2 further includes third and fourth DC amplification circuits.
And the third and fourth resistors 18, 20.
20 is connected in series between the power supply 22 and the ground 142 (reference potential point), and the common connection point of the third and fourth resistors 18 and 20 is connected to the non-inverting input terminal 24 of the operational amplifier 4.

On the other hand, the buffer circuit 8 comprises N-type and P-type first and second transistors 26 and 28,
The bases and emitters of the first and second transistors 26 and 28 are commonly connected, the base is connected to the output terminal 16 of the operational amplifier 4, and the emitter is connected to the output terminal 16 of the counter electrode circuit 204. From the output terminal 16, the counter electrode signal 30 having an amplitude and a DC level suitable for the specification of the liquid crystal display panel 104 is output.

The counter electrode circuit 20 constructed as described above
4, the operation of the DC amplifier circuit 2 will be described.
8 is inverted and amplified at an amplification factor determined by the ratio of the resistance values of the first and second resistors 10 and 12, and is output from the operational amplifier 4 as the counter electrode signal 6. At this time, the counter electrode signal 6 is obtained by changing the voltage of the power supply 22 to the third and fourth resistors 18
The DC level is shifted by the voltage divided by zero. Thereafter, the counter electrode signal 6 passes through the buffer circuit 8 and is output as the counter electrode signal 30 from the output terminal 16 to the liquid crystal display panel 104.
(FIG. 3).

Therefore, in the counter electrode circuit 204 of the present embodiment, the conventional counter electrode circuit 112 shown in FIG.
In contrast to this, since the signal is directly input to the amplifying circuit using the operational amplifier without using a capacitor, the difference between the low-level duration and the high-level duration of the signal supplied from the controller 110 as shown in FIG. There is
Even if the durations of the low level and the high level are reversed in two adjacent vertical scanning periods, the waveform does not change near the boundary between the vertical scanning periods. As a result, it is possible to realize a favorable image display without a stripe pattern or a flicker. Further, since a DC component does not remain in the voltage applied to the liquid crystal display element, deterioration of the liquid crystal material can be reliably prevented.

[0031]

As described above, in the liquid crystal display device of the present invention, the counter electrode signal is directly amplified without passing through the capacitor, so that the signal supplied from the controller has a low-level duration and a high-level signal. Even if there is a difference between the durations and the durations of the low level and the high level are reversed in two adjacent vertical scanning periods, the waveform does not change near the boundary between the vertical scanning periods. As a result, it is possible to realize a favorable image display without a stripe pattern or a flicker. Further, since a DC component does not remain in the voltage applied to the liquid crystal display element, deterioration of the liquid crystal material can be reliably prevented.

[Brief description of the drawings]

FIG. 1 is a circuit diagram illustrating a counter electrode circuit included in a liquid crystal display device.

FIG. 2 is a main block diagram showing an example of a liquid crystal display device according to the present invention.

FIG. 3 is a main part configuration diagram showing an example of a conventional liquid crystal display device.

FIG. 4 is a graph showing a relationship between an applied voltage and transmittance in a liquid crystal display device.

FIG. 5 is a circuit diagram showing a detailed configuration of a conventional counter electrode circuit.

FIGS. 6A to 6D are timing charts for explaining the operation of the common electrode circuit.

FIGS. 7A and 7B are waveform diagrams showing a counter electrode signal and a video signal supplied to an element electrode and a counter electrode of a liquid crystal display panel, respectively.

[Explanation of symbols]

2 ... DC amplifier circuit, 4 ... operational amplifier, 6 ... counter electrode signal, 8 ... buffer circuit, 10 ... first resistor, 1
2 ... second resistor, 14 ... inverted input terminal, 16 ... output terminal, 18 ... third resistor, 20 ... fourth resistor, 2
2 power supply 24 non-inverting input terminal 26 first transistor 28 second transistor 30
Counter electrode signal 32 input terminal 102 liquid crystal display device 104 liquid crystal display panel (LCD) 106
... Signal processing circuit, 108 ... Counter electrode signal, 110 ...
Controller, 112 ... counter electrode circuit, 114 ... video signal, 116 ... video signal, 118 ... backlight, 120 ... curve, 122 ... first transistor,
124 amplifying circuit 126 buffer circuit 128
... A first resistor, 130... A second resistor, 132... A third resistor, 134 a fourth resistor, 136 a capacitor 138 an input terminal, 140 a power supply, 142.
Ground, 144... Second transistor, 146.
Third transistor, 148... Input signal, 150.
Output terminals, 202: liquid crystal display device, 204: counter electrode circuit.

Claims (6)

[Claims] 1. A liquid crystal display panel including a large number of liquid crystal display elements arranged in a matrix, element electrodes for applying a voltage to the liquid crystal display elements, and a counter electrode, and a signal processing circuit for supplying a video signal to the element electrodes. A controller for supplying a timing signal to the liquid crystal display panel to drive the liquid crystal display panel and outputting a signal for generating a counter electrode signal; amplifying a signal from the controller; and a DC level of the signal. And the counter electrode circuit for generating the counter electrode signal and supplying the counter electrode to the counter electrode, wherein the video signal periodically reverses its polarity based on a predetermined voltage, and the counter electrode signal has a predetermined voltage. In a liquid crystal display device in which the polarity is periodically inverted with respect to the reference, and the polarity is inverted with the same cycle as the video signal and with the opposite polarity to the video signal. I, the counter electrode circuit, a liquid crystal display device characterized by being constituted by the DC amplifier circuit for amplifying the signal from the controller, and adding the bias voltage to the signal. 2. The liquid crystal display device according to claim 1, wherein the DC amplifier circuit includes an operational amplifier and a buffer circuit that outputs a counter electrode signal output from the operational amplifier with low impedance. 3. The operational amplifier comprises an inverting amplifier circuit together with first and second resistors, one end of the first resistor is connected to an inverting input terminal of the operational amplifier, and a second resistor is connected to the inverting input terminal. 2. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is connected between the output terminal of the operational amplifier and a signal from the controller is input to the other end of the first resistor. 4. The inverting amplifier circuit includes third and fourth resistors, wherein the third and fourth resistors are connected in series between a power supply and a reference potential point, and the third and fourth resistors are connected in series. 4. The liquid crystal display device according to claim 3, wherein a common connection point of the resistors is connected to a non-inverting input terminal of the operational amplifier. 5. The buffer circuit includes first and second transistors having different semiconductor junction types, and a base and an emitter of the first and second transistors are respectively connected in common, and the base is connected to the base. 3. The liquid crystal display device according to claim 2, wherein the common electrode signal is output from the emitter while being connected to an output terminal of an operational amplifier. 6. The liquid crystal display device according to claim 1, wherein polarities of the video signal and the counter electrode signal are inverted every horizontal scanning cycle in the liquid crystal display panel.