JP2000324415A - On-vehicle television video processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To vary the judging reference of switching to a still picture and moving picture in accordance with the traveling situation of an automobile. SOLUTION: In accordance with a speed obtained by a vehicle speed sensor Vs and the position of its own automobile obtained by a car navigation system, the judging reference of video disturbance is changed to strict judge in the case of traveling at high speed or at the position of its own automobile where electric field intensity is high and to leniently judge in the case of traveling at low speed or at the position of its own automobile where electric field intensity is low. When NG is continuously judged longer than a fixed period or the car navigation system judges stopping of the automobile, an original moving picture is forcedly displayed on a display 15.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an in-vehicle television image processing apparatus capable of stabilizing a display image on a in-vehicle television receiver.

[0002]

2. Description of the Related Art In a conventional on-vehicle television receiver, when traveling in a valley or the like of a building, a direct wave from a broadcasting station and a reflected wave reflected from a building or the like are combined, so-called multipath fading. The phenomenon, that is, the image synchronization signal is disturbed, the screen is cut off, the image is shaken, the ghost is generated, and the image may be inconsistent when viewed.

As a typical technique for alleviating this problem, there is an in-vehicle television image processing apparatus described with reference to a circuit block diagram of FIG.

In this on-vehicle television image processing apparatus, the composite image signal output from the television tuner 1 is A
/ D converter 2 and synchronization separation block 5.
The A / D converter 2 converts the composite video signal as an analog signal into a digital signal, and writes the digital signal into the image memory 3 under the control of the memory control block 7. The reading of the video signal is performed based on the control of the memory control block 7, and the D / A converter 4 returns the analog signal to an analog signal to display an image on the display 8. Here, when the synchronization signal is extracted by the synchronization separation block 5, the memory control block 7 determines the synchronization disturbance in the video signal by the synchronization disturbance detection block 6, and determines whether the image is good (an image with little synchronization disturbance) or bad. (An image with many synchronization disturbances) is notified to the memory control block 7, and in the case of a bad image, the image in the image memory 3 is repeatedly read out until the synchronization disturbance becomes below a certain reference.
A still image is displayed on the display 8.

If this conventional technique is used, the degree of image disturbance is detected by the disturbance of the synchronization signal, and only good images are recorded and reproduced in the image memory. By doing so, the image is displayed as a still image, so that image distortion can be prevented.

Incidentally, such conventional techniques are disclosed in JP-A-61-145976 and JP-A-62-160883.
Many publications have been disclosed in Japanese Patent Application Laid-Open No. 63-276386, Utility Model Registration No. 2586639 and Japanese Patent Application Laid-Open No. 2-147983.

[0007]

According to the above-described technology, when a vehicle is parked and stopped for a long time in a place where radio waves are poor, such as when waiting for a signal, a still image state is maintained unless the radio waves are restored. You are dissatisfied with the imbalance between audio and video. In this case, there is a demand that the user wants to view a normal moving image even if the image is somewhat bad.

[0008] In addition, while the change of radio waves is often low at low speeds, the change of radio waves is usually high at high speeds. The still time of the still image is felt particularly long, and the screen is often felt like a frame advance.

[0009] Such a problem is caused by the conventional technique for determining the disturbance of the synchronization signal, in which the degree of phase coincidence between the pseudo synchronization signal generated inside the vehicle-mounted television image processing device and the reception synchronization signal is fixed. This is because it has been determined.

As a technique for changing the degree of phase coincidence between the pseudo synchronization signal and the reception synchronization signal, a technique for determining the electric field strength in two stages and a technique for changing the matching circuit by observing the continuous output time of the still image. However, none of the above complaints can be resolved because none of them use the relationship with the speed of the car.

An object of the present invention is to appropriately switch and display a moving image or a still image according to various driving conditions of a car, such as normal driving in a city area, slow driving, and parking and stopping, while driving on a highway. It is an object of the present invention to provide an in-vehicle television image processing device capable of performing the above.

[0012]

In order to solve the above problems,
The invention according to claim 1 is an in-vehicle television image processing device for displaying a television image on a predetermined display based on a radio wave received by an automobile, wherein at least one of a vehicle speed and a traveling position of the automobile is provided. A traveling state detection unit that detects a traveling state of the vehicle including one of the above, a television tuner that receives a radio wave related to a video signal related to the television image, and temporarily stores the video signal received by the television tuner. And a synchronization separation circuit that separates and extracts a synchronization signal from a video signal received by the television tuner, and a synchronization disturbance detection circuit that detects disturbance of the synchronization signal that is separated and extracted by the synchronization separation circuit. A determination circuit for determining whether or not the synchronization disturbance detected by the synchronization disturbance detection circuit is within an allowable range; A memory controller for switching between an output video image and a still image image based on the synchronization signal, wherein the determination circuit determines whether or not the synchronization signal disturbance detected by the synchronization disturbance detection circuit is allowable / non-permissible. As the criterion, there are a plurality of criterions of a strict criterion and a gradual criterion, and a criterion for permitting / non-permitting the disturbance of the synchronization signal in a stepwise manner according to a result of the determination by the traveling state detecting unit. It has been changed to.

According to a second aspect of the present invention, the traveling state detecting section is a vehicle speed judging section that counts a vehicle speed pulse given from a predetermined vehicle speed sensor to judge the magnitude of the vehicle speed,
The determining circuit is configured to gradually change a criterion for permitting / non-permitting the disturbance of the synchronization signal to a stricter criterion as the vehicle speed becomes higher according to a result of the determination by the vehicle speed determining unit. It has.

According to a third aspect of the present invention, the determination circuit inputs a signal of a predetermined voltage level regarding the disturbance of the synchronization signal detected by the synchronization disturbance detection circuit to a predetermined capacitor, and It has a time constant circuit that determines whether the disturbance of the image is acceptable or unacceptable depending on the magnitude of the transient change of the storage in the capacitor, and the time constant circuit is
The vehicle speed is determined based on a single capacitor, a plurality of resistors connected between the capacitor and the synchronization disturbance detection circuit and having different resistance values connected in parallel with each other, and a determination result of the vehicle speed determination unit. A switching element that switches to the resistor having a smaller resistance value and changes to a stricter criterion as the speed becomes higher.

According to a fourth aspect of the present invention, the determination circuit is characterized in that a continuous time during which the disturbance of the synchronization signal, which is determined according to the allowable / non-permissible criterion, is continuously non-permitted, is a predetermined reference time. A time comparator for comparing whether or not the video signal is longer than the normal time. The in-vehicle television image processing device normally outputs the video signal stored in the memory to the display, An output switching circuit that switches to output the television image received by the television tuner as it is to the display when a comparison result that the allowed continuous time is longer than a predetermined reference time is obtained. Further provisions.

According to a fifth aspect of the present invention, there is provided a car navigation device for detecting a traveling position of an automobile based on predetermined map information, and in particular, the traveling state of the automobile is determined by an automobile exclusive road or an automobile exclusive road. When the vehicle coincides with a highway, the vehicle has a function of outputting a signal to that effect to the determination circuit, and the determination circuit outputs a signal indicating that the traveling position of the vehicle matches the motorway or the highway. When received from the car navigation device, a function of changing the permissible / non-permissible criterion for the disturbance of the synchronization signal to a strict criterion is provided.

According to a sixth aspect of the present invention, in the car navigation device, the traveling state detecting section detects a traveling position of the vehicle based on predetermined map information. Area information divided according to the magnitude of the electric field strength related to the television reception is set in advance, and the current car position at the current car position is compared with the car travel position obtained by the car navigation device and the area information. The function of recognizing the magnitude of the electric field strength, and the criterion for permitting / non-permitting the disturbance of the synchronizing signal as the electric field strength increases in accordance with the recognized magnitude of the electric field strength is gradually increased. It has a function to change.

According to a seventh aspect of the present invention, the determination circuit inputs a signal of a predetermined voltage level about the disturbance of the synchronization signal detected by the synchronization disturbance detection circuit to a predetermined capacitor, and It has a time constant circuit that determines whether the disturbance of the image is acceptable or unacceptable depending on the magnitude of the transient change of the storage in the capacitor, and the time constant circuit is
A single capacitor, a plurality of resistors having different resistance values connected between the capacitor and the synchronization disturbance detection circuit and connected in parallel with each other, and a running position of the vehicle obtained by the car navigation device; A switch element that switches to a resistor having a smaller resistance value and changes to a stricter criterion as the electric field strength at the current vehicle position recognized in comparison with the area information is larger.

According to an eighth aspect of the present invention, the determination circuit detects whether or not the running position of the automobile obtained by the car navigation device has changed, and the on-vehicle television image processing device has Normally, the video signal stored in the memory is output to the display unit, and when the determination circuit obtains a detection result indicating that the traveling position of the automobile has not changed, the video signal is received by the television tuner. And an output switching circuit for switching the television image output to the display device as it is.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS << First Embodiment >><Configuration> An on-vehicle television image processing apparatus according to an embodiment of the present invention does not display a distorted screen when synchronization is disturbed. Is intended to output a still image,
In particular, by preparing a plurality of criteria for testing the disturbance of the horizontal synchronization signal, and changing one of these criteria in accordance with the vehicle speed detected by the vehicle speed sensor, a sudden change such as during high-speed driving can be achieved. In a strong electric field environment, high-quality still images are displayed for a short period of time with strict judgment, while still images may be displayed too long when the vehicle is stopped or parked at an intersection, which may significantly impair the video function inherent in television images. In some cases, various disturbance determinations are made in response to various driving situations, such as loosely determining the disturbance.

FIG. 1 is a block diagram showing the overall configuration of the on-vehicle television image processing apparatus. As shown in FIG. 1, the in-vehicle television image processing apparatus includes a television tuner 9 and an A / D converter 10 for converting an analog interlaced NTSC composite image signal received by the television tuner 9 into a digital signal. When,
From the NTSC composite video signal received by the television tuner 9, a vertical synchronization signal Vsync and a horizontal synchronization signal Hsy are obtained.
nc and two field memories 1 for temporarily and alternately storing the video signal output from the A / D converter 10 substantially in field units.
3a, 13b (FIG. 2) and the field memories 13a, 1
3b, a D / A converter 14 for reading out the video signal temporarily stored in the 3b and converting it into an analog signal, and detecting a synchronization disturbance of the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync separated and extracted by the synchronization separation circuit 11. A synchronization disturbance detection circuit 16, a vehicle speed judging section (running state detecting section) 18 which counts a vehicle speed pulse given from a predetermined vehicle speed sensor Vs to judge the magnitude of the vehicle speed, and a vehicle speed judged by the vehicle speed judging section 18. A determination circuit 17 that determines whether the synchronization disturbance actually detected by the synchronization disturbance detection circuit 16 is within an allowable range while changing the tolerance for the synchronization disturbance in accordance with the following. A memory controller 19 for writing and reading video signals to and from the field memories 13a and 13b; Original NTS received by the output signal and the television tuner 9 from the D / A converter 14
C composite video signal is selectively switched to a predetermined display 15
And an output switching circuit 12 for outputting the signal to the Each of these elements is provided by the reference clock generator 31 shown in FIG.
14.32M which is four times the frequency of the color burst signal
Hz, and operates according to the reference frequency.

The synchronizing separation circuit 11 is connected to the vertical synchronizing signal Vsync included in the vertical blanking period of the NTSC composite video signal received by the television tuner 9, similarly to the N synchronizing signal Vsync.
In general, the horizontal synchronization signal Hsync included in the horizontal blanking period of the TSC composite video signal is separated and extracted from other color signals and the like.

As shown in FIG. 2, the synchronization disturbance detecting circuit 16 is provided with a vertical synchronization signal Vsyn separated and extracted by the synchronization separation circuit 11.
c, and a horizontal synchronization signal Hsyn separated and extracted by the synchronization separation circuit 11.
and a horizontal synchronization disturbance detecting unit 35 for detecting the synchronization disturbance of c.

In the vertical synchronization disturbance detecting section 33, as shown in FIG. 3, a reference clock of 14.32 MHz, which is four times the frequency of the color burst signal, is supplied to the AND circuit 43 from the above-mentioned reference clock generator 31 (FIG. 2). The high portion of the output from the AND circuit 43 is applied to the first counter circuit 44.
And the high part of the output signal α is created. The fall of the output signal from the first counter circuit 44 is received by the latch circuit 46, and the fact (fall) is recorded (latch).
At the same time, the signal is input to the AND circuit 43, and the reference clock input signal to the first counter circuit 44 is turned off. At the same time, the low portion of the output signal from the first counter circuit 44 is accurately counted by the second counter circuit 47 to generate a low portion of the output signal α. On the other hand, the vertical synchronization signal Vsync from the synchronization separation circuit 11 is input to the reset circuit 45, and the falling of the vertical synchronization signal Vsync is detected to output a reset trigger signal. The reset trigger signal is output to both counter circuits 44,
At the same time as resetting the contents of the counter 47, the contents of the latch of the latch circuit 46 are also cleared.
And these are successively output to the matching circuit 48. Here, the output signal α is a pseudo vertical synchronizing signal, and the AND circuit 43, the first counter circuit 44,
The latch circuit 46 and the second counter circuit 47 are provided with a pseudo vertical synchronization signal generator FC in the vertical synchronization disturbance detection unit 33.
Functions as 1.

The coincidence circuit 48 calculates an exclusive OR of the pseudo vertical synchronizing signal α generated by the pseudo vertical synchronizing signal generator FC1 and the vertical synchronizing signal Vsync (β).
The xOR (exclusive OR) circuit compares the high and low of both signals α and β and outputs an output signal θ as shown in FIG. When the phase difference between the two signals α and β is large, the output signal θ has a high output for a relatively long time, whereas when the phase difference between the two signals α and β is small, the high time of the output signal θ is instantaneous. .

As shown in FIG. 6, the horizontal synchronizing disturbance detecting section 35 outputs the frequency of the color burst signal from the reference clock generator 31 (FIG. 2), as in the vertical synchronizing disorder detecting section 33 shown in FIG. The quadrupled 14.32 MHz reference clock is applied to the AND circuit 55, and the high portion of the output from the AND circuit 55 is accurately counted by the third counter circuit 53 to create the high portion of the output signal γ. It is supposed to be. The falling of the output signal from the third counter circuit 53 is received by the latch circuit 54, and the fact (falling) is recorded (latched), and at the same time, the signal is input to the AND circuit 55. The reference clock input signal to the third counter circuit 53 is turned off. At the same time, the low portion of the output signal from the third counter circuit 53 is accurately counted by the fourth counter circuit 56 to create a low portion of the output signal γ. On the other hand, the synchronization separation circuit 11
Is input to a reset circuit 57, which detects a fall of the horizontal synchronization signal Hsync and outputs a reset trigger signal. The reset trigger signal resets the contents of both counter circuits 53 and 56 and, at the same time, clears the latch contents of latch circuit 54. Output signals γ are generated by counter circuits 53 and 56 again using the reference clock. ,
These are successively output to the matching circuit 58. Here, the output signal γ is a pseudo-horizontal synchronization signal, and the third counter circuit 53, the latch circuit 54, the AND circuit 55, and the fourth counter circuit 56 include a pseudo-horizontal synchronization signal generator in the horizontal synchronization disturbance detection unit 35. Functions as FC2.

The coincidence circuit 58 includes both counter circuits 5
ExO for calculating the exclusive OR of the pseudo-horizontal synchronizing signal γ generated in steps 3 and 56 and the horizontal synchronizing signal Hsync (δ)
R (exclusive or) circuit, and both signals γ and δ
And outputs the comparison result to the multi-stage time constant circuit GT2 of the horizontal synchronization determination circuit 36.

As shown in FIGS. 2 and 7, the vehicle speed judging section 18 obtains a vehicle speed pulse outputted from a predetermined vehicle speed sensor Vs disposed around the tire of the automobile, and then resets the reset timer 21a in the pulse counter 21. The vehicle speed pulse is counted in a unit time based on the timing of, and compared with a reference pulse that is a reference by an analog or digital comparator 22 to determine whether the vehicle is in a high-speed running state or parked or stopped. Alternatively, it is determined whether the vehicle is in a normal traveling state. For example, the speed is 0.0 km / h.
In this case, it is determined that the vehicle is parked and stopped. In other cases (including reverse driving), as the vehicle speed increases, 15 k
First vehicle speed level (low speed level) less than m / h, 15km
/ H or more and less than 40 km / h (normal traveling level), 40 km / h or more and less than 80 km / h, third vehicle speed level (first high-speed traveling level), 80 km / h or more and less than 110 km / h It is designed to recognize a traveling state for a preset vehicle speed, such as a fourth vehicle speed level (second high-speed traveling level) and a fifth vehicle speed level (ultra-high-speed traveling level) of 110 km / h or more. . Since the pulse width of the vehicle speed pulse and the number of pulses per one rotation of the wheel vary depending on the vehicle type, the vehicle speed pulse given from the vehicle speed sensor Vs is divided by passing through a frequency divider 20 corresponding to the vehicle type, and is divided into a reference pulse. After the conversion, the traveling state is determined. The pulse width or the like divided by the frequency divider 20 specifies the vehicle type by pressing and operating the vehicle type switch 20a at an assembly factory or the like when the in-vehicle television image processing apparatus is mounted on an actual automobile. For example, the settings can be easily changed. In addition, since the tire actually expands according to the vehicle speed, accurate speed cannot be calculated only from the number of pulses due to the effect, but the accuracy of the vehicle speed must be as accurate as a speedometer or car navigation device. Therefore, the speed is calculated by multiplying the number of pulses per unit time by 1 pulse = 2πr / n (where r = the radius of the tire, n = the number of pulses per rotation of the tire). Specifically, if the number of pulses per unit time is less than 4, the vehicle parks and stops; if the number of pulses is less than 8, the first vehicle speed level (low-speed level); if the number of pulses is less than 20, the second vehicle speed level (normal traveling level); If the number is less than 40, the third vehicle speed level (first high-speed traveling level), if the number of pulses is less than 55, the fourth vehicle speed level (second high-speed traveling level), and if the number of pulses is 55 or more, the fifth vehicle speed level (very high-speed traveling level). ). As the vehicle speed sensor Vs used here, an existing one used in a speedometer of an automobile or a car navigation system is also used.

In the determination circuit 17, the allowable range of the synchronization disturbance is determined in advance by a predetermined time constant, and thereby, it is determined whether the image disturbance is OK or NG. Specifically, as shown in FIG. 2, the determination circuit 17 performs two determinations to determine whether or not the synchronization disturbance detected by each of the vertical synchronization disturbance detection unit 33 and the horizontal synchronization disturbance detection unit 35 is within an allowable range. Circuits 34 and 36 and each of the determination circuits 34 and 3
6 (OK signal (allowable signal) / NG
OK / NG signal registers 34a and 36a for storing signals (non-permissible signals)) and both OK / NG signal registers 34
a, an OR circuit 37 for calculating the logical sum of the signal (non-permissible signal) of the negative determination result (NG) in the OK / NG signal in 36a, And a time comparator 38 for comparing the continuous period with a predetermined reference time when a non-permissible signal (NG) is output.

The vertical synchronization determination circuit 34 is, as shown in FIG. 3, a time constant circuit GT1 in which a unique time constant is set by a single resistor 50 and a single capacitor 51. The level of the output signal θ from the coincidence circuit 48 of the vertical synchronization disturbance detecting section 33 is determined. That is, the coincidence circuit 48 of the vertical synchronization disturbance detection unit 33
Is output from the capacitor 5 of the time constant circuit GT1.
It changes to a transient change curve by being stored in 1,
is converted so that the change in the level of θ becomes dull (becomes a transient change). At this time, the magnitude of the transient change is determined according to the time constant of the time constant circuit GT1, and the remaining amount is determined by a predetermined value. A threshold is set at a threshold level and recorded as a high or low signal in the vertical OK / NG signal register 34a. That is, in the case of OK (good image), since the high output of the output signal θ output from the vertical synchronization disturbance detection unit 33 is instantaneous, the remaining amount of the elimination of the transient phenomenon by the time constant circuit GT1 of θ is extremely small. Value
Therefore, while the threshold is recorded and the value recorded in the vertical OK / NG signal register 34a becomes low (= "0"), in the case of NG (bad image), the time of high output is long, and this is the time constant circuit. Even if the curve is transiently changed by GT1 to a dull curve (even if the short-term change is eliminated), the remaining amount becomes large, and thus the vertical OK / N
The value recorded in the G signal register 34a is high (=
"1").

In this case, if the clear control of the vertical OK / NG signal register 34a is not performed, the determination result is maintained as NG ("1") forever. Therefore, the low active logic for appropriately clearing the result is maintained. An integrated circuit 49 is provided. That is, the low active AND circuit 49 causes the pseudo vertical synchronizing signal α and the vertical synchronizing signal V
When both sync (β) are low, vertical OK / NG
The signal register 34a is cleared. Here, the operation principle of the low active AND circuit 49 will be described with reference to FIG. (1) in FIG. 5 shows a pseudo vertical synchronizing signal.
1 to P6 are waveform pulses representing a pseudo vertical synchronization signal. Further, (2) in FIG. 5 shows a vertical synchronization signal, and shows a state in which the synchronization signals Q1 to Q6 are output with the same time axis as the pseudo vertical synchronization signals P1 to P6. Symbols Q12 and Q56 indicate synchronization signals whose phases have been shifted by ghosts. Matching circuit 48 in this case
The result of the determination by the time constant circuit GT1 is shown in (3) of FIG. The pulse Q1 is NG (bad image) with respect to the pulse P1, the pulse Q12 is NG with no corresponding pseudo vertical synchronization signal, and the pulse Q2 is NG with respect to the pulse P2.
The pulse Q3 is NG for the pulse P3, the pulse Q4 is OK for the pulse P4 (good image), the pulse Q5 is OK for the pulse P5, and the pulse Q56 is NG and Q6 because there is no corresponding pseudo vertical synchronization signal. Is NG with respect to the pulse P6. The result of this determination is determined as vertical OK / NG
When the signal is stored in the signal register 34a, in the NG determination up to the pulse Q3, there is no problem in that the content in the vertical OK / NG signal register 34a remains NG, but even if the determination is OK in the pulse P4, the vertical OK / NG signal is not determined. The register 34a is maintained as NG, and in this state, the register 34a is permanently NG. Therefore, the pseudo-vertical synchronization signal α and the vertical synchronization signal Vsync are output by the low active AND circuit 49.
When both (β) are low, the contents of the vertical OK / NG signal register 34a are cleared. For example, in the pulse P1, once the vertical OK / NG signal register 3
Immediately after 4a is cleared with OK, NG, which is the determination result, is registered. The pulse Q12 and the pulse Q2 corresponding to the pulse P2 are a pseudo vertical synchronization signal α and a vertical synchronization signal Vsy.
There is no case where both nc (β) are low. In this case, since both are NG, the vertical OK / NG signal register 3
4a may be left as it is. When the pulse P3 is reached, the contents of the vertical OK / NG signal register 34a are temporarily cleared, and then NG is registered. In the pulse P4, after the NG is cleared, the OK of the determination result is stored in the vertical OK / NG signal register 34a. Similarly, in the pulse P5, OK is continuously registered in the vertical OK / NG signal register 34a, NG is registered again in the pulse Q56, and the content of the vertical OK / NG signal register 34a is temporarily cleared in the pulse Q6. After that, the NG is registered.

As shown in FIG. 6, the horizontal synchronization judging circuit 36 is a multi-stage time constant circuit (permissible / non-permissible judging circuit) G in which a plurality of time constant characteristics serving as a reference for a disturbance test of the horizontal synchronizing signal are prepared.
T2, the multi-stage time constant circuit GT2 includes one capacitor 60 having one end grounded,
5, five resistors R1 to R5 arranged in parallel between the other end of the zero and the coincidence circuit 58 of the horizontal synchronization disturbance detection unit 35, and one of these resistors R1 to R5 is selected to remove the horizontal synchronization disturbance. Switch element S connected to matching circuit 58 of detection unit 35
W, and the voltage level at the connection point between the capacitor 60 and the resistors R1 to R5 is thresholded at a predetermined threshold level, and the horizontal OK signal is output as a high (“1”) or low (“0”) signal. / NG signal register 3
6a.

Here, the resistance values of the resistors R1 to R5 are set differently, and these resistors R1 to R5 are selectively switched by a switch element SW, so that the time of the multi-stage time constant circuit GT2 is changed. The constant characteristics can be switched. That is, the matching circuit 5 of the horizontal synchronization disturbance detecting unit 35
8 to the multi-stage time constant circuit GT2,
From the relationship between the resistance values of the resistors R1 to R5 selected by the switch element SW and the capacitance of the capacitor 60, the capacitor 6 of the signal from the coincidence circuit 58 of the horizontal synchronization disturbance detection unit 35
0 determines the rate of transient change when eliminated.
Therefore, when the OK (good image) and NG (bad image) are determined by the time comparator 38 (FIG. 2) based on the remaining amount level after a certain time, the strictness of the determination can be changed by switching the resistors R1 to R5. It has become. In general, the resistance R
The larger the value of 1 to R5, the slower the amount of change in storage of the capacitor 60, while the smaller the value of the resistors R1 to R5,
The amount of change in charge stored in the capacitor 60 is increased. Therefore,
When this value is thresholded at a predetermined timing and stored in the horizontal OK / NG signal register 36a, the larger the value of the resistors R1 to R5 appears as a smaller change amount, the judgment by the time comparator 38 is While the judgment is made loosely, the smaller the values of the resistors R1 to R5 appear as a larger change amount, the judgment by the time comparator 38 is made strictly. Therefore, depending on the values of the resistors R <b> 1 to R <b> 5, it is easy to make the determination of the image disturbance strict or loose.

The switching of the switch element SW is performed as shown in FIG.
As described above, the determination is performed based on the traveling state of the vehicle speed determined by the vehicle speed determination unit 18 described above. That is, while the vehicle is parked or stopped, the contacts of the switch element SW are connected to the resistors R1 to R4 having the largest resistance values so that the determination of the image disturbance becomes loose.
5, while the higher the vehicle speed, the more the contact point of the switch element SW is sequentially switched to the smaller resistances R1 to R5 so that the judgment of the image disturbance becomes stricter. This allows a still image to be displayed for a long time, such as when the vehicle is parked or parked in a location where the electric field is not very good. While the display can be prevented automatically and as much as possible, if the electric field strength environment changes drastically, such as when driving at high speed, it is necessary to switch high-quality still images every short time with strict judgment. so,
It is possible to display many frame images while improving the image quality.

Incidentally, reference numeral 77 in FIG. 6 denotes a horizontal OK / NG
This is a low active AND circuit as a register reset circuit for resetting the signal register 36a, and its configuration and function are the same as those of the low active AND circuit 49 (see FIG. 3) in the vertical synchronization determination circuit 34 described above. Description is omitted.

Each OK / NG signal register 34a, 36a
Represents the results of the determinations by the determination circuits 34 and 36, respectively. The voltage levels stored in the capacitors 51 and 60 of the time constant circuits GT1 and GT2 are thresholded at a predetermined threshold level and input. As a result, a high-level signal is stored in the case of NG (bad video) and a low-level signal is stored in the case of OK (good video).

The OR circuit 37, as shown in FIG.
Calculates the logical sum of the data in the NG signal registers 34a, 36a. When at least one of the vertical synchronizing signal Vsync and the horizontal synchronizing signal Hsync is judged as NG by the judging circuits 34, 36, a high level is set. It is designed to output a signal.

The time comparator 38 counts the number of consecutive high-level outputs (NG) output from the OR circuit 37, compares the counted number with a predetermined pair of reference times, and switches the output based on the comparison result. The switching control of the circuit 12 (FIG. 2) is performed. Here, the reference time is set to, for example, “7 seconds”. That is, if the continuous NG time is “7 seconds” or more, the output switching circuit 12 shown in FIG.
Is switched from the first terminal to the second terminal, and the composite video signal from the television tuner 9 is directly displayed on the display 15.

The memory control unit 19 controls the vertical synchronizing signal Vsync which has been normally separated and extracted by the synchronizing separation circuit 11.
And a pseudo-vertical synchronization signal generation circuit 61 for internally generating a pseudo-vertical synchronization signal, and a pseudo-vertical synchronization signal generation circuit 6 for generating a vertical synchronization signal Vsync which is disturbed upon detection of synchronization disturbance.
A switching switch circuit 62 for cutting off the input to 1; a vertical synchronization signal Vsync separated and extracted by the synchronization separation circuit 11 based on the determination result of the determination circuit 17; A synchronizing signal switching circuit (switch circuit) 63 for selectively switching one of the pseudo vertical synchronizing signal and a moving / still switching between an output video and a still image based on the determination result of the determination circuit 17 An image memory controller 64 and a write / read memory controller 65 that writes and reads video signals to and from the field memories 13a and 13b based on signals from the moving image / still image memory controller 64 and the synchronization signal switching circuit 63.

The pseudo vertical synchronizing signal generation circuit 61 generates a pseudo vertical synchronizing signal used as a substitute signal when the vertical synchronizing signal Vsync separated and extracted by the synchronizing separation circuit 11 is disturbed as shown in FIG. The pseudo-vertical synchronizing signal having the same clock as the pseudo-vertical synchronizing signal α (FIG. 3) output from the pseudo-vertical synchronizing signal generator FC1 in the vertical synchronizing disturbance detecting unit 33 is generated. Since the timing is adjusted to an appropriate (in a good image state) vertical synchronization signal Vsync output from the synchronization separation circuit 11, a phase shift does not occur between these signals.

Synchronous signal switching circuit (switch circuit) 63
As shown in FIG. 2, a composite video signal separated and extracted by the synchronization separation circuit 11 from a synchronization signal supplied to the write / read memory controller 65 of the memory control unit 19 based on the output from the OR circuit 37 of the determination circuit 17 The vertical synchronization signal Vsync in the middle and the pseudo vertical synchronization signal generation circuit 61
And the pseudo vertical synchronizing signal generated in step (1). That is, the synchronization signal switching circuit 63 has a first terminal connected to the synchronization separation circuit 11 and a second terminal connected to the pseudo vertical synchronization signal generation circuit 61.
When the output of the logical sum circuit 37 is at a high level (NG), the connection is switched to the second terminal side (the pseudo vertical synchronizing signal generation circuit 61 side). The connection is switched to the terminal number side (synchronous separation circuit 11 side). To switch the write / read memory controller 65 of the memory control unit 19 to input the pseudo vertical synchronization signal, the terminal of the synchronization signal switching circuit 63 should be switched from the first terminal to the second terminal. In this case, since the vertical synchronizing signal Vsync related to the reception is disturbed, the first terminal of the changeover switch circuit 62 (contact connecting the write / read memory controller 65 and the synchronization separation circuit 11).
Is connected to the pseudo vertical synchronizing signal generating circuit 61, the disturbed vertical synchronizing signal Vsync is input to the pseudo vertical synchronizing signal generating circuit 61 through the first terminal of the changeover switch circuit 62. Therefore, the changeover switch circuit 62 is switched from the first terminal to the second terminal. Thus, the influence of the disturbed signal is reduced as much as possible.

The moving image / still image memory controller 64
As shown in FIG. 2, based on the output from the OR circuit 37 of the determination circuit 17, it is determined whether to write and read the video to and from the field memories 13a and 13b as a still image or as a moving image. If the output from the sum circuit 37 is a low level signal (OK), a moving image is determined, and the effect is written and read by the memory controller 65.
On the other hand, if the output from the OR circuit 37 is a high-level signal (NG), a still image is determined, and the fact is transmitted to the write / read memory controller 65.

Write / read memory controller 65
When the moving image / still image memory controller 64 determines a moving image, the video signal to the field memories 13a and 13b is transmitted according to the timing of the vertical synchronization signal Vsync or the pseudo vertical synchronization signal selected by the synchronization signal switching circuit 63. While issuing a command to alternately execute writing and reading in substantially field units, when the moving image / still image memory controller 64 determines a still image, the other field memory to be written (for example, the first field memory 13a) , The operation to immediately stop the operation of writing the data into the field memory (for example, the second field memory 13b) and issue an instruction to execute the continuous reproduction.

<Operation> The operation of the in-vehicle television image processing apparatus having the above configuration will be described.

First, the composite video signal received by the television tuner 9 is branched and transmitted to an A / D converter 10, a sync separation circuit 11 and an output switching circuit 12, as shown in FIGS.

The A / D converter 10 converts the analog NTSC composite video signal into a digital signal, and writes the digital signal to the pair of field memories 13 in substantially field units in accordance with a command from the write / read memory controller 65 of the memory control unit 19.

The other composite video signal branched from the television tuner 9 is input to the sync separation circuit 11, where the vertical sync signal Vsync and the horizontal sync signal Hsync are input.
Are separated and extracted. The vertical synchronization signal Vsync that has been separated and extracted is input to the vertical synchronization disturbance detection unit 33 of the synchronization disturbance detection circuit 16 as shown in FIG.

Here, as shown in FIG. 3, in the pseudo vertical synchronization signal generator FC1 of the vertical synchronization disturbance detecting section 33, the reference clock generator 31 (FIG. 2) outputs 14.32 MHz which is four times the frequency of the color burst signal. Is supplied to the AND circuit 43, and the high portion of the output from the AND circuit 43 is accurately counted by the first counter circuit 44 to generate the high portion of the pseudo vertical synchronizing signal α. The falling of the output signal from the first counter circuit 44 is received by the latch circuit 46, and the fact (falling) is recorded (latched), and the signal is input to the AND circuit 43 at the same time. The reference clock input signal to the first counter circuit 44 is turned off. At the same time, the low portion of the output signal from the first counter circuit 44 is accurately counted by the second counter circuit 47, and a low portion of the pseudo vertical synchronization signal α is created. On the other hand, the vertical synchronizing signal Vsync from the synchronizing separation circuit 11
5, and outputs a reset trigger signal by detecting the fall of the vertical synchronization signal Vsync. The reset trigger signal resets the contents of both counter circuits 44 and 47, and at the same time, clears the latch contents of latch circuit 46.
Generates a pseudo vertical synchronizing signal α and outputs it to the matching circuit 48.

The coincidence circuit 48 calculates an exclusive OR of the pseudo vertical synchronizing signal α generated by the pseudo vertical synchronizing signal generator FC 1 and the vertical synchronizing signal Vsync (β) from the synchronizing separation circuit 11. 4 is output to the vertical synchronization determination circuit 34. Here, when the phase difference between the two signals α and β is large, the high output in the output signal θ takes a long time, while when the phase difference between the two signals α and β is small, the high output in the output signal θ is instantaneous. Becomes

The vertical synchronization determination circuit 34 (time constant circuit GT)
In 1), as shown in FIG. 3, the level of the output signal θ from the coincidence circuit 48 of the vertical synchronization disturbance detecting unit 33 is determined. That is,
The instantaneous change of the output signal θ from the coincidence circuit 48 of the vertical synchronization disturbance detecting unit 33 is determined by the change of the capacitor 51 of the time constant circuit GT1.
In this case, the transient amount of charge (remaining amount) stored in the capacitor 51 is thresholded at a predetermined timing and recorded in the vertical OK / NG signal register 34a. To For example, OK
In the case of (good image), the high output in the output signal θ output from the vertical synchronization disturbance detection unit 33 is instantaneous, and the remaining amount of the time constant circuit GT1 for eliminating the transient change amount of θ is small. Therefore, while the value recorded in the vertical OK / NG signal register 34a becomes low, in the case of NG (bad image), the high output during θ becomes long, so that when this is stored in the capacitor 51, , The transient remaining amount becomes large, and the value recorded in the vertical OK / NG signal register 34a becomes high. In this case, every time both of the signals α and β become low level, the vertical OK / NG signal register 34a is cleared and controlled by the low active AND circuit 49, and the determination result is kept NG forever. To prevent accidents.

On the other hand, the horizontal synchronization signal Hsync separated and extracted by the synchronization separation circuit 11 is input to a horizontal synchronization disturbance detection unit 35 of the synchronization disturbance detection circuit 16 as shown in FIG.
The horizontal synchronization determination circuit 36 of the determination circuit 17 determines OK or NG. Specifically, in the pseudo horizontal synchronization signal generator FC2 of the horizontal synchronization disturbance detection unit 35, the reference clock generator 3
1 (FIG. 2) to 4 times the frequency of the color burst signal.
The reference clock of 4.32 MHz is the AND circuit 5 in FIG.
5, the high portion of the output from the AND circuit 55 is accurately counted by the third counter circuit 53 to create a high portion of the pseudo horizontal synchronizing signal γ. Also, the falling of the output signal from the third counter circuit 53 is received by the latch circuit 54, and to that effect (falling).
At the same time, the signal is input to the AND circuit 55 and the input of the reference clock to the third counter circuit 53 is turned off. At the same time, the low portion of the output signal from the third counter circuit 53 is accurately counted by the fourth counter circuit 56, and a low portion of the pseudo horizontal synchronizing signal γ is created. On the other hand, the synchronization separation circuit 11
Is input to the reset circuit 57, and detects a fall of the horizontal synchronization signal Hsync to output a reset trigger signal. The reset trigger signal resets the contents of both counter circuits 53 and 56 and, at the same time, clears the latch contents of latch circuit 54. The counter circuits 53 and 56 again generate the pseudo horizontal synchronizing signal γ by the reference clock. Continuous matching circuit 5
8 is output. At this time, the coincidence circuit 58 outputs the pseudo-horizontal synchronization signal γ generated by the counter circuits 53 and 56,
The exclusive OR of the horizontal synchronization signal Hsync (δ) is calculated, and the calculation result is output to the multi-stage time constant circuit GT2 of the horizontal synchronization determination circuit 36.

In the multi-stage time constant circuit GT2, one of the five resistors R1 to R5 is selected by switching the switch element SW based on a signal from the vehicle speed judging section 18 (FIG. 7). Based on the relationship between the resistance values of the resistors R1 to R5 and the time constant determined by the capacitance of the capacitor 60, the magnitude of the signal from the coincidence circuit 58 of the horizontal synchronization disturbance detection unit 35 is compared.

Here, the selection of the resistors R1 to R5 is executed based on a signal from the vehicle speed judging section 18. That is, the vehicle speed judging section 18 divides the vehicle speed pulse output from the predetermined vehicle speed sensor Vs disposed around the tire of the automobile by the frequency divider 20 and converts the frequency into a signal having a predetermined pulse width. At 21, the vehicle speed pulse is counted per unit time based on the time counted by the reset timer 21a. And
By comparing the predetermined reference pulse with the comparator 22, it is determined whether the vehicle is in a high-speed running state, parked or stopped, or is in a normal running state. For example, when the vehicle speed is about 0.0 km / h, it is determined that the vehicle is parked and stopped. In other cases (including reverse driving), as the vehicle speed increases, the first vehicle speed level of less than 15 km / h (lower speed level) ), A second vehicle speed level (normal traveling level) of 15 km / h or more and less than 40 km / h, a third vehicle speed level (first high speed traveling level) of 40 km / h or more and less than 80 km / h, and 110 km of 80 km / h or more. / H less than the fourth vehicle speed level (second high-speed driving level) and 110 km / h
The driving state for each of the preset vehicle speeds, such as a fifth vehicle speed level (ultra-high speed traveling level) of h or higher, is recognized. Specifically, if the number of pulses per unit time is less than 4, the vehicle parks and stops; if the number of pulses is less than 8, the first vehicle speed level (low-speed level); if the number of pulses is less than 20, the second vehicle speed level (normal traveling level); If the number is less than 40, the third vehicle speed level (first high-speed traveling level), if the number of pulses is less than 55, the fourth vehicle speed level (second high-speed traveling level), and if the number of pulses is 55 or more, the fifth vehicle speed level (very high-speed traveling level). ). The switch element SW switches the resistances R1 to R5 of the multi-stage time constant circuit GT2 in accordance with the result of the determination on the running level. That is,
When the vehicle is parked or stopped, the contact point of the switch element SW is connected to the resistor R1 having the largest resistance value so that the judgment of the image disturbance is relaxed.
While switching to R5, the faster the vehicle speed,
The contacts of the switch element SW are connected to resistors R1 to R having a small resistance value.
5 is changed sequentially so that the judgment of the image disturbance becomes strict.

The resistors R1 to R5 selected as described above
At the predetermined time when the signal from the coincidence circuit 58 appears as a transient change in the time constant circuit GT2 (the capacitor 6).
The transient charge at 0) is thresholded,
Horizontal OK / N as the NG determination result in the time constant circuit GT2
It is stored in the G signal register 36a. At this time, since the resistances R1 to R5 are switched according to the vehicle speed, when the vehicle is parked or stopped in a place where the electric field is not so good, a still image may be displayed too long and the original moving image function of the television may be significantly impaired. When there is an error, the NG determination result is stored in the horizontal OK / NG signal register 36a in a state where the determination of the image disturbance is loose so that the continuous display of the still image is automatically prevented even if the image quality is somewhat inferior. In a case where the electric field strength environment changes drastically, such as during running, the NG determination result is stored in the horizontal OK / NG signal register 36a under strict determination.

When both the pseudo horizontal synchronizing signal γ and the horizontal synchronizing signal Hsync (δ) relating to reception are low, the vertical active / non-conversion circuit 77 clears the vertical OK / NG signal register 34a. Horizontal OK /
Reset of the data of the NG signal register 36a is appropriately performed.

The OR circuit 37, as shown in FIG.
The logical sum of the data in the NG signal registers 34a and 36a is calculated, and the vertical synchronizing signal Vsync and the horizontal synchronizing signal Hsy are calculated.
nc, at least one of the judgment circuits 3
When it is determined as NG in 4, 36, a high level signal is output.

In the synchronizing signal switching circuit (switch circuit) 63, as shown in FIG. 2, when the judgment result of the judgment circuit 17 (ie, the output result from the OR circuit 37) is at a high level (NG), the second signal is output. Terminal side (pseudo vertical synchronization signal generation circuit 61
Side), and when the output of the OR circuit 37 is at the low level (OK), the connection is switched to the first terminal side (synchronous separation circuit 11 side). At this time, the first terminal of the switch circuit 62 (the pseudo vertical synchronizing signal generation circuit 61)
The vertical synchronization signal Vsyn disturbed through the first terminal of the changeover switch circuit 62 to the pseudo vertical synchronization signal generation circuit 61 while being connected to the contact for connecting the synchronization signal to the synchronization separation circuit 11).
Since c is input, the changeover switch circuit 62 is switched from the first terminal to the second terminal so that the influence of the disturbed signal is reduced as much as possible.

At the same time, as shown in FIG. 2, the moving image / still image memory controller 64 controls the field memory 1 based on the output from the OR circuit 37 of the synchronization disturbance detecting circuit 16.
It is determined whether to write and read the video to and from 3a and 13b as a still image or a moving image. That is,
If the output from the OR circuit 37 of the synchronization disorder detection circuit 16 is a low level signal (OK), a moving image is determined, and in response to this, the write / read memory controller 65 performs a data write operation on the field memories 13a and 13b and While the data read operation is performed alternately on a field-by-field basis, when the moving image / still image memory controller 64 determines a still image, the write / read memory controller 65 stops writing to the field memories 13a and 13b, and The field data written in is read out repeatedly.

Thus, the field memories 13a, 13a,
The composite video signal read from 13b is switched to an analog signal by the D / A converter 14.

Here, if the continuous time of the "NG" signal output from the OR circuit 37 is less than a predetermined reference time (for example, 7 seconds), the time comparator 38 informs the output switching circuit 12 of that fact. And the contact of the output switching circuit 12 is held at the first terminal side. Therefore, the video signal output from the D / A converter 14 is transmitted to the display 15 via the output switching circuit 12, where the video is displayed.

On the other hand, in the time comparison by the time comparator 38, if the continuous time of the "NG" signal is longer than a predetermined reference time (for example, 7 seconds), the output switching circuit 12 is switched from the first terminal to the second terminal. And the composite video signal from the television tuner 9 is passed directly to the display 15 for display. This makes it possible to display a moving image corresponding to the electric field when the user wants to watch a moving image despite the fact that the radio wave condition does not recover easily at a very long signal stop at an intersection where the electric field is not very good. Can be.

As described above, according to the on-vehicle television image processing apparatus of this embodiment, the resistance R1 of the multi-stage time constant circuit GT2 depends on the running state of the vehicle speed.
~ R5 is switched to change the strictness of the judgment of the image disturbance in a fluid manner.
Relaxing the judgment of video disturbance to automatically prevent the continuous display of still images even if the image quality is somewhat inferior so that moving images are displayed as much as possible, while sudden changes in the electric field strength environment such as when driving at high speed In such a case, it is possible to display a large number of frame images while improving the image quality by switching high-quality still images with a strict determination every short time.

Second Embodiment <Structure> FIG. 8 is a diagram showing an in-vehicle television image processing apparatus according to a second embodiment of the present invention. In FIG. 8, the same reference numerals are given to elements having the same functions as those in the first embodiment. As shown in FIG. 8, the in-vehicle television image processing apparatus according to the present embodiment determines whether or not the position of the own vehicle has been changed by the car navigation device (running state detection unit) 70, and has not changed ( When it is determined that the vehicle is parked or stopped), the output switching circuit 12 is switched so that the received composite video signal is displayed on the display 15 as it is. The image disturbance is determined, and when it is determined that the vehicle is on a general road, the electric field intensity at the position of the own vehicle is estimated based on the area information held in advance, and the still image and the moving image are displayed on the display 15 while appropriately switching between the still image and the moving image. It is like that.

In general, a car navigation device recognizes the current position of a vehicle based on predetermined map information and performs virtual traveling on a map according to actual traveling of the vehicle toward a traveling destination. The optical disc (CD) is used while using both the GPS navigation system with a small recognition error of the car position and the autonomous navigation system completely independent of the reception state of the radio signal.
-ROM) for confirming the position of the vehicle with respect to the map information obtained from the device 76. That is, as shown in FIG. 9, the car navigation system traces the map by the autonomous navigation control unit 71 based on the vehicle speed pulse from the vehicle speed sensor and the direction based on the geomagnetism from the geomagnetic sensor, and performs a predetermined orbit at an altitude of about 20,000 km of the earth. More than one GP
A GPS signal transmitted from the S satellite is received by a GPS receiver 73 via an antenna 72, and a GPS control unit 74 confirms the position of the vehicle on a map by using information included in the GPS signal, and performs autonomous navigation. When a position shift occurs in the trace in the control unit 71, the GPS control unit 74
After performing the position correction (map matching) and performing the image processing in the dedicated signal processing unit 75, the information is displayed on the dedicated display 78.

The car navigation device 70
Has a function of transmitting a signal to that effect to the determination circuit 17 when the vehicle position has not changed.
7, when the signal indicating that the position of the vehicle has not changed is given from the signal processing unit 75 (FIG. 9) of the car navigation device 70, the output switching circuit 12 (FIG. 8) is switched to the D / A converter 14 side. Is switched to the television tuner 9 side, and the composite video signal originally received is displayed on the display 15 as it is.

The car navigation device 70 outputs a signal to that effect to the determination circuit 17 when the vehicle is traveling on a motorway or a highway. In this case, the judgment circuit 17 switches the criterion for judging image disorder most strictly.

Further, the determination circuit 17 has a built-in storage unit such as a ROM and the like. The storage unit stores the television set based on the position information of each television broadcasting station and the position information of a typical intersection. Data obtained by previously examining a television reception situation at the time of receiving a John broadcast is stored in advance. This data is used to evaluate the degree of reception (electric field strength) on a scale of, for example, five levels, and that all areas in a planar map expressed by latitude and longitude are received as three or four point plane polygon areas (area information). Are classified according to the degree of goodness. Then, when receiving the television broadcast, the determination circuit 17
The broadcast station receiving the broadcast station is specified from the reception frequency, the plane polygon area regarding the reception degree of the broadcast station is further specified, and the position of the own vehicle given from the car navigation device 70 is determined by any plane polygon. The electric field strength at each time is estimated depending on whether the image belongs to the area, and the degree of the determination of the image disturbance is switched based on the estimation result. In other words, when the image is located in a plane polygon area where the reception condition is estimated to be relatively good, the determination of the image disturbance by the determination circuit 17 is strict, while the plane polygon area where the reception condition is estimated to be relatively poor is determined. , The judgment of the image disturbance in the judgment circuit 17 is relaxed.

Here, as in the first embodiment, the gradual switching of the judgment of the image disturbance is performed by the multi-stage time constant circuit GT.
This is performed by switching the two resistors R1 to R5 (see FIG. 6).

By selecting a time constant adapted to the running position (electric field strength) of the car and forcibly displaying a moving image while the car is parked or stopped, the most suitable for the running situation of the car is selected. Video and still images can be separated and displayed.

In the first embodiment, only the vehicle speed is used, and in the second embodiment, only the traveling position of the vehicle is used to switch the judgment of the image disturbance in the judgment circuit 17 strictly. The determination of the image disturbance in the determination circuit 17 may be switched strictly based on both the vehicle speed and the traveling position of the vehicle. In this case, even if the vehicle speed does not change, when it is estimated that the electric field intensity related to the reception has changed because the running position of the vehicle has moved beyond each plane polygon area, the judgment of the video disturbance is strictly adjusted accordingly. Is changed to be changed step by step, but even if the change in the electric field strength is not estimated, the vehicle speed changes, and accordingly, the degree of the determination of the image disturbance is changed to be changed step by step. I just need. Switching by the output switching circuit 12 is also performed by the signal from the time comparator 38 (FIG. 2) described in the first embodiment and the parking and stopping from the car navigation device 70 as in the second embodiment. A logical sum with a signal indicating that the signal is in the middle is calculated, and in any state, the output switching circuit 12 is switched to display the received composite video signal on the display 15 as it is.

[0071]

According to the first aspect of the present invention, a strict criterion is used as a criterion for determining whether to permit / non-permit the disturbance of the synchronization signal detected by the synchronization disturbance detection circuit. A plurality of gradual criterions are provided, and the criterion for permitting / non-permissible turbulence of the synchronization signal is gradually changed in accordance with a traveling state such as a vehicle speed or a traveling position of the vehicle. Therefore, switching between a still image and a moving image can be performed according to the running state of the car.

More specifically, as in the second aspect of the present invention, the vehicle speed judging section as the running state detecting section counts the vehicle speed pulse from the vehicle speed sensor to judge the magnitude of the vehicle speed. The higher the speed, the more gradually the criterion for accepting / non-permitting the disturbance of the synchronization signal is changed to a stricter criterion. Even if the image quality is slightly inferior, the continuous display of the still image is automatically prevented even if the image quality is inferior, so that the moving image is displayed as much as possible. By switching a high-quality still image by a strict determination every short time, a large number of frame images can be displayed while improving the image quality.

Alternatively, as in the invention according to claim 5, a car navigation device as a traveling state detecting unit detects whether or not the vehicle is traveling on a motorway or a highway, and determines whether or not the vehicle is running on a motorway. When the vehicle is traveling on a highway, the criterion for permitting / non-permitting the disturbance of the synchronization signal is changed to a strict criterion. By switching high-quality still images at short intervals in the determination, a large number of frame images can be displayed while improving the image quality.

Further, as in the invention according to claim 6,
The traveling position of the vehicle is detected by a car navigation device as a traveling state detection unit, and a determination circuit compares the traveling position of the vehicle obtained by the car navigation device with predetermined area information to determine the electric field intensity at the current vehicle position. If the magnitude of the electric field strength is recognized, and the electric field strength is increased according to the magnitude of the recognized electric field strength, the allowable / non-permissible criterion for the disturbance of the synchronization signal is gradually changed to a strict criterion. The degree of the determination of the image disturbance can be fluidly changed according to the electric field strength related to the reception of the video signal, and therefore, switching between a moving image and a still image can be appropriately performed according to the electric field strength.

According to the third and seventh aspects of the present invention, the time constant circuit in the decision circuit is formed by a simple configuration such as a single capacitor, a plurality of resistors, and a switch element for switching these resistors. It is possible to determine whether or not the disturbance is allowable, and it is possible to simplify the device configuration.

According to the invention described in claim 4, when the non-permissible continuous time is longer than the predetermined reference time, or according to the invention described in claim 8, the car navigation system transmits the When a signal indicating that the vehicle is parked or stopped is obtained, the television image received by the television tuner is forcibly output to the display as it is. Also, when the electric field condition worsens due to waiting for a very long signal such as a crossing point, etc., when there is a possibility that the still image will be displayed too long and the original video function of the TV may be significantly impaired, even if the image quality is somewhat poor By automatically preventing continuous display of a still image, there is an effect that a moving image corresponding to the electric field can be easily displayed.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an outline of an in-vehicle television image processing device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing an in-vehicle television image processing device according to the first embodiment of the present invention.

FIG. 3 is a block diagram illustrating a vertical synchronization disturbance detection unit and a vertical synchronization determination circuit;

FIG. 4 is a waveform diagram showing a vertical synchronization disturbance detecting operation in a vertical synchronization disturbance detecting unit.

FIG. 5 is a waveform diagram illustrating an operation principle of an AND circuit connected to the vertical synchronization determination circuit.

FIG. 6 is a block diagram illustrating a horizontal synchronization disturbance detection unit and a horizontal synchronization determination circuit.

FIG. 7 is a block diagram illustrating a vehicle speed determination unit and a horizontal synchronization determination circuit according to the first embodiment of the present invention.

FIG. 8 is a block diagram showing an outline of an in-vehicle television image processing device according to a second embodiment of the present invention.

FIG. 9 is a block diagram illustrating a configuration of a car navigation device.

FIG. 10 is a block diagram showing a conventional in-vehicle television image processing device.

[Explanation of symbols]

 9 Television Tuner 10 A / D Converter 11 Synchronization Separation Circuit 12 Output Switching Circuit 13 Field Memory 13a, 13b Field Memory 14 D / A Converter 15 Display 16 Synchronization Disturbance Detection Circuit 17 Judgment Circuit 18 Vehicle Speed Determination Unit 19 Memory Control Unit 20 Frequency divider 20a Vehicle type switch 21 Pulse counter 21a Reset timer 22 Comparator 31 Reference clock generator 33 Detection unit 34 Vertical synchronization determination circuit 34a Vertical OK / NG signal register 35 Detection unit 36 Horizontal synchronization determination circuit 36a Horizontal OK / NG signal register 37 OR circuit 38 Time comparator 43 AND circuit 44 First counter circuit 45 Reset circuit 46 Latch circuit 47 Second counter circuit 48 Match circuit 49 Low active AND circuit 50 Resistance 51 CON Sensor 53 Third counter circuit 54 Latch circuit 55 AND circuit 56 Fourth counter circuit 57 Reset circuit 58 Match circuit 60 Capacitor 61 Pseudo vertical synchronization signal generation circuit 62 Switching switch circuit 63 Synchronization signal switching circuit 64 Still image memory controller 65 Memory controller Reference Signs List 70 car navigation device 77 low active AND circuit FC1 pseudo vertical synchronizing signal generator FC2 pseudo horizontal synchronizing signal generator GT1 time constant circuit GT2 multi-stage time constant circuit R1 to R5 resistance Vs vehicle speed sensor Hsync horizontal synchronizing signal Vsync vertical synchronizing signal

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Motomasa Yoshida 1-7-10 Kikuzumi, Minami-ku, Nagoya-shi, Aichi Inside Harness Research Institute, Inc. (72) Inventor Kaikan Yamaguchi Kikuzumi, Nagoya-shi, Aichi 1-7-10 Harness Research Institute, Inc. F-term (reference) 2F029 AA02 AB01 AB07 AC01 AC02 AC09 AC16 AD01 5C025 AA13 AA25 BA27 CA03 DA07 5C053 FA24 FA27 HA04 HA22 HA33 JA27 JA28 KA03 KA08 KA10 KA18 KA20 LA07 LA20 5H180 AA01 CC12 FF04 FF05 FF22 FF32

Claims (8)

[Claims] 1. An in-vehicle television image processing device for displaying a television image on a predetermined display based on a radio wave received by an automobile, comprising at least one of a vehicle speed and a traveling position of the automobile. A traveling state detection unit that detects a traveling state of the automobile, a television tuner that receives a radio wave related to a video signal related to the television image, and a memory that temporarily stores the video signal received by the television tuner A synchronization separation circuit that separates and extracts a synchronization signal from a video signal received by the television tuner; a synchronization disturbance detection circuit that detects disturbance of the synchronization signal separated and extracted by the synchronization separation circuit; A determination circuit for determining whether or not the synchronization disturbance detected by the circuit is within an allowable range; and And a memory controller that switches between output video and video. The determination circuit is configured to determine whether the synchronization signal disturbance detected by the synchronization disturbance detection circuit is allowable / non-permissible. And a plurality of criterions of a strict criterion and a gradual criterion, and the permission / non-permission criterion for the disturbance of the synchronization signal is changed stepwise according to the determination result of the traveling state detection unit. An in-vehicle television image processing device characterized in that: 2. The in-vehicle television image processing device according to claim 1, wherein the traveling state detection unit counts a vehicle speed pulse given from a predetermined vehicle speed sensor to determine a vehicle speed. A determining unit configured to determine a permissible / non-permissible determination criterion for disturbance of the synchronization signal in a stepwise manner as the vehicle speed increases in accordance with a result of the determination by the vehicle speed determining unit. An in-vehicle television image processing device having a function of changing to a reference. 3. The in-vehicle television image processing device according to claim 2, wherein the determination circuit converts a signal of a predetermined voltage level regarding the disturbance of the synchronization signal detected by the synchronization disturbance detection circuit. A time constant circuit for inputting the signal to a predetermined capacitor and determining whether the disturbance of the image is acceptable or unacceptable depending on the magnitude of the transient change of the storage in the predetermined capacitor; The vehicle speed is high according to a result of the determination by the vehicle speed determination unit, the plurality of resistors having different resistance values connected between the capacitor and the capacitor and the synchronization disturbance detection circuit and connected in parallel with each other. A switching element that switches to a resistor having a smaller resistance value and changes to a stricter criterion. 4. The in-vehicle television image processing device according to claim 1, wherein the determination circuit is configured to determine whether the synchronization signal is determined according to the permissible / non-permissible criterion. A time comparator for comparing whether or not the continuous time in which the disturbance is continuously unacceptable is longer than a predetermined reference time, wherein the in-vehicle television image processing device normally stores the time stored in the memory. While outputting a video signal to the display, when a comparison result that the non-permissible continuous time is longer than a predetermined reference time in the time comparator is obtained, the video signal received by the television tuner is obtained. An in-vehicle television image processing device further comprising an output switching circuit that switches to output the television image as it is to the display. 5. The in-vehicle television image processing device according to claim 1, wherein the traveling state detection unit is a car navigation device that detects a traveling position of the vehicle based on predetermined map information. In particular, when the traveling position of the car coincides with a motorway or a highway, the vehicle has a function of outputting a signal to that effect to the determination circuit. A function of changing a criterion for permitting / non-permitting the disturbance of the synchronization signal to a strict criterion when receiving a signal indicating that the signal matches the criterion from the car navigation device. Television video processing device for vehicle. 6. The in-vehicle television image processing device according to claim 1, wherein the traveling state detection unit detects a traveling position of the vehicle based on predetermined map information. In the determination circuit, region information in which the position on the map is divided according to the magnitude of the electric field intensity related to the television reception is set in advance, and the traveling position of the car obtained by the car navigation device A function of recognizing the magnitude of the electric field strength at the current vehicle position by comparing the electric field strength with the area information. An in-vehicle television image processing apparatus characterized by having a function of gradually changing a non-permissible criterion to a strict criterion. 7. The in-vehicle television image processing device according to claim 5, wherein the determination circuit is configured to determine a predetermined voltage for the synchronization signal disturbance detected by the synchronization disturbance detection circuit. A level signal is input to a predetermined capacitor, and a time constant circuit is provided which determines whether the disturbance of the video is allowable or unacceptable depending on the magnitude of the transient change in the storage at the predetermined capacitor. A single capacitor; a plurality of resistors having different resistance values connected between the capacitor and the synchronization disturbance detection circuit and connected in parallel with each other; and a traveling position of the vehicle obtained by the car navigation device. As the electric field strength at the current vehicle position recognized in comparison with the area information is larger, the resistance is switched to the smaller resistance value and the strict determination base is set. Automotive television picture processing device and a switching element to change. 8. The in-vehicle television image processing device according to claim 5, wherein the determination circuit changes a traveling position of the vehicle obtained by the car navigation device. The on-vehicle television image processing device detects whether or not the vehicle position is normal, and outputs the image signal stored in the memory to the display, while the determination circuit does not change the traveling position of the vehicle. Further comprising an output switching circuit that switches the television image received by the television tuner to be output to the display as it is when the detection result is obtained. Processing equipment.